JP2009106787A - Game machine - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To accurately test presentation image storing means which stores presentation image data. <P>SOLUTION: A testing motion control means 311 includes bit data reading means for specifying all out of a plurality of addresses using address lines, and reading bit data from data areas corresponding to all the specified addresses; error control code operating means for operating error control codes related to a plurality of bit data repeatedly read by the bit data reading means; and error control code comparing means for comparing the operated error control codes and the true values of the error control codes related to the plurality of repeatedly read bit data. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a gaming machine equipped with a display device that executes a predetermined display operation.

As this type of gaming machine, a gaming machine having a test function related to a display operation of a display device such as a pachinko machine is known (for example, see Patent Document 1).
In a known game machine having a display function test function of such a display, a predetermined test image is displayed on the display and compared with a predetermined reference image to check the display state. A test is being conducted on the display operation.

  In this known game machine, a test image used in a display operation test is displayed in a so-called character ROM that stores character image data (corresponding to “effect image data”) used in a normal display operation. Test image data to be stored is also stored. When the display operation of the display device is tested, for example, a video display processor (VDP) acquires test image data from the character ROM, and a test image is displayed on the display device based on the acquired test image data. Is done. The test image displayed in this way is compared with a predetermined reference image prepared in advance, and the display state of the display is visually checked, for example, visually.

Japanese Patent Laid-Open No. 10-277223 (page 4, FIG. 1)

  However, checking the display state of the test image displayed on the display unit using the test function by visual inspection is inefficient in inspection work, and if it is attempted to perform visual inspection on all products in the manufacturing process, it takes time for inspection. It was past.

  Therefore, an object of the present invention is to provide a technique capable of efficiently inspecting a display operation in a short time.

(Solution 1)
The gaming machine of the present invention shifts to a special gaming state that is more advantageous to the player than the normal gaming state when a predetermined condition is satisfied in a normal gaming state in which the game progresses according to the consumption of the game medium. In a gaming machine, game control means for controlling game operations in the normal game state and the special game state, and effect control means for controlling effect operations accompanying the progress of the game and outputting effect display commands relating to visual effects And display control means for controlling the effect display operation related to the effect display based on the effect display command, wherein the display control means outputs the effect image data corresponding to the image related to the visual effect for each predetermined unit. Each of the divided unit data is stored in advance in each data area with the first address, and designated by a predetermined address line. The effect image storage means for reading out the unit data stored in the data area corresponding to the first address via the data line, and the reference instruction command for referring to the data area of the effect image storage means are written A possible instruction storage means; a second address designating means for designating a second address associated with the first address, and writing the reference instruction command into the instruction storage means; The first address is converted, the converted first address is input to the address line, and the unit data is read from the data area of the effect image storage means corresponding to the input first address via the data line. Repeatedly, direct acquisition of effect image data composed of a plurality of unit data read repeatedly, and this direct acquisition Unit display data from the data area of the effect image storage means corresponding to the first address, to the effect display control means for controlling the effect display operation based on the effect image data and the reference area to which the second address is assigned. The reference area management means for reading and referring to the unit data of the data area of the effect image storage means and the effect image data stored in the effect image storage means cannot be directly referred to, but the designated second address is given. And an inspection operation control means for referring to the unit data in the data area of the effect image storage means corresponding to the first address from the reference area and inspecting with reference to the referenced unit data. . Note that the consumption of game media here refers to a game possessed by a player by launching a game ball as a game medium in the game area when the game machine is a ball-type game machine, for example. This means that the amount of media is reduced. On the other hand, when this gaming machine is, for example, a revolving type gaming machine, it means that the amount of gaming media possessed by a player is reduced by placing (betting) gaming media. .

  First, in the gaming machines of the present invention including general gaming machines, the effect display control means such as a video display processor directly refers to the effect image data stored in advance in the effect image storage means because of the necessity in the game. The effect display operation is controlled based on the effect image data. On the other hand, the inspection operation control means such as a CPU (Central Processing Unit) controls the inspection operation and is not necessary directly in the game, so it directly refers to the effect image data stored in the effect image storage means. You can't do that.

  In the gaming machine of the present invention, first, the second address designating means writes a predetermined reference instruction command to the command storage means and designates the second address assigned to the predetermined reference area. The effect display control means converts the designated second address into the first address, and inputs the first address to the address line, whereby the unit data is obtained from the data area of the effect image storage means via the data line. Repeat reading.

  The reference area management means reads unit data from the data area of the effect image storage means corresponding to the first address into the reference area to which the second address is assigned, and stores the unit data of the data area of the effect image storage means. It can be referred to by the inspection operation control means. Therefore, the inspection operation control means cannot directly refer to the effect image data stored in the effect image storage means, but the data of the effect image storage means corresponding to the first address from the reference area to which the designated second address is assigned. The unit data can be inspected with reference to the area.

  For this reason, in the gaming machine of the present invention, even if the inspection operation control means cannot directly refer to the data area of the effect image storage means, the data area of the effect image storage means indirectly via the reference area It becomes possible to inspect with reference to the unit data. Therefore, according to the gaming machine of the present invention, even if the inspection operation control means cannot refer to the data area of the effect image storage means, the effect display control means acquires the effect image data from the effect image storage means, and the time By executing such a simple test display, it becomes unnecessary to inspect whether or not the address lines and data lines of the effect image storage means are normal.

  That is, according to the gaming machine of the present invention, the inspection operation control means cannot refer to the data area of the effect image storage means, but indirectly designates the address line of the effect image storage means and refers to the data area. Since it is possible to inspect and refer to the effect image data indirectly via the data line of the effect image storage means by referring to the address line and data without executing a test display that takes an inspection time. The line can be inspected efficiently and in a short time.

(Solution 2)
In the above solution 1, in accordance with a preset rule, a combination of any one of the at least three address lines is designated, and the first address is repeatedly changed from the designated address line combination. However, it further comprises unit data reading means for repeatedly reading out the unit data from the data area corresponding to the first address inputted by repeatedly changing and inputting the data via the data line, and the inspection operation control means comprises: Error control code calculation means for calculating an error control code for the plurality of unit data repeatedly read, the calculated error control code, and the true value of the error control code for the plurality of unit data repeatedly read It is desirable to include an error control code comparison means for comparing.

  The gaming machine of the present invention reads out unit data by designating a combination of address lines in this way, and further calculates an error control code for a plurality of unit data that are repeatedly read out, and also calculates the calculated error control code. Even if it is confirmed whether or not is coincident with the true value of the error control code, the overall time is shorter than the conventional one. For this reason, according to the gaming machine of the present invention, even if the inspection operation control means cannot directly refer to the data area of the effect image storage means, the error control code is applied to the effect image data that can be indirectly referenced. If an inspection that is calculated and compared with the true value is executed, the inspection can be performed efficiently and in a short time without performing a time-consuming test display.

  In addition, the gaming machine of the present invention can not only confirm the error control code related to the plurality of read unit data, but also confirm the error control code, and thereby the data line and address line of the effect image storage means can be used together. Whether the connection state is normal or not can be confirmed efficiently and in a short time even when the inspection operation control means cannot directly refer to the data area of the effect image storage means. Here, “inspection” refers to confirming whether the connection state of the address lines and data lines of the effect image storage means is normal, and the unit data stored in the effect image storage means is normal. It means at least one of confirming whether or not.

  In addition, according to such a configuration, the time required for inspecting one display control board is small, so even when all the manufactured display control boards are inspected, the time is not required as in the prior art. For this reason, since the gaming machine of the present invention can be mounted with any of the display control boards that have been inspected in the manufacturing process, the reliability of the display operation can be improved.

(Solution 3)
In the solving means 1 or 2, the second address designating means further designates a part of the remaining address lines not designated according to another rule different from the preset rule. Then, the effect display control means inputs the first address from the combination of the further specified part of the address lines and the already specified address lines while repeatedly changing the first address. It is desirable that the unit data is repeatedly read from the data area corresponding to the first address via the data line.

  According to the gaming machine of the present invention, since the number of address lines specified by the second address specifying means increases, the number of data areas for reading unit data can be increased, and the effect image storage means can be inspected more accurately. . Therefore, according to the gaming machine of the present invention, not only can the effect image storage means be inspected efficiently and in a short time, but also the reliability of the inspection result of the effect image storage means can be further improved.

(Solution 4)
In any one of the above solutions 1 to 3, the display control board starts the test display operation upon receiving a test command related to the test display operation instruction for the first time after power-on. desirable.

  In this way, in the gaming machine of the present invention, even if the display control means does not have a special function, the display control means starts the test display only when it receives a test command for the first time after power-on. . For this reason, in the gaming machine of the present invention, after that, even if a test command is received during the game, for example, the test display operation is not suddenly executed, and the player's concentration is not interrupted by the interruption of the game. It can be immersed and the operation of the gaming machine can be enhanced.

(Solution 5)
In any one of the solving means 1 to 4, the display control means receives the command other than the test command related to the test display operation instruction during the execution of the test display operation. It is desirable to stop the display operation.

  According to such a configuration, even if the display control means does not have a special function, the display control means can receive a command other than the test command (for example, an effect display command) during the execution of the test display operation. Thus, the test display operation can be stopped and the performance display operation can be automatically executed.

(Solution 6)
In the gaming machine according to any one of the above solutions 1 to 5, it is desirable that the gaming machine of the present invention is a ball-type gaming machine. Here, as a basic configuration of the ball-type game machine, a launching means for launching a game ball into the game area, and a winning detection means for detecting that a game medium launched into the game area has won a start winning opening; The symbol display means for starting the variable display of the symbol triggered by the winning at the start winning opening and executing the predetermined lottery, and displaying the stop symbol corresponding to the lottery result, and the stop symbol is a specific display mode In this case, it is preferable to include special game state transition means for shifting from the normal game state to the special game state.

(Solution 7)
In the gaming machine according to any one of the above solutions 1 to 5, it is desirable that the gaming machine of the present invention is a ball-type gaming machine. Here, as a basic configuration of the ball-type game machine, a winning means for detecting that a game ball has won at a start winning opening provided in the game area and a launch means for firing the game ball in a predetermined game area are detected. And a winning device that opens and closes the movable piece in response to a winning at the start winning opening, and accepts a game ball, and a game received by the winning device along with the opening and closing operation of the movable piece It is desirable to include special game state transition means for transitioning to the special game state when the ball has passed the specific area.

(Solution 8)
In the gaming machine according to any one of the above solutions 1 to 5, it is desirable that the gaming machine of the present invention is a revolving type gaming machine. Here, as a basic configuration of the swing type gaming machine, the game is started and stopped according to the player's operation in a state where a predetermined number of game values are multiplied for each game, and the display of the symbols is performed by the start. While changing, a symbol display means for displaying a combination of a plurality of symbols at the time of stopping, a start operation means capable of accepting a start operation for starting the symbol display device, and a stop for stopping the symbol display device The stop operation means that can accept the operation and the symbol display mode when the symbol display means stops determine whether or not there is a symbol combination. If a predetermined symbol combination is displayed, the symbol combination type is displayed. The game value giving means for giving the player a corresponding number of game values and a special symbol combination advantageous to the player when a combination of specific symbols is displayed when the symbol display means is stopped It is desirable and a special game state transition means for shifting the skill state. Note that the predetermined number of game values to be multiplied for each game may be one or more.

  The gaming machine of the present invention can accurately inspect effect image storage means storing effect image data.

It is a front view which shows the structural example of the pachinko machine to which the game machine as 1st Embodiment of this invention was applied. It is a block diagram which shows the electrical structural example of a pachinko machine. It is a block diagram which shows an example which simplified and showed the electrical structure of the symbol control board. It is an image figure which shows an example of a mode test | inspected regarding control of the display operation of a symbol control board by a test apparatus. It is a flowchart which shows an example of the basic process sequence in the normal mode after the reset start process in a symbol control board. It is a flowchart which shows an example of the procedure of a display operation control process. It is a flowchart which shows an example of the procedure of a command determination process. It is a figure which shows an example of a mode that the range of the designated address line changes for every scanning frequency. It is a figure which shows an example of the value (bit value) for every bit regarding the address which should be input into a designated address line. It is a figure which shows an example of the calculation result regarding which bit among the free bits of an address line is set to "1" according to a 2nd rule in the 4th time of scanning. It is a figure showing the example of an image of the result of having tested by combining the address scanning process according to said each rule. It is a front view which shows the structural example of the pachinko machine to which the game machine as 2nd Embodiment of this invention was applied. It is a front view which shows the structural example of the slot machine to which the game machine as 3rd Embodiment of this invention was applied. FIG. 14 is a diagram schematically illustrating configurations of various mechanism elements, electronic devices, operation members, and the like equipped in the slot machine illustrated in FIG. 13.

Hereinafter, an embodiment in which the present invention is applied to a pachinko machine will be described with reference to the corresponding drawings.
(1. First embodiment)
FIG. 1 is a front view showing a configuration example of a pachinko machine 1 to which a gaming machine according to a first embodiment of the present invention is applied. Hereinafter, a schematic configuration example of the pachinko machine 1 will be described first.
The pachinko machine 1 is configured with a wooden outer frame as a base of an outer shape, and a frame body such as a base frame or a front frame (collectively referred to as “main body frame 17”) is mounted on the inside thereof. . Among these, the game board 2 is detachably fitted in the base frame, and a substantially circular game area is formed on the front surface thereof. A number of guide nails (not shown) are driven on the game board 2 in a predetermined gauge arrangement, and a windmill, various winning openings 15 (winning devices), a gate 13 (gate device), a decorative lamp, and the like Is arranged as a board surface component (both are not referenced). Each of the various winning openings 15 is provided with a winning detector for detecting the winning of a game ball. Further, on the back surface of the game board 2, various boards and electronic components such as a main control board, a sub control board, and a liquid crystal control board (not shown in FIG. 1) are mounted. A character ROM that has undergone a predetermined inspection is mounted on the liquid crystal control board.

  In addition, an upper plate 4 and a lower plate 6 are provided on the front surface of the pachinko machine 1 for containing game balls, and game balls contained in the upper plate 4 are sequentially fired at the lower right corner position. A firing handle 8 is provided. An effect button 10 that can be appropriately pushed by the player is disposed at the left side of the upper plate 4. In addition, a large number of frame lamps (such as frame decoration lamps) are decoratively arranged on the front surface (glass frame 5) of the pachinko machine 1, and a speaker device for performing sound output as the game progresses is installed. (No reference sign). The glass frame 5 is configured to be able to open and close the front surface of the main body frame 17 via a hinge mechanism (not shown).

A plurality of pachinko machines 1 are usually installed side by side on an island facility of a game arcade, and a card unit (in the case of a CR machine) is provided as a sand 12 between the machines.
A ball stage 14a is formed at the lower edge of the center accessory 14, and when a game ball is guided on the ball stage 14a, the movement is changed while staying there temporarily. When the game ball to which movement is given in the ball stage 14a falls to the entrance of the ball guide path 14b formed in the ball stage 14a, the game ball is guided to the ball guide path 14b and arranged immediately below it (winning prize) The winning is detected by the winning detection device 15 provided in the mouth).

  In addition, a decorative symbol display device 16 is arranged in the center accessory 14, and the display content of the decorative symbol display device 16 changes, for example, when a winning at a start winning opening is made. Thus, an image or the like representing the variation of the symbol is displayed. The symbol stops after it fluctuates over a certain period of time. At this time, if it becomes a predetermined symbol display mode (for example, a display mode in which three symbols of the same kind are arranged), it becomes a big hit, and the pachinko machine 1 has a special advantage that is advantageous to the player. Transition to a gaming state (referred to as “special gaming state”).

  When the special game state is entered, the display content on the decorative symbol display device 16 is switched to a round display with a big hit, and a round effect (such as counting the number of winning prizes or the number of continuous rounds) is executed. In addition, information indicating that a special game is being played (such as “probable change” or “short time”) may be displayed when a special game (such as “probability change” or “short time”) is entered. is there.

  A special symbol display device 41 including, for example, four light emitting diodes (LEDs) is provided on the lower edge portion of the center accessory 14 in the game board 2. The special symbol display device 41 is connected to the main control board 3 and is configured to change the lighting state over a predetermined time in response to the start winning. In addition, a normal symbol display device 42 including, for example, two light emitting diodes (LEDs) is provided at the lower edge of the center accessory 14. The normal symbol display device 42 is also connected to the main control board 3 and is configured to change the lighting state over a predetermined period when the gate 13 passes.

  A special symbol holding display device 43 including, for example, four light emitting diodes (LEDs) is provided at the lower edge of the game board 2. This special symbol hold display device 43 is connected to the main control board 3, and is configured to hold the start winning while the lighting state of the special symbol display device 41 is changing and to display the hold status. Further, a normal symbol holding display device 44 including, for example, four light emitting diodes (LEDs) is provided at the lower edge of the game board 2. The normal symbol hold display device 44 is connected to the main control board 3 and is configured to hold the passage of the gate 13 while the lighting state of the normal symbol display device 42 is changing and to display the hold status. Yes. Further, on the back of the game board 2, a main control board, a sub control board and a payout control board, a prize ball payout device, etc., not shown in FIG.

(2. Electric configuration example of pachinko machine)
FIG. 2 is a block diagram illustrating an electrical configuration example of the pachinko machine 1.
The main body frame 17 is provided with a payout control board 25 and a firing control board 47. On the other hand, a main control board 3 and a sub control board 35 are provided on the back of the game board 2 at the top thereof. Further, a symbol control board 30 as a display control board is provided on the back of the game board, and the symbol control board 30 is connected to the decorative symbol display device 16.

  The main control board 3 is connected to a board such as the sub control board 35 and the payout control board 25. The payout control board 25 is also connected to the launch control board 47 and the prize ball payout device 21, and the sub control board 35 is also connected to the symbol control board 30 as a display control means for controlling the display operation. Yes. The sub control board 35 controls the symbol control board 30, the lamp relay board 32, and the lamp relay board 34.

  The sub-control board 35 transmits an effect display command for controlling an effect display operation according to the progress of the game during the game operation, particularly to the symbol control board 30. The game board 2 is provided with a decorative symbol display device 16. The decorative symbol display device 16 is controlled by the symbol control board 30, and a character image corresponding to the progress of the game at a substantially central position of the game area. (Effect image) can be displayed.

  Further, the speaker 29 is disposed, for example, on the front frame of the pachinko machine 1 or the inside of the upper plate 4. Normally, the speaker 29 outputs a sound effect or a sound accompanying the progress of the game. . In addition, the panel decoration lamp 12 is mounted on the game board surface, and the panel decoration lamp 12 can be decorated and produced by light emission in the game area under the control of the lamp relay board 32. Further, the frame decoration lamp 31 can be arranged at an appropriate position on the front frame by the control of the sub-control board 35 via the lamp relay board 34 and can give decoration and effects by light emission.

(2-1. Configuration example of main board)
The main control board 3 includes electronic components such as a CPU (hereinafter referred to as “main CPU”), a RAM, a ROM, an input / output interface, etc. (all not shown). A winning detector 15 as a winning detecting means is connected, and this winning detector 15 is used to receive balls to various winning ports (start winning port, large winning port, general winning port, etc.) in the game area. It is detected that there is, and the detection signal is output to the main control board 3.

  Further, even when a game ball passes through the gate 13, the passage of the game ball is detected by a gate passage detector (gate switch) 13a as a gate passage detection means, and a gate passage signal is generated. On the other hand, a solenoid 18 is provided in the special winning opening, and this solenoid 18 is used to open and close the special winning opening. The solenoid 18 is connected to the main control board 3, and its operation is controlled by the main control board 3.

  Control of the gaming operation by the main control board 3 is performed, for example, by the main CPU executing a predetermined control program (hereinafter referred to as “main control program”). The main CPU generates a random number on the software in accordance with the execution of the main control program. When the main CPU detects a winning at the start winning opening, the main CPU acquires the random number as a trigger. If the random number value obtained at this time matches a predetermined winning value (lottery), the main CPU outputs a command signal for displaying a symbol in a big winning manner to the sub-control board 35, and thereafter The combination of symbols is displayed on the decorative symbol display device 16 in a big-hit manner, and the big-hit. On the other hand, if the acquired random number value does not match the predetermined hit value, the main CPU outputs a command signal for displaying the symbols in a manner that is out of the sub-control board 35. continue. The main CPU determines the lottery result and the fluctuation pattern, and the main CPU outputs the lottery result and the fluctuation pattern command.

  The sub-control board 35 has a predetermined command reception buffer (not shown), and stores received commands (such as lottery results and variation pattern commands) in the command reception buffer. The sub control board 35 acquires and analyzes the command stored in the command reception buffer. Further, the sub-control board 35 controls the amplifier board 30 to output sound from the speaker 29 based on the analyzed command, or controls the lamp relay board 32 to make the panel decoration lamp 12 in a predetermined color. The frame decoration lamp 31 is turned on or off in a predetermined color via the lamp relay board 34. Further, the sub control board 35 determines an effect item such as a reach notice that the main CPU does not determine. And this sub control board 35 transmits the information regarding this effect item with respect to the design control board 30 with the effect command (variation pattern command etc.) from the main control board 3. The symbol control board 30 controls the effect display operation by the decorative symbol display device 16 based on the received information related to the effect command and the effect item.

  Here, the main control board 3 (the main CPU) operates the solenoid 18 by shifting to the special game state when the big hit is made, and opens and closes the opening / closing door of the big winning opening in a predetermined pattern. A player can win a lot of prize balls by winning a game ball as an example of a game medium during the opening. In addition to the above, the control of the game operation by the main control board 3 has various contents, but since all are well-known, detailed description is omitted here.

(2-2. Configuration example of payout control board)
The payout control board 25 also has a CPU, RAM, ROM, input / output interface, etc. (all not shown). In particular, the payout control board 25 is connected to the main control board 3 so as to be capable of bidirectional communication. Has been. That is, between the main control board 3 and the payout control board 25, serial signal upper and lower lines Su, Sd and ACK signal transmission lines Au, Ad are laid in parallel therewith.

  For example, when a winning ball command instructing the payout of a winning ball is transmitted from the main control board 3 in a serial format through the down line Sd, an ACK signal is received from the payout control board 25 that has received the command through the transmission line Au. To be sent to. Conversely, when a status command indicating the status of the payout control board 25 is transmitted from the payout control board 25 to the main control board 3 via the up line Su (for example, during the payout process), an ACK is received from the main control board 3 that has received the command. The signal is transmitted to the dispensing control board 25 through the transmission line Ad.

  The pachinko machine 1 is provided with a prize ball payout device 21 in its main body frame 17, and the payout operation of the game ball by the prize ball payout device 21 is controlled by a payout control board 25. That is, the payout control board 25 receives a prize ball command (prize ball signal) from the main control board 3 and operates the payout motor 20 of the prize ball payout device 21 to perform a payout operation for the number designated by the prize ball command. Make it. At this time, the number of prize balls actually paid out is detected one by one by the payout ball detector 22 and fed back to the payout control board 25. On the other hand, the rotation state (rotation angle) of the payout motor 20 is detected by the motor drive sensor 24 and fed back to the payout control board 25.

  In addition, the payout control board 25 has a function of controlling the launching operation of the game ball in addition to the payout operation by controlling the launch control board 47. In addition, a firing handle 8 is connected. For example, a touch detection unit 48 is built in the firing handle 8, and the touch detection unit 48 detects the contact of a human body (player) and outputs a touch detection signal to the firing control board 47. The launch control board 47 permits the drive of the launch motor 49 only after receiving the touch detection signal, thereby allowing the launch of the game ball.

  When the CPU of the payout control board 25 (hereinafter referred to as “payout CPU”) detects the occurrence of various faults such as an abnormal connection between the main control board 3 and the payout control board 25, the type of fault in the payout control board 25 is detected. Error information corresponding to is displayed. Specifically, a 7-segment LED 4a is provided on the payout control board 25, and error information is numerically displayed on the 7-segment LED 4a, for example, for each of the various types of faults.

  The payout control board 25 is provided with an operation switch 4b as an error canceling means, and the operation switch 4b is disposed at a position where it can be operated from the outside. The operation switch 4b is used to check a countermeasure for each failure when the various failures occur, or to clear error information (numerical value display) displayed on the 7-segment LED 4a after the failure is recovered. Can be used.

(3. Example of electrical configuration of display control board)
FIG. 3 is a block diagram showing an example in which the electrical configuration of the symbol control board 30 is simplified.
The symbol control board 30 has a function of controlling the effect display operation based on the effect display command from the sub-control board 35. The symbol control board 30 has a function of starting a test display operation based on a predetermined test display start command and controlling the test display operation based on a predetermined test command. In the present embodiment, these test display start commands and test commands are also collectively referred to as “test commands”.

  The symbol control board 30 shown in FIG. 3 includes a display control processor unit 31 including a CPU 311 that selects a display mode in the decorative symbol display device 16 based on a control signal from the main control board 3, and a display mode selected by the CPU 311. Is provided with a VDP section 33 including a VDP 330 that generates drawing data for displaying the image on the decorative symbol display device 16. Various circuits constituting the symbol control board 30 are provided on a single board having six wiring layers.

  The CPU 311 of the display control processor unit 31 generates drawing parameters that define drawing data generation conditions for realizing the selected display mode. As the drawing parameters, color palette data defining drawing color information, sprite attribute data defining sprite drawing conditions, and background attribute data defining background (background) drawing conditions are generated. The VDP 330 of the VDP unit 33 generates drawing data by synthesizing predetermined effect image data based on the drawing parameters.

  The display control processor 31 constituting the symbol control board 30 includes a CPU-MCM (CPU-Multi Chip Module) 310 in which a CPU (Central Processing Unit) 311 and the like are sealed in a single package, and symbol display control executed by the CPU 311. A control ROM 325 for storing data such as programs in a nonvolatile manner is provided.

  In addition to the CPU 311, the CPU-MCM 310 includes an SDRAM (Synchronous Dynamic Random Access Memory) 312 that is a main memory of the CPU 311. The control ROM 325 via the CPU 311, SDRAM 312, and ROM interface 313 is connected to a bus 381 provided in the CPU-MCM 310, and various data can be exchanged via the bus 381.

  On the other hand, the VDP unit 33 includes a character ROM 340 in addition to the VDP 330. The symbol control board 30 includes a character ROM 340, a CPU 311, a control ROM 325, and a video display processor 330. The symbol control board 30 has a function of controlling the effect display operation based on the effect display command from the sub-control board 35.

  The CPU 311 shown in FIG. 3 is electrically connected to the control ROM 325 via the bus 381 and the ROM interface 313, and is also referred to as a video display processor 330 (hereinafter referred to as “VDP”) via the bus 381 and the CPU interface 383. )It is connected to the. The CPU 311 controls the operation of the VDP 330 based on the effect display command from the sub control board 35 by the operation of the symbol display control program read from the control ROM 325 to the SDRAM 312. Here, the CPU 311 writes the color palette data included in the drawing parameters generated as described above into the color palette register 332c, writes the sprite attribute data into the sprite attribute register 332s, and further stores the background attribute data into the background attribute register. Write to 332b.

  Here, the symbol control board 30 is provided with a character memory register (not shown) as reference area management means. As a storage area of the character memory register, a register name writing area as an instruction storage means in which a register name (reference instruction instruction) is written by the CPU 311 and an access window as a reference area referred to by the CPU 311 are provided. This access window is managed by an address (second address).

  The address of the access window is designated by the CPU 311. Here, the address designated by the CPU 311 is converted into the address (first address) of the storage area of the character ROM 340 in the VDP 330. The VDP 330 inputs the converted address from the address line of the character ROM 340, and acquires bit data from the data area designated by the input of the address via the data line. That is, the VDP 330 can read bit data directly from the character ROM 340.

  The VDP 330 manages the designated read bit data so that the CPU 311 can refer to the access window area designated by the CPU 311. For this reason, the CPU 311 cannot refer to the data area of the character ROM 340 directly, but can indirectly refer to it.

(4. Character ROM configuration)
First, the character ROM 340 (effect image storage means) is a kind of non-volatile read-only memory having a function of reading various data by managing storage areas by addresses. This storage area is a collection of data areas to which addresses (first addresses) are attached. Each data area is bit data (unit data) obtained by dividing predetermined data (effect image data described later) into bits. Is stored. The bit data may be not only one bit unit but also data of a predetermined bit unit. The character ROM 340 includes an address line and a data line, and can read bit data from a data area corresponding to an address input from the address line. For this reason, when an address is designated, the character ROM 340 can read effect image data composed of a bit data group corresponding to the designated address. The character ROM 340 is provided with at least three address lines. In the present embodiment, for example, 20 address lines are provided. Therefore, the character ROM 340 has 2 20 address spaces (data areas).

  The character ROM 340 also stores image data (hereinafter referred to as “effect image data”) such as character image data for displaying a predetermined character image and background image data for displaying a background image as the background image. Can be mentioned. The effect image data may be effect image data for displaying not only a character image that is a still image but also an effect image that is a moving image.

  The control ROM 325 is a read-only memory for storing a control program for controlling the effect display operation of the symbol control board 30 (hereinafter referred to as “symbol display control program”). In addition to this symbol display control program, the control ROM 325 controls a test program (hereinafter referred to as “display operation test”) for controlling the display operation of the decorative symbol display device 16 (hereinafter referred to as “test display control”). A program).

  Further, the control ROM 325 stores character display data corresponding to predetermined characters to be displayed (for example, “PRG”, “CHR”, “ROM”, etc.). This character display data is, for example, data represented in a data format (data structure) of 8 bytes × 8 bytes. When the symbol control board 30 displays a predetermined character, the character display data of the control ROM 325 is acquired by the CPU 311 and delivered to the VDP controller 331.

  Next, the CPU 311 shown in FIG. 3 is connected to a control ROM 325 and a video display processor 330 (hereinafter referred to as “VDP”) via a bus 381 or the like. Since the CPU 311 cannot access the character ROM 340 via the CPU interface 383 and the ROM interface 313, the CPU 311 cannot directly refer to the storage area of the character ROM 340. The CPU 311 controls the operation of the VDP 330 based on the effect display command from the sub control board 35 by the operation of the symbol display control program read from the control ROM 325. In the present embodiment, such a state in which the test display operation is not executed (a state in which a normal effect display operation is performed) is referred to as “normal mode”. The CPU 311 is configured to control the test display operation by the operation of the test display control program based on the test display start command from the outside of the symbol control board 30. This test display control program is booted in advance in the SDRAM 312 together with the symbol display control program in the control ROM 325. In the first embodiment, the state in which the test display operation is executed in this way is referred to as “test mode”.

  In the first embodiment, the test display control program has a function (test display data generation means) for generating test display data for displaying a predetermined test image when the display operation test is executed under the control of the CPU 311. Have. That is, in the first embodiment, it is not necessary to store the test display data in advance in the character ROM 340 where it is desired to store as much effect image data as possible. The test display data generated by the test display control program is delivered to the VDP 330.

  The VDP 330 has a function of causing the decorative design display device 16 to display an effect image based on the effect image data in the normal mode while outputting a synchronization signal under the control of the CPU 311. On the other hand, the VDP 330 has a function of displaying a test image based on the test display data in the test mode under the control of the CPU 311. In the first embodiment, the test image is displayed based on unit image data of two sheets in the horizontal direction and three sheets in the vertical direction, for example. In addition, one unit image data is represented in a data format (data structure) of 64 bytes × 64 bytes, for example.

  In order to display a predetermined image, first, the CPU 311 generates schedule data for displaying the predetermined image. This schedule data is data indicating a collection of attributes (attributes) related to the order and flow (schedule) of each effect image and each test display image to be displayed one after another, for example, every 16 ms. The schedule data is output from the CPU 311 to the VDP 330 during, for example, a so-called V blank (vertical blanking period) when the test image is displayed by scanning a predetermined scanning line. Here, “V blank” means that a predetermined image is displayed, and when the scanning line runs from the left end in the horizontal direction to reach the right end, it then moves downward and scans again from the left end to the right end. This is the period from when the right end at the bottom is reached and the scanning line is returned from the right end at the bottom to the left end at the top.

  The schedule data is provided with an identifier for identifying each of a plurality of schedule data. The number of unit image data to be arranged in the horizontal direction (for example, two) and the unit image to be arranged in the vertical direction It includes the number of data (for example, three), predetermined drawing parameters (color palette data, sprite attribute data, background attribute data, etc.), and the location (for example, coordinates) of specific unit image data. When the VDP 330 receives predetermined schedule data from the CPU 311, the VDP 330 analyzes the received schedule data and extracts data included therein.

  The VDP 330 will be described in further detail. The VDP 330 includes a CPU interface 383 (abbreviated as “CPU I / F” in the figure), a ROM interface 313 (abbreviated as “ROM I / F” in the figure), a bus 382, a VDP controller 331 (test display control means), a line buffer. 336, a color palette register 332c, a sprite attribute register 332s, a background (abbreviated as “BG” in the figure) attribute register 332b, a character RAM 335 (test display data storage means), and a DMA controller 384. Note that the character RAM 335 may be provided outside the VDP 330.

  The VDP controller 331 has a function of controlling the entire VDP 330 under the control of the CPU 311 and controlling the display operation. The display operation here includes an effect display operation and a test display operation executed as part of the effect operation. Specifically, in the normal mode, the VDP controller 331 acquires effect image data from the character ROM 340 via the ROM interface 333 under the control of the CPU 311.

  In the test mode, the CPU 311 temporarily stores the test display data in the character RAM 335 (a non-rewritable effect image storage device) via the CPU interface 383. The VDP controller 331 reads test display data from the character RAM 335, and generates drawing data based on predetermined drawing parameters such as setting of the color palette register 332c and the read test display data.

  Further, the VDP controller 331 manages unit image data that should constitute effect image data in the character ROM 340 and the character RAM 335, for example, in a data format (data structure) of 64 bytes × 64 bytes, and the CPU 311 In the ROM 325, for example, character display data is managed in a data format (data structure) of 8 bytes × 8 bytes. When viewed from the VDP controller 331, the storage area of the character ROM 340 and the storage area of the character RAM are treated as the same storage area managed so that predetermined addresses are continuous.

  The character display data is data that is referred to when there is a character to be displayed in the display operation test. Specifically, when there is a character to be displayed in the test mode, the CPU 311 acquires the character display data from the control ROM 325 and stores the character display data in a predetermined storage area of the character RAM 335 managed by the VDP controller 331. Register (write).

  The color palette register 332c, the sprite attribute register 332s, and the BG attribute register 332b are registers that the VDP controller 331 refers to when the image display operation is controlled by the VDP controller 331, respectively. That is, the VDP controller 331 controls the effect display operation of the decorative symbol display device 16 in the normal mode via the line buffer 336 while referring to the color palette register 332c, the sprite attribute register 332s, and the BG attribute register 332b. In the test mode, the test display operation is controlled.

  The color palette register 332c is a register for storing in advance color palette data for 256 palettes corresponding to each palette number represented by, for example, 0 to 255. One pallet is composed of, for example, 16 colors. That is, the color palette register 332c provides color palette data corresponding to the designated palette number when a palette number (for example, 0 to 255) is designated when the sprite is set.

  The sprite attribute register 332s stores sprite attribute data related to sprite attributes such as character image data. The background (BG) attribute register 332b stores background attribute data regarding the attributes of the background image. The character RAM 335 is a volatile memory as a storage means for storing data such as effect image data and test display data in a rewritable manner, and is, for example, an SDRAM (Synchronous Dynamic Random Access Memory).

  Here, since the color palette data in the color palette register 332c is data represented by a predetermined code, it can be generated depending on a combination of numerical values. The same applies to each data in the sprite attribute register 332s and the BG attribute register 332b. In the first embodiment, the test display control program generates color palette data represented by each of these codes in accordance with the required test display operation instead of storing the test display data in the character ROM 340 in advance. The test display data is generated.

  Here, in the present embodiment, the description has been made by exemplifying that the writing from the control ROM 325 to the character RAM 335 is based on the control of the CPU 311. However, the present invention is not limited to this, and the test display data generated by the CPU 11 is temporarily written in the SDRAM 312. A method of transferring data from the SDRAM 312 to the character RAM 335 under the control of the DMA controller 384 may be adopted. The line buffer 336 has a function of storing the drawing data generated by the VDP controller 331 in units of scanning lines (lines) of an image to be displayed, and a function of outputting the stored drawing data in units of scanning lines. . The VDP controller 331 also outputs a synchronization signal SYNC synchronized with the drawing data when outputting the drawing data.

  Further, the VDP controller 331 designates the color and gradation to be displayed for each pixel of the drawing data based on each code included in the generated test display data. When the VDP controller 331 generates drawing data and there is a character to be displayed, the VDP controller 331 acquires predetermined character data (for example, data related to characters such as “CHR”) from the control ROM 325 and reflects the acquired character data. Generate.

  In the present embodiment, when the CPU 311 as the inspection operation control means writes a predetermined reference instruction command into the register, the CPU 311 as the second address designating means further sets the second address assigned to the access window as the reference area. Is specified. This access window represents an area of a predetermined register (reference area management means) (not shown). The VDP controller 331 as the effect display control means converts the designated second address into the first address, and inputs the first address to the address line, so that the data area of the character ROM 340 passes through the data line. The bit data is repeatedly read, and the effect image data composed of the plurality of bit data read repeatedly is directly acquired.

  The register reads bit data from the data area of the character ROM 340 corresponding to the first address into the access window as the reference area to which the second address is assigned, and the CPU 311 reads the bit data of the data area of the character ROM 340. You can refer to it. Therefore, although the CPU 311 cannot directly refer to the effect image data stored in the character ROM 340, the bit data is read from the data area of the character ROM 340 corresponding to the first address from the access window to which the designated second address is assigned. It is possible to check by referring to the referenced bit data.

  In the present embodiment, not only a predetermined test image is displayed based on the drawing data as described above, but also the character ROM 340 is inspected. Here, “inspection” refers to checking the connection state of the address lines and data lines of a read-only memory such as the character ROM 340 (effect image storage means), and the effect image data stored in the character ROM 340 is accurate. Or at least one of confirming whether or not.

  This inspection will be specifically described. First, in the present embodiment, at least three address lines of the character ROM 340 (20 in this embodiment are exemplified) according to a preset rule (first rule described later). Specify one of the address line combinations. The CPU 311 further has a function of repeatedly inputting the address from the designated combination of address lines, and repeatedly reading out bit data from the data area in the storage area of the character ROM 340 corresponding to the input address which has been repeatedly changed. (Unit data reading means).

  The CPU 311 as the inspection operation control means has a function (error control code calculation means) for calculating an error control code such as a sum check with respect to a plurality of repeatedly read bit data. Further, the CPU 311 has a function (error control code comparison means) for comparing the calculated error control code with the true value of the error control code regarding the plurality of repeatedly read bit data. In this embodiment, a sum check is exemplified as the error control code.

(5. Configuration of test equipment)
Next, a test apparatus that performs a display test based on the test display data will be described. In this test apparatus, it is assumed that whether the display operation control is normal or abnormal for the symbol control board 30 alone.

FIG. 4 is an image diagram showing an example of a state in which the test apparatus 100 is inspected regarding the control of the display operation of the symbol control board 30.
First, an outline of the test apparatus 100 will be described. The design control board 30 is electrically detachably connected to the test apparatus 100. A test display start command that is an instruction for starting a display test with respect to the design control board 30 or a predetermined display. The test command for executing the test contents is transmitted. In the first embodiment, these commands are also collectively referred to as a command ST.

  First, the symbol control board 30 that has received the test display start command shifts from the normal mode in which the effect display operation by the decorative symbol display device 16 is controlled to the test mode in which the test display operation is to be performed. The symbol control board 30 is further configured to control the test display operation based on the received test command and return drawing data as the control result to the test apparatus 100. The test apparatus 100 that has received the drawing data displays a test display image as shown in FIG. 4 on the display 16a having a display function substantially similar to that of the decorative design display apparatus 16 based on the drawing data.

  In this test apparatus 100, for example, color bars of red, green, and blue colors are displayed by the display operation of the symbol control board 30, and checksum values (and the reference values of the checksums) for the character ROM 340 and the control ROM 325 are displayed. Comparison result) is displayed. The checksum value related to the character ROM 340 or the like represents an error control code calculated by the CPU 311 of the symbol control board 30 described above.

(6. Example of operation of symbol control board)
FIG. 5 is a flowchart showing an example of a basic processing procedure in the normal mode after the reset start processing in the symbol control board 30. In this flowchart, an example of display operation control by the symbol control board 30 in the normal mode is mainly shown.
This reset start process represents a process example that is sequentially executed when the symbol control board 30 is reset or newly powered on.

  First, in step S101, a boot process is executed. In this boot process, the symbol display control program starts executing from the top program code of the control ROM 325. Thereafter, the program code is read from the control ROM 325 onto the SDRAM 312 and the program code is read on the read SDRAM 312. Run one after another.

  More specifically, in this boot process, after reset start, the booted (booted) symbol display control program performs predetermined initialization such as bus and port, and then the program code stored in the control ROM 325 is stored on the SDRAM 312. The program counter is moved to each program code that has been transferred to the SDRAM 312 and the program code indicated by the program counter is executed.

  Hereinafter, this symbol display control program operates on the SDRAM 312. First, in step S102, initialization is performed on hardware such as the CPU of the symbol control board 30. That is, the symbol display control program executes a minimum initialization such as a bus or a port during the boot process, and after that, after the program counter is moved to the program code transferred to the SDRAM 312, it is initialized by the boot process. Perform initialization for other hardware that does not exist. More specifically, the CPU 311 interrupt processing setting and the VDP 330 initialization processing are executed.

  Next, in step S103, hot / cold determination processing is executed. In this hot / cold determination process, it is determined whether it is a hot start or a cold start. Specifically, the CPU of the symbol control board 30 determines whether the initial determination flag in the symbol control board 30 is ON or OFF. When the initial determination flag is ON, it indicates a hot start, and when the initial determination flag is OFF, it indicates a cold start.

  The symbol display control program tests the backup memory area managed by the checksum after reset. If there is a reliable backup memory area as a result of this test, the symbol display control program executes a hot start using the contents of the backup memory. Further, all work areas other than the backup target memory are filled with “0” (hereinafter referred to as “clear to 0”). If there is no reliable memory area, the symbol display control program clears all work areas and stack areas to zero and executes a cold start.

  Next, in the module initialization process, initialization of each functional module included in the symbol display control program that operates under the control of the CPU of the symbol control board 30 is executed (step S104). Specifically, the symbol display control program initializes an effect module and the like defined for performing a predetermined effect display operation by processing on software. This module initialization process is desirably performed separately for hot start and cold start. Then, non-stationary processing such as random number update is executed.

  Next, the symbol display control program executes a steady process every 16 ms, for example, and repeats this in a predetermined loop process. In this period of 16 ms, for example, a V blank (VBLANK) signal of VDP 330 is interrupted and generated to generate timing. That is, this steady process is a process that is executed when a V blank signal is input during the non-steady process or the like, and this steady process includes a display operation control process that controls the display operation of the decorative symbol display device 16. It is out. Next, the steady process will be described with reference to FIGS.

(7. Display operation control processing)
FIG. 6 is a flowchart showing an example of the procedure of the display operation control process, and FIG. 7 is a flowchart showing an example of the procedure of the command determination process. It is assumed that the initial determination flag is set to OFF immediately after the power is turned on. This initial determination flag indicates whether or not it is the first time after power activation (for example, “ON”) or not (for example, “OFF”).

  First, in step S300 shown in FIG. 6, command determination processing is executed. In the command determination process shown in FIG. 7, the symbol display control program first determines whether or not a command is stored in a command reception buffer (not shown) (step S301), and whether or not the command is stored in the command reception buffer (command Check whether or not If a command has not been received, the command determination process is stopped and the process proceeds to step S201. If a command has been received, the process proceeds to step S302.

  Next, the symbol display control program determines whether or not the initial determination flag is ON (step S302). If the initial determination flag is OFF, the command determination process is stopped and the process proceeds to step S201. If the flag is ON, the process proceeds to step S303. That is, in this step S302, the symbol display control program determines whether or not it is immediately after the power source is activated.

  Then, the symbol display control program determines whether or not the received command is a test display start command (S303). If it is not a test display start command, the initial determination flag is set to OFF (for example, hex 0000), the command determination process is stopped, and the process proceeds to step S201. On the other hand, in the case of a test display start command, the initial determination flag is set to OFF (for example, hexadecimal A55A), and the mode is changed from the normal mode to the test mode. In this symbol display control program, the test mode flag is set to ON for these mode managements (step S306), and the process proceeds to step S201. In this way, the command received by the symbol control board 30 is determined.

  Next, the symbol display control program similarly checks whether or not the command is stored in the command reception buffer, and if it is determined that the command is received, whether or not the received command is a valid test command. Is determined (step S201). If it is determined that the received command is not a valid test command, the symbol display control program continues to control the effect display operation (step S202). On the other hand, when it is determined that the received command is a valid test command, the display control program stops its operation, that is, stops the control of the effect display operation (step S203). Then, on the symbol control board 30, a test display control program is executed, and a test process is executed (step S400).

(8. Test processing)
First, on the symbol control board 30, the test display control program operates under the control of the CPU 311, and the test display control program controls the display operation test. The test display control program newly generates the test display data itself instead of preparing test display data in advance, for example, storing test display data in the character ROM 340 in advance. The test display data may be prepared in advance in the character ROM 340.

  The test display data is data for displaying, for example, three rows of red, green, and blue in the vertical direction and approximately square display areas for 64 tones arranged in the horizontal direction for each color. Each color and gradation expression is expressed by, for example, generating a predetermined code. The test display control program temporarily stores the newly generated test display data in the character RAM 335 of the VDP 330.

  Next, in the VDP 330, the VDP controller 331 reads test display data from the character RAM 335, and performs a display test based on the read test display data. Specifically, the VDP controller 331 generates drawing data SK based on the test display data, and outputs it to the test apparatus 100 via the line buffer 336. Then, a color bar is displayed as a test result. Here, the VDP controller 331 stores the drawing data SK in the line buffer 336 for each line corresponding to the scanning line, and when one line is stored, the drawing data SK for one line is output. In the first embodiment, for example, two line buffers 336 are used alternately.

  Next, the CPU 311 calculates checksums for the data in the character ROM 340 and the control ROM 325, respectively. The CPU 311 transfers character display data such as numerals and English characters stored in the control ROM 325 to the character RAM 335 based on the calculated checksum. A checksum (a check code to be described later) is displayed as a test result corresponding to each of the control ROM 325 and the character ROM 340.

  The color bar and checksum displayed in this way are each confirmed by, for example, the visual inspection of an inspector. This inspector determines whether there is an abnormality in the display operation test by the symbol control board 30 according to the test result display.

(8. Specific example of test processing)
Next, a specific example of the contents of the test process will be described. In the first embodiment, it is assumed that a check code is calculated as an inspection relating to the character ROM 340. For example, the check code designates some of 20 address lines (in this embodiment, 10 address lines are exemplified except for some explanations), and a predetermined address is repeatedly changed. However, the checksum is calculated for the bit data groups respectively input from the data areas of the character ROM 340 corresponding to the input addresses that are input while being repeatedly changed.

(8-1. Access window reference)
In the present embodiment, first, the CPU 311 writes a predetermined register name (reference instruction command) in a register name writing area (command storage means) and designates a second address corresponding to a predetermined access window. The VDP 330 converts the designated second address into the first address and inputs the first address to the address line, thereby repeatedly reading the unit data from the data area of the character ROM 340 via the data line. . Here, the address line for inputting the first address is a designated address line determined according to a predetermined rule described later.

  The character memory register as the reference area management means reads unit data from the data area of the character ROM 340 corresponding to the first address into the access window to which the second address is assigned, and unit data of the data area of the character ROM 340 Can be referred to by the CPU 311. Therefore, the CPU 311 cannot directly refer to the effect image data stored in the character ROM 340, but refers to the unit data from the data area of the character ROM 340 corresponding to the first address from the access window to which the designated second address is assigned. Can be inspected.

  For this reason, in this embodiment, even if the CPU 311 cannot directly refer to the data area of the character ROM 340, the inspection is performed by referring to the unit data in the data area of the character ROM 340 indirectly via the access window. Will be able to.

(9. Address line designation)
FIG. 8 is a diagram illustrating an example of a state in which the range of the designated address line changes for each scan.
In the present embodiment, even if bit data is not read from all data areas of the character ROM 340, for example, each address line or data line is turned on (eg, “1”) or off (eg, “0”) individually. If the test can be performed, the inspection is performed in accordance with the inspection concept that there is no problem with the connection state of the address lines and data lines of the character ROM 340. Needless to say, this inspection concept may be applied not only when inspecting the character ROM 340 but also when inspecting a read only memory (ROM) such as the control ROM 325.

  Here, since it is unclear what kind of bit data is stored in the storage area (each data area) of the character ROM 340, in the present embodiment, first, the bit data is read out as follows. The check code is calculated for the bit data. In other words, in the present embodiment, if two of the address lines are to be tested under the control of the CPU 311, for example, the other address lines are changed according to a certain rule, and bit data is obtained from two or more data areas. And a check code is calculated for these acquired bit data groups. In the present embodiment, inspection is performed based on the check code that is the calculation result, and it is expected that the operation of the character ROM 340 will be improved.

  In the present embodiment, the character ROM 340 will be described as having a storage area having an address space (data area) of 2 to the 20th power (0 to 19), for example. First, “●” and “△” indicate address lines to be inspected (hereinafter referred to as “designated address lines”), and address lines other than “●” and “△” are inspected respectively. An address line that is not a target (hereinafter referred to as a “non-designated address line”) is shown, and “0 (zero)” is input. Note that “●” indicates a designated address line that is specified when the inspection is performed according to the first rule shown below, and “△” indicates that the inspection is performed according to the second rule shown below, In addition to the case where the inspection is performed according to the first rule, the designated address line is further designated.

(10. Handling of data)
First, it is assumed that the bit data group handled by the CPU 311 when calculating the check code is acquired in units of 32-bit data, for example. When the physical bus width exceeds 32 bits, data is acquired in units of 32 bits in order from the least significant bit (LSB) side.

(10-1. First rule)
First, in the present embodiment, the following rule is adopted as the first rule (predetermined rule) for the CPU 311 to determine the designated address line. Specifically, when the number of scans is the first, 10 bits are selected from the least significant bit (LSB) among the 20 address lines (“●” is attached). Specifically, 0 to 9 bits correspond to designated address lines, corresponding address lines are designated, and 10 to 19 bits are not designated.

  These designated 0 to 9-bit address lines are input with addresses at which the binary value of each bit changes along a predetermined address variation pattern. In the first embodiment, for these combinations of designated address lines, an address that changes depending on whether the bit data of each bit is “1” or “0” along a predetermined address variation pattern is input and inspected. Is called “address scanning process”. The time required for this address scanning process is referred to as “inspection 1 cycle”.

  In the first embodiment, as a first rule, an address line that is a reference for a change of 0 to 1023 is incremented in order from the least significant bit for each number of scans. That is, when the number of scans is the second time, 10 bits are selected from the bit next to the least significant bit out of the 20 address lines, and when the number of scans is the third time, the 20 address lines are selected. 10 bits are selected from the next bit next to the least significant bit to the upper side. In the present embodiment, the most significant bit selected in this way (the most significant bit of the designated address line) is repeated until the 20 most significant bits (MSB) are reached. At this time, when the number of scans is the second and subsequent times, there are bits that are not selected at least on the least significant bit side of the 20 address lines (hereinafter referred to as “empty bits”). This empty bit is a bit in which “1” is not input as an address in principle.

(10-2. Value for each bit related to the address input to the specified address line)
FIG. 9 is a diagram illustrating an example of a value for each bit (bit value) regarding an address to be input to the designated address line. Specifically, FIG. 9 shows a change example of the address input to the designated address line (bit corresponding to “●”) shown in FIG. In FIG. 9, some addresses are omitted.

  First, as an address change rule for changing the bit value to be input to each bit of the designated address line, one is added to the least significant bit and a carry is performed on the upper bit by adding to the least significant bit. By doing so, it can be mentioned that the address constituted by these least significant bits and their higher bit group is changed in a predetermined pattern.

  Specifically, in the present embodiment, since there are 10 designated address lines, one is added to the least significant bit, and higher bits than the least significant bit are added as this addition is repeated. The bit value is changed by carry. Therefore, in the present embodiment, when addresses are input to 10 designated address lines according to this address change rule, the values represented by these designated address lines are expressed in decimal numbers as 0 to 1023 1024 (2 to the 10th power). ) Number.

  In the character ROM 340, when an address is input to the designated address line, a data area corresponding to a combination of each bit value of the input address is specified. The character ROM 340 is configured to read bit data from the specified data area via the data line. The character ROM 340 is configured such that bit data is repeatedly read from a plurality of data areas by repeatedly changing each bit value of an address input to these designated address lines.

  Here, the character ROM 340 repeatedly changes the bit value of the address input to these designated address lines in accordance with the address change rule, so that each bit from each data area corresponding to this repeatedly changed address passes through each data line. Data is repeatedly read. In the present embodiment, the value read by the address scanning process is referred to as “acquired data value”. This acquired data value represents the data from which the check code (ROM connection inspection check code) is calculated, and is acquired in units of 32 bits, for example.

(11-2. Second rule)
In this embodiment, not only the address scanning process is executed by inputting an address from the designated address line according to the first rule, but also the address is inputted from the designated address line according to the second rule shown below. A scanning process is being executed. As the second rule (second rule), some of the vacant bits of the address line are specified according to the following rule. Therefore, in the first embodiment, it is assumed that the address is also input from the designated address line according to the second rule. In the first embodiment, as an example, of the 20 address lines, only empty bits generated on the least significant bit side from the designated address line are targeted.

As a specific example of the second rule, “1” is set as the bit value of the address in the bit Bx obtained by the arithmetic expression shown in the expression (1), and other bits of the vacant bits are set. It is assumed that “0” is set. Here, the position of the empty bit to be set to “1” is set to Bx.
Bx = (decimal address value mod (number of free bits + 1)) − 1 (1)
Note that “mod” represents a remainder value of the result of multiplication when the left numerical value is divided by the right numerical value. If Bx <0 as a result of the calculation, it is assumed that all the empty bits are not set to “1”. The decimal address value represents an address value (for example, 0 to 1023) obtained by converting a binary address of a designated address line (in the range “●”) into a decimal number.

  FIG. 10 is a diagram illustrating an example of a calculation result regarding which bit among the vacant bits of the address line is set to “1” according to the second rule when the number of scans is the fourth. That is, FIG. 10 represents an example of the calculation result according to the above equation (1). Note that the empty bit of the address line indicates a bit corresponding to “Δ” shown in FIG.

  The upper part shown in FIG. 10 shows the address input to the designated address line in decimal notation, for example, 0-1023. On the other hand, the lower part of FIG. 10 represents a position Bx where “1” is input in the empty bit of the address line. For example, when the number of scans is the fourth, none, 0, 1 or 2 is indicated. Has been.

(11-3. Third rule)
In the present embodiment, not only the address scanning process is executed by inputting an address from the designated address line according to the first rule, but also the address is inputted from the designated address line according to the third rule. It is assumed that a scanning process is executed. As this third rule (third rule), the address (bit value) to be input to the designated address line according to the first rule is the same as the above-mentioned address change rule, the most significant bit side and the least significant bit side. The address is reversed (bit value).

(11-4. Fourth rule)
In this embodiment, not only the address scanning process is executed by inputting an address from the designated address line according to the first rule and the second rule, but the address is designated from the designated address line according to the next fourth rule. It is assumed that the address scanning process is executed upon input. As the fourth rule (fourth rule), the address (bit value) to be input to the designated address line according to the first rule and the second rule is the same as the most significant bit side and the least significant bit. The address is reversed (bit value) on the bit side.

In the first embodiment, the test is executed by combining at least one of these rules. Specifically, in the first embodiment, the test is executed by a combination of the following rules.
(1) Address scanning process in which an address is inputted from a designated address line according to the first rule (2) Address scanning process in which an address is inputted from a designated address line according to the third rule (3) First rule and second rule Address scanning process in which an address is inputted from a designated address line according to the rule (4) Address scanning process in which an address is inputted from a designated address line according to the fourth rule

(12. Test results)
FIG. 11 is a diagram illustrating an image example of a result of a test performed by combining the address scanning processing according to each rule. In FIG. 11, the hexadecimal numbers ("00000000" to "00000fc0" in the figure) arranged vertically on the left side represent the address values for 8 bits on the MSB (upper bit) side of the address. The hexadecimal numbers arranged in the horizontal direction on the upper side (“0123... Def” in the drawing) represent the address values of 4 bits on the LSB (lower bit) side of the MSB side address value.

  In addition, FIG. 11 shows the result of executing the address scanning process by reducing the designated address line from 10 bits to 7 bits so that the coverage ratio of all the data areas can be easily seen as a whole. Yes. Coverage here means that bit data is read from a data area (address space) by an address input from a designated address line.

  In the figure, “*” represents a portion where the address scanning process is executed by inputting an address from the designated address line, and “.” Indicates that the address scanning process is executed by inputting an address from the designated address line. Represents no part. That is, “*” indicates an address to be scanned. As shown in the figure, when the test is performed by combining the address scanning processes according to the above rules, it can be seen that the range of the data area that can be covered at least by the designated address line is quite wide.

(13. Reference to usefulness according to the first embodiment)
First, in the pachinko machine 1 according to this embodiment including a general pachinko machine, the VDP 330 as the effect display control means directly refers to the effect image data stored in advance in the character ROM 340 because of the necessity in the game. The effect display operation is controlled based on the effect image data. On the other hand, the CPU 311 as the inspection operation control means controls the inspection operation and is not necessary directly in the game, so that the effect image data stored in the character ROM 340 cannot be directly referred to. Yes.

  In the present embodiment, first, the CPU 311 as the second address designating means writes a predetermined reference instruction command in a register (command storage means) and designates the second address corresponding to the access window as the reference area. The VDP 330 converts the designated second address into the first address and inputs the first address to the address line, thereby repeatedly reading the unit data from the data area of the character ROM 340 via the data line. .

  The reference area management means reads the unit data from the data area of the character ROM 340 corresponding to the first address into the reference area to which the second address is assigned, and causes the CPU 311 to reference the unit data in the data area of the character ROM 340. be able to. Therefore, the CPU 311 cannot directly refer to the effect image data stored in the character ROM 340, but refers to the unit data from the data area of the character ROM 340 corresponding to the first address from the reference area to which the designated second address is assigned. Can be inspected.

  For this reason, in this embodiment, even when the CPU 311 cannot directly refer to the data area of the character ROM 340, the inspection is performed by referring to the unit data in the data area of the character ROM 340 indirectly via the reference area. Will be able to. Therefore, according to the present embodiment, even if the CPU 311 cannot refer to the data area of the character ROM 340, the VDP 330 acquires the effect image data from the character ROM 340 and executes a simple test display that takes time. In general, it is not necessary to check whether the address lines and data lines of the character ROM 340 are normal.

  That is, according to the present embodiment, although the CPU 311 cannot refer to the data area of the character ROM 340, the CPU 311 indirectly specifies the address line of the character ROM 340 and refers to the data area, and indirectly refers to the character area by referring to the reference area. Since the inspection image data can be inspected with reference to the data line of the ROM 340, the address line and the data line can be inspected efficiently and in a short time without performing such a time-consuming test display. be able to. Furthermore, according to the present embodiment, it is also possible to inspect whether or not there is a leak between the designated address line and the adjacent address line.

  On the other hand, when a checksum is calculated for a bit data group that is read out by duplicating all data areas as in the prior art, the calculation time is proportional to the total amount of data in the character ROM 340. The check code calculation time is generally proportional to the number of designated address lines.

  Based on such an idea, when inspecting a character ROM 340 having 2 20 address spaces (data areas), for example, in a conventional inspection method using a sum check, one inspection cycle × 1048576 (2 to the 20th power) unit time is required, and in the inspection method using the check code as in this embodiment, one inspection cycle × 20 unit time is sufficient. Here, in this embodiment, one inspection cycle is required to be slightly longer than in the conventional case. However, as the capacity of the character ROM 340 to be inspected becomes larger, the inspection cycle becomes larger and the inspection time is significantly shorter than in the past. Become.

  That is, when considering the examination of the data area of the character ROM 340 as an example of the effect image storage means, the bit data is obtained from each data area by designating the address from the address line. It is a common technique to perform an error control code operation on.

  In the embodiment, instead of repeatedly changing and inputting addresses from all the address lines of the character ROM 340 as in the prior art, any one of at least three address lines according to the first rule (preset rule). The address line combination is designated, and the address is repeatedly input from the designated address line (designated address line combination). In this way, the CPU 311 as the second address specifying means can read the bit data in the data area.

  In this embodiment, the bit data can be read by designating the combination of address lines as described above, and then the error sum check value is calculated for a plurality of repeatedly read bit data. Even if it is confirmed whether or not the sum check value matches the true value of the sum check value, it takes less time as a whole than before. Therefore, according to the present embodiment, even if the CPU 311 cannot directly refer to the data area of the character ROM 340, the sum check is calculated for the effect image data that can be indirectly referenced and compared with the true value. By executing the inspection, the character ROM 340 can be inspected efficiently and in a short time without executing a time-consuming test display.

  In addition, in this embodiment, not only can the sum check value regarding the plurality of read bit data be confirmed, but the connection state of the data lines and address lines of the character ROM 340 is normal based on the confirmation of the sum check value. Whether it exists or not can be confirmed efficiently and in a short time as well. Thus, if all the products on the symbol control board 30 can be inspected to determine whether the connection state of the data line and the address line is normal, it is possible to reliably detect a defect such as a so-called solder bridge with respect to the character ROM 340 of the symbol control board 30. it can. For this reason, according to the present embodiment, if the defective symbol control board 30 is removed via inspection, the character ROM 340 of the symbol control board 30 is in a state in which such a defect remains after that. This is not possible, and the pachinko machine 1 equipped with the defect-free design control board 30 can be shipped to the hall.

  In the present embodiment, the CPU 311 as the second address designating unit further designates a part of the remaining address lines (empty bits) not designated according to a second rule different from the first rule. To do. The VDP 330 inputs the address from the part of the specified address line and the combination of the specified address line (specified address line) while repeatedly changing the address. The bit data is repeatedly read out from the data area corresponding to 1 via the data line.

  With such a configuration, the number of address lines designated by the CPU 311 as the second address designating means increases. Therefore, the number of data areas for reading bit data can be increased, and the character ROM 340 can be inspected more accurately. Therefore, according to the present embodiment, not only can at least one of the character ROMs 340 be efficiently inspected in a short time, but also the reliability of the inspection results of the character ROM 340 can be improved as compared with the conventional case.

  In the above embodiment, the symbol display board 30 starts the test display operation when the test command related to the test display operation instruction is received for the first time after the power is turned on. Thus, in this embodiment, even if the symbol display board 30 does not have a special function, the symbol display board 30 starts the test display only when the test command is received for the first time after the power is turned on. Therefore, for example, even if a test command is received during the game, the test display operation is not suddenly executed, and the player can be immersed in the game without interrupting the concentration of the player due to the interruption of the game. The operation of the machine 1 can be increased.

  Also, here, when the symbol display board 30 for executing such a test display operation is mounted on the pachinko machine 1 and the pachinko machine 1 is operated, at first glance, a predetermined command is a test start command due to the influence of noise or the like. It can be considered that the symbol display board 30 erroneously receives a command similar to the test display start command. If such an event occurs during the game, the decorative symbol display device 16 of the pachinko machine 1 switches from the effect display accompanying the progress of the game to a predetermined test display, which affects the player's game. There is a risk that.

  Therefore, in the present embodiment, the symbol display board 30 receives the command other than the test command (for example, the effect display command) related to the test display operation instruction during the execution of the test display operation. It is desirable to stop. In this way, even if the symbol display board 30 does not have a special function, the symbol display board 30 stops the test display operation if a command other than the test command is received during the execution of the test display operation. Thus, it is possible to automatically set the state in which the effect display operation can be executed.

(14. Second embodiment)
FIG. 12 is a front view showing a configuration example of a pachinko machine 1a to which the gaming machine as the second embodiment of the present invention is applied.

  The pachinko machine 1a as the second embodiment includes a display control board (not shown) that performs substantially the same configuration and operation as the symbol control board 30 in the pachinko machine 1 as the first embodiment. Will be omitted, and the description below will focus on the differences. Note that, in the second embodiment, when the same configuration and operation as in the first embodiment are described, the same reference numerals as those in the first embodiment are used.

  This pachinko machine 1a belongs to a so-called “feather” type. The pachinko machine 1a is roughly composed of a main frame 17 and a game board 2, and the game board 2 is detachably installed inside the main frame 17. A substantially circular game area is formed on the front surface (board surface) of the game board 2. The external configuration other than the game board 2 is substantially the same as that of the first embodiment, and thus the description thereof is omitted.

  In the game area of the game board 2, a center accessory 6 that has a particularly large eye-catching position is arranged almost in the center, and this center accessory 6 functions as a winning device. In addition to the normal winning openings 15c and 15d arranged on the left and right sides of the center accessory 6, a pair of left and right one-time starting openings 15a are arranged at the lower position, and one two-time starting opening 15b is arranged at the center position. . In addition, various ornamental bodies, decorative lamps, windmills, and a number of obstacle nails (not shown) are provided in the game area, but well-known components can be applied to these components. Therefore, the individual description is omitted here.

  The center accessory 6 has a pair of left and right movable pieces (movable members) 24, and these movable pieces 24 can be displaced between a state opened in the left-right direction and a position closed toward the inside. When these movable pieces 24 are in the open position, the big winning opening 26 of the center accessory 6 is opened. A big prize opening solenoid (not shown) is disposed behind the center accessory 6, and the pair of left and right movable pieces 24 are driven by the big prize opening solenoid.

  Normally, when the center accessory 6 is not actuated, the movable piece 24 is in the closed position, and therefore the special winning opening 26 is closed. On the other hand, when a winning is made to the above-mentioned one-time start port 15a or two-time start port 15b during the game, the center accessory 6 is actuated as a trigger. As a result, the pair of movable pieces 24 move to the open position, and the big prize opening 26 is opened for a predetermined time, thereby allowing the game ball to be won. The opening / closing operation of the movable piece 24 is performed by the number of opening / closing times (one or two times) respectively assigned to the once-starting port 15a and the twice-starting port 15b.

  In the center accessory 6, a big winning port count switch is arranged corresponding to each of the left and right big winning ports 26. A game ball that has won a prize in each big prize opening 26 is detected to be passed by the corresponding big prize opening count switch, that is, the number of winning prizes is counted. When the game ball is received in the center combination 6 in this way, the game ball rolls in the center combination 6. A predetermined specific area (not shown) is present in the center accessory 6, and when a game ball passes through the specific area, a transition is made to a special game state that is advantageous to the player.

  In this special game state, for example, for a maximum of 15 rounds, the opening and closing operation (round operation) of the movable pieces 24 provided on the left and right pairs of the center accessory 6 is repeated so that the game ball can be received in the center accessory 6. A prize ball corresponding to the number of received game balls is awarded to the player. In this way, the player can enjoy more benefits in the special gaming state.

  This pachinko machine 1a includes a display control board (not shown) that has substantially the same configuration as the symbol control board 30 in the first embodiment. This display control board includes a CPU (second address designating means, inspection operation control means), RAM, VDP (effect display control means), and a character ROM 340 (effect image storage) that can be inspected in substantially the same manner as in the first embodiment. Means). The display control board further includes a register name writing area as an instruction storage means and a character memory register (reference area management means) including an access window (reference area).

  Also in the second embodiment, the CPU as the bit data reading means designates any combination of address lines among at least three address lines of the character ROM 340 in accordance with the first rule. The CPU further inputs the address from the combination of the designated address lines while repeatedly changing it, and repeatedly reads out the bit data from the data area in the storage area of the character ROM 340 corresponding to the input address that has been repeatedly changed. Have

  The CPU also has a function (error control code calculation means) for calculating an error control code such as a sum check for a plurality of repeatedly read bit data. Further, this CPU has a function (error control code comparison means) for comparing the calculated error control code with the true value of the error control code regarding the plurality of bit data read repeatedly. According to the second embodiment, substantially the same effect as that of the first embodiment can be achieved.

(15. Third embodiment)
FIG. 13 is a front view showing a configuration example of the slot machine 101 to which the gaming machine according to the third embodiment of the present invention is applied.

  The slot machine 101 as the third embodiment includes a display control board 30a that performs substantially the same configuration and operation as the symbol control board 30 in the pachinko machine 1 as the first embodiment. The explanation will be omitted, and different points will be mainly described below. In the third embodiment, when the same configuration and operation as those of the first embodiment are described, the same reference numerals as those of the first embodiment are used.

  The slot machine 101 has a box-shaped housing 102, and is installed in an island facility of a game arcade based on the housing 102. In the island facility, a plurality of slot machines 101 are arranged in a row in the width direction, and usually a medal sand (not shown) is attached between the machines. When, for example, cash is inserted into the medal sand (the inter-sand sand), medals corresponding to the amount of money are lent out, and the player can use them to perform a slot machine game. The game medium is not particularly limited to medals and coins, but may be a mode using game balls or tokens. Alternatively, a mode in which a prepaid card is inserted into the inter-bed sand and the remaining frequency and medals are exchanged may be implemented.

  The casing 102 of the slot machine 101 has a front door 104 on the front surface facing the player, and the front door 104 can be opened forward with one side end (left side end in this example) as the center. The front door 104 has a glass plate (transparent plate) 106 at its middle position, and a rectangular display window 108 is formed at the center thereof. The slot machine 101 of this embodiment is equipped with three reels (left reel, middle reel, right reel) 110a, 110b, 110c as an example of a mechanical symbol display (symbol display device), and these reels 110a. , 110 b, 110 c are arranged at the back of the front door 104, that is, inside the housing 102.

  Each reel 110a, 110b, 110c has a reel band extending around its outer periphery, and various patterns are attached to its surface. Although not shown in the figure, for example, the figure “7” is designed, a specific alphabet (or its character string) is designed, a bell or other auspicious material is designed, watermelon, apple In addition, there is a design of fruits and vegetables such as cherries, or a design of characters, figures, symbols, and the like that characterize the model of the slot machine 101.

  The slot machine 101 can change or stop the display mode of the symbols by rotating or stopping these reels 110a, 110b, and 110c. From the front surface of the slot machine 101, only a part of the reels 110a, 110b, 110c is visible through the display window 8, and three symbols are effectively displayed for each reel 110a, 110b, 110c when stopped. It is supposed to be.

  Display areas 112 and 114 are formed on both sides of the display window 108 in the glass plate 106, and various character information and symbol information are attached to the display areas 112 and 114 in a predetermined arrangement. . A lamp unit (not shown) is disposed behind the glass plate 106, and information in the display areas 112 and 114 is lit and displayed by the lamp. For example, when a player first inserts medals through the medal insertion slot 115, the number of bets is added according to the number of inserted medals. At this time, the medal line lamp corresponding to the number of bets is lit on the right display area 112. . When the bet number reaches the maximum (for example, 3 bets), the inserted medals are stored as credits, and the credit number is displayed on the display unit 116 as a numerical value.

  When the player operates the start lever 124 (start operation means) with the medal line lamp lit up, the reels 110a, 110b, and 110c start to rotate all at once, and the symbols change. Further, when the player operates the stop buttons 126, 128, and 130 (stop operation means), the reels 110a, 110b, and 110c corresponding to the right, middle, and left, respectively, stop rotating, and the variation of symbols stops.

  At this time, when a certain symbol combination (for example, a state where specific symbol combinations are arranged in a line) is displayed on the activated line activated in the display window 108, a privilege is given to the player. . As this privilege, for example, a medal can be paid out or a special game state (so-called big bonus game, regular bonus game, or assist time, challenge time, etc.) can be given, and the player executes a special game. This makes it possible to receive more medals.

  When a predetermined symbol combination is displayed on the active line by the above-described gaming operation, the number of medals to be paid out according to the type of symbol combination displayed at that time is displayed on the display unit 132. In addition, when a transition is made to a big bonus game or a regular bonus game, the number of remaining games is displayed on the display unit 134 during the progress. The medals that have been paid out are stored as credits until the number of credits on the display unit 116 reaches a maximum, and medals exceeding the maximum number of credits are paid out to the tray 138 through the payout opening 136. In addition, the player can release the medal storage (credit) by operating the credit check button 140, and can receive the payout of the medal stored until then.

  The slot machine 101 according to the present embodiment has a liquid crystal display 142 above the display window 108. The liquid crystal display 142 is provided with images for effects and various bonus games as the game progresses. The number of medals and the like are displayed. In addition, two speakers 144 are provided on the left and right sides of the payout opening 136 for outputting sound effects, BGM, sounds, and the like accompanying the progress of the game. In addition, lamps 145, 146, and 148 are arranged at various locations on the front door 104, and these lamps 145, 146, and 148 can perform effects by light-emitting decoration according to the gaming state.

  FIG. 14 schematically shows configurations of various mechanical elements, electronic devices, operation members, and the like that are provided in the slot machine 101 shown in FIG. The slot machine 101 has a main control board 150 for comprehensively controlling the progress of the game. On the main control board 150, circuit elements such as a CPU 152, a ROM 154, and a RAM 156 are mounted. The main control board 150 includes input / output interfaces 158 and 160 for exchanging information with external devices. The main control board 150 has a function of generating random numbers for lottery by software.

  The bet buttons 118, 120, 122, the start lever 124, the stop buttons 126, 128, 130, the settlement button 140, etc. are all connected to the main control board 150, and these operation buttons use sensors (not shown). The operation by the player can be detected and the operation signal can be output to the main control board 150.

  The casing 102 of the slot machine 101 accommodates other devices together with the main control board 150, and various signals are input to the main control board 150 from these devices. The devices include a medal selector 164, a reel device 166, a hopper device 168, etc. Among them, the medal selector 164 detects medals inserted from the medal insertion slot 115 one by one, and the detection signal is sent to the main control board 150. Output.

  The reel device 166 is configured as a unit including the reels 110a to 110c described above. The reel device 166 has a photosensor (not shown) for detecting a reference position related to the rotation of each reel 110a, 110b, 110c, and a detection signal (index signal) from these photosensors is a main control board. 150 is input. The hopper device 168 also has a payout sensor (not shown) that detects paid-out medals one by one, and a detection signal for each medal is input to the main control board 150 from the payout sensor. ing.

  On the other hand, a control signal is output from the main control board 150 to the reel device 166 and the hopper device 168. That is, the reel device 166 has a built-in stepping motor (not shown) for rotating the reels 110a, 110b, and 110c, and a drive pulse signal for controlling the start and stop of these stepping motors is the main control. Output from the substrate 150. The hopper device 168 receives a payout signal from the main control board 150 according to the combination type of symbols displayed on the effective line, and the hopper device 168 performs a medal payout operation based on the payout signal.

  In addition to the main control board 150, the slot machine 101 includes an effect control board 170 and a display control board 30a. In addition to the CPU 172, the effect control board 170 includes a ROM and a RAM (not shown), an input / output interface, a sound source IC, Equipped with an audio amplifier. The effect control board 170 receives various command signals from the main control board 150 and controls the operation of the display units 116, 132, 134 and the speaker 144, and controls the lighting or blinking of the lamps 145, 146, 148. Yes.

  A display control board 30a as a display control means is connected to the effect control board 170, and the display control board 30a is connected to the liquid crystal display 142. The display control board 30a has substantially the same configuration as the symbol control board 30 in the first embodiment and performs almost the same function, and controls display operations such as effect images by the liquid crystal display 142. The display control board 30a includes a CPU (second address designating means, inspection operation control means) (not shown), RAM, ROM (character ROM 340 as effect image storage means in the first embodiment), register name writing area (command storage). Means), a character memory register (reference area management means) including an access window (reference area), and a VDP (effect display control means). The display control board 30a may have a form in which the function is mounted on the effect control board 170.

  These character ROMs 340 are subjected to substantially the same inspection as in the first embodiment. Also in the third embodiment, first, the CPU as the bit data reading means designates a combination of any one of at least three address lines of the character ROM 340 according to the first rule. The CPU further inputs the address from the combination of the designated address lines while repeatedly changing it, and repeatedly reads out the bit data from the data area in the storage area of the character ROM 340 corresponding to the input address that has been repeatedly changed. Have

  The CPU also has a function (error control code calculation means) for calculating an error control code such as a sum check for a plurality of repeatedly read bit data. Further, this CPU has a function (error control code comparison means) for comparing the calculated error control code with the true value of the error control code regarding the plurality of bit data read repeatedly.

  The slot machine 101 is configured to read the effect image data stored in the character ROM 340 and display the effect image based on the read effect image data on the liquid crystal display 142 under the control of the CPU. In addition, in the slot machine 101, the sum check value as the calculated error control code is also displayed on the liquid crystal display 142 under the control of the CPU.

  Further, an external terminal board 174 is connected to the main control board 150, and the slot machine 101 is connected to the hall computer 176 of the game hall via the external terminal board 174. The external terminal board 74 relays the inserted medal signal and the payout medal signal transmitted from the main control board 150 or the signal during the big bonus game or the regular bonus game (JAC game) to the hall computer 176, or conversely, the hall computer. The stop release signal transmitted from 176 is relayed to the main control board 150 and the effect control board 170.

  In addition, a power supply box 180 is accommodated in the housing 102. The power supply box 80 takes in power from an external power source and generates power necessary for the operation of the slot machine 101. The electric power generated here is supplied from the power supply box 180 to each unit.

  The power supply box 180 is attached with a power switch 182, a setting key switch 184, a reset switch 186, and the like. None of these switches are exposed to the outside of the housing 102 and can be operated only by opening the front door 104 thereof. Among these, the power switch 182 is for turning on / off the power supply to the slot machine 101, and the setting key switch 184 is for changing the setting of the slot machine 101. A reset switch 186 is used to cancel an error that has occurred in the slot machine 101.

  The CPU 152 of the main control board 150 determines a winning by collating a random value acquired by software with a winning value of table data during a normal game, and if a bonus game is hit, a corresponding symbol flag is displayed. Turn it on. In this case, if the stop button 126, 128, 130 is operated near the symbol aimed by the player, the symbol stops at the stop position within the range (for example, within 4 symbols) possible by the reel control described above. A specific symbol combination corresponding to each bonus game is easily displayed on the top.

  According to the third embodiment of the present invention, substantially the same effects as those of the first embodiment can be obtained except that the gaming machine is a spinning type gaming machine.

(16. Reference to other embodiments)
The above is the description of one embodiment, but the embodiment of the present invention is not limited to this. In the following, other embodiments will be described with some examples.
In each of the above embodiments, not only a ball-type game machine that uses a game ball to play a game but also a spin-type game machine that uses a medal to play a game, but also uses a game ball that uses a game ball (a so-called parrot game machine). It can also be applied to a machine, a pachi slot machine, and the like.

1 Pachinko machine (game machine)
3 Main control board (game control means)
30 Design control board (display control means)
30a Display control board (display control means)
35 Sub-control board (production control board)
101 slot machine (game machine)
311 CPU (second address specifying means, inspection operation control means, error code calculation means, error control code comparison means)
330 VDP (effect display control means)
340 Character ROM (effect image storage means)

Claims (1)

In a gaming machine that transitions to a special gaming state that is more advantageous to the player than the normal gaming state when a predetermined condition is satisfied in a normal gaming state in which the game proceeds according to the consumption of the gaming medium,
Game control means for controlling game operations in the normal game state and the special game state;
Production control means for controlling production operations accompanying the progress of the game and outputting production display commands related to visual production;
Display control means for controlling the effect display operation related to the effect display based on the effect display command,
The display control means includes
The effect image data corresponding to the image related to the visual effect is divided into predetermined units, and each of the divided unit data is stored in advance in each data area with the first address, and the predetermined address Effect image storage means for reading unit data stored in the data area corresponding to the first address designated by the line via the data line;
Command storage means capable of writing a reference instruction command for referring to the data area of the effect image storage means;
Writing the reference instruction command into the command storage means, and second address designating means for designating a second address associated with the first address;
The designated second address is converted into the first address, the converted first address is input to the address line, and the data line is input from the data area of the effect image storage means corresponding to the input first address. Replaying unit data via the replay, directly obtaining rendition image data composed of a plurality of repetitively read unit data, and controlling the rendition display operation based on the directly obtained rendition image data Display control means;
A reference area in which unit data is read from the data area of the effect image storage means corresponding to the first address and the unit data of the data area of the effect image storage means is referred to the reference area to which the second address is attached. Management means;
Although the effect image data stored in the effect image storage means cannot be directly referred to, the unit data of the data area of the effect image storage means corresponding to the first address from the reference area assigned the designated second address And an inspection operation control means for inspecting with reference to the unit data referred to.

Images