JP2009099661A - 配線基板の個片化方法およびパッケージ用基板 - Google Patents

配線基板の個片化方法およびパッケージ用基板 Download PDF

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Publication number
JP2009099661A
JP2009099661A JP2007267726A JP2007267726A JP2009099661A JP 2009099661 A JP2009099661 A JP 2009099661A JP 2007267726 A JP2007267726 A JP 2007267726A JP 2007267726 A JP2007267726 A JP 2007267726A JP 2009099661 A JP2009099661 A JP 2009099661A
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Japan
Prior art keywords
substrate
separation groove
wiring board
wiring
core
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Pending
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JP2007267726A
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Japanese (ja)
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JP2009099661A5 (enExample
Inventor
Koichiro Harada
幸一郎 原田
Chinatsu Sakai
千夏 酒井
Yoshiyuki Iwatsuki
義之 岩月
Eisuke Tomita
英輔 富田
Ryuji Nakamura
竜二 中村
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Priority to JP2007267726A priority Critical patent/JP2009099661A/ja
Publication of JP2009099661A publication Critical patent/JP2009099661A/ja
Publication of JP2009099661A5 publication Critical patent/JP2009099661A5/ja
Pending legal-status Critical Current

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JP2007267726A 2007-10-15 2007-10-15 配線基板の個片化方法およびパッケージ用基板 Pending JP2009099661A (ja)

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JP2007267726A JP2009099661A (ja) 2007-10-15 2007-10-15 配線基板の個片化方法およびパッケージ用基板

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JP2007267726A JP2009099661A (ja) 2007-10-15 2007-10-15 配線基板の個片化方法およびパッケージ用基板

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JP2009099661A true JP2009099661A (ja) 2009-05-07
JP2009099661A5 JP2009099661A5 (enExample) 2010-09-09

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JP2007267726A Pending JP2009099661A (ja) 2007-10-15 2007-10-15 配線基板の個片化方法およびパッケージ用基板

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009146988A (ja) * 2007-12-12 2009-07-02 Fujitsu Ltd 配線基板の個片化方法およびパッケージ用基板
JP2014022465A (ja) * 2012-07-13 2014-02-03 Shinko Electric Ind Co Ltd 配線基板及びその製造方法
WO2018211883A1 (ja) * 2017-05-18 2018-11-22 株式会社村田製作所 樹脂多層基板の製造方法、樹脂多層基板、および樹脂多層基板の実装構造
WO2025142479A1 (ja) * 2023-12-28 2025-07-03 Ｔｏｐｐａｎホールディングス株式会社 多層配線母材基板、多層配線基板および多層配線基板の製造方法
WO2025142478A1 (ja) * 2023-12-28 2025-07-03 Ｔｏｐｐａｎホールディングス株式会社 多層配線基板、多層配線基板の製造方法および多層配線母材基板

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005322858A (ja) * 2004-05-11 2005-11-17 Shinko Electric Ind Co Ltd 半導体装置の製造方法
JP2007019394A (ja) * 2005-07-11 2007-01-25 Toshiba Corp 半導体パッケージの製造方法及びこの製造方法により形成された半導体パッケージ

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005322858A (ja) * 2004-05-11 2005-11-17 Shinko Electric Ind Co Ltd 半導体装置の製造方法
JP2007019394A (ja) * 2005-07-11 2007-01-25 Toshiba Corp 半導体パッケージの製造方法及びこの製造方法により形成された半導体パッケージ

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009146988A (ja) * 2007-12-12 2009-07-02 Fujitsu Ltd 配線基板の個片化方法およびパッケージ用基板
JP2014022465A (ja) * 2012-07-13 2014-02-03 Shinko Electric Ind Co Ltd 配線基板及びその製造方法
WO2018211883A1 (ja) * 2017-05-18 2018-11-22 株式会社村田製作所 樹脂多層基板の製造方法、樹脂多層基板、および樹脂多層基板の実装構造
WO2025142479A1 (ja) * 2023-12-28 2025-07-03 Ｔｏｐｐａｎホールディングス株式会社 多層配線母材基板、多層配線基板および多層配線基板の製造方法
WO2025142478A1 (ja) * 2023-12-28 2025-07-03 Ｔｏｐｐａｎホールディングス株式会社 多層配線基板、多層配線基板の製造方法および多層配線母材基板

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