JP2009081378A - Signal transmission substrate - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a signal transmission substrate which reduces jitter due to strokes between signal wires without adding a circuit that adjusts phases. <P>SOLUTION: A first signal wire 1 includes a portion that is distributed in a first layer and a portion that is distributed in a second layer. The portions 1A, 1C distributed in the first layer and the portion 1B distributed in the second layer are connected at predetermined positions 1a, 1b. A second signal wire 2 includes the portions 2A, 2C distributed in the first layer whose total length is equal to that of the portions 1A, 1C distributed in the first layer of the first signal wire 1 and the portion 2B distributed in the second layer whose total length is equal to that of the portion 1B distributed in the second layer of the first signal wire 1. The connection positions 2a, 2b between the portions 2A, 2C distributed in the first layer and the portion 2B distributed in the second layer are different from that of the first signal wire 1. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a signal transmission board provided with signal wiring.

  Jitter occurs in the signal due to crosstalk between adjacent signal wirings on the signal transmission board. In particular, the amount of jitter increases when the rising or falling edges of adjacent signal lines coincide. As the circuit speed increases and the density increases, the influence of jitter caused by crosstalk increases.

  On the other hand, a technique has been adopted in which jitter caused by crosstalk is reduced by using a delay circuit, a delay element, or a phase shifter to shift the rising and falling timings between adjacent signal wirings ( For example, see Patent Documents 1 and 2).

In Patent Document 1, jitter caused by crosstalk is reduced by shifting the phases of signals of two adjacent signal lines using a delay circuit.
Further, in Patent Document 2, jitter caused by crosstalk is reduced by shifting the phases of signals of three signal wirings adjacent to each other using a delay element.
Japanese Patent Laid-Open No. 7-271928 JP 2004-362391 A

  However, in the methods as disclosed in Patent Documents 1 and 2, it is necessary to add a delay circuit, a delay element, or a phase shifter to the circuit on the signal transmission board.

  An object of the present invention is to provide a signal transmission board in which jitter caused by crosstalk between signal wirings is reduced without adding a circuit for adjusting a phase.

In order to achieve the above object, the signal transmission board of the present invention comprises:
A signal transmission board having a multilayer structure having a first layer and a second layer having different signal propagation speeds on a signal wiring,
A portion disposed on the first layer and a portion disposed on the second layer, wherein the portion disposed on the first layer and the portion disposed on the second layer are connected to each other; First signal wiring,
The total combined length is equal to that of the first signal wiring, and is disposed in parallel in the vicinity of the first signal wiring, and is disposed on the portion disposed on the first layer and the second layer. And the total length of the portions arranged in the first layer is equal to the total length of the portions arranged in the first layer of the first signal wiring, The total length of the portions arranged in the layer is equal to the total length of the portions arranged in the second layer of the first signal wiring, and the portion arranged in the first layer and the second And a second signal wiring connected at a position different from the connection position of the first signal wiring.

  According to the present invention, since the phase of the signals of the two adjacent signal wirings is shifted using the difference in signal propagation speed between the first layer and the second layer, the circuit for adjusting the phase Jitter due to crosstalk can be reduced without adding.

  Further, in the first signal wiring and the second signal wiring, a portion arranged in one of the first layer and the second layer is divided into an input side and an output side. The portion disposed on the input side of the second wiring signal is longer by a specific length than the portion disposed on the input side of the first wiring signal, and is disposed on the output side of the first wiring signal. The portion arranged on the output side of the second wiring signal may be shorter than the specified portion by the specific length.

In addition, the first layer is a surface layer, the second layer is an inner layer,
The first signal wiring includes a first partial wiring disposed in the first layer, a second partial wiring disposed in the second layer, and the first between the input terminal and the output terminal. The third partial wiring arranged in the layer is connected in series,
The second signal wiring is arranged between the input terminal and the output terminal in the first layer, and is a fourth partial wiring that is longer than the first partial wiring by the specific length, and the second layer. A fifth partial wiring having the same length as the second partial wiring, and a sixth partial wiring disposed in the first layer and shorter than the third partial wiring by the specific length. It may be connected in series.

  The second partial wiring and the fifth partial wiring may be longer than the first partial wiring, the third partial wiring, the fourth partial wiring, and the sixth partial wiring.

  According to this, since the portion where the delay difference is generated in the signal becomes longer at the central portion of the first signal wiring and the second signal wiring, the portion where the influence of jitter due to crosstalk is reduced becomes longer.

In addition, the first layer is a surface layer, the second layer is an inner layer, and in the first signal wiring and the second signal wiring, portions of the second layer are on the input side and the output side. Placed separately,
The portion of the second layer is not disposed on the input side of the first signal wiring, and the portion of the second layer disposed on the input side of the second signal wiring has the specific length. Yes,
The portion of the second layer arranged on the output side of the first signal wiring is longer by the specific length than the portion of the second layer arranged on the output side of the second signal wiring. Also good.

  Further, in the first signal wiring and the second signal wiring, the first layer disposed between the input side and the output side rather than the portion of the second layer disposed on the input side and the output side. The portion arranged in the layer may be longer.

  According to this, since the portion where the delay difference is generated in the signal becomes longer at the central portion of the first signal wiring and the second signal wiring, the portion where the influence of jitter due to crosstalk is reduced becomes longer.

  Further, the specific length is such that the difference between the delay time in the signal wiring of the first layer and the delay time in the signal wiring of the second layer is the first signal wiring and the second signal wiring. The length may be ½ or more of the change time of the signal to be transmitted.

  According to this, since the phases of the signals of two adjacent signal wirings can be shifted by ½ or more of the change time, jitter caused by crosstalk can be further reduced.

  Further, the length of the first signal wiring is equal, the portion is disposed on the opposite side of the first signal wiring in close proximity to and parallel to the second signal wiring, and is disposed on the first layer. And the total length of the portions arranged in the first layer is the total length of the portions arranged in the first layer of the first signal wiring. The total length of the portions arranged in the second layer is equal to the total length of the portions arranged in the second layer of the first signal wiring, A third signal in which the portion disposed and the portion disposed in the second layer are connected at a position different from both the connection position in the first signal wiring and the connection position in the second signal wiring; A wiring may be further included.

Another signal transmission board of the present invention is a signal transmission board provided with signal wiring,
A first signal wiring;
And two second signal wirings arranged on both sides of the first signal wiring so as to sandwich the first signal wiring and transmitting the same signal.

  According to the present invention, the crosstalk caused by the second signal wiring on both sides of the first signal wiring cancels out, so that the jitter of the first signal wiring can be reduced.

  Each of the second signal wirings is a differential wiring composed of a pair of signal wirings for transmitting two signals having different polarities, and the signal wiring of the same polarity comes on the first signal wiring side. As described above, the first signal wirings may be disposed therebetween.

  Further, the first signal wiring may be a differential wiring composed of a pair of signal wirings for transmitting two signals having different polarities.

  According to this, the crosstalk caused by the second signal wiring on both sides of the first signal wiring cancels out, and the crosstalk becomes common mode noise, thereby reducing the jitter of the first signal wiring. be able to.

  The second signal wiring may be arranged on both sides of the first signal wiring so as to branch one signal and sandwich the first signal wiring.

  According to this, the number of pins of the semiconductor integrated circuit mounted on the signal transmission board can be reduced.

  Further, the signal transmitted through the signal wiring may be a signal synchronized with the same clock.

  According to the present invention, jitter caused by crosstalk can be reduced without adding a circuit for adjusting the phase.

  Embodiments for carrying out the present invention will be described in detail with reference to the drawings.

<First Embodiment>
The signal transmission board having signal wiring is becoming multi-layered, and signal wiring is usually arranged on both the surface layer and the inner layer. The surface layer wiring is a microstrip line (MSL), and the inner layer wiring is a strip line (SL). The signal propagation speed differs between MSL and SL. Therefore, in the present embodiment, the jitter caused by crosstalk is reduced by using the difference in the propagation speed of the MSL and SL signals to shift the phase of the signals of the two adjacent signal lines.

  FIG. 1 is a graph showing an eye pattern when a random pulse train of 10 Gbps is input to two differential MSLs adjacent to each other. In the graph of FIG. 1, the rising and falling cross portions are divided into three waveforms, left, center and right, depending on the jitter.

  When the two differential MSL signals change in phase, the left waveform is obtained. When the two differential MSL signals change in opposite phases, the right waveform is obtained. If the aggressor that causes crosstalk is off, the waveform is in the center.

  From this, it can be seen that jitter caused by crosstalk can be reduced by shifting the rise or fall of signals of adjacent signal wirings.

  FIG. 2 is a graph showing an eye pattern when a phase difference is given to a 10 Gbps random pulse train inputted to two adjacent MSLs. FIG. 2A shows an eye pattern when the phase difference is zero. FIG. 2B shows an eye pattern when the phase difference is T / 10 = 10 psec (period T = 100 psec). FIG. 2C shows an eye pattern when the phase difference is T / 5 = 20 psec (period T = 100 psec). FIG. 2D shows an eye pattern when the phase difference is T / 2 = 50 psec (period T = 100 psec).

  2A to 2D, it can be seen that the jitter becomes substantially zero when the phase of the signals of the two signal wirings is shifted by T / 5 or more. T / 5 corresponds to about ½ of the change time (rise time or fall time).

  According to this embodiment, a circuit for adjusting the phase is added by using the difference in the propagation speed of the MSL and SL signals to shift the phase of the signals of the two adjacent signal lines. Therefore, jitter caused by crosstalk can be reduced. This can be widely applied when the signal wiring is a single-ended wiring, a differential wiring, or a combination of a single-ended wiring and a differential wiring.

  Further, according to the present embodiment, the phase of two signals adjacent to each other is shifted by 1/2 (T / 5) or more of the change time (rise time or fall time), resulting in crosstalk. Jitter can be reduced to almost zero.

  Hereinafter, a specific example of the signal transmission board of the first embodiment will be described.

(First embodiment)
FIG. 3A is a plan view of the signal transmission board of the first embodiment. FIG. 3B is a cross-sectional view taken along the line AB of the signal transmission board according to the first embodiment.

  Referring to FIG. 3A, signal wirings 1 to 6 are arranged in parallel. For example, assume that the left end of each signal wiring is the input side and the right end is the output side. In this embodiment, it is assumed that the frequency of a signal transmitted through each signal wiring 1 to 6 is 10 Gbps.

  In FIG. 3A, the MSL of the surface layer is indicated by a solid line, and the SL of the inner layer is indicated by a dotted line. Vias are shown as circles. Referring to the cross-sectional view of FIG. 3B, it can be seen that MSL is in the surface layer and SL is in the inner layer. In this embodiment, the relative dielectric constant of the substrate is 3.7, and a delay difference of 80 psec per 40 mm occurs due to the difference in propagation speed between MSL and SL.

  Each of the signal wirings 1 to 6 has a structure in which the MSL on the surface layer is connected to the SL on the inner layer through a via and returns to the MSL on the surface layer again from the SL through the via. For example, the signal wiring 1 is configured by MSL1A, SL1B, and MSL1C connected in series. MSL1A and SL1B are connected by via 1a, and SL1B and MSL1C are connected by via 1b.

  Similarly, the signal wiring 2 is composed of MSL2A, SL2B, and MSL2C. MSL2A and SL2B are connected by a via 2a, and SL2B and MSL2C are connected by a via 2b. The signal wiring 3 is composed of MSL3A, SL3B, and MSL3C. MSL3A and SL3B are connected by a via 3a, and SL3B and MSL3C are connected by a via 3b.

  Referring again to FIG. 3A, the signal wires 1, 2, and 3 have the same overall length. Further, the signal wirings 1, 2, and 3 have the left MSLs having different lengths, the central SLs having the same length, and the right MSLs having different lengths. Therefore, the signals 1, 2, and 3 have the same sum of the lengths of the left MSL and the right MSL.

  Since the signal lines 1, 2, and 3 have the same total length of MSL and the total length of SL, there is no delay difference in the output waveform as a whole. However, in the middle stage, a delay difference occurs due to a difference in length between the MSL and SL having different signal propagation speeds.

  Here, it is assumed that the signal change time (rise time or fall time) is 16 psec. In order to reduce the jitter, a delay difference of 8 psec, which is ½ of the change time, may be added. As described above, there is a delay difference of 80 psec per 40 mm due to the difference in propagation speed between MSL and SL. In order to generate a delay difference of 8 psec, the difference between the length of the MSL 1A of the signal wiring 1 and the length of the MSL 2A of the signal wiring 2 is 4 mm or more, and the length of the MSL 2A of the signal wiring 2 and the length of the MSL 3A of the signal wiring 3 What is necessary is just to make a difference of 4 mm or more.

  In this embodiment, MSL2A is 4 mm longer than MSL1A, and MSL3A is 4 mm longer than MSL2A. As an example, MSL1A is 1 mm, MSL2A is 5 mm, and MSL3A is 9 mm. MSL2C is 4 mm shorter than MSL1C, and MSL3C is 4 mm shorter than MSL2C. As an example, MSL1C is 9 mm, MSL2C is 5 mm, and MSL3C is 1 mm. Further, the distribution of the length of the MSL and SL of the signal wiring 4 is the same as that of the signal wiring 1, the distribution of the length of the MSL and SL of the signal wiring 5 is the same as that of the signal wiring 2, and the MSL of the signal wiring 6 The distribution of the SL length is the same as that of the signal wiring 3. Moreover, SL1B, 2B, 3B is 40 mm as an example here.

  As described above, according to the present embodiment, adjacent signal wirings having the same total length are connected in series in the order of the first MSL, SL, and second MSL, and the lengths of SL are made equal to each other. The length distribution of the first MSL and the second MSL is different. As a result, it is possible to reduce the jitter caused by crosstalk by shifting the phases of the signals in the middle, and to match the phases at the end.

  In this embodiment, as the length of the SL portion in each of the signal wirings 1 to 6 is longer than the length of the MSL portion, the portion where the influence of jitter due to crosstalk is reduced becomes longer.

(Second embodiment)
FIG. 4A is a plan view of the signal transmission board of the second embodiment. FIG. 4B is a cross-sectional view taken along line CD of the signal transmission board according to the second embodiment.

  Referring to FIG. 4A, signal wirings 11 to 16 are arranged in parallel. For example, assume that the left end of each signal wiring is the input side and the right end is the output side. In this embodiment, it is assumed that the frequency of a signal transmitted through each of the signal wirings 11 to 16 is 10 Gbps as in the first embodiment.

  In FIG. 4A, the MSL of the surface layer is indicated by a solid line, and the SL of the inner layer is indicated by a dotted line. Vias are shown as circles. Referring to the cross-sectional view of FIG. 4B, it can be seen that MSL is in the surface layer and SL is in the inner layer. In this embodiment, the relative dielectric constant of the substrate is 3.7 as in the first embodiment, and a delay difference of 80 psec per 40 mm occurs due to the difference in propagation speed between MSL and SL.

  The signal wiring 11 has a structure in which the MSL 11A on the surface layer is connected to the SL 11B on the inner layer via the via 11a and returns to the MSL 11C on the surface layer again from the SL 11B via the via 11b.

  On the other hand, the signal wirings 12 and 13 are connected from the surface layer MSL to the inner layer SL by vias, returned from the SL to the surface layer MSL again by vias, and further connected from the MSL to the inner layer SL by vias, The structure returns from the SL to the MSL on the surface layer by via again.

  For example, the signal wiring 12 includes MSLs 12A, SL12B, MSL12C, SL12D, and MSL12E connected in series. MSL12A and SL12B are connected by a via 12a, SL12B and MSL12C are connected by a via 12b, MSL12C and SL12D are connected by a via 12c, and SL12D and MSL12E are connected by a via 12d.

  This configuration can be considered that the SL of the signal wiring 11 corresponding to the SL 12B of the signal wiring 12 and the SL 13B of the signal wiring 13 has a length of zero. Similarly, it can be considered that SL of the signal wiring 13 corresponding to SL11B of the signal wiring 11 and SL12D of the signal wiring 12 has a length of zero.

  Referring again to FIG. 4A, the signal wires 11, 12, and 13 have the same overall length. Further, the signal wirings 11, 12, and 13 have different SL lengths near the left end, and different SL lengths near the right end. The signals 11, 12, and 13 have the same MSL length sum and the SL length sum.

  Since the total length of the MSL and the total length of the SL of the signal wirings 11, 12, and 13 are equal to each other, there is no delay difference in the output waveform as a whole. However, in the middle stage, a delay difference occurs due to a difference in length between the MSL and SL having different signal propagation speeds.

  Also in this embodiment, it is assumed that the signal change time (rise time or fall time) is 16 psec as in the first embodiment. In order to reduce the jitter, a delay difference of 8 psec, which is ½ of the change time, may be added. As described above, there is a delay difference of 80 psec per 40 mm due to the difference in propagation speed between MSL and SL.

  In this embodiment, the signal wiring 11 has a length of 8 mm in the SL 11B near the right end. In the signal wiring 12, the SL 12B near the left end has a length of 4 mm, and the SL 12D near the right end has a length of 4 mm. In the signal wiring 13, the SL 13B in the vicinity of the left end is 8 mm in length. Further, the distribution of the length of the MSL and SL of the signal wiring 14 is the same as that of the signal wiring 11, the distribution of the length of the MSL and SL of the signal wiring 15 is the same as that of the signal wiring 12, and The distribution of the SL length is the same as that of the signal wiring 13.

  As described above, according to the present embodiment, the difference in the SL length near the left end is set to 4 mm and the difference in the SL length near the right end is set to 4 mm in adjacent signal wirings having the same overall length. The distribution of SL length is different. As a result, it is possible to reduce the jitter caused by crosstalk by shifting the phases of the signals in the middle, and to match the phases at the end.

  In this embodiment, as the length of the MSL portion arranged in the center of each of the signal wirings 11 to 16 is longer than the lengths of the MSL and SL portions at both ends, the influence of jitter due to crosstalk increases. The part to be reduced becomes longer.

  2A to 2D, as the delay difference increases from 2A to 2B, 2C, and 2D, the distortion of the eye-shaped waveform at the upper part of the cross portion of the eye pattern approaches the center of the eye pattern. . Since there is a waveform distortion near the center of the eye pattern, the transmission quality deteriorates. Therefore, in the first and second embodiments, the maximum delay difference is set to 16 psec by using only three stages having different phases by 8 psec. Therefore, a larger delay difference is not generated. However, a circuit configuration in which a waveform is shaped by an element that receives a signal and a configuration that causes a larger delay difference may be employed.

  In the first and second embodiments, the single-end wiring is illustrated, but the present invention is not limited to this. The present invention can also be applied to a differential wiring or a combination of a single-ended wiring and a differential wiring.

<Second Embodiment>
If a signal wiring of the same signal is placed on both sides of a certain signal wiring, the crosstalk to the central signal wiring by the two signal wirings on both sides cancels each other. In addition, if the signal wiring of the same signal is sandwiched between both sides of the differential wiring, the crosstalk to the signal wiring by the two signal wirings on both sides cancels each other, and the crosstalk to the differential wiring is common mode noise. become. In the present embodiment, this is used to reduce jitter caused by crosstalk. When the signal wirings arranged so as to be sandwiched between both sides are differential wirings, the differential wirings of the signals having opposite phases may be used, or the arrangement of the differential wirings of the signals having the same phase may be reversed.

  FIG. 5 is a graph showing an eye pattern of a central differential MSL when a signal of 10 Gbps is transmitted by three differential MSLs arranged adjacent to each other so that a certain signal wiring is sandwiched between two signal wirings. is there. FIG. 5A shows an eye pattern of the central differential MSL when random pulse trains independent from each other are input to the two differential MSLs on both sides. FIG. 5B shows an eye pattern when a pulse train having a reverse phase is input to two differential MSLs on both sides.

  Referring to FIG. 5A, it can be seen that jitter occurs in the central differential MSL due to crosstalk from the two differential MSLs on both sides. On the other hand, when FIG. 5B is seen, it can be seen that the crosstalk from the two differential MSLs on both sides to the central differential MSL cancels each other and becomes common mode noise, thereby reducing the jitter.

(Third embodiment)
FIG. 6 is a diagram for explaining the configuration of the signal transmission board of the third embodiment. FIG. 7 is a graph showing an eye pattern when a signal is transmitted by the signal transmission board shown in FIG.

  FIG. 6A shows a general wiring configuration in which differential signal wirings for transmitting two differential signals SA and SB are arranged adjacent to each other. The jitter generated in the wiring configuration of FIG. 6A is shown in FIG. 7A. Referring to FIG. 7A, it can be seen that jitter occurs in the cross portion.

  FIG. 6B shows a wiring configuration in which the differential signal wiring for transmitting the differential signal SB is sandwiched between the differential signal wirings of the differential signals SA and SA # having opposite phases. As a result, the signal wires of the same signal are arranged on both sides of the differential signal SB. The jitter generated in the wiring configuration of FIG. 6B is shown in FIG. 7B. Referring to FIG. 7B, the jitter at the cross portion is reduced.

  FIG. 6C shows a wiring configuration in which the differential signal wiring for transmitting the differential signal SB is sandwiched between two differential signal wirings that branch one differential signal SA. The jitter generated in the wiring configuration in FIG. 6C is the same as that in FIG. 6B. In this configuration, the number of pins of the semiconductor integrated circuit mounted on the signal transmission board is reduced as compared with the configuration of FIG. 6B.

  As described above, according to the present embodiment, the crosstalk due to the differential signal SA and the crosstalk due to the differential signal SA # cancel each other with respect to the differential signal SB, and the crosstalk becomes common mode noise. Therefore, the jitter of the differential signal SB can be reduced and the signal integrity can be improved.

(Fourth embodiment)
FIG. 8 is a diagram for explaining the configuration of the signal transmission board of the fourth embodiment. FIG. 8A shows a general wiring configuration in which signal wirings for transmitting the single end signal SA and the differential signal SB are arranged adjacent to each other. In the wiring configuration of FIG. 8A, jitter occurs in the differential signal SB due to crosstalk from the single-ended signal SA.

  FIG. 8B shows a wiring configuration in which a differential signal wiring for transmitting the differential signal SB is sandwiched between two single-ended signal SA signal wirings. As a result, the signal wires of the same signal are arranged on both sides of the differential signal SB. In the wiring configuration of FIG. 8B, crosstalk from the single-ended signals SA on both sides cancel each other, and the jitter of the differential signal SB is reduced.

  FIG. 8C shows a wiring configuration in which the differential signal wiring for transmitting the differential signal SB is sandwiched by the signal wiring branched from the single end signal SA. Jitter generated in the wiring configuration of FIG. 8C is the same as that of FIG. 8B. In this configuration, the number of pins of the semiconductor integrated circuit mounted on the signal transmission board is reduced as compared with the configuration of FIG. 8B.

  Note that the above-described embodiments and examples assume that the signal of each signal wiring is synchronized with the same clock, and the rise and fall due to crosstalk between signals synchronized with the same clock. Jitter is reduced.

It is a graph which shows an eye pattern at the time of inputting a 10-Gbps random pulse train into two differential MSL adjacent to each other. It is a graph which shows an eye pattern when the phase difference of the random pulse train of 10 Gbps inputted into two mutually adjacent MSL is zero. It is a graph which shows an eye pattern when the phase difference of the 10-Gbps random pulse train input into two mutually adjacent MSL is T / 10. It is a graph which shows an eye pattern when the phase difference of the random pulse train of 10 Gbps input into two mutually adjacent MSL is T / 5. It is a graph which shows an eye pattern when the phase difference of a 10 Gbps random pulse train inputted into two mutually adjacent MSLs is T / 2. It is a top view of the signal transmission board of the 1st example. It is AB sectional drawing of the signal transmission board | substrate of a 1st Example. It is a top view of the signal transmission board of the 2nd example. It is CD sectional drawing of the signal transmission board | substrate of a 2nd Example. It is a graph which shows the eye pattern of the center differential MSL when the signal of a random pulse train of 10 Gbps is transmitted by three differential MSLs. It is a graph which shows the eye pattern of the center differential MSL when the signal of the pulse sequence of a 10 Gbps reverse phase is transmitted by three differential MSL. It is a figure which shows the general wiring structure by which the differential signal wiring which transmits two differential signals SA and SB was arrange | positioned adjacently. It is a figure which shows the wiring structure which sandwiched the differential signal wiring which transmits differential signal SB with the differential signal wiring of differential signal SA and SA # of mutually opposite phase. It is a figure which shows the wiring structure which sandwiched the differential signal wiring which transmits differential signal SB with two differential signal wiring which branched one differential signal SA. It is a graph which shows an eye pattern when a signal is transmitted with the signal transmission board | substrate shown to FIG. 6A. It is a graph which shows an eye pattern when a signal is transmitted with the signal transmission board | substrate shown to FIG. 6B. It is a figure which shows the general wiring structure by which the signal wiring which transmits the single end signal SA and the differential signal SB was distribute | arranged adjacently. It is a figure which shows the wiring structure which sandwiched the differential signal wiring which transmits differential signal SB between the signal wiring of two single-end signals SA. It is a figure which shows the wiring structure which sandwiched the differential signal wiring which transmits differential signal SB with the signal wiring which branched the single end signal SA.

Explanation of symbols

1-6, 11-16 Signal wiring 1A-3A, 1C-3C, 11A-13A, 11C-13C, 12E MSL
1B-3B, 11B-13B, 12D SL
1a, 1b, 2a, 2b, 3a, 3b, 11a, 11b, 12a, 12b, 12c, 12d, 13a, 13b Via

Claims (13)

A signal transmission board having a multilayer structure having a first layer and a second layer having different signal propagation speeds on a signal wiring,
A portion disposed on the first layer and a portion disposed on the second layer, wherein the portion disposed on the first layer and the portion disposed on the second layer are connected to each other; First signal wiring,
The total combined length is equal to that of the first signal wiring, and is disposed in parallel in the vicinity of the first signal wiring, and is disposed on the portion disposed on the first layer and the second layer. And the total length of the portions arranged in the first layer is equal to the total length of the portions arranged in the first layer of the first signal wiring, The total length of the portions arranged in the layer is equal to the total length of the portions arranged in the second layer of the first signal wiring, and the portion arranged in the first layer and the second A signal transmission board having a second signal wiring connected to a portion arranged in the layer at a position different from a connection position in the first signal wiring.   In the first signal wiring and the second signal wiring, a portion arranged in one of the first layer and the second layer is arranged separately on an input side and an output side, The portion disposed on the input side of the second wiring signal is longer by a specific length than the portion disposed on the input side of the first wiring signal, and is disposed on the output side of the first wiring signal. 2. The signal transmission board according to claim 1, wherein a portion disposed on an output side of the second wiring signal is shorter than the portion by the specific length. The first layer is a surface layer and the second layer is an inner layer;
The first signal wiring includes a first partial wiring disposed in the first layer, a second partial wiring disposed in the second layer, and the first between the input terminal and the output terminal. The third partial wiring arranged in the layer is connected in series,
The second signal wiring is arranged between the input terminal and the output terminal in the first layer, and is a fourth partial wiring that is longer than the first partial wiring by the specific length, and the second layer. A fifth partial wiring having the same length as the second partial wiring, and a sixth partial wiring disposed in the first layer and shorter than the third partial wiring by the specific length. The signal transmission board according to claim 2 connected in series.   4. The signal according to claim 3, wherein the second partial wiring and the fifth partial wiring are longer than the first partial wiring, the third partial wiring, the fourth partial wiring, and the sixth partial wiring. Transmission board. The first layer is a surface layer, the second layer is an inner layer, and in the first signal wiring and the second signal wiring, a portion of the second layer is divided into an input side and an output side. Arranged,
The portion of the second layer is not disposed on the input side of the first signal wiring, and the portion of the second layer disposed on the input side of the second signal wiring has the specific length. Yes,
The portion of the second layer disposed on the output side of the first signal wiring is longer by the specific length than the portion of the second layer disposed on the output side of the second signal wiring. The signal transmission board according to claim 2.   In the first signal wiring and the second signal wiring, the first layer disposed between the input side and the output side rather than the portion of the second layer disposed on the input side and the output side. The signal transmission board according to claim 5, wherein a portion arranged in the is longer.   The specific length is the difference between the delay time in the signal wiring of the first layer and the delay time in the signal wiring of the second layer transmitted through the first signal wiring and the second signal wiring. The signal transmission board according to any one of claims 2 to 6, wherein the signal transmission board has a length that is ½ or more of a signal change time.   The first signal wiring is equal in length, is disposed on the opposite side of the first signal wiring in parallel and close to the second signal wiring, and the portion disposed on the first layer and the first signal wiring And the total length of the portions disposed on the first layer is the total length of the portions disposed on the first layer of the first signal wiring. And the total length of the portion disposed on the second layer is equal to the total length of the portion disposed on the second layer of the first signal wiring, and is disposed on the first layer. A third signal wiring connected at a position different from both the connection position in the first signal wiring and the connection position in the second signal wiring. The signal transmission board according to claim 1, further comprising: A signal transmission board with signal wiring,
A first signal wiring;
A signal transmission board having two second signal wirings arranged on both sides of the first signal wiring so as to sandwich the first signal wiring and transmitting the same signal to each other.   Each of the second signal wirings is a differential wiring composed of a pair of signal wirings for transmitting two signals having different polarities, and the signal wiring of the same polarity comes on the first signal wiring side. The signal transmission board according to claim 9, wherein the signal transmission board is arranged with the first signal wiring interposed therebetween.   The signal transmission board according to claim 10, wherein the first signal wiring is a differential wiring composed of a pair of signal wirings that respectively transmit two signals having different polarities.   12. The second signal wiring according to claim 9, wherein the second signal wiring is arranged on both sides of the first signal wiring so as to branch one signal and sandwich the first signal wiring. Signal transmission board.   The signal transmission board according to any one of claims 1 to 12, wherein signals transmitted through the signal wiring are signals synchronized with the same clock.

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