JP2009075408A - Display and driving method therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent a light emitting element from being troubled by controlling a reverse bias voltage impressed to the light emitting element included in an individual pixel. <P>SOLUTION: This display includes a threshold voltage correcting means, a mobility correcting means and a coupling means. The threshold voltage correcting means executes a threshold voltage correcting operation for holding a voltage corresponding to a threshold voltage Vth of a drive transistor T5 into a holding capacity C1 in advance to a writing period. The mobility correcting means executes a mobility correcting operation for negative-feeding back a drive current to the holding capacity C1 to be corrected in response to the mobility μ of the drive transistor T5, when the light emitting element EL is in an off-state in one part of the writing period. The coupling means includes a bias scanner 6, inputs a reverse-directional coupling voltage to a connection node S in advance to the mobility correcting operation, and sets thereby the light emitting element EL in the off-state. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an active matrix display device using a light emitting element for a pixel and a driving method thereof.

  In recent years, development of flat self-luminous display devices using organic EL devices as light-emitting elements has become active. An organic EL device is a device that utilizes the phenomenon of light emission when an electric field is applied to an organic thin film. Since the organic EL device is driven at an applied voltage of 10 V or less, it has low power consumption. In addition, since the organic EL device is a self-luminous element that emits light, it does not require an illumination member and can be easily reduced in weight and thickness. Furthermore, since the response speed of the organic EL device is as high as several μs, an afterimage does not occur when displaying a moving image.

Among planar self-luminous display devices that use organic EL devices as pixels, active matrix display devices in which thin film transistors are integrated and formed as driving elements in each pixel are particularly active. Active matrix type flat self-luminous display devices are described in, for example, Patent Documents 1 to 5 below.
JP 2003-255856 A JP 2003-271095 A JP 2004-133240 A JP 2004-029791 A JP 2004-093682 A

  FIG. 24 is a schematic circuit diagram showing an example of a conventional active matrix display device. The display device includes a pixel array unit 1 and peripheral driving units. The drive unit includes a horizontal selector 3 and a write scanner 4. The pixel array unit 1 includes columnar signal lines SL and row-shaped scanning lines WS. Pixels 2 are arranged at the intersections between the signal lines SL and the scanning lines WS. In the figure, only one pixel 2 is shown for easy understanding. The write scanner 4 includes a shift register, operates in response to an externally supplied clock signal ck, and sequentially transfers start pulses sp supplied from the outside, thereby sequentially outputting control signals to the scanning lines WS. . The horizontal selector 3 supplies a video signal to the signal line SL in accordance with the line sequential scanning on the write scanner 4 side.

  The pixel 2 includes a sampling transistor T1, a driving transistor T2, a storage capacitor C1, and a light emitting element EL. The drive transistor T2 is a P-channel type, its source is connected to the power supply line, and its drain is connected to the light emitting element EL. The gate of the driving transistor T2 is connected to the signal line SL via the sampling transistor T1. The sampling transistor T1 conducts in response to the control signal supplied from the write scanner 4, samples the video signal supplied from the signal line SL, and writes it to the holding capacitor C1. The drive transistor T2 receives the video signal written in the storage capacitor C1 at its gate as the gate voltage Vgs, and causes the drain current Ids to flow through the light emitting element EL. As a result, the light emitting element EL emits light with a luminance corresponding to the video signal. The gate voltage Vgs represents the gate potential with reference to the source.

The drive transistor T2 operates in the saturation region, and the relationship between the gate voltage Vgs and the drain current Ids is expressed by the following characteristic equation.
Ids = (1/2) μ (W / L) Cox (Vgs−Vth) ²
Here, μ is the mobility of the driving transistor, W is the channel width of the driving transistor, L is the same channel length, Cox is the same gate insulation capacitance, and Vth is the same threshold voltage. As is apparent from this characteristic equation, the drive transistor T2 functions as a constant current source that supplies the drain current Ids in accordance with the gate voltage Vgs when operating in the saturation region.

  FIG. 25 is a graph showing voltage / current characteristics of the light emitting element EL. The horizontal axis represents the anode voltage V, and the vertical axis represents the drive current Ids. The anode voltage of the light emitting element EL is the drain voltage of the driving transistor T2. In the light emitting element EL, the current / voltage characteristics change with time, and the characteristic curve tends to fall with time. For this reason, the anode voltage (drain voltage) V changes even if the drive current Ids is constant. In that respect, the pixel circuit 2 shown in FIG. 24 operates in the saturation region of the driving transistor T2, and can pass the driving current Ids according to the gate voltage Vgs regardless of the fluctuation of the drain voltage. It is possible to keep the light emission luminance constant regardless of changes over time.

  FIG. 26 is a circuit diagram showing another example of a conventional pixel circuit. The difference from the pixel circuit shown in FIG. 24 is that the driving transistor T2 is changed from the P-channel type to the N-channel type. In the circuit manufacturing process, it is often advantageous to make all the transistors constituting the pixel N-channel type.

  However, in reality, thin film transistors (TFTs) composed of semiconductor thin films such as polysilicon have variations in individual device characteristics. In particular, the threshold voltage Vth is not constant and varies from pixel to pixel. As apparent from the transistor characteristic equation described above, when the threshold voltage Vth of each driving transistor varies, even if the gate voltage Vgs is constant, the drain current Ids varies, and the luminance varies from pixel to pixel. The screen uniformity is damaged. Conventionally, a pixel circuit incorporating a function of canceling variations in threshold voltages of drive transistors has been developed, and is disclosed in, for example, Patent Document 3 described above.

  In addition, the thin film transistor has a variation in mobility μ in addition to the threshold voltage Vth. As apparent from the transistor characteristic equation described above, when the mobility μ of each driving transistor varies, even if the gate voltage Vgs is constant, the drain current Ids varies, and the luminance varies from pixel to pixel. Impairs uniformity. Conventionally, a pixel circuit incorporating a function of canceling the variation in mobility in addition to the variation in threshold voltage of the driving transistor has been developed.

  A pixel circuit incorporating a conventional threshold voltage correction function or mobility correction function has a period during which a reverse bias is applied to the light emitting element in operation. However, if the voltage level of the reverse bias is large or the application time of the reverse bias is long, a light emitting element such as an organic EL device may be damaged and may not emit light in the worst case, which is a problem to be solved. .

  In view of the above-described problems of the related art, the present invention provides a display device that can control a reverse bias voltage applied to a light emitting element included in each pixel to prevent failure of the light emitting element and a driving method thereof. The purpose is to provide. In order to achieve this purpose, the following measures were taken. That is, the present invention includes a row-shaped scanning line, a column-shaped signal line, and a pixel circuit arranged in a matrix at a portion where they intersect, and the pixel circuit includes at least a sampling transistor, a driving transistor, The sampling transistor includes a storage capacitor and a light emitting element connected to the driving transistor via a connection node. The sampling transistor is turned on in response to a control signal supplied from the scanning line in a predetermined writing period, and is supplied from the signal line. The video signal is held in the holding capacitor, and the driving transistor supplies a driving current corresponding to the signal potential of the video signal held in the holding capacitor to the light emitting element through the connection node. The element transits between an on state and an off state in accordance with the potential of the connection node that varies in a forward direction and a reverse direction, and emits light by the drive current in the on state. The threshold voltage correction means, the mobility correction means, and the coupling means, and the threshold voltage correction means holds the voltage corresponding to the threshold voltage of the drive transistor in the storage capacitor prior to the writing period. The mobility correction means performs a negative feedback of the drive current to the storage capacitor when the light emitting element is in an off state during a part of the writing period. A mobility correction operation for applying a correction according to the mobility is performed, and the coupling means inputs a coupling voltage in the reverse direction to the connection node prior to the mobility correction operation, thereby turning off the light emitting element. It is characterized by being in a state.

  In one aspect, the coupling means includes an auxiliary capacitor and a control line arranged in parallel with the scanning line, the auxiliary capacitor having one end connected to the connection node and the other end connected to the control line. By connecting and switching the potential of the control line, a reverse coupling voltage is input from the auxiliary capacitor to the connection node. The coupling means inputs the coupling voltage after the threshold voltage correcting operation and before the mobility correcting operation. The threshold voltage correction means performs a threshold voltage correction operation after resetting the potential of the connection node in the reverse direction to turn off the light emitting element, and the potential of the connection node is the process of the threshold voltage correction operation. The coupling means inputs the coupling voltage and returns the potential of the connection node in the reverse direction, thereby maintaining the off state of the light emitting element. In addition, the threshold voltage correcting means reduces the potential for resetting the connection node in the reverse direction in anticipation of the magnitude of the reverse coupling voltage input by the coupling means, so that the light emitting element is excessive. Avoid reverse bias. The reverse coupling voltage input by the coupling means is set to be larger than the forward potential fluctuation of the connection node generated in the mobility correction operation when the maximum level video signal is written.

  According to the present invention, in order to cancel the threshold voltage of the driving transistor, the display device is driven by threshold voltage correction means for previously writing a voltage corresponding to the threshold voltage in the holding capacitor, and negatively feeding back the driving current to the holding capacitor. In addition to mobility correction means for performing correction according to the mobility of the transistor, a coupling means is provided. This coupling means inputs a coupling voltage of an appropriate magnitude to the anode of the light emitting element at an appropriate timing between the threshold voltage correction operation and the mobility correction operation. Thereby, the application state of the reverse bias can be appropriately controlled so that the light emitting element does not break down.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a premise of a display device according to the present invention, and is a block diagram showing an overall configuration of a display device developed prior to the present invention. In order to facilitate understanding of the present invention, the display device according to this prior development will be described first as part of the present invention. As shown in the figure, this display device basically includes a pixel array section 1, a scanner section, and a signal section. The scanner unit and the signal unit constitute a drive unit. The pixel array unit 1 is connected to the scanning lines WS, DS, AZ1, AZ2 arranged in rows, the signal lines SL arranged in columns, and the scanning lines WS, DS, AZ1, AZ2 and the signal lines SL. And the matrix pixel circuit 2. The signal unit includes a horizontal selector 3 and supplies a video signal to the signal line SL. The scanner unit includes a write scanner 4, a drive scanner 5, a first correction scanner 71, and a second correction scanner 72, and supplies control signals to the scanning lines WS, DS, AZ1, and AZ2, respectively, and sequentially sets pixels for each row. The circuit is scanned and a predetermined threshold voltage correction operation, signal writing operation, light emission operation, and the like are performed.

  The write scanner 4 is composed of a shift register, operates in response to an externally supplied clock signal WSck, and sequentially transfers a start pulse WSsp similarly supplied from the outside, whereby a predetermined control signal is applied to the corresponding scanning line WS. Output in line sequential order. Similarly, the drive scanner 5 also includes a shift register, operates according to the clock signal DSck and the start pulse DSsp, and outputs a predetermined control signal to the corresponding scanning line DS. Similarly, the first correction scanner 71 operates by receiving the clock signal AZ1ck and the start pulse AZ1sp. The second correction scanner 72 also receives the supply of the clock signals AZ2ck and AZ2sp from the outside, and outputs a predetermined control signal to the corresponding scanning line AZ2.

  FIG. 2 is a circuit diagram showing a configuration of a pixel circuit incorporated in the display device shown in FIG. This pixel circuit is related to the prior development on which the present invention is based, and will be described in detail as part of the present invention. As shown in the figure, the pixel circuit 2 includes a sampling transistor T1, three switching transistors T2, T3, T4, a drive transistor T5, a storage capacitor C1, and a light emitting element EL. The sampling transistor T1 conducts according to a control signal supplied from the scanning line WS during a predetermined sampling period (video signal writing period) and samples the signal potential Vsig of the video signal supplied from the signal line SL into the holding capacitor C1. . The storage capacitor C1 applies the input voltage Vgs to the gate G of the drive transistor T5 in accordance with the signal potential Vsig of the sampled video signal. The drive transistor T5 supplies an output current Ids corresponding to the input voltage Vgs to the light emitting element EL. The light emitting element EL emits light with luminance according to the signal potential Vsig of the video potential by the output current Ids supplied from the drive transistor T5 during a predetermined light emission period. The anode of the light emitting element EL is connected to the source S of the drive transistor T5, while the cathode is connected to a predetermined ground potential (cathode potential) Vcat. In this specification, the source S of the drive transistor T5 may be referred to as a connection node.

  The switching transistor T2 is turned on in response to a control signal supplied from the scanning line AZ1 prior to the sampling period, and sets the gate G of the driving transistor T5 to a predetermined potential Vofs. The switching transistor T4 conducts in response to a control signal supplied from the scanning line AZ2 prior to the sampling period (writing period), and sets the source S (connection node) of the driving transistor T5 to a predetermined potential Vss. Similarly, the switching transistor T3 is turned on in response to a control signal supplied from the scanning line DS prior to the writing period to connect the driving transistor T5 to the power supply potential Vcc, and thus a voltage corresponding to the threshold voltage Vth of the driving transistor T5. The value is held in the holding capacitor C1 and the influence of the threshold voltage Vth is corrected. Therefore, in this example, the switching transistors T2, T3, and T4 constitute a threshold voltage correction unit. Further, the sampling transistor T1 and the switching transistor T3 cooperate to constitute a mobility correction unit, and the output current Ids is negatively fed back to the holding capacitor C1 during a part of the above-described writing period, so that the driving transistor T5 moves. Apply correction according to degree μ. Further, the switching transistor T3 conducts again in response to the control signal supplied from the scanning line DS during the light emission period, connects the drive transistor T5 to the power supply potential Vcc, and causes the output current Ids to flow through the light emitting element EL.

  As is clear from the above description, the pixel circuit 2 is composed of five transistors T1 to T5, one holding capacitor C1, and one light emitting element EL. The transistors T1, T2, T4 and T5 are N-channel type polysilicon TFTs. Only the transistor T3 is a P-channel type polysilicon TFT. However, the present invention is not limited to this, and N-channel and P-channel TFTs can be mixed as appropriate. The light emitting element EL is a diode type having an anode and a cathode, and is made of, for example, an organic EL device. This organic EL device transitions between an on state and an off state according to the potential of the anode (that is, the connection node), and emits light by an output current in the on state, while the pixel circuit performs threshold voltage correction operation and mobility correction. When performing an action, it is placed in the off state. However, if the off-state time is too long or the reverse bias voltage is too large, the organic EL device may be damaged. The present invention is not limited to organic EL devices, and light emitting elements generally include all devices that emit light by current drive.

  FIG. 3 is a timing chart for explaining the operation of the pixel circuit shown in FIG. This timing chart represents the waveforms of control signals applied to the scanning lines WS, AZ1, AZ2, and DS along the time axis. Since the transistors T1, T2, and T4 are N-channel type, the transistors T1, T2, and T4 are turned on when the scanning lines WS, AZ1, and AZ2 are at a high level, and turned off when the scanning lines are at a low level. On the other hand, since the transistor T3 is a P-channel type, it is turned off when the scanning line DS is at a high level and turned on when it is at a low level. Therefore, this timing chart also shows the on / off states of the transistors T1, T2, T3, and T4. This timing chart also shows potential changes of the gate G and the source S of the drive transistor T5 together with the waveforms of the control signals WS, AZ1, AZ2, and DS. A voltage generated between the gate G and the source S is a gate voltage Vgs, which is an input voltage to the driving transistor T5.

  As shown in the figure, the timing chart is divided into periods (1) to (8) for convenience. The first light emission period (1) belongs to the previous field. The light emission period (1) ends and the next field is entered. First, there are preparation periods (2) and (3) for threshold voltage correction, followed by a threshold voltage correction period (4). After the adjustment period (5), the process proceeds to the writing periods (6) and (7). . The writing periods (6) and (7) include a mobility correction period (7). This is followed by the light emission period (8) of this field. Here, in the light emission periods (1) and (8), the source S (connection node) of the drive transistor T5 is at a relatively high potential, and the light emitting element EL is turned on to emit light. On the other hand, the periods (2) to (7) are non-light emitting periods, the source S of the driving transistor T5 is at a relatively low potential, and the light emitting element EL is in a non-light emitting state due to an off state. In particular, in the preparation period (3), the potential of the source S drops deeply and a strong reverse bias state is entered.

  Next, the operation of the pixel circuit shown in FIG. 2 will be described in detail with reference to FIGS. First, as shown in FIG. 4, in the light emission period (1), only the transistor T3 is turned on. At this time, since the driving transistor T5 is set to operate in the saturation region, the driving current Ids flowing through the light emitting element EL is in accordance with the input voltage Vgs applied between the gate G and the source S of the driving transistor T5. The value shown in the above transistor characteristic equation is taken.

  Subsequently, as shown in FIG. 5, when the preparation period (3) is entered through the preparation period (2), the transistor T3 is turned off and light emission is stopped, while the transistors T2 and T4 are turned on. As a result, the gate G of the drive transistor T5 is charged to the predetermined potential Vofs, and the source S is charged to the predetermined potential Vss. Therefore, the gate voltage Vgs of the driving transistor T5 takes a value of Vofs−Vss. Here, in order to turn off the light emitting element EL, the voltages Vofs and Vss are set so that the anode voltage Vel applied to the light emitting element EL is smaller than the sum of the threshold voltage Vthel and the cathode voltage Vcat of the light emitting element EL. . Here, the potential of the source S is charged to Vss. The potential of the source S is the anode potential Vel of the light emitting element EL. Therefore, in this preparation period (3), Vss is set to be significantly lower than the threshold voltage Vthel with reference to the cathode potential Vcat, so that the light emitting element EL is in a reverse bias state and turned off. In the preparation period (3), the transistors T2 and T4 are simultaneously turned on, but may be turned on first.

  As shown in FIG. 6, when proceeding to the threshold voltage correction period (4), the transistor T4 is turned off while the transistor T3 is turned on. As a result, the connection node (source S) is disconnected from Vss while being connected to the power supply Vcc side.

  FIG. 7 is an equivalent circuit diagram in which the light-emitting element EL illustrated in FIG. 6 is represented by a diode-connected transistor Tel and a capacitor Cel. Here, since Vel <Vcat + Vthel is set, the light emitting element EL is in an off state, and the leak current flowing through the light emitting element EL that is turned off is considerably smaller than the output current supplied by the driving transistor T5. Therefore, most of the current supplied by the driving transistor T5 is used to charge the holding capacitor C1 and the equivalent capacitor Cel.

  FIG. 8 is a graph showing this charging process. The horizontal axis represents time, and the vertical axis represents the source voltage of the drive transistor T5 (the anode voltage Vel of the light emitting element EL). As is apparent from the graph, the anode voltage Vel of the light emitting element increases from Vss toward Vofs−Vth with time. At the end of the threshold voltage correction period (4), the gate G / source S voltage Vgs of the drive transistor T5 becomes a value corresponding to Vth. At this time, the condition of Vel = Vofs−Vth <Vcat + Vthel is maintained, and the light emitting element EL is kept in the off state.

In the adjustment period (5) after the threshold voltage correction period (4), the switching transistor T3 and the switching transistor T2 are turned off. By turning off the switching transistor T3 before the switching transistor T2, it is possible to suppress the fluctuation of the gate voltage Vgs of the driving transistor T5. Subsequently, in the writing period (6), the sampling transistor T1 is turned on and the signal voltage Vsig is written to the gate G of the driving transistor T5. At this time, the voltage Vgs between the gate G and the source S of the driving transistor T5 is expressed by the following equation.
Vgs = (Vsig−Vofs) × Cel / (Cel + C1 + C2) + Vth
Here, Cel is an equivalent capacitance of the light emitting element, C1 is a holding capacitance, and C2 is a parasitic capacitance of the driving transistor T5. Since Cel is larger than C1 and C2, the gate voltage Vgs is approximately Vsig + Vth. However, Vofs is set to 0 V for convenience of calculation.

  Next, as shown in FIG. 9, when the mobility correction period (7) is entered, the switching transistor T3 is turned on while the sampling transistor T1 is continuously turned on. At this time, the potential of the source S of the driving transistor T5 still does not exceed the sum of the threshold voltage Vthel and the cathode voltage Vcat of the light emitting element EL, and the light emitting element EL is in the off state. Therefore, the leak current flowing through the light emitting element EL is considerably less than the current supplied by the drive transistor T5, and the output current of the drive transistor T5 is almost used to charge the holding capacitor C1 and the equivalent capacitor Cel. At this time, since the threshold voltage correction operation for the driving transistor T5 is completed, the current flowing through the driving transistor T5 reflects only the mobility μ. Specifically, when the mobility μ is large, the amount of current of the driving transistor T5 is large, and the potential of the source S rises quickly. Conversely, when the mobility μ is small, the current amount of the drive transistor T5 is small, and the potential rise of the source S is delayed.

  FIG. 10 is a graph showing the potential increase of the source S in the mobility correction period (7). The horizontal axis represents time, and the vertical axis represents the source voltage of the driving transistor T5. As is apparent from the graph, when the mobility μ is large, negative feedback to the storage capacitor C1 is large, and the potential increase of the source S of the drive transistor T5 is large. Since Vgs is compressed accordingly, the current supply capability of the drive transistor T5 is suppressed. That is, when the mobility is large, the mobility correction function works to suppress the influence. Conversely, when the mobility μ is small, the increase in the source potential is small and Vgs is not compressed so much. Therefore, the current supply capability of the drive transistor T5 can be ensured. In this way, in the mobility correction period (7), Vgs of the drive transistor T5 is reduced to reflect the mobility μ, and becomes Vgs that is completely corrected for the mobility μ after a certain period of time.

  As shown in FIG. 11, when proceeding to the light emission period (8), the sampling transistor T1 is turned off, and the gate of the drive transistor T5 is disconnected from the signal line SL. Since the voltage Vgs between the gate G and the source S of the drive transistor T5 is constant, the drive transistor T5 tries to flow a constant current Ids ′ to the light emitting element EL. The anode voltage Vel rises to the voltage Vx at which the drive current Ids ′ flows through the light emitting element EL, and the light emitting element EL actually starts to emit light. Here, the current / voltage characteristics of the light emitting element EL change as the light emission time becomes longer. Therefore, the anode potential (source potential) varies with time. However, since the gate / source voltage Vgs of the driving transistor T5 is maintained at a constant value, the current Ids ′ flowing through the light emitting element EL does not change. Therefore, even if the current / voltage characteristics of the light emitting element EL deteriorate, a constant current Ids ′ always flows and the luminance of the light emitting element EL does not change.

Here, the reverse bias applied to the light emitting element EL will be described. In general, the term reverse bias means a state in which the anode voltage of the light emitting element EL is lower than the cathode voltage. Here, assuming that the voltage applied to the anode with respect to the cathode is “voltage applied to the light emitting element EL”, the voltage applied to the light emitting element EL is negative in reverse bias, and the light emitting element is turned off. By the way, in operation, even if the voltage applied to the light emitting element EL does not become negative, the light emitting element EL is turned off as long as it is equal to or lower than the threshold voltage Vthel of the light emitting element EL. In view of this point, in this specification, the term reverse bias includes not only the case where the voltage applied to the light emitting element EL is negative, but also the case where the voltage is equal to or lower than the threshold voltage Vthel of the light emitting element EL even if the voltage is not negative. We use in meaning. Therefore, in this specification, the reverse bias state of the light-emitting element has an equivalent meaning to the off-state of the light-emitting element.
The reverse bias applied to the light emitting element EL becomes the largest in the preparation period (3), and when Vcat is 0 V, the value is Vss. Immediately before the threshold cancellation period (4), a reverse bias of Vss is applied to the light emitting element EL, and then a threshold cancellation operation, a video signal writing operation, and a mobility correction operation are performed. In order to complete the mobility correction operation normally, the voltage applied to the light emitting element EL must be equal to or lower than the threshold voltage Vthel at the time when the mobility correction operation ends, that is, immediately before the light emission period (8).

When writing the highest level signal potential Vsig in order to perform white display, assuming that the increase in potential of the anode of the light emitting element EL (that is, the source of the drive transistor T5) in the mobility correction operation is ΔV, the following relationship is satisfied. It is necessary to appropriately set Vofs and Vss in advance.
Vofs−VthMIN <Vthel + Vcat−ΔV
VthMAX <Vofs-Vss
Here, VthMIN indicates the minimum value of the threshold voltages of the drive transistors included in each pixel of the pixel array. Conversely, VthMAX represents the maximum value. As described above, the light emitting element EL is placed in the off state in the non-light emitting periods (2) to (7) in the driving transistor T5 of each pixel. Here, if the reverse bias voltage is too large or the application time of the reverse bias voltage is too long, the light emitting element EL may be damaged, and in the worst case, the light may not be emitted and the pixel may have a dark spot defect.

  FIG. 12 is a circuit diagram showing a display device according to the present invention, which is an improvement of the display device according to the prior development shown in FIG. Basically, it is based on the display device according to the prior development shown in FIG. 2, and corresponding portions are given corresponding reference numbers. The difference is that a coupling means is added to control the potential of the connection node. This coupling means comprises an auxiliary capacitor Csub and a control line BS. A bias scanner 6 is added to scan the potential of the control line BS line by line. The bias scanner 6 operates in response to an externally supplied clock signal BSck, and sequentially transfers start pulses BSsp also supplied from the outside, so that the potential of the control line BS is switched line-sequentially between a high level and a low level. Yes.

  The configuration and operation of the pixel circuit 2 included in the display device shown in FIG. 12 will be specifically described below. As shown in the figure, the pixel circuit 2 is arranged at a portion where the row-shaped scanning line WS and the column-shaped signal line SL intersect. The pixel circuit 2 includes at least a sampling transistor T1, a driving transistor T5, a storage capacitor C1, and a light emitting element EL connected to the driving transistor T5 via a connection node. The sampling transistor T1 is turned on in response to a control signal supplied from the scanning line WS in a predetermined writing period, and holds the video signal supplied from the signal line SL in the holding capacitor C1. The driving transistor T5 supplies a driving current corresponding to the signal potential Vsig of the video signal held in the holding capacitor C1 to the light emitting element EL through the connection node. The light emitting element EL transits between a forward bias state (on state) and a reverse bias state (off state) according to the potential of the connection node that varies in the forward direction and the reverse direction, and is driven by a drive current under the forward bias state. Emits light.

  The pixel circuit 2 having such a configuration includes threshold voltage correction means, mobility correction means, and the coupling means described above. The threshold voltage correction means includes switching transistors T2, T3, and T4, and performs a threshold voltage correction operation for holding a voltage corresponding to the threshold voltage Vth of the drive transistor T5 in the holding capacitor C1 prior to the writing period. . The mobility correction means includes a sampling transistor T1 and a switching transistor T3. When the light emitting element EL is in an off state during a part of the writing period, the driving current is negatively fed back to the holding capacitor C1 to move the driving transistor T5. A mobility correction unit that performs correction according to the degree μ is performed. As a feature of the present invention, the coupling means inputs a reverse coupling voltage to the connection node prior to the mobility correction operation, thereby placing the light emitting element EL in the OFF state.

  Specifically, this coupling means includes a storage capacitor Csub and a control line BS arranged in parallel with the scanning line WS. One end of the auxiliary capacitor Csub is connected to the connection node (source S of the drive transistor T5), the other end is connected to the control line BS, and the bias scanner 6 switches the potential of the control line BS so that the auxiliary capacitor Csub is connected to the connection node. Input a coupling voltage in the reverse direction. Preferably, the coupling means inputs the coupling voltage after the threshold voltage correcting operation and before the mobility correcting operation. The threshold voltage correction means performs the threshold voltage correction operation after resetting the potential of the connection node in the reverse direction to turn off the light emitting element EL. As a result, the potential of the connection node (source S of the drive transistor T5) gradually increases in the forward direction during the threshold voltage correction operation. The coupling means inputs the coupling voltage at an appropriate timing after the threshold voltage correction operation, and returns the potential of the connection node in the reverse direction, so that the light emitting element EL is turned off before the mobility correction operation is performed. Make sure. Here, the threshold voltage correcting means reduces the potential Vss that resets the connection node (source S of the driving transistor T5) in the reverse direction in anticipation of the magnitude of the reverse coupling voltage input by the coupling means. Therefore, an excessive reverse bias is not applied to the light emitting element EL. Preferably, the reverse coupling voltage input by the coupling means is set to be larger than the forward potential variation ΔV of the connection node generated in the mobility correction operation when writing the video signal of the maximum level.

FIG. 13 is a timing chart for explaining the operation of the pixel circuit shown in FIG. In order to facilitate understanding, the same notation as the timing chart of FIG. 3 used for explaining the operation of the pixel circuit according to the prior development is adopted. However, in the timing chart of FIG. 13, in addition to the potential change of the scanning lines WS, AZ1, AZ2, and DS, the potential change of the control line BS is represented with the time axis aligned. The basic operation is the same as that in the preceding development example, and the non-light emission periods (2) to (7) are included between the light emission period (1) of the previous field and the light emission period (8) of this field. . The difference is that a coupling period (4a) is inserted between the threshold voltage correction period (4) and the mobility correction period (7). In this coupling period (4a), the control line BS is switched from a high potential to a low potential, and a negative direction (reverse direction) coupling voltage is applied to the source S of the drive transistor T5. As a result, the connection node can be securely held in the off state in preparation for the mobility correction operation. Assuming that the coupling voltage is the same as the potential increase ΔV of the anode of the light emitting element EL in the mobility correction operation when the signal voltage Vsig of the highest level is written, Vofs and Vss are set to satisfy the following relationship: There is a need to.
Vofs−VthMIN <Vthel + Vcat
VthMAX <Vofs-Vss
As is apparent from a comparison between this equation and the equation relating to the prior development described in paragraph 0032, Vofs in the present invention may be higher by ΔV than the prior development example. That is, Vss can be increased by ΔV. In view of this, in the threshold cancellation preparation period (3), the level of Vss can be reduced in advance.

  Next, the operation of the pixel circuit shown in FIG. 12 will be described in detail with reference to FIGS. First, as shown in FIG. 14, in the light emission period (1), only the transistor T3 is turned on. At this time, since the driving transistor T5 is set to operate in the saturation region, the driving current Ids flowing through the light emitting element EL is in accordance with the input voltage Vgs applied between the gate G and the source S of the driving transistor T5. The value shown in the above transistor characteristic equation is taken. In this light emission period (1), the potential of the control line BS is set to the low level BS_Low.

  Subsequently, as shown in FIG. 15, when the preparation period (3) is entered through the preparation period (2), the transistor T3 is turned off, while the transistors T2 and T4 are turned on. As a result, the gate G of the drive transistor T5 is charged to the predetermined potential Vofs, and the source S is charged to the predetermined potential Vss. Therefore, the gate voltage Vgs of the driving transistor T5 takes a value of Vofs−Vss. Here, in order to turn off the light emitting element EL, the voltages Vofs and Vss are set so that the anode voltage Vel applied to the light emitting element EL is smaller than the sum of the threshold voltage Vthel and the cathode voltage Vcat of the light emitting element EL. . Here, the potential of the source S is charged to Vss. The potential of the source S is the anode potential of the light emitting element EL. Therefore, in this preparatory period (3), Vss is set lower than the threshold voltage Vthel based on the cathode potential Vcat, so that the light emitting element EL is in a reverse bias state and turned off. In the preparation period (3), the transistors T2 and T4 are simultaneously turned on, but may be turned on first. Here, the control line BS is switched from the low potential BS_Low to the high potential BS_High. According to the timing chart of FIG. 13, this switching timing is after the transistors T2 and T4 are turned on, but the potential may be switched before that.

  As shown in FIG. 16, when proceeding to the threshold voltage correction period (4), the transistor T4 is turned off while the transistor T3 is turned on. As a result, the connection node (source S) is disconnected from Vss while being connected to the power supply Vcc side.

  FIG. 17 is an equivalent circuit diagram in which the light-emitting element EL illustrated in FIG. 16 is represented by a diode-connected transistor Tel and a capacitor Cel. Here, since Vel <Vcat + Vthel is set, the light emitting element EL is in an off state, and the leakage current flowing through the light emitting element EL is considerably smaller than the output current supplied by the driving transistor T5. Therefore, most of the current supplied by the driving transistor T5 is used to charge the holding capacitor C1 and the equivalent capacitor Cel. The anode voltage Vel of the light emitting element increases from Vss toward Vofs−Vth with time. At the end of the threshold voltage correction period (4), the gate G / source S voltage Vgs of the drive transistor T5 becomes a value corresponding to Vth. At this time, the condition of Vel = Vofs−Vth <Vcat + Vthel is maintained, and the light emitting element EL is kept in the off state.

Subsequently, as shown in FIG. 18, the process proceeds to the coupling period (4a). Here, the switching transistor T3 is turned off to end the threshold voltage canceling operation. Thereafter, the control line BS is changed from the high potential BS_High to the low potential BS_Low. By this operation, minus coupling (reverse direction coupling) is input to the source S of the drive transistor T5 through the auxiliary capacitor Csub. Thereafter, the switching transistor 2 is turned off. Here, by first turning off the switching transistor T3 and then turning off the switching transistor T2, it is possible to suppress fluctuations in the potential of the gate G of the driving transistor T5. Note that the timing at which the control line BS line falls may be after the switching transistor T2 is turned off.

  Thereafter, when the process proceeds to the mobility correction period (7) as shown in FIG. 19, the switching transistor T3 is turned on while the sampling transistor T1 is turned on. At this time, the potential of the source S of the driving transistor T5 still does not exceed the sum of the threshold voltage Vthel and the cathode voltage Vcat of the light emitting element EL, and the light emitting element EL is in the off state. Therefore, the leak current flowing through the light emitting element EL is considerably less than the current supplied by the drive transistor T5, and the output current of the drive transistor T5 is almost used to charge the holding capacitor C1 and the equivalent capacitor Cel. At this time, since the threshold voltage correction operation for the driving transistor T5 is completed, the current flowing through the driving transistor T5 reflects only the mobility μ. Specifically, when the mobility μ is large, the amount of current of the driving transistor T5 is large, and the potential of the source S rises quickly. Conversely, when the mobility μ is small, the current amount of the drive transistor T5 is small, and the potential rise of the source S is delayed. When the mobility μ is large, negative feedback to the storage capacitor C1 is large, and the potential increase of the source S of the drive transistor T5 is large. Since Vgs is compressed accordingly, the current supply capability of the drive transistor T5 is suppressed. That is, when the mobility is large, the mobility correction function works so as to suppress the influence. Conversely, when the mobility μ is small, the increase in the source potential is small and Vgs is not compressed so much. Therefore, the current supply capability of the drive transistor T5 can be ensured. In this way, in the mobility correction period (7), Vgs of the drive transistor T5 is reduced to reflect the mobility μ, and becomes Vgs that is completely corrected for the mobility μ after a certain period of time.

  As shown in FIG. 20, when the light emission period (8) is started, the sampling transistor T1 is turned off and the gate G of the drive transistor T5 is disconnected from the signal line SL. Since the voltage Vgs between the gate G and the source S of the drive transistor T5 is constant, the drive transistor T5 tries to flow a constant current Ids ′ to the light emitting element EL. The anode voltage Vel rises to the voltage Vx at which the drive current Ids ′ flows through the light emitting element EL, and the light emitting element EL actually starts to emit light. Here, the current / voltage characteristics of the light emitting element EL change as the light emission time becomes longer. Therefore, the anode potential (source potential) varies with time. However, since the gate / source voltage Vgs of the driving transistor T5 is maintained at a constant value, the current Ids ′ flowing through the light emitting element EL does not change. Therefore, even if the current / voltage characteristics of the light emitting element EL deteriorate, a constant current Ids ′ always flows and the luminance of the light emitting element EL does not change.

  As is clear from the above description, in the present invention, minus coupling is added to the connection node in the coupling period (4a). This coupling amount may basically be set to a level corresponding to the voltage increase ΔV of the connection node generated in the mobility correction period (7). In the mobility correction, the voltage increase ΔV depends on the signal potential Vsig. Therefore, the minus coupling amount may be determined so as to be commensurate with the voltage increase ΔV for mobility correction performed when the signal potential of the maximum level (in white display) is applied. On the other hand, the reverse bias voltage Vss applied to the connection node in the preparation period (3) for correcting the threshold voltage can be reduced in advance in anticipation of a negative coupling amount to be added later. In this manner, the reverse bias amount applied to the connection node before the threshold voltage correction operation can be suppressed, thereby preventing the light emitting element EL from becoming a dark spot and realizing a high yield.

  FIG. 21 is a block diagram showing another embodiment of the display device according to the present invention. As shown in the figure, the display device includes a pixel array unit 1 and driving units (3, 4, 5, 6) for driving the pixel array unit 1. The pixel array unit 1 includes a row-like scanning line WS, a column-like signal line SL, a matrix-like pixel 2 arranged at a portion where both intersect, and a supply corresponding to each row of each pixel 2. And an electric wire DS. In addition, a control line BS is arranged in parallel with the scanning lines WS and DS. The drive unit (3, 4, 5, 6) supplies a control signal to each scanning line WS sequentially to scan the pixels 2 line-sequentially in units of rows, and this line-sequential scanning. In addition, a power supply scanner (drive scanner) 5 that supplies a power supply voltage to be switched between the first potential and the second potential to each power supply line DS, and a signal that becomes a video signal on the column-shaped signal line SL in accordance with the line sequential scanning. A signal selector (horizontal selector) 3 for supplying a potential and a reference potential is provided. The write scanner 4 operates in response to a clock signal WSck supplied from the outside, and sequentially transfers start pulses WSsp supplied from the outside, thereby outputting a control signal to each scanning line WS. The drive scanner 5 operates in response to a clock signal DSck supplied from outside, and sequentially transfers start pulses DSsp supplied from the outside, thereby switching the potential of the power supply line DS line-sequentially. In addition, a bias scanner 6 is arranged to switch the potential of the control line BS between high and low levels. The bias scanner 6 operates according to the clock signal BSck and sequentially transfers the start pulse BSsp, thereby switching the potential of the control line BS in accordance with the line sequential scanning.

  22 is a circuit diagram showing a configuration of the pixel circuit 2 included in the display device shown in FIG. For the convenience of drawing, the positions of the light scanner 4, the drive scanner 5, and the bias scanner 6 are switched on the left and right in FIG. 21. As shown in the drawing, the pixel circuit 2 includes a two-terminal (diode type) light emitting element EL represented by an organic EL device, an N-channel sampling transistor T1, and an N-channel driving transistor T5. It is composed of a thin film type storage capacitor C1 and an auxiliary capacitor Csub. The sampling transistor T1 has its gate connected to the scanning line WS, one of its source and drain connected to the signal line SL, and the other connected to the gate G of the driving transistor T5. One of the source and the drain of the driving transistor T5 is connected to the light emitting element EL, and the other is connected to the feeder line DS. In this embodiment, the driving transistor T5 is an N-channel type, the drain side is connected to the power supply line DS, and the source S side is connected to the anode side of the light emitting element EL. The cathode of the light emitting element EL is fixed at a predetermined cathode potential Vcat. The storage capacitor C1 is connected between the source S and the gate G of the drive transistor T5. For the pixel 2 having such a configuration, the control scanner (write scanner) 4 sequentially outputs a control signal by switching the scanning line WS between a low potential and a high potential, and the pixels 2 are line-sequentially in units of rows. Scan. The power supply scanner (drive scanner) 5 supplies a power supply voltage to be switched between the first potential Vcc and the second potential Vss to each power supply line DS in accordance with line sequential scanning. The signal selector (horizontal selector) 3 supplies a signal potential Vsig and a reference potential Vofs, which are video signals, to the column-shaped signal lines SL in accordance with line sequential scanning.

  In such a configuration, the sampling transistor T1 is turned on in response to the control signal supplied from the scanning line WS, samples the signal potential Vsig supplied from the signal line SL, and holds it in the holding capacitor C1. The drive transistor T5 is supplied with current from the power supply line DS at the first potential Vcc, and passes drive current to the light emitting element EL in accordance with the signal potential Vsig held in the holding capacitor C1. The control scanner 4 outputs a control signal having a predetermined time width to the scanning line WS in order to bring the sampling transistor T1 into a conductive state in a time zone in which the signal line SL is at the signal potential Vsig, and thus to the storage capacitor C1. While holding the signal potential Vsig, a correction for the mobility μ of the driving transistor T5 is applied to the signal potential Vsig.

  The pixel circuit shown in FIG. 22 has a threshold voltage correction function in addition to the mobility correction function described above. That is, the power supply scanner (drive scanner) 5 switches the power supply line DS from the first potential Vcc to the second potential Vss at the first timing before the sampling transistor T1 samples the signal potential Vsig. Similarly, before the sampling transistor T1 samples the signal potential Vsig, the control scanner (write scanner) 4 makes the sampling transistor T1 conductive at the second timing and applies the reference potential Vofs from the signal line SL to the gate G of the driving transistor T5. In addition, the source S of the drive transistor T5 is set to the second potential Vss. The power supply scanner (drive scanner) 5 switches the power supply line DS from the second potential Vss to the first potential Vcc at a third timing after the second timing, and holds a voltage corresponding to the threshold voltage Vth of the drive transistor T5. It is held in the capacitor C1. With this threshold voltage correction function, the present display device can cancel the influence of the threshold voltage Vth of the drive transistor T5 that varies from pixel to pixel. Note that the timing before and after the first timing and the second timing does not matter.

  The pixel circuit 2 shown in FIG. 22 further has a bootstrap function. That is, when the signal potential Vsig is held in the holding capacitor C1, the write scanner 4 makes the sampling transistor T1 non-conductive and electrically disconnects the gate G of the driving transistor T5 from the signal line SL. The gate potential is linked to the change in the source potential at T5, and the voltage Vgs between the gate G and the source S is kept constant. Even if the current / voltage characteristics of the light emitting element EL change with time, the gate voltage Vgs can be kept constant, and the luminance does not change.

  In the pixel circuit 2, an auxiliary capacitor Csub is connected to the source S of the driving transistor T5. This auxiliary capacitor Csub is usually connected between the source S of the drive transistor T5 and a fixed potential (for example, the cathode potential Vcat) in order to improve the controllability of the mobility correction operation. In the present invention, the auxiliary capacitor Csub is connected to the control line BS instead of the fixed potential Vcat to provide coupling means.

  FIG. 23 is a timing chart for explaining the operation of the pixel circuit shown in FIG. The potential change of the scanning line WS, the power supply line DS, the signal line SL, and the control line BS is shown. The scanning line WS is switched between high and low two levels to control the on / off of the sampling transistor T1. The power supply line DS is switched between the high potential Vcc and the low potential Vss. The signal line SL is alternately switched between the reference potential Vofs and the signal potential Vsig every horizontal period (1H). The control line BS is switched between a low potential and a high potential. When the high potential is switched to the low potential, a negative coupling is applied to the connection node (source S of the drive transistor T5) via the auxiliary capacitor Csub.

  As shown in the drawing, a non-light emitting period (2) is inserted between the light emitting period (1) of the previous field and the light emitting period (3) of the present field. The non-emission period (2) includes a preparation period (21), a threshold correction period (22), a coupling period (23), and a writing + mobility correction period (24). In the preparation period (21), the source S of the drive transistor T5 is set to Vss via the power supply line DS, and the gate G of the drive transistor T5 is set to Vofs via the signal line SL and the sampling switch T1. By setting the source S of the drive transistor T5 to Vss, a reverse bias is applied to the light emitting element EL.

  Next, in the threshold correction period (22), the feed line DS is raised to Vcc while maintaining the gate G of the drive transistor T5 at Vofs, and the threshold voltage correction operation of the drive transistor T5 is performed. As a result of this threshold voltage correction operation, the source potential of the drive transistor T5 rises and the reverse bias state of the light emitting element EL is relaxed.

  Therefore, in the coupling period (23) after the threshold voltage correction period (22), the control line BS is switched from a high potential to a low potential, and minus coupling is put into the source S of the driving transistor T5. When coupling is input from the control line BS to the source S of the driving transistor T5, the sampling transistor T1 is turned off. If coupling is input while the sampling transistor T1 is on, a current flows from the feeder line DS, and the threshold voltage correction operation is performed again. Also in this embodiment, the amount of reverse bias applied to the light emitting element EL in the preparation period (21) can be reduced. As a result, the dark spot of the light emitting element EL is prevented and a high yield is realized.

  After the coupling period (23), the process proceeds to the writing / mobility correction period (24). Here, the sampling transistor T1 is turned on at the timing when the potential of the signal line SL is switched to the signal potential Vsig. As a result, Vsig is written to the gate G of the drive transistor T5. At the same time, the current flowing through the driving transistor T5 is negatively fed back to the holding capacitor C1, and the mobility correction operation is performed. In order to perform this mobility correction operation normally, minus coupling is applied to the source S of the driving transistor T5 in the coupling period (23), and the light emitting element EL is held in the OFF state. As a result, the current flowing out of the driving transistor T5 is negatively fed back to the storage capacitor C1 without flowing through the light emitting element EL, so that a desired mobility correction operation can be performed.

It is a block diagram which shows the whole structure of the display apparatus concerning prior development. FIG. 2 is a circuit diagram illustrating a configuration of a pixel incorporated in the display device illustrated in FIG. 1. 3 is a timing chart for explaining the operation of the pixel shown in FIG. 2. It is a schematic diagram for explaining the operation of the pixel. It is a schematic diagram for explaining the operation of the pixel. It is a schematic diagram for explaining the operation of the pixel. It is a schematic diagram for explaining the operation of the pixel. It is a graph similarly used for operation | movement description of a pixel. It is a schematic diagram for explaining the operation of the pixel. It is a graph similarly used for operation | movement description of a pixel. It is a schematic diagram for explaining the operation of the pixel. 1 is a circuit diagram showing a first embodiment of a display device according to the present invention. It is a timing chart with which it uses for operation | movement description of 1st Embodiment. It is a schematic diagram with which operation | movement description of 1st Embodiment is provided. It is a schematic diagram for explaining the operation of the first embodiment. It is a schematic diagram for explaining the operation of the first embodiment. It is a schematic diagram for explaining the operation of the first embodiment. It is a schematic diagram for explaining the operation of the first embodiment. It is a schematic diagram for explaining the operation of the first embodiment. It is a schematic diagram for explaining the operation of the first embodiment. It is a block diagram which shows 2nd Embodiment of the display apparatus concerning this invention. It is a circuit diagram which shows the structure of the pixel integrated in the display apparatus shown in FIG. FIG. 23 is a timing chart for explaining the operation of the pixel shown in FIG. 22. It is a circuit diagram which shows an example of the conventional display apparatus. FIG. 25 is a graph illustrating the operation of the display device illustrated in FIG. 24. FIG. It is a circuit diagram which shows the other example of the conventional display apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Pixel array part, 2 ... Pixel, 3 ... Horizontal selector, 4 ... Write scanner, 5 ... Drive scanner, 6 ... Bias scanner, T1 ... Sampling transistor, T5 ... Drive transistor, C1 ... Retention capacitor, Csub ... Auxiliary capacitor, EL ... Light emitting element

Claims (7)

A row-shaped scanning line, a column-shaped signal line, and a pixel circuit arranged in a matrix at a portion where they intersect,
The pixel circuit includes at least a sampling transistor, a drive transistor, a storage capacitor, and a light emitting element connected to the drive transistor via a connection node,
The sampling transistor is turned on according to a control signal supplied from the scanning line in a predetermined writing period, and holds the video signal supplied from the signal line in the holding capacitor,
The driving transistor supplies a driving current corresponding to a signal potential of the video signal held in the holding capacitor to the light emitting element through the connection node;
In the display device in which the light emitting element transits between an on state and an off state in accordance with a potential of the connection node that varies in a forward direction and a reverse direction, and emits light by the driving current in the on state.
Including threshold voltage correction means, mobility correction means, and coupling means,
The threshold voltage correction means performs a threshold voltage correction operation of holding a voltage corresponding to the threshold voltage of the drive transistor in the storage capacitor prior to the writing period,
The mobility correction means is a movement that applies a correction according to the mobility of the driving transistor by negatively feeding back the driving current to the storage capacitor during a part of the writing period and when the light emitting element is in an OFF state. Degree correction operation,
The display device is characterized in that the coupling means inputs a coupling voltage in the reverse direction to the connection node prior to the mobility correction operation, so that the light emitting element is turned off.   The coupling means includes an auxiliary capacitor and a control line arranged in parallel with the scanning line, the auxiliary capacitor having one end connected to the connection node and the other end connected to the control line, 2. The display device according to claim 1, wherein a coupling voltage in a reverse direction is input from the auxiliary capacitor to the connection node by switching a potential of the control line.   The display device according to claim 1, wherein the coupling unit inputs the coupling voltage after the threshold voltage correcting operation and before the mobility correcting operation. The threshold voltage correction means performs a threshold voltage correction operation after resetting the potential of the connection node in the reverse direction to turn off the light emitting element,
The potential of the connection node gradually increases in the forward direction during the threshold voltage correction operation,
4. The display device according to claim 3, wherein the coupling means inputs the coupling voltage and returns the potential of the connection node in the reverse direction, thereby maintaining the off state of the light emitting element.   The threshold voltage correction means reduces the potential for resetting the connection node in the reverse direction in anticipation of the magnitude of the reverse coupling voltage input by the coupling means, and thus excessively increases the light emitting element. 5. A display device according to claim 4, wherein a reverse bias is not applied.   The reverse coupling voltage input by the coupling means is set to be larger than the forward potential fluctuation of the connection node generated in the mobility correction operation when writing the video signal of the maximum level. The display device according to claim 1. A row-shaped scanning line, a column-shaped signal line, and a pixel circuit arranged in a matrix at a portion where they intersect,
The pixel circuit includes at least a sampling transistor, a drive transistor, a storage capacitor, and a light emitting element connected to the drive transistor via a connection node,
The sampling transistor is turned on according to a control signal supplied from the scanning line in a predetermined writing period, and holds the video signal supplied from the signal line in the holding capacitor,
The driving transistor supplies a driving current corresponding to a signal potential of the video signal held in the holding capacitor to the light emitting element through the connection node;
In the driving method of the display device in which the light emitting element transits between an on state and an off state according to the potential of the connection node which varies in a forward direction and a reverse direction, and emits light by the driving current in the on state.
Including a threshold voltage correction procedure, a mobility correction procedure, and a coupling procedure;
The threshold voltage correction procedure performs a threshold voltage correction operation for holding a voltage corresponding to the threshold voltage of the drive transistor in the storage capacitor prior to the writing period,
The mobility correction procedure is a movement that applies a correction according to the mobility of the driving transistor by negatively feeding back the driving current to the storage capacitor when the light emitting element is part of the writing period and in the off state. Degree correction operation,
The method of driving a display device, wherein, in the coupling procedure, a coupling voltage in a reverse direction is input to the connection node prior to the mobility correction operation, so that the light emitting element is turned off.

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