JP2009065093A5 - - Google Patents
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- JP2009065093A5 JP2009065093A5 JP2007233908A JP2007233908A JP2009065093A5 JP 2009065093 A5 JP2009065093 A5 JP 2009065093A5 JP 2007233908 A JP2007233908 A JP 2007233908A JP 2007233908 A JP2007233908 A JP 2007233908A JP 2009065093 A5 JP2009065093 A5 JP 2009065093A5
- Authority
- JP
- Japan
- Prior art keywords
- film
- pattern
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- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007233908A JP4621718B2 (ja) | 2007-09-10 | 2007-09-10 | 半導体装置の製造方法 |
| US12/208,010 US20090191712A1 (en) | 2007-09-10 | 2008-09-10 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007233908A JP4621718B2 (ja) | 2007-09-10 | 2007-09-10 | 半導体装置の製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2009065093A JP2009065093A (ja) | 2009-03-26 |
| JP2009065093A5 true JP2009065093A5 (https=) | 2009-10-22 |
| JP4621718B2 JP4621718B2 (ja) | 2011-01-26 |
Family
ID=40559382
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007233908A Expired - Fee Related JP4621718B2 (ja) | 2007-09-10 | 2007-09-10 | 半導体装置の製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US20090191712A1 (https=) |
| JP (1) | JP4621718B2 (https=) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4901898B2 (ja) | 2009-03-30 | 2012-03-21 | 株式会社東芝 | 半導体装置の製造方法 |
| US9337197B1 (en) * | 2014-10-28 | 2016-05-10 | Globalfoundries Inc. | Semiconductor structure having FinFET ultra thin body and methods of fabrication thereof |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0472622A (ja) * | 1990-07-13 | 1992-03-06 | Hitachi Ltd | 半導体装置およびその製造方法 |
| JPH08306698A (ja) * | 1995-05-10 | 1996-11-22 | Casio Comput Co Ltd | パターン形成方法 |
| JP2002280388A (ja) * | 2001-03-15 | 2002-09-27 | Toshiba Corp | 半導体装置の製造方法 |
| DE10142590A1 (de) * | 2001-08-31 | 2003-04-03 | Infineon Technologies Ag | Verfahren zur Seitenwandverstärkung von Resiststrukturen und zur Herstellung von Strukturen mit reduzierter Strukturgröße |
| JP2004014652A (ja) * | 2002-06-04 | 2004-01-15 | Ricoh Co Ltd | 微細パターンの形成方法 |
| US6867116B1 (en) * | 2003-11-10 | 2005-03-15 | Macronix International Co., Ltd. | Fabrication method of sub-resolution pitch for integrated circuits |
| US7183205B2 (en) * | 2004-06-08 | 2007-02-27 | Macronix International Co., Ltd. | Method of pitch dimension shrinkage |
| US7465525B2 (en) * | 2005-05-10 | 2008-12-16 | Lam Research Corporation | Reticle alignment and overlay for multiple reticle process |
| JP4652140B2 (ja) * | 2005-06-21 | 2011-03-16 | 東京エレクトロン株式会社 | プラズマエッチング方法、制御プログラム、コンピュータ記憶媒体 |
-
2007
- 2007-09-10 JP JP2007233908A patent/JP4621718B2/ja not_active Expired - Fee Related
-
2008
- 2008-09-10 US US12/208,010 patent/US20090191712A1/en not_active Abandoned
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