JP2009054969A - Wiring board and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board wherein bonding force to be required for soldering an electrode of an electronic component such as a semiconductor device to a plurality of terminal pads arrayed on the surface of the wiring board is improved, and to provide a method of manufacturing the wiring board. <P>SOLUTION: In the wiring board 10 having a plurality of soldering terminal pads 20 arranged in an array form on the surface, the terminal pads are respectively formed so that respective plane shapes are regular polygons and the inner centers I of the regular polygons are arrayed vertically and horizontally in a prescribed pitch L. Further, the three-dimensional shape of each pad is formed in a projected shape wherein the center part of the surface is projected. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a wiring board and a manufacturing method thereof, and more particularly to a wiring board having a plurality of terminal pads for solder bonding on the surface and a manufacturing method thereof.

  Conventionally, a wiring substrate having a circular solder joint terminal pad on its surface is known. FIG. 14 is a plan configuration diagram of a conventional wiring board 110. In FIG. 14, the wiring board 110 has a plurality of terminal pads 220 arranged in a lattice pattern on the surface thereof. The terminal pad 220 is used for an external connection terminal or a solder paste formed thereon or a solder ball is mounted on the terminal pad 220 for connection with an electrode terminal of a semiconductor element. For example, terminal pads 220 are formed on both surfaces of the wiring substrate 110, and the semiconductor device mounting surface is used as a wiring substrate for mounting a semiconductor device in which one surface is a semiconductor mounting surface on which semiconductor elements are mounted and the other surface is a surface for external connection terminals. Is done. In the conventional wiring board 110 having such an application, each terminal pad 220 on the surface is formed in a circular shape, and according to the coordinates of the center C and the pitch L which is the distance between the centers of the adjacent terminal pads 220, The arrangement position and interval are determined. The pitch L tends to be narrow due to the recent trend toward miniaturization of semiconductor devices, but the design and processing should be easy so that adjacent terminal pads 220 do not contact each other under such a narrow pitch tendency. Therefore, the terminal pad 220 is often formed in a circular shape.

In a printed wiring board using such circular terminal pads, even when stress is applied to the printed wiring board, the entire circular pad is prevented in order to prevent breakage of the joint portion between the corner portion of the semiconductor element and the printed wiring board. A technique is also known in which the arrangement shape is a circular arrangement shape so as not to provide a corner portion, and the arrangement shape is configured to disperse stress (see, for example, Patent Document 1).
JP 2005-64274 A

  However, in the configuration of the prior art shown in FIG. 14 described above, since the circular terminal pad is used, the solder joint area is fixed, the joint force by the solder is weakened, and when stress is applied, the joint portion is broken. There was a problem of doing. That is, there is a problem that a sufficient interval between the adjacent terminal pads 120 can be secured between given pitches, and a problem such as a short circuit hardly occurs, but a bonding force is weakened.

  Further, even in the configuration described in Patent Document 1 described above, it is difficult to realize the arrangement described in Patent Document 1 when various restrictions occur in the arrangement of terminal pads. There was a problem that the configuration was not possible.

  Therefore, an object of the present invention is to provide a wiring board that improves the solder bonding strength of terminal pads arranged on the surface, and a method for manufacturing the wiring board.

To achieve the above object, a wiring board according to a first aspect of the present invention is a wiring board having a plurality of terminal pads for solder bonding on the surface,
The plurality of terminal pads have a planar shape formed in a regular polygon,
The inner centers of the regular polygons are arranged at a predetermined pitch.

  Thereby, the area of a terminal pad can be made larger than the case of a circle, and the solder joint force can be improved while keeping the pitch the same as that of a circle pad.

  According to a second invention, in the wiring board according to the first invention, the plurality of terminal pads are formed so that the regular polygons are in the same direction.

  Thereby, since the distance of the external shape of an adjacent terminal pad can be made uniform, the stress applied to each terminal pad can also be made uniform, and the solder joint force can be further strengthened.

3rd invention is the wiring board which concerns on 1st or 2nd invention,
The plurality of terminal pads are arranged in a lattice,
The regular polygon is a square formed by sides parallel to the lattice.

  As a result, for a wiring board having a grid-like array pattern that is often used, the junction area can be made larger than a circle while the outer distance between adjacent terminal pads is exactly the same as a circle, and the narrow pitch The bonding strength can be improved while corresponding to this wiring pattern.

A fourth invention is the wiring board according to any one of the first to third inventions,
The three-dimensional shape of the terminal pad is a convex shape in which a central portion of the surface protrudes.

  Thereby, the surface area of the terminal pad can be further increased, and the bonding strength can be further improved.

A fifth invention is a wiring board according to any one of the first to fourth inventions,
The surface is a semiconductor mounting surface on which a semiconductor element is mounted.

  As a result, the solder bonding strength of the semiconductor chip mounting wiring board and the electrode terminal of the semiconductor element can be improved, and a wiring board for mounting a semiconductor device resistant to stress can be obtained.

A sixth invention is the wiring board according to any one of the first to fifth inventions,
The surface is an external connection terminal surface,
A semiconductor mounting surface on which a semiconductor element is mounted is formed on the surface opposite to the external connection terminal surface.

  Thereby, in the substrate for mounting a semiconductor chip, the surface area of the terminal pad on the external connection terminal surface can be increased to enhance the solder bonding force, and a wiring substrate for mounting a semiconductor device resistant to stress can be obtained.

A method for manufacturing a wiring board according to a seventh aspect of the present invention is a method for manufacturing a wiring board having a terminal pad whose planar shape is a regular polygon and whose three-dimensional shape is a convex shape protruding from the center part.
A resist patterning step of patterning a resist having a regular polygonal opening on a metal support;
An etching step of performing etching and forming a concave depression in the support in a portion where the resist is not covered;
A terminal pad forming step for forming the terminal pad in the recess by electrolytic plating;
A resist removing step for removing the resist;
An insulating layer forming step of forming an insulating layer on the surface of the support on which the terminal pads are formed;
A wiring layer forming step of forming a wiring layer connected to the terminal pad on the insulating layer;
A solder resist forming step of forming a solder resist above the wiring layer so that the metal of the wiring layer is exposed;
And a support removing step of removing the support by etching.

  Thereby, a wiring board with high solder joint strength can be manufactured.

  ADVANTAGE OF THE INVENTION According to this invention, the solder joint force of the terminal pad for solder joining of a wiring board can be improved.

  The best mode for carrying out the present invention will be described below with reference to the drawings.

  FIG. 1 is a plan configuration diagram of a wiring board 10 according to a first embodiment to which the present invention is applied. In FIG. 1, a plurality of terminal pads 20 are arranged in a grid pattern at a predetermined pitch L on the surface of the wiring board 10. The planar shape of the terminal pad 20 is a square, and its inner center I is the center point of the terminal pad 20 that defines the pitch L, and coincides with the center C of the square inscribed circle 120. That is, the pitch L is the same as the interval between the inner centers I of the adjacent terminal pads 20. Since the inscribed circle 120 and the center C and the pitch L of the inscribed circle 120 have the same arrangement and shape as those of the conventional circular terminal pad 220, the center C and the pitch L have been described so far. The same reference numerals as those used in the explanation are used.

  In the wiring board 10 according to the first embodiment, the planar shape of the terminal pads 20 arranged in a lattice shape is formed in a square formed by two sides parallel to the rows forming the lattice. Thereby, the pitch L is kept the same as when the terminal pad 20 is formed in a circle, and the line segment connecting the inner centers I intersects perpendicularly to the two closest sides of adjacent squares, Since the intersection point coincides with the contact point between the inscribed circle 120 and the square terminal pad 20, the distance between the adjacent terminal pads 20 is not only the distance L between the inner centers I but also the inscribed contour line. It corresponds to the distance between the circles 120.

  FIG. 2 is an enlarged view of two adjacent terminal pads 20 of the wiring board 10 of FIG. In FIG. 2, two adjacent terminal pads 20a and 20b are arranged at a pitch L, and virtual inscribed circles 120a and 120b are shown. As described above, in the wiring board 10 according to the first embodiment, the pitch L between the terminal pads 20a and 20b is equal to the pitch L between the inscribed circles 120a and 120b, and the terminal pads 20a and 20b are closest to each other. The distance d between the sides is also the same as the distance d between the inscribed circles 120a and 120b. Since the terminal pads 20a and 20b circumscribe and enclose the inscribed circles 120a and 120b, respectively, the terminal pads 20a and 20b have a larger area than the inscribed circles 120a and 120b by the end regions near the four corners of the square. is doing. When solder bonding is performed by using the terminal pads 20a and 20b corresponding to the increased area, the bonding area increases, so that the conventional circular terminal pads (the same shape as the inscribed circles 120a and 120b) can be bonded. Power is improved.

  As described above, according to the semiconductor substrate 10 according to the present embodiment, bonding is performed by increasing the surface area of the terminal pads 20a and 20b while maintaining the same arrangement of the substantial wiring patterns formed by the conventional terminal pads 120a and 120b. Strength can be increased.

  FIG. 3 is an enlarged plan view of the wiring board 10 in which the terminal pads 20c and 20d adjacent in the vertical direction are added to the terminal pads 20a and 20b adjacent in the horizontal direction shown in FIG. In FIG. 3, the pitch L of the terminal pads 20a and 20c adjacent to each other in the vertical direction and the terminal pads 20b and 20d are kept the same as the inscribed circles 120a and 120c and the inscribed circles 120b and 120d. The distance d between the sides is also kept the same as the distance d between the inscribed circles 120a and 120c and between the inscribed circles 120b and 120d.

  As described above, regarding the terminal pads 20a, 20b, 20c, and 20d arranged in a grid pattern, if the square planar shape is formed with two sides in the same direction as the array lines forming the grid, the arrangement pattern is completely changed. In addition, the bonding strength of each of the terminal pads 20a, 20b, 20c, and 20d can be increased.

  Returning to FIG. 1, the lattice-like arrangement and the shape of the terminal pad 20 described in FIGS. 2 and 3 are applied to all the terminal pads 20 in FIG. 1. As a result, the solder joint strength of all the terminal pads 20 can be improved while maintaining the same pitch L.

  However, the wiring board 10 according to the present embodiment does not necessarily need to be configured in a square shape formed with sides parallel to or perpendicular to the lattice rows for all the terminal pads 20, and a part of the surface of the wiring board 10. The terminal pad 20 may be applied. Various modes can be applied to the pattern of the terminal pad 20 of the wiring board 10 according to the application. Even when the present invention is applied to a part of the terminal pad 20, the effect of improving the bonding strength is the application. Because it can be obtained in parts.

  Next, a modification of the wiring board 10 according to the first embodiment will be described with reference to FIG. FIG. 4 is a plan configuration diagram of a wiring board 10a according to a modification of the first embodiment. In FIG. 4, the terminal pads 20 arranged on the surface of the wiring board 10a have a planar shape that is a square formed by two sides parallel or perpendicular to the lattice rows, and is the same as the wiring board 10 according to FIG. However, the arrangement differs from the wiring board 10 according to FIG. 1 in that the arrangement includes a pair of terminal pads 20f and 20g adjacent on the diagonal line.

  In FIG. 4, the terminal pads 20e and 20f adjacent on the grid row have the pitch L1 and the distance d1 between the adjacent sides, and the inscribed circles 120e and 120f are the same as described with reference to FIGS. It is the same as the relationship. However, for the terminal pads 20f and 20g adjacent on the diagonal line, the pitch L2 coincides with the relationship between the inscribed circles 120f and 120g, but the distance between the external pads 120f and 20g is the distance d2. On the other hand, the inscribed circles 120f and 120g have a distance d3 that is slightly longer than the inscribed circles 120f and 120g, and the two do not completely match.

  Thus, when there is a margin in the pitch L2 of the terminal pads 20f and 20g, the distance d2 between the terminal pads 20f and 20g may be slightly shorter than the distance d3 between the inscribed circles 120f and 120g. The difference between the distance d2 between the terminal pads 20f and 20g and the distance d3 between the inscribed circles 120f and 120g is expressed as d3−d2 = (√2−1) r × where r is the radius of the inscribed circles 120f and 120g. As long as 2≈0.41r × 2 and this distance difference does not affect the wiring pattern configuration, there is no problem even with such an arrangement configuration. Thus, the distance d2 between the terminal pads 20f and 20g may be slightly reduced within a range that does not affect the wiring pattern, and the area of the terminal pads 20f and 20g is larger than the inscribed circles 120f and 120g. Solder joint strength can be improved.

  As described above, various modes can be applied to the arrangement configuration of the terminal pads 20 and 20a to 20g of the wiring boards 10 and 10a according to the first embodiment. By forming the shape of each terminal pad 20, 20a-20g into a square including the inscribed circles 120, 120a-120g while following the pitches L, L1, L2 of the predetermined terminal pads 20, 20a-20g, The bonding area can be made larger than the contact circles 120 and 120a to 120g, and the solder bonding force can be improved. In particular, in a wiring pattern having many grid-like arrangement portions, the influence on the distances d, d1, and d2 between the adjacent outer edges of the terminal pads 20, 20a to 20g can be extremely reduced.

  FIG. 5 is a diagram showing a planar configuration of a wiring board 10b according to the second embodiment to which the present invention is applied. In FIG. 5, the wiring board 10b is the same as FIG. 1 of the first embodiment in that a plurality of terminal pads 21 are all arranged in a grid pattern, but the shape of each terminal pad 21 is a regular pentagon. The wiring board 10 according to FIG. 1 is different in that it is formed. Thus, the shape of the terminal pad 21 may be a regular pentagon. Since the terminal pad 21 is a regular polygon like a square, its inner center I coincides with a point that defines the pitch L, which also coincides with the center C of the inscribed circle 121. Since the regular pentagonal terminal pad 21 contains the inscribed circle 121, the area thereof is larger than that of the inscribed circle 121, and each solder joint force can be increased.

  When the terminal pad 21 is configured to be a regular pentagon, the shape is slightly closer to a circle than in the case of a square. That is, when the wiring pattern is designed under a more circular condition and each solder joint strength is to be strengthened than the circular terminal pad 220, a regular polygon is formed as in the wiring board 10b according to the second embodiment. The number of corners may be larger than that of a square, and the shape may be closer to a circle. The wiring board 10b according to the second embodiment can be applied to the terminal pads 21 having, for example, a regular hexagon, a regular heptagon, or a regular octagon. As the number of corners of the polygon increases and the polygon becomes closer to a circle, the area of the portion protruding from the inscribed circle 121 becomes smaller, so the bonding force is slightly weakened, but the wiring pattern layout design approximates to a circle. It's easier because you can think about it. In addition, the regular pentagons are arranged in the same direction. However, from the viewpoint of easy pattern formation and uniform distance between the terminal pads 21, they may be arranged in the same direction, and there are circumstances such as stress and wiring. The direction may be changed as appropriate in consideration.

  FIG. 6 is a diagram illustrating a planar configuration of a wiring board 10c which is a modification of the wiring board 10b according to the second embodiment. 6, the arrangement of the center points of the terminal pads 21 that define the pitches L1 and L2 is the same as that of the wiring board 10a according to FIG. 4 of the first embodiment, and includes a diagonal arrangement in addition to the grid arrangement. It has a planar arrangement configuration.

  In FIG. 6, the line segment defining the distance d4 between the adjacent sides between the terminal pads 21a and 21b does not pass through the contact between the terminal pad 21a and the inscribed circle 121a and the contact between the terminal pad 21b and the inscribed circle 121b. The distance between the outer shapes of the inscribed circles 121a and 121b does not match. Similarly, the line segment defining the distance d5 between the adjacent sides between the terminal pads 21b and 21c does not pass through the contact between the terminal pad 21b and the inscribed circle 121b and the contact between the terminal pad 21c and the inscribed circle 121c. The distance between the outer shapes between the inscribed circles 121b and 121c does not match.

  However, the difference between them is much smaller than the difference d3−d2 = (√2−1) r × 2 between the adjacent outer shapes between the terminal pads 20f and 20g shown in FIG. This is because the terminal pads 21a, 21b, and 21c are polygons that approximate a circle rather than a square, and the distance between the sides that form the outer shape of the terminal pads 21a, 21b, and 21c and the inscribed circles 121a, 121b, and 121c depending on the direction This is because the difference has decreased. Therefore, when the wiring pattern includes arrangements in various directions and it is necessary to consider some distances between adjacent outer sides of the adjacent terminal pads 21a, 21b, 21c, the terminal pads 21a, 21b, 21c are You may comprise as a polygon more than a regular pentagon. Thereby, the difference between the distance between the adjacent outer edges of the terminal pads 21a, 21b, and 21c and the distance between the inscribed circles 121a, 121b, and 121c can be averaged with a small value. In addition, since the regular polygon has a larger area than the inscribed circles 121a, 121b, and 121c, it is possible to increase the soldering force of each of them.

  Thus, as shown in the second embodiment, the shape of the terminal pads 21, 21a to 21c may be a regular pentagon or more polygon. According to the second embodiment, the solder joint strength can be increased while corresponding to the complicated arrangement pattern of the terminal pads 21 and 21a to 21c.

  FIG. 7 is a side sectional view showing a wiring board 10d according to a third embodiment to which the present invention is applied. In FIG. 7, the three-dimensional shape or the cross-sectional shape of the terminal pad 22 formed on the surface of the wiring board 10d is different from the mode described so far in that the center portion is a protruding shape. In FIG. 7, the three-dimensional shape of the terminal pad 22 is a substantially spherical shape, and is a convex shape that protrudes smoothly from the end to the center. As described above, even when the center portion of the surface of the terminal pad 22 is projected three-dimensionally, the surface area of the terminal pad 22 can be increased, the bonding area can be increased, and the solder bonding force can be increased.

  Further, FIG. 7 shows a state in which the semiconductor element 80 is mounted on the terminal pad 22. This is because the solder 90 is formed on the terminal pad 22 and the bump 91 is formed on the electrode of the semiconductor element 80, and then the semiconductor element 80 is bonded to the terminal pad 22 of the wiring board 10d by both. Show. Thus, the terminal pad 22 of the wiring board 10d according to the present embodiment can be suitably applied to the semiconductor element mounting surface of the semiconductor element 80 mounting wiring board. Details of the semiconductor element 80 mounting step will be described later.

  Moreover, although the aspect which concerns on Example 3 can also be applied to the conventional circular terminal pad 120 independently, the regular polygonal terminal pad 20, 20a-20g which concerns on Example 1 or Example 2, It is preferable to apply to 21a to 21c and combine them. Thereby, in the aspect of Example 1 or Example 2, while increasing the surface area of the terminal pads 20, 20a-20g, 21a-21c planarly, the aspect which concerns on Example 3 is applied, and also in three dimensions. Thus, it is possible to further strengthen the solder bonding force.

  FIG. 8 is a side sectional view showing a sectional configuration of a wiring board 10e according to a modification of the third embodiment. In FIG. 8, the terminal pad 23 is formed on the surface of the wiring board 10e, and the surface of the terminal pad 23 has a convex shape with the central portion protruding from the end of the terminal pad 22 as shown in FIG. The central part does not protrude smoothly and continuously, but the end part has a flat shape, and only the central part has a convex shape protruding in steps. As described above, the protruding shape may be a mode in which only the central portion is stepped to form a convex shape. Even in such a three-dimensional shape, since the surface area of the central protrusion is larger than that of the planar shape, it is possible to increase the bonding area and increase the solder bonding force. This modified example can be further improved in solder joint force by combining with the planar shape of Example 1 or Example 2.

  FIG. 8 also shows a state in which the semiconductor element 80 is mounted on the terminal pad 23 by being joined by solder 90 and bumps 91. The wiring substrate 10e according to FIG. 8 can also be suitably applied to a substrate for mounting the semiconductor element 80, and the terminal pad 23 can be preferably applied as the terminal pad 23 on the semiconductor mounting surface.

  As described above, according to the wiring boards 10d and 10e according to the third embodiment, the terminal pads 22 and 23 are formed in a three-dimensional shape with the center portion protruding, so that the solder joint strength can be increased. Further, by combining and combining the wiring boards 10d and 10e according to the third embodiment to the wiring boards 10, 10a, 10b, and 10c according to the first or second embodiment, the solder joint strength can be further improved. .

  Next, an example of a method for manufacturing the wiring board 10d according to FIG. 7 of the third embodiment will be described with reference to FIGS. 9 and 10 are described using the cross-sectional view of the wiring board 10d, and the planar shape thereof is not shown. However, the terminal pads 20, 20a of the wiring boards 10, 10a according to the first or second embodiment are not illustrated. ˜20 g shall be applied.

  FIG. 9 is a diagram illustrating an example of a manufacturing process of the wiring board 10d until the terminal pad 22 is manufactured.

  FIG. 9A is a diagram showing a state in which the support 30 is prepared. In FIG. 9A, a metal plate or a metal foil such as copper is used for the support body 30, and a support body serving as a base for manufacturing the wiring board 10d is prepared.

  FIG. 9B is a diagram showing a resist patterning step, and shows a state in which the plating resist 40 is patterned on the support 30. The positions where the terminal pads 22 are formed are opened, and the positions where the terminal pads 22 are not formed are patterned so as to be covered with a plating resist. In the present manufacturing process, the plating resist 40 whose opening 41 is shaped into a regular polygon is used. The plating resist 40 may be a dry film, for example.

  FIG. 9C is a diagram showing an etching process. In the manufacturing process of the wiring substrate 10d according to the present embodiment, when the plating resist 40 is patterned on the metal support 30 in the patterning process, etching is performed instead of immediately performing plating. As a result, the surface of the support 30 that is not covered with the plating resist 40 is etched to form a concave recess 31. By forming the terminal pads 22 here, the protruding terminal pads 22 can be formed.

  FIG. 9D is a diagram showing a process of forming the terminal pad 22. By electroplating, the metal forming the terminal pad 22 is plated in layers. In FIG. 9D, after the gold plating layer 25 is formed of gold (Au), the nickel plating layer 26 is formed of nickel (Ni), and the terminal pads 22 are formed. The terminal pad 22 may be further plated with palladium (Pd), copper (Cu), or the like to form the terminal pad 22. Various modes may be applied to the laminated configuration of the terminal pads 22 depending on the application.

  The terminal pad 22 is electrolytically plated in a concave shape along the shape of the recess 31. Thereby, the convex terminal pad 22 can be formed by removing the support body 30 in a later step.

  FIG. 9E is a view showing a plating resist 40 removal step. In the plating resist 40 removing step, since the electroplating is completed by the terminal pad forming step, the unnecessary plating resist 40 is removed. As a result, the terminal pads 22 are formed on the support 30. The terminal pad 22 is formed in a three-dimensional shape having a recess 31 on the support 30 and is formed in a regular polygon in plan view (the planar shape is not shown).

  FIG. 10 is a diagram showing an example of the manufacturing process up to the completion of the wiring board 10d after the terminal pads 22 are formed.

  FIG. 10A is a diagram showing the step of forming the insulating layer 50. In the insulating layer 50 forming step, the insulating layer 50 is formed on the terminal pad 22 having the depression 31 shape. The insulating layer 50 may be composed of, for example, a laminate of resin films such as epoxy and polyimide.

  FIG. 10B is a view showing the via hole 55 forming step. In the via hole 55 forming step, a hole is formed by laser processing at a position on the insulating pad 50 on the terminal pad 22 to form the via hole 55.

  FIG. 10C is a diagram showing the wiring layer 60 forming step. In the wiring layer 60 forming step, a wiring metal such as copper or aluminum is embedded in the via hole 55 to form the wiring layer 60. In the wiring layer 60 forming step, for example, the metal may be embedded only by electroless plating to form the wiring layer 60, or the metal may be embedded by a combination of electroless plating and electrolytic plating. Good. When the wiring layer 60 is formed by a combination of electroless plating and electrolytic plating (semi-additive method), the entire surface of the insulating layer 50 is first subjected to seed plating by electroless plating to form a metal thin film (seed layer). Form. Then, after covering the plating resist on the portion where the flat portion is not desired to be plated, electrolytic plating is performed, and a metal such as copper is embedded in the via hole 55 to form the wiring layer 60. Thereafter, if the plating resist is removed, the wiring layer 60 shown in FIG. 10C is formed.

  The step of forming the via hole 55 on the insulating layer 50 and then forming the wiring layer 60 described in FIGS. 10A to 10C is performed when the wiring board 10d is configured as a multilayer wiring board. Can be laminated repeatedly a predetermined number of times to form a multilayer wiring board 10d having a desired number of layers. In this case, the step of forming the laminated insulating layer is called the laminated insulating layer forming step, the step of forming the via hole in the laminated insulating layer is called the laminated via hole step, and the step of forming the laminated wiring layer is called the laminated wiring layer forming step. But you can. Thus, depending on the application, the wiring board 10d can be configured as a multilayer wiring board.

  FIG. 10D is a diagram showing a solder resist 70 forming step. In FIG. 10D, the wiring substrate 10d is subjected to the above-described laminated wiring layer forming step, and the insulating layer 50, the via hole 55, the wiring layer 60, the laminated insulating layer 51, the support layer 30 and the terminal pad 22. The laminated via hole 56, the laminated wiring layer 61, the laminated insulating layer 52, the laminated via hole 57, and the laminated wiring layer 62 are sequentially laminated from the bottom to form a three-layer laminated structure. Then, the solder resist 70 is formed on the uppermost wiring layer 62 in the solder resist 70 forming step. Thereby, the external connection terminal 24 is formed.

  FIG. 10D shows an example in which the wiring board 10d is formed as a wiring board 10d having a multilayer wiring structure. However, when this is a single-layer wiring structure, FIG. After the first wiring layer 60 is formed in the step of forming the wiring layer 60), the solder resist 70 forming step is immediately executed to form the solder resist 70 on the first wiring layer 60. Good. As described above, the solder resist 70 forming step may be performed after the final wiring layer is formed according to the layer structure of the wiring substrate 10d.

FIG. 10E is a diagram showing the support 30 removing step. In the support 30 removal step, the metal support 30 is removed by etching. Thereby, the terminal pad 22 is exposed on the surface, and the exposed surface of the terminal pad 22 constitutes, for example, a semiconductor element mounting surface.
Normally, the state of FIG. 10E is reversed upside down, the semiconductor element is mounted with the semiconductor element surface on which the terminal pad 22 is formed facing up, and the external connection terminal surface on which the terminal pad 24 is formed is facing down. Often used for external connections.

  9 and 10, the example in which the present invention is applied to the terminal pads 22 on the semiconductor element mounting surface has been described. However, in the solder resist 70 forming step of FIG. 10D, the openings 71 of the solder resist 70 are formed. If the shape is a regular polygon, the present invention can also be applied to the external connection terminal surface.

  Next, an example in which the wiring board 10d according to the present embodiment is applied to a wiring board for mounting semiconductor elements will be described with reference to FIG. FIG. 11 is a diagram showing an example of a semiconductor element mounting process for mounting the semiconductor element 80 on the wiring board 10d for mounting the semiconductor element.

  FIG. 11A is a diagram showing a state in which the wiring board 10 d for mounting a semiconductor element is placed and the pre-solder 90 is formed on the terminal pad 22. The wiring substrate 10d has a convex three-dimensional shape and a surface having terminal pads 22 having a regular polygonal planar shape (not shown) as a semiconductor element mounting surface, and this surface is disposed on the upper side. On the other hand, a terminal pad 24 is formed on the opposite side to form an external connection terminal surface. The terminal pad 24 is also formed in a regular polygon such as a square, and the present invention may be applied thereto. Furthermore, the terminal pad 24 may also be formed in a convex three-dimensional shape. Since the present invention can be applied to all wiring boards having the terminal pads 22 and 24 on the surface, the present invention can be applied not only to the terminal pads 22 on the semiconductor mounting surface but also to the terminal pads 24 on the external connection terminal surface. is there.

  Note that the wiring substrate 10d shown in FIG. 11A has an insulating layer 50, a via hole 55, a wiring layer 60, a laminated insulating layer 51, a laminated via hole 56, a laminated wiring layer 61, a laminated insulating layer 52, and a laminated via from above. A three-layer laminated wiring structure having a hole 57 and a laminated wiring layer 62 is provided.

  In FIG. 11A, in order to mount a semiconductor element on the wiring board 10d having such a configuration, first, solder paste is applied or solder balls are mounted on the terminal pads 22 on the semiconductor mounting surface. Solder formation is performed. That is, the pre-solder 90 is formed on the terminal pad 22.

  FIG. 11B is a diagram showing a state in which a semiconductor element 80 in which bumps 91 are formed on electrodes is prepared for the wiring board 10d. In other words, bumps 91 are also formed on the electrode terminals of the semiconductor element 80 such as a semiconductor chip to be mounted, and preparation for solder bonding between the electrode terminals of the semiconductor element 80 and the terminal pads 22 of the wiring board 10d is made. .

  FIG. 11C is a diagram showing a state in which the semiconductor element 80 is bonded to the wiring board 10d by flip lip bonding. That is, the semiconductor element 80 is bonded to the terminal pad 22 of the wiring board 10d by the bump 91 of the semiconductor element 80 and the solder on the terminal pad 22 of the wiring board 10d. Since the surface area of the terminal pad 22 is increased, bonding is performed with a high bonding force.

  FIG. 11D is a view showing a state where the semiconductor package is completed by filling the underfill resin 100. That is, the underfill resin 100 is filled between the semiconductor element 80 and the wiring substrate 10d to form a protective film, thereby completing the semiconductor package. A semiconductor package having a high bonding strength between the semiconductor element 80 and the wiring substrate 10d can be obtained.

  Thus, by using the terminal pad 22 having an increased surface area, it is possible to obtain the wiring substrate 10d having an enhanced solder bonding force with the semiconductor element 80.

  In FIG. 11, the wiring board 10 d has been described by taking the embodiment according to FIG. 7 of Example 3 as an example, but the wiring boards 10, 10 a to 10 c, 10 e described in other examples are also suitably applied. Is possible.

  FIG. 12 is a side sectional view showing a sectional configuration of a wiring board 10f according to the fourth embodiment to which the present invention is applied. In FIG. 12, a terminal pad 27 having a three-dimensional shape with a central portion protruding in a substantially spherical shape is formed on the surface of the wiring board 10 f, and a pin 85 is joined thereon by solder 90. The terminal pad 27 of the wiring board 10f according to FIG. 12 has the same three-dimensional shape as the terminal pad 22 of the wiring board 10d according to FIG. 7 of the third embodiment, but the joined members are pins 85. It is different in point.

  The pin 85 is used as an external connection terminal of the wiring board 10f, its head portion 86 is soldered to the terminal pad 27 for external terminal connection, and the shaft portion 87 is, for example, a socket (not shown) of a mother board (not shown). ) To electrically connect the mother board and the wiring board 10f. Thus, the terminal pad 27 of the wiring board 10f may be applied to the terminal pad 27 for external terminal connection. Also in this aspect, since the surface area of the terminal pad 27 is increased by the protrusion of the central portion, it is possible to improve the solder bonding force with the head portion 86 of the pin 85 which is an external connection terminal.

  In FIG. 12, an example of a so-called PGA (Pin Grid Array) type package using pins 85 as external connection terminals is shown, but a BGA (Ball) using solder balls (not shown) as external connection terminals is shown. The present invention may be applied to a (Grid Array) type package or an LGA (Land Grid Array) type package using the terminal pad 27 itself as an external connection terminal. In any embodiment, the solder joint area is increased due to the three-dimensional shape in which the central portion of the terminal pad 27 is raised, so that the solder joint force can be increased.

  In addition, also in the aspect of Example 4, it is preferable to combine with the planar shape of the terminal pads 20, 20a to 20g, 21, and 21a to 21c of the wiring board 10, 10a to 10c according to Example 1 or Example 2. This is the same as in the third embodiment. Further, if the surface area of the terminal pads 22, 23, 27 on both the semiconductor element mounting surface and the external connection terminal surface is increased in combination with the aspect of the third embodiment, the wiring board with enhanced solder joint strength on both surfaces 10f can be set.

  FIG. 13 is a side sectional view showing a sectional configuration of a wiring board 10g according to a modification of the fourth embodiment. In FIG. 13, the basic configuration is the same as that of the wiring board 10f according to FIG. 12, and the terminal pads 28 for external connection terminals to which the pins 85 are soldered are formed on the surface. However, it is different from the wiring substrate 10f according to FIG. 12 in that the end portion is flat and only the central portion protrudes. This three-dimensional shape is the same as that of the terminal pad 23 of the wiring board 10e according to FIG. 8 of the third embodiment, and this three-dimensional shape also increases the solder bonding force between the head portion 86 of the pin 85 and the terminal pad 28. it can.

  In addition to the PGA type package having the external connection terminal as the pin 85, the wiring board 10g is applied to a BGA type package having the external connection terminal as a solder ball and an LGA type package having the terminal pad 28 itself as the external connection terminal. The wiring board 10f according to FIG. 12 may be combined with the first to third embodiments as appropriate.

  The wiring boards 10f and 10g having the terminal pads 27 and 28 for external connection terminals according to the fourth embodiment are used for connecting the terminal pads 22 to the external terminals in the manufacturing process of the wiring board 10d described with reference to FIGS. By applying to the terminal pads 27 and 28, it can manufacture with the manufacturing method similar to having demonstrated to FIGS. In this case, the terminal pad 24 on the opposite side may be applied as a semiconductor mounting terminal pad.

  As described above, according to the present invention, it is possible to provide the wiring boards 10, 10 a to 10 g having high solder bonding strength. In the present embodiment, the description has been made mainly on the case where the present invention is applied to the wiring board 10 for semiconductor mounting, 10a to 10g. However, as long as the wiring board has a terminal pad for solder bonding on the surface, there are various types. It is possible to apply this invention to the wiring board of the various aspect used for this use.

  The preferred embodiments of the present invention have been described in detail above. However, the present invention is not limited to the above-described embodiments, and various modifications and substitutions can be made to the above-described embodiments without departing from the scope of the present invention. Can be added.

It is a plane lineblock diagram of wiring board 10 concerning Example 1 to which the present invention is applied. FIG. 2 is an enlarged view of two adjacent terminal pads 20 of the wiring board 10 of FIG. 1. FIG. 3 is an enlarged plan view of a wiring board 10 in which terminal pads 20 c and 20 d are added to the terminal pads 20 a and 20 b of FIG. 2. 6 is a plan configuration diagram of a wiring board 10a according to a modification of Example 1. FIG. It is the figure which showed the plane structure of the wiring board 10b which concerns on Example 2 to which this invention is applied. FIG. 10 is a diagram showing a planar configuration of a wiring board 10c according to a modification of Example 2. It is the sectional side view which showed the wiring board 10d which concerns on Example 3 to which this invention is applied. 10 is a side sectional view showing a sectional configuration of a wiring board 10e according to a modification of Example 3. FIG. It is the figure which showed the example of a manufacturing process of the wiring board 10d until manufacturing the terminal pad 22. FIG. FIG. 9A is a diagram showing a state in which the support 30 is prepared. FIG. 9B is a diagram showing a resist patterning process. FIG. 9C is a diagram showing an etching process. FIG. 9D is a diagram showing a terminal pad forming process. FIG. 9E is a diagram showing a plating resist removing process. It is the figure which showed the example of the manufacturing process until wiring board 10c completion after terminal pad formation. FIG. 10A is a diagram showing an insulating layer forming step. FIG. 10B is a view showing a via hole forming step. FIG. 10C is a diagram showing a wiring layer forming process. FIG. 10D is a diagram showing a solder resist forming process. FIG. 10E is a diagram showing a support removing process. It is the figure which showed the semiconductor element mounting process. FIG. 11A is a view showing a state in which the pre-solder 90 is formed on the terminal pad 22 of the wiring board 10d. FIG. 11B is a diagram showing a state in which a semiconductor element 80 having bumps 90 formed on electrodes is prepared. FIG. 11C shows a state in which the semiconductor element 80 is bonded to the wiring board 10d. FIG. 11D is a diagram showing a state where the semiconductor package is completed. It is a sectional side view of the wiring board 10f which concerns on Example 4 to which this invention is applied. FIG. 10 is a side sectional view showing a sectional configuration of a wiring board 10g according to a modification of Example 4; It is a plane block diagram of the conventional wiring board 110. FIG.

Explanation of symbols

10, 10a, 10b, 10c, 10d, 10e, 10f, 10g Wiring board 20, 20a-20g, 21, 21a-21c, 22, 23, 24, 27, 28 Terminal pad 25 Gold plating layer 26 Nickel plating layer 30 Support Body 31 Dimple 40 Plating resist 41, 71 Opening 50, 51, 52 Insulating layer 55 Via hole 60, 61, 62 Wiring layer 70 Solder resist 80 Semiconductor element 85 Pin 86 Head part 87 Shaft part 90 Solder (pre-solder)
91 Bump 100 Underfill resin 120, 120a to 120g, 121, 121a to 121c Inscribed circle

Claims (7)

A wiring board having a plurality of terminal pads for solder bonding on the surface,
The plurality of terminal pads have a planar shape formed in a regular polygon,
A wiring board characterized in that the inner centers of the regular polygons are arranged at a predetermined pitch.   The wiring board according to claim 1, wherein the plurality of terminal pads are formed such that the regular polygons have the same orientation. The plurality of terminal pads are arranged in a lattice,
The wiring board according to claim 1, wherein the regular polygon is a square formed with sides parallel to the lattice.   4. The wiring board according to claim 1, wherein the three-dimensional shape of the terminal pad is a convex shape with a central portion of the surface protruding. 5.   The wiring board according to claim 1, wherein the surface is a semiconductor mounting surface on which a semiconductor element is mounted. The surface is an external connection terminal surface,
The wiring board according to claim 1, wherein a semiconductor mounting surface on which a semiconductor element is mounted is formed on a surface opposite to the external connection terminal surface. A method for manufacturing a wiring board having a terminal pad whose planar shape is a regular polygon and whose three-dimensional shape is a protruding shape protruding from the center,
A resist patterning step of patterning a resist having a regular polygonal opening on a metal support;
An etching step of performing etching and forming a concave depression in the support in a portion where the resist is not covered;
A terminal pad forming step for forming the terminal pad in the recess by electrolytic plating;
A resist removing step for removing the resist;
An insulating layer forming step of forming an insulating layer on the surface of the support on which the terminal pads are formed;
A wiring layer forming step of forming a wiring layer connected to the terminal pad on the insulating layer;
A method of manufacturing a wiring board, comprising: a support removing step of removing the support by etching.

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