JP2008251579A - Electrostatic chuck and manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the occurrence of defective to be formed on a surface to be attracted when various kinds of processing are executed using an electrostatic chuck in a state where an object to be attracted is kept at high temperature. <P>SOLUTION: This electrostatic chuck 6 is provided with a dielectric layer 14, an electrode 13 for inducing electric charges on the surface of the dielectric layer 14 and a heater for heating the dielectric layer 14 to not less than 400°C. The electrostatic chuck 6 is further provided with an insulating member 20 in which a surface contacting the object to be attracted (semiconductor wafer 1) is mirror-finished. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an electrostatic chuck for holding a semiconductor wafer by electrostatic force, and a method for manufacturing a semiconductor device using the electrostatic chuck.

  Conventionally, electrostatic chucks have been widely used for fixing semiconductor wafers when performing processes such as dry etching, PVD (physical vapor deposition), and CVD (chemical vapor deposition) in semiconductor device manufacturing processes. It is used. An electrostatic chuck is an apparatus for fixing a semiconductor wafer using an electrostatic force. An electrostatic chuck is disclosed in, for example, Patent Document 1.

  Since silicon carbide (SiC) hardly diffuses impurities, it is necessary to perform ion implantation in order to form an impurity diffusion layer. SiC has a strong bonding force, and activation annealing performed after ion implantation requires a high temperature of 1600 ° C. or more. However, such activation annealing is not sufficient, and even during ion implantation. It is necessary to hold the SiC wafer at a high temperature of 400 ° C. or higher (for example, Non-Patent Document 1 or Non-Patent Document 2). This is because ion implantation at a high temperature can suppress surface roughness after active annealing and increase in sheet resistance of the diffusion layer, and increase the activation rate of impurities.

  When performing such high temperature ion implantation, a heating mechanism is provided in the electrostatic chuck, and the wafer is heated by the electrostatic chuck.

  A conventional example of a general electrostatic chuck will be described with reference to FIG.

  The electrostatic chuck 6 shown in FIG. 7 includes a graphite plate 11 covered with an insulating film 12, an electrode 13 disposed on the insulating film 12, and a dielectric layer 14 covering them. The insulating film 12 is made of an insulating material such as pBN (pyrolytic boron nitride), and the dielectric layer 14 is made of pBN or AlN (aluminum nitride). The electrode 13 is connected to a power source (not shown) through a terminal. When a voltage is applied to the electrode 13 by this power source, a charge is induced on the surface of the dielectric layer 14. As shown in FIG. 7, when the semiconductor wafer 1 is brought close to the surface dielectric 14, charges opposite to the charges induced on the surface of the dielectric layer 14 are induced on the opposite surface of the semiconductor wafer 1. Therefore, a Coulomb force or a Jansenler Beck force acts between the two, and the semiconductor wafer 1 can be attracted and fixed (chucked) to the electrostatic chuck 6.

  In the present specification, a region in contact with an object to be attracted on the surface of the electrostatic chuck is referred to as an “attracting surface”. This suction surface may be referred to as a chuck surface or a contact surface. On the other hand, the surface of the semiconductor wafer that comes into contact with the “attracting surface” of the electrostatic chuck is referred to as the “attracted surface”.

When processing such as ion implantation is performed at a high temperature, the electrostatic chuck 6 having the above configuration is provided with a heating mechanism such as a heater (not shown), and the electrostatic chuck 6 is heated to a high temperature (for example, 400 ° C.) before adsorbing the semiconductor wafer 1. ). If the semiconductor wafer 1 is adsorbed by the electrostatic chuck 6 heated to a high temperature in this way, the semiconductor wafer 1 can be heated by heat conduction, so that a process such as high-temperature ion implantation can be realized.
Japanese Patent Laid-Open No. 7-245336 Seiji Imai et al., Material Science Forum, Vol. 5, 338-342, pages 861-865, published in 2000 (Seiji Imai et al. Material Science Forum Vol. 5 338-342 (2000) pp 861-864) PROCESS TECHNOLOGY FOR SILICON CARBIDE DEVICES 51-67 Issued by INSPEC

  However, when high-temperature ion implantation is performed on the back surface of a SiC wafer using an electrostatic chuck with a heating mechanism, depending on the position of the SiC wafer, the characteristics of the finally obtained device deteriorate and the manufacturing yield decreases. I found out that

  According to the detailed examination of the present inventor, it has been found that the cause of the device characteristic deterioration is due to defects such as scratches formed on the attracting surface of the SiC wafer attracted to the electrostatic chuck. In addition, it has been found that such defects occur not only in SiC wafers but also in other semiconductor wafers (for example, Si wafers).

  Further, it has been found that depending on the material of the dielectric layer used for the electrostatic chuck, a large number of particles adhere to the semiconductor wafer, thereby reducing the manufacturing yield of the semiconductor device.

  Such a problem is a problem that has not occurred when the electrostatic chuck is not heated to a high temperature, and must be solved for mass production of a silicon carbide semiconductor device manufactured using high-temperature ion implantation. It is an important issue.

  The present invention has been made in order to solve the above-described problems, and the main purpose of the present invention is to provide a surface to be attracted when performing various treatments while holding the attracted object at a high temperature using an electrostatic chuck. It is to reduce the occurrence of defects to be formed.

  The electrostatic chuck of the present invention is an electrostatic chuck comprising a dielectric layer, an electrode for inducing charges on the surface of the dielectric layer, and a heater for heating the dielectric layer to 400 ° C. or more. An insulating member whose surface that contacts the adsorbent is mirror-finished is further provided.

In a preferred embodiment, the insulating member is made of a semiconductor material having a specific resistance of 1.0 × 10 ⁸ Ω · cm or more.

  In a preferred embodiment, the mirror-finished surface of the insulating member has a surface roughness Ra of 5 nm or less.

  In a preferred embodiment, the insulating member is a single crystal plate having a thickness of 50 to 150 μm.

  In a preferred embodiment, the insulating member is made of silicon, silicon carbide, or diamond.

  In a preferred embodiment, the insulating member is detachable from the dielectric layer, and the insulating member is disposed on the dielectric layer at least during a period of chucking the object to be adsorbed.

  In a preferred embodiment, the insulating member has a hardness equal to or lower than the hardness of the object to be adsorbed.

  In a preferred embodiment, the insulating member is made of the same material as the object to be adsorbed.

  A method of manufacturing a semiconductor device according to the present invention includes a dielectric layer, an electrode that induces electric charge on the surface of the dielectric layer, a heater that heats the dielectric layer to 400 ° C. or more, and a surface that contacts the object to be adsorbed. Heating the insulating member of the electrostatic chuck including the mirror-finished insulating member to 400 ° C. or more and inducing charge on the mirror-finished surface of the insulating member; Adsorbing the semiconductor wafer to the electrostatic chuck such that one surface of the semiconductor wafer having a parallel back surface is brought into contact with the mirror-finished surface of the insulating member; and the mirror surface of the insulating member of the semiconductor wafer And a step of performing processing on the surface that is not in contact with the processed surface.

  In a preferred embodiment, the treatment is any one of ion implantation, dry etching, and thin film deposition.

  In a preferred embodiment, the method includes a step of removing the insulating member from the electrostatic chuck and replacing the surface with the object to be attracted with another insulating member having a mirror finish.

  According to the present invention, by using a mirror-finished insulating member, the suction surface of the electrostatic chuck can be in a mirror-finished state. Can be suppressed.

  As described above, when a semiconductor wafer is attracted using an electrostatic chuck heated to a high temperature, the cause of the deterioration of device characteristics is that the surface to be attracted of the semiconductor wafer attracted to the electrostatic chuck has defects such as scratches. It is to be formed.

  Therefore, before describing a preferred embodiment of the present invention, the cause of the formation of scratches on the attracted surface of a semiconductor wafer due to contact between the high-temperature electrostatic chuck and the semiconductor wafer will be described.

  FIG. 3 is a graph showing the time change of the wafer surface temperature that occurs when an SiC wafer is adsorbed by an electrostatic chuck with a heating mechanism in an ULVAC ion implanter. The vertical axis of the graph is the wafer surface temperature measured by a radiation thermometer, and the horizontal axis is time. The data in FIG. 3 was obtained in an experiment in which an SiC wafer was actually chucked by an electrostatic chuck with the suction surface temperature set at 400 ° C.

  When adsorbing a semiconductor wafer with an electrostatic chuck, first, the semiconductor wafer is loaded on the chuck surface of the electrostatic chuck. After a period T1 (for example, 50 to 150 seconds) from the start of loading, a voltage is applied to the electrode of the electrostatic chuck, and the semiconductor wafer is attracted by the electrostatic chuck (chuck start). In FIG. 3, the semiconductor wafer is in close contact with the surface (suction surface) of the electrostatic chuck only in the period T2. As can be seen from FIG. 3, in the period T1 from when the semiconductor wafer is loaded until it is actually attracted, the wafer surface temperature rises to about 330 ° C. and saturates. The heating of the semiconductor wafer at this time is mainly performed by radiation from the surface (400 ° C.) of the electrostatic chuck. Thereafter, when the electrostatic chuck is performed, the semiconductor wafer comes into close contact with the attracting surface of the electrostatic chuck, so that the wafer surface temperature rapidly increases and saturates at 400 ° C. (period T2) with the start of the period T2. In the period T2, the semiconductor wafer is heated by direct heat conduction from the high-temperature electrostatic chuck, and in the period T2, processes such as ion implantation, dry etching, and thin film deposition are performed. When dechucking is performed after the lapse of the period T2, the semiconductor wafer is separated from the attracting surface of the electrostatic chuck, so that the wafer surface temperature gradually decreases to about 330 ° C. (period T3).

  Even when the wafer surface temperature rises due to radiation from the electrostatic chuck (period T1), the semiconductor wafer thermally expands, but the electrostatic chuck and the semiconductor wafer are not in close contact with each other. The formation of is not noticeable. Thereafter, when a chuck voltage is applied to the electrode of the electrostatic chuck, the semiconductor wafer is strongly pressed against the electrostatic chuck by electrostatic force. When the semiconductor wafer is pressed against the electrostatic chuck and the two come into close contact with each other, the wafer temperature rapidly rises as shown in FIG. 3, so that the thermal expansion of the semiconductor wafer also proceeds abruptly. That is, the semiconductor wafer rapidly expands in the in-plane direction while being pressed against the electrostatic chuck by the electrostatic force acting in the thickness direction. At this time, the attracted surface of the semiconductor wafer and the attracted surface of the electrostatic chuck are rubbed with a strong force.

  FIG. 4 is a scanning electron microscope (SEM) photograph showing a suction surface of a SiC wafer after a silicon carbide (SiC) semiconductor wafer is sucked by an electrostatic chuck whose surface is made of AlN. Scratches (defects) having a uniform length in the wafer radial direction were observed. It was also found that a foreign substance made of SiC adhered to the edge of the scratch.

  The adsorption surface of an electrostatic chuck that is widely used at present is made of aluminum nitride (AlN), and its hardness is lower than that of silicon carbide. Further, the attracting surface of the electrostatic chuck is smoothed as much as possible so as not to damage the attracted surface of the semiconductor wafer. For this reason, scratches are not expected to be formed on a wafer made of a hard semiconductor such as silicon carbide by an electrostatic chuck, and there is no report that scratches were actually observed. However, according to the detailed examination of the present inventor, even if smoothing treatment is performed on the AlN surface of the electrostatic chuck, fine protrusions and foreign matter are locally present, and the above-mentioned during high temperature chucking. It has been found that when the thermal expansion of this occurs abruptly, these convex portions and foreign matters form defects in a part of the semiconductor wafer.

  In the photograph of FIG. 4, the reason why the defect directions are aligned in the wafer radial direction is considered to be because the SiC wafer thermally expands radially from the wafer center.

Here, the defect refers to the following three types.
(1) A “scratch” that is generated when a surface to be attracted of a semiconductor wafer is scraped by a protrusion or foreign matter present on the attracting surface of an electrostatic chuck.
(2) “Particles” in which wafer material shaved by protrusions or foreign matter present on the chucking surface of the electrostatic chuck is chucked on the chucking surface of the semiconductor wafer.
(3) “Particles” in which the chucking surface material of the electrostatic chuck scraped by the semiconductor wafer adheres to the chucked surface of the semiconductor wafer.

  These defects directly affect the device structure, causing performance degradation and yield reduction. In addition, AlN widely used as an insulator material on the electrostatic chuck surface and pyrolytic boron nitride (pBN) are nitrogen (N), aluminum (Al), which are used as dopants (impurities) of a silicon carbide semiconductor, Contains boron (B). Therefore, if activation annealing is performed with these particles attached to the wafer, the concentration of the diffusion layer that should be formed may change or the conductivity type may be reversed. In particular, boron (B) is an element that can exceptionally diffuse in silicon carbide, and is usually a big problem for silicon carbide power devices manufactured using an n-type substrate.

  FIGS. 5A to 5C are cross-sectional views for modeling and explaining a phenomenon in which the suction surface of the semiconductor wafer 1 is damaged when the electrostatic chuck 6 sucks the semiconductor wafer 1.

  FIG. 5A shows the surfaces of the semiconductor wafer 1 and the electrostatic chuck 6 before the electrostatic chuck. Although the surface of the electrostatic chuck 6 is flattened by grinding and polishing, actually, there are locally protrusions having a height of 1 μm or more on the surface. For this reason, a point contact region is generated between the semiconductor wafer 1 and the suction surface. FIG. 5B is a diagram showing the relationship between the semiconductor wafer 1 and the electrostatic chuck 6 after the electrostatic chuck. The electrostatic chuck 6 causes the semiconductor wafer 1 to rapidly expand in the lateral direction while being pressed against the surface of the electrostatic chuck 6. At this time, as shown in FIG. 5 (c), the protrusion 6 a existing on the surface of the electrostatic chuck 6 forms a scratch 4 around the surface of the semiconductor wafer 1, and the scraped wafer material is formed at the end of the scratch 4. Remains as Bali. This burr becomes the particle 5. That is, the scratch 4 and the particle 5 are formed in pairs.

  The present inventor has found that the problem of the defect can be solved by applying mirror finish to the surface of the insulating member made of a material having excellent smoothness and providing the insulating member on the surface of the electrostatic chuck. Was completed.

In order to apply an electrostatic force to the semiconductor wafer from the electrostatic chuck heated to a high temperature of 400 ° C. or higher, it is necessary to prevent the outflow of charges during the electrostatic chuck. × 10 ⁸ Ω · cm or more is required.

Among materials having such a high resistance, materials suitable for polishing the surface roughness Ra to 5 nm or less are silicon, silicon carbide, diamond, and the like. In the present specification, the “surface roughness Ra” is defined by the arithmetic average roughness Ra standardized by JISB0601-1994. In order to increase the specific resistance of these semiconductor materials to 1.0 × 10 ⁸ Ω · cm or more, impurities in the semiconductor may be reduced.

  The insulating member 20 does not need to be formed of a single crystal, and may be polytype, amorphous, or a composite thereof. However, in order to sufficiently increase the surface smoothness by polishing, the insulating member 20 may be It is desirable to be a crystal. As a single crystal having a large area that can function as an adsorption surface of the electrostatic chuck, a mirror-polished wafer of Si or SiC can be preferably used. However, the normal wafer thickness is 250 to 750 μm, and it is too thick to be placed between the electrostatic chuck and the semiconductor wafer. Therefore, the thickness is set to 50 to 50 by grinding, chemical mechanical polishing (CMP), sandblasting, or the like. It is desirable to make it as thin as about 150 μm. Within such a thickness range, the insulating member itself exhibits a self-supporting mechanical strength, so that it is easy to handle and the insulating member can be attached to and detached from the dielectric layer of the electrostatic chuck. If the insulating member is removable, it is easy to replace only the insulating member with a new insulating member when the surface roughness of the insulating member deteriorates.

(Embodiment 1)
Hereinafter, a first embodiment of an electrostatic chuck according to the present invention will be described. The electrostatic chuck of the embodiment is a bipolar type, but may be a monopolar type.

  FIG. 1 is a cross-sectional view schematically showing the structure of the electrostatic chuck 6 in the present embodiment.

  The electrostatic chuck 6 in FIG. 1 includes a graphite plate 11 covered with an insulating film 12, an electrode 13 disposed on the insulating film 12, and a dielectric layer 14 covering these. The insulating film 12 is made of an insulating material such as pBN (pyrolytic boron nitride), and the dielectric layer 14 is made of pBN or AlN (aluminum nitride). The electrode 13 is connected to a power source (not shown) through a terminal.

  A characteristic point of the electrostatic chuck of the present embodiment is that an insulating member 20 is provided on the dielectric layer 14 as shown in FIG. Of the surface of the insulating member 20, the surface that is in close contact with the semiconductor wafer 1 is subjected to mirror polishing, and the surface roughness Ra is 5 nm or less. The insulating member 20 in the present embodiment is formed from a SiC wafer having a thickness of 50 μm, but the material of the insulating member 20 may be formed from other semiconductor materials (silicon single crystal, diamond, etc.). Moreover, you may have the structure where these semiconductors were laminated | stacked. The insulating material 20 is fixed to the insulating film 12 with an adhesive material or the like.

  Using the electrostatic chuck 6 having such a configuration, the semiconductor wafer 1 having a diameter of 3 inches is chucked in the sequence shown in FIG. 3, and ion implantation is performed in a state where the semiconductor wafer 1 is heated to a temperature of 460 ° C. No scratches as shown in FIG. 4 were observed on the suction surface of the semiconductor wafer 1. It was also found that the amount of particles adhering to the suction surface of the semiconductor wafer 1 was 100 or less for the entire wafer.

(Embodiment 2)
Hereinafter, a second embodiment of the electrostatic chuck according to the present invention will be described. The electrostatic chuck of this embodiment is a bipolar type, but may be a monopolar type.

  FIG. 2 is a cross-sectional view schematically showing the structure of the electrostatic chuck 6 in the present embodiment.

The electrostatic chuck 6 in FIG. 2 is different from the electrostatic chuck 6 in FIG. 1 in that the insulating member 30 is detachably disposed from the dielectric layer 14. The insulating member 30 of the present embodiment has been subjected to mirror polishing, and the surface roughness Ra is in a state of 5 nm or less. The insulating member 30 in the present embodiment is formed from a SiC wafer having a thickness of 150 μm (specific resistance: about 1.0 × 10 ⁸ Ω · cm).

  Since the insulating member 30 of the present embodiment is relatively thick, the insulating member 30 is easy to handle.

(Embodiment 3)
Embodiments of a method for manufacturing a semiconductor device according to the present invention will be described below. In the present embodiment, a vertical MISFET of silicon carbide semiconductor is manufactured.

  First, referring to FIG. FIGS. 6A to 6G are process cross-sectional views illustrating the manufacturing process of the vertical MISFET of silicon carbide semiconductor in the present embodiment.

  First, as shown in FIG. 6A, a semiconductor wafer 1 in which a drift layer 102 made of silicon carbide is epitaxially grown on a silicon carbide substrate 101 is prepared. In this specification, when a semiconductor layer is formed on the surface of a semiconductor substrate, the whole is referred to as a “semiconductor wafer”. First surface (wafer “main surface”) 1 a of semiconductor wafer 1 is the upper surface of drift layer 102, and second surface (wafer “back surface”) 1 b is the lower surface of silicon carbide substrate 101.

Silicon carbide substrate 101 has a main surface that is off, for example, 8 ° from the (0001) plane in the <11-20> direction, and an n-type doping concentration of 1 × 10 ¹⁸ cm ^{−3 to} 5 × 10 ¹⁹ cm. ^-3 . The drift layer 102 having a doping concentration lower than that of the silicon carbide substrate 101 includes, for example, silane (SiH ₄ ) and propane (C ₃ H ₈ ) as source gases, hydrogen (H ₂ ) as a carrier gas, and nitrogen (N ₂ ) It can be obtained by performing thermal CVD using gas. When manufacturing a MOSFET with a withstand voltage of 600 V, it is preferable that the doping concentration of the drift layer 102 is adjusted to 1 × 10 ¹⁵ cm ⁻³ to 1 × 10 ¹⁶ cm ⁻³ and the thickness is set to 10 μm or more.

  Next, as shown in FIG. 6B, the first surface 1a of the semiconductor wafer 1 is attracted to the insulating member 20 of the electrostatic chuck, and ion implantation is performed on the second surface 1b. In the present embodiment, the ion implantation process is performed using the electrostatic chuck 6 shown in FIG. At this time, the temperature of the insulating member 20 is set to 460 ° C., for example. As ions 3, the same n-type dopant as silicon carbide substrate 101, for example, nitrogen is used. By this ion implantation, the back surface implanted layer 7 can be formed on the surface of the second surface 1b of the semiconductor wafer 1 (FIG. 6C). The back surface injection layer 7 is formed to reduce the contact resistance of the drain electrode, and forms an injection layer having a higher concentration than the silicon carbide substrate 101. At this time, activation annealing does not have to be performed.

  After the ion implantation process at a high temperature is completed, the semiconductor wafer 1 is removed from the electrostatic check, taken out of the ion implantation apparatus, and the next process is executed. On the first surface 1a of the semiconductor wafer 1, a p-well and an n-type source region are formed and a channel is formed in a subsequent process. Further, a gate insulating film and a gate electrode are formed on the first surface 1a side. Accordingly, if particles from the electrostatic chuck adhere to the first surface 1a or scratches are formed on the first surface 1a by the injection process to the second surface 1b, the channel mobility is lowered. Further, when the first surface 1a is contaminated, the breakdown voltage and reliability of the gate insulating film are deteriorated. However, in the present embodiment, when the surface (first surface 1a) on the side where the channel or gate insulating film is formed in the semiconductor wafer 1 is attracted to the electrostatic chuck, it contacts the polishing surface of the insulating member 20. Even if thermal expansion of the semiconductor wafer 1 occurs, it is possible to prevent occurrence of defects and contamination on the first surface 1a, so that device characteristics can be improved.

  In order to remove particles from the electrostatic chuck 6, the semiconductor wafer 1 is washed with sulfuric acid and water with ammonia.

  Next, as shown in FIG. 6D, a p-type well region 103 is formed on the surface of the drift layer 102 by ion implantation. Also at this time, the semiconductor wafer 1 is adsorbed by the electrostatic chuck 6 heated to a high temperature in the ion implantation apparatus, and ion implantation is performed in that state. However, it is the second surface 1 b of the semiconductor wafer 1 that is in close contact with the attracting surface of the electrostatic chuck 6. Since the second surface 1b is also in close contact with the mirror-finished surface of the insulating member 20, formation of scratches and the like is suppressed even if the semiconductor wafer 1 is thermally expanded.

For the implantation mask 112 shown in FIG. 6D, a patterned SiO ₂ film (thickness: 2 μm thickness) can be used. The ions 3 implanted here are Al which is a p-type dopant. Even in this ion implantation step, the set temperature of the semiconductor wafer 1 is 460 ° C.

After completion of the ion implantation, the implantation mask 112 is removed as shown in FIG. When the implantation mask 112 is made of SiO ₂ , the implantation mask 112 can be removed by immersing in, for example, 10: 1 buffered hydrofluoric acid for 30 minutes.

  Similarly, a contact region 104 and a source region 105 shown in FIG. 6G are formed by performing Al ion implantation and nitrogen ion implantation using a patterned implantation mask (not shown).

  Thereafter, activation annealing is performed at a time, for example, at 1700 ° C. for 30 minutes in an inert gas atmosphere. Thereafter, in order to form the gate insulating film 106 shown in FIG. 6G, for example, a thermal oxide film is grown. At this time, for example, a thermal oxide film having a thickness of about 70 nm can be formed by holding dry oxygen at 3100 ° C. for 3 hours at 1100 ° C.

Next, a gate electrode 109 is formed over a desired region of the gate insulating film 106. As a material for the gate electrode 109, polycrystalline silicon imparted with conductivity is preferably used. Such a polycrystalline silicon film can be formed by thermal CVD using silane as a source gas and phosphine PH ₃ as a doping gas. Patterning can be performed by ordinary photolithography and dry etching. After forming the gate electrode 109, an interlayer insulating film 110 made of SiO ₂ is deposited. After a contact hole is formed by opening a predetermined region of the interlayer insulating film 110 by dry etching, a source electrode 108 is formed in the contact hole. The source electrode 108 can be obtained by forming titanium or nickel, for example, to a thickness of 50 nm, for example, and then sintering at a temperature of about 950 ° C. for about 1 minute.

  A drain electrode 107 is formed on the back surface injection layer 7 formed on the second surface 1b. The drain electrode 107 is obtained, for example, by forming titanium or nickel to a thickness of 50 nm, for example, and then sintering at a temperature of about 950 ° C. for about 1 minute.

  An upper wiring 111 is formed on the surface of the interlayer insulating film 110. The upper wiring 111 is obtained, for example, by depositing aluminum having a thickness of 3 μm and patterning the aluminum by ordinary photolithography and dry etching or wet etching. This completes the silicon carbide vertical MISFET (FIG. 6G).

  In the silicon carbide vertical MISFET obtained by the manufacturing method described above, in the ion implantation process to the second surface 1b (back surface of the substrate), the first surface 1a forming the channel is mirror-finished on the insulating member 20 in the electrostatic chuck. Since it is adsorbed by the smooth surface, it is possible to suppress the formation of defects on the first surface 1a, and as a result, it is possible to prevent a decrease in channel mobility, a breakdown voltage deterioration of the gate insulating film, and a reliability deterioration.

  In the present embodiment, the MISFET is taken as an example of the vertical power device, but the present invention is not limited to this. The present invention is a vertical power device such as an IGBT, JFET, static induction transistor (SIT), PN diode, Schottky diode, etc., that allows current to flow from the first surface of the wafer to the second surface facing it. If there is, it can be applied.

  In this embodiment, the ion implantation is performed in a state where the electrostatic chuck is performed at a high temperature, but other processes such as PVD, CVD, and dry etching may be performed in addition to the ion implantation.

  The electrostatic chuck of the present invention can be widely applied to manufacturing techniques for performing various processes by attracting a semiconductor wafer or the like. Since the object to be attracted is not necessarily limited to a semiconductor wafer as long as the surface smoothness is required, the electrostatic chuck of the present invention is an electronic device such as an FPD (flat panel display), a hard disk, or an optical medium. Even if it is applied to a method for manufacturing an apparatus, an effect can be obtained.

It is sectional drawing which shows 1st Embodiment of the electrostatic chuck by this invention. It is sectional drawing which shows 2nd Embodiment of the electrostatic chuck by this invention. It is a time chart which shows the time change of the wafer surface temperature which is a to-be-adsorbed object by the electrostatic chuck provided with the heating mechanism. It is the result of having observed the defect made on the SiC wafer adsorption surface by SEM. (A)-(c) is sectional drawing which shows the model in which a wafer suction surface has a defect. (A)-(g) is process sectional drawing which shows the manufacturing method of the silicon carbide vertical MISFET semiconductor device in embodiment of this invention. It is sectional drawing which shows the conventional structure of an electrostatic chuck.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor wafer 1a 1st surface (main surface of a semiconductor wafer)
1b Second surface (back surface of semiconductor wafer)
3 Ion 4 Scratch 5 Particle 6 Electrostatic chuck 6a Electrostatic chuck surface protrusion 7 Back surface injection layer 11 Graphite plate 12 Insulating film 13 Electrode 14 Dielectric layers 20 and 30 Insulating member 101 Silicon carbide substrate 102 Drift layer 103 Well region 104 Contact Region 105 source region 106 gate insulating film 107 drain electrode 108 source electrode 109 gate electrode 110 interlayer insulating film 111 upper wiring 112 implantation mask

Claims (11)

A dielectric layer;
An electrode for inducing charge on the surface of the dielectric layer;
A heater for heating the dielectric layer to 400 ° C. or higher;
An electrostatic chuck comprising:
An electrostatic chuck further comprising an insulating member having a mirror-finished surface in contact with an object to be attracted. The electrostatic chuck according to claim 1, wherein the insulating member is made of a semiconductor material having a specific resistance of 1.0 × 10 ⁸ Ω · cm or more.   The electrostatic chuck according to claim 2, wherein the mirror-finished surface of the insulating member has a surface roughness Ra of 5 nm or less.   The electrostatic chuck according to claim 3, wherein the insulating member is a single crystal plate having a thickness of 50 to 150 μm.   The electrostatic chuck according to claim 4, wherein the insulating member is made of silicon, silicon carbide, or diamond.   The said insulating member is detachable with respect to the said dielectric material layer, The said insulating member is arrange | positioned on the said dielectric material layer at least in the period which chucks the said to-be-adsorbed object. Electrostatic chuck.   The electrostatic chuck according to claim 1, wherein the insulating member has a hardness equal to or lower than a hardness of the object to be adsorbed.   The electrostatic chuck according to claim 1, wherein the insulating member is made of the same material as the object to be adsorbed. A static layer comprising a dielectric layer, an electrode for inducing charge on the surface of the dielectric layer, a heater for heating the dielectric layer to 400 ° C. or more, and an insulating member whose surface contacting the object to be adsorbed is mirror-finished. Heating the insulating member of the electric chuck to 400 ° C. or higher and inducing charges on the mirror-finished surface of the insulating member;
Adsorbing the semiconductor wafer to the electrostatic chuck so that one surface of the semiconductor wafer having a main surface and a back surface parallel to the main surface is brought into contact with the mirror-finished surface of the insulating member;
A step of processing the surface of the semiconductor wafer that is not in contact with the mirror-finished surface of the insulating member;
A method of manufacturing a semiconductor device including:   The method of manufacturing a semiconductor device according to claim 9, wherein the treatment is any one of ion implantation, dry etching, and thin film deposition.   The method for manufacturing a semiconductor device according to claim 9, further comprising a step of removing the insulating member from the electrostatic chuck and replacing it with another insulating member whose surface contacting the object to be attracted is mirror-finished.