JP2008242496A - Current load device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a current load device which has high precision. <P>SOLUTION: A cell comprises a power line VCC, a ground line GND, voltage supply lines VS1 and VS2, a signal line SL, control lines CL1, CL3 and CL4, switches SW1, SW2, SW3 and SW4, a P-type TFT Qp, a capacity element C, and a current load element LED. The SW1, SW2, and SW4 are turned ON and the SW3 is turned OFF in first operation to store a current flowing to the signal line SL in a short time and the SW1, SW2 and SW4 are turned OFF and the SW3 is turned ON in second operation to supply a current to the current load element LED; and the SW1, SW2 and SW3 are turned OFF and the SW4 is turned ON in third operation to speedily stop the current supply and the operation of the current load element LED, so that the current load device having the cell which drives the current load element with the high-precision current in a matrix is constituted. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a current load drive circuit for driving a current load element, and more particularly to a current load device in which the current load element and the current load drive circuit are arranged in a matrix.

  In recent years, devices have been developed in which cells including current load elements whose operations are defined by flowing current and current load drive circuits for driving the current loads are arranged in a matrix.

  For example, in a light-emitting display device using an organic EL (Electroluminescence) element as a current load element, a method of arranging pixels including the organic EL element and its driving circuit in a matrix and driving it by an active matrix method is widely adopted. ing. FIG. 37 is a plan view showing an outline of a display device section of this seed light emitting display device. As shown in the figure, the display unit 1 has a plurality of control lines CL that run in the row direction (each control line has # 1, # 2,..., # (K-1), #K, # (K + 1), ... are numbered in order, and there are multiple signal lines SL running in the column direction (each signal line has # 1, # 2, ..., # (M- 1), #M, # (M + 1),... Are sequentially numbered). A pixel 2 is formed at the intersection between the control line CL and the signal line SL. This display device is driven as follows. That is, the control lines CL are selected one by one in order. In synchronism with the selection of the control line CL, a luminance signal to be displayed on the pixels connected to the selected control line CL is given to each signal line SL. In this state, the luminance signal is written to the pixels in the selected row, and the display of the written signal by each pixel is continued until the next control line is selected.

  FIG. 38 shows a general pixel configuration of a light emitting display device that performs display by this method (hereinafter, referred to as a first conventional example) (see, for example, Patent Document 1). As shown in FIG. 38, the signal line SL (#M), the power line VCC, the ground line GND, and the control line CL (#K) pass through the pixel 2, and the anode of the light emitting element LED is connected to the power line VCC. The cathode is connected to the drain of TFT (Thin Film Transistor) Q, and the source of TFT Q is connected to the ground line GND. The switch SW1 is connected between the gate of the TFT Q and the signal line SL and is controlled by the control line CL. Capacitance element C is connected between the gate of TFT Q and ground line GND.

  The operation of the first conventional example is as follows. When the control line CL is selected, the switch SW is turned on. At this time, the signal line SL applies a voltage for supplying a current corresponding to the current-luminance characteristic of the light emitting element LED to the gate of the TFT Q so that the light emitting element LED emits light with the luminance of the target gradation. . Since this voltage is held (stored) by the capacitive element C, the control line CL is not selected, and is held even when the switch SW1 is turned OFF. By this operation, the light emitting element LED can maintain the luminance of the expected gradation.

  The problem with this first prior art is that if there is a variation in current capability with respect to the gate voltage, the current supplied to each light emitting element will differ even if the same voltage is applied to the gate. As a result, the current giving the expected luminance is not supplied to the light emitting element, and the image quality of the display device is deteriorated. In particular, in the case of a polysilicon TFT that is often used in a display device, the variation in current capability is large, so the deterioration in image quality becomes significant.

  In order to cope with this point, a method of supplying a current necessary for light emission with a target luminance from a signal line, converting the current into a voltage by a transistor, and holding (storing) the voltage is realized. .

  FIG. 39 is a circuit diagram showing a configuration of a pixel of a light emitting display device that adopts a method of supplying a current signal from a signal line (hereinafter referred to as a second conventional example) (see, for example, Patent Document 2). As shown in FIG. 39, the signal line SL (#M), the power supply line VCC, the ground line GND, and the control line CL (#K) pass through the pixel 2. In the light emitting element LED, the anode is connected to the power supply line VCC, the cathode is connected to the drain of the TFT Q1, and the source of the TFT Q1 is connected to the ground line GND. The switch SW1 controlled by the control line CL is connected between the signal line SL and the drain of the TFT Q2, the gate and drain of the TFTQ2 are short-circuited, and the source is connected to the ground line GND. The switch SW2 controlled by the control line CL is connected between the gate of the TFT Q1 and the gate of the TFT Q2. Further, the capacitive element C is connected between the gate of the TFT Q1 and the ground line GND.

  The operation of the second conventional example is as follows. When the control line CL is selected, the switches SW1 and SW2 are turned on. At this time, a current corresponding to the current-luminance characteristics of the light emitting element LED flows through the signal line SL in order to cause the light emitting element LED to emit light with the luminance of the target gradation. This current flows between the drain and source of TFT Q2, but since TFT Q2 is short-circuited between the gate and drain, the gate voltage is set to the voltage at which TFT Q2 passes this current in the saturation region, This voltage is stored in the capacitive element C 1. Since TFT Q1 forms a current mirror with TFT Q2, when it has the same current capability as TFT Q1, it supplies the same current as TFT Q2, that is, the same current as the current flowing through signal line SL, to the light emitting element LED To do. Thereafter, even when the control line CL is deselected, the gate voltage is held (stored) by the capacitive element C, so the TFT Q1 supplies the current to the light emitting element LED, and the light emitting element LED The brightness of the expected gradation can be maintained.

  FIG. 40 is a circuit diagram for one pixel of another light emitting display device adopting a method of supplying a current necessary for obtaining a target luminance from a signal line (for example, refer to Non-Patent Document 1). As shown in FIG. 40, the pixel 2 of the light emitting display device includes a signal line SL (#M) that passes through, a power supply line VCC, a ground line GND, a control line CL1 (#K), and a control line CL2 (#K). And four p-channel TFTs (hereinafter referred to as p-TFT) Qp1 to Qp4, a light emitting element LED, and a capacitor element C. The source of p-TFT Qp4 whose gate is connected to the control line CL2 is connected to the power supply line VCC, and its drain is connected to the source of p-TFT Qp1. The drain of the p-TFT Qp1 is connected to the anode of the light emitting element LED together with the drain of the p_TFT Qp3 whose gate is connected to the control line CL1. The source of p-TFT Qp3 is connected to the gate of p-TFT Qp1, and the cathode of the light emitting element LED is connected to the ground line GND. The source of p-TFT Qp2 whose gate is connected to control line CL1 is connected to signal line SL, and its drain is connected to the connection point between the source of p-TFT Qp1 and the drain of p-TFT Qp4. Yes. In addition, a capacitive element C is connected between the gate and the source of the p-TFT Qp1.

  The operation of the third conventional example is as follows. When this pixel 2 is selected, the control line CL1 (# K1) is in the "L" state, the control line CL2 (#K) is in the "H" state, p-TFT Qp2 and p-TFT Qp3 are ON, p-TFT Qp4 is turned off. At this time, a current corresponding to the current-luminance characteristics of the light emitting element LED flows through the signal line SL (#M) in order to cause the light emitting element LED to emit light with the luminance of the target gradation. This current is supplied to the light emitting element LED through the drain-source of p-TFT Qp2 and the drain-source of p-TFT Qp1. At this time, the p-TFT Qp1 is operated in a saturated state with its drain-gate short-circuited between the drain-source of the p-TFT Qp3, and the gate voltage of the p-TFT Qp1 causes the current to flow. And the voltage is stored in the capacitive element C. When the control line selection moves from #K to the next row, the control line CL1 (#K) becomes "H" and the control line CL2 (#K) becomes "L", and the current from the signal line SL to this pixel However, p-TFT Qp4 turns on and current flows through this transistor. In this case, since the gate voltage when the current from the signal line SL was flowing to the p-TFT Qp1 is stored (held) by the capacitive element C, the p-TFT Qp1 supplies this current to the light emitting element LED. The light emitting element LED can maintain the luminance of the expected gradation.

JP 2000-221942 A Japanese Patent Laid-Open No. 11-282419 RMA Dawson et al., The Impact of the Transistor of the Response of Organic Light Emitting Diode on the Design・ The Impact of the Transient Response of Organic Light Emitting Diodes on the Design of Active Matrix OLED Displays, (USA), Digest of IEDM (1998), pp. 875-878

  In the first conventional example described above, the luminance is given by the voltage signal, but the polysilicon TFT has a large variation in current capability with respect to the gate voltage, and even if the same voltage is applied to the gate, the current supplied for each light emitting element. Since the luminance also changes due to the difference in brightness, it is difficult to cause the light emitting element to emit light at the target luminance, and there is a problem that the image quality is deteriorated as a display device.

  On the other hand, in the second conventional example, the transistors constituting the pair of current mirrors are constituted by TFTs. However, unlike the case of the crystalline silicon transistors, the TFTs are arranged between adjacent transistors even if they are arranged close to each other. May cause a large difference in current capability, resulting in a difference in current capability between the transistor that stores (converts) the current and the transistor that supplies the current to the light-emitting element. It becomes difficult to reproduce.

  In the third conventional example described above, when an organic EL or the like is assumed as a light emitting element, the light emitting element has a capacity of about several pF in parallel and this becomes a load of the driving TFT. However, it takes time for the voltage of each part to settle to a state where the expected current is supplied to the light emitting element and the voltage of each part is set to supply the expected current to the light emitting element. Therefore, if the selection period is shortened for higher definition, the gate voltage of p-TFT Qp1 will stabilize before the current flowing through the signal line becomes the voltage that p-TFT Qp1 will flow into the light-emitting element. When the selection time ends, p-TFT Qp1 cannot supply the expected current. At this time, since the light emitting element LED does not emit light with the expected luminance, the image quality deteriorates. That is, the third conventional example has a problem that the image quality deteriorates when trying to increase the definition.

  An object of the present invention is to solve the above-described problems of the prior art when driving a light-emitting element such as a current load element, particularly an organic EL element. Second, the voltage between the source and gate of the driving TFT is quickly stabilized to a voltage that allows the current of the current value expected for the driving TFT to flow. Thus, it is possible to provide a current load device that does not cause deterioration in device characteristics due to variations in driving TFTs even when the definition is increased and the size is increased.

  In order to achieve the above object, a current load device according to the present invention includes a drive transistor having a source connected to a power supply line or a ground line, a signal line to which a current or voltage is supplied, and a drain of the drive transistor. A first switch connected; a second switch connected between the signal line and the gate of the drive transistor; a first voltage supply line connected to one end; and the other end connected to the drive transistor. A capacitor connected to the gate of the first transistor, a series connection body of a current switch and a third switch connected between a ground line or a power supply line and the drain of the driving transistor, and the first voltage The voltage supplied by the supply line can be changed.

  Preferably, the first switch, the second switch, and the third switch are constituted by transistors, and a drain and a source are short-circuited between the second switch transistor and the drive transistor, A transistor that performs the reverse operation of the second switch transistor is connected as a dummy switch.

  According to the above-described configuration of the present invention, a switch is provided between the drive transistor that stores and supplies current and the current load element, and the gate voltage of the drive transistor flows from the signal line between the drain and source of the current transistor. Since this switch is turned off during the current storage period for setting the current, the current load element can be prevented from being affected by the capacitance of the current load element, and the current can be stored in a short time.

  If the switch SW between the transistor that stores and supplies the current and the current load element is turned off after an arbitrary time when the current load element starts to supply current, the operation time of the current load element The operation of the current load element as a time average by the ratio of the non-operation period is defined. In this case, in order to achieve the same operation as when the operation is not stopped, it is necessary to increase the operation of the current load element during the period in which the current load element is operating, and it is necessary to increase the current value flowing through the current load element. Therefore, the current flowing through the signal line also increases. Therefore, the time for charging the capacity of the signal line or the load can be shortened, and the time required for storing the current can be shortened.

  In addition, when the current load element is a light emitting element such as an organic EL element, a display operation similar to a CRT (Cathode Ray Tube) is performed by including the state where light emission is stopped as described above, and an afterimage is less likely to remain. Therefore, the display of moving images also has high image quality.

  Next, embodiments of the present invention will be described in detail with reference to the drawings. However, in the following description, the light-emitting element will be described, but this is an example of a current load element and can be applied to a general current load element.

First embodiment:
FIG. 1 is a circuit diagram showing a configuration of one pixel according to the first embodiment of the present invention. As shown in FIG. 1, a signal line SL running in the column direction, control lines CL1 to CL3 and voltage supply lines PB1 to PB3 running in the row direction pass through the pixel 2, and TFT Q, switches SW1 to SW3, capacitive element C, and light emitting element LED are provided. The first end of either the drain or source of TFT Q is connected to the voltage supply line PB2, and a switch SW3 is connected between the second end of either the drain or source of TFT Q and the light emitting element LED. A switch SW1 is connected between the second end of the TFT Q and the signal line SL. The terminal opposite to the switch SW3 of the light emitting element LED is connected to the voltage supply line PB1. Further, a switch SW2 is connected between the second end of the TFT Q and the gate of the TFT Q, and a capacitive element C is connected between the gate of the TFT Q and the voltage supply line PB3. Here, the switches SW1, SW2, and SW3 are controlled by control lines CL1, CL2, and CL3, respectively.

  FIG. 2 is a timing chart showing a first operation example of the first embodiment shown in FIG. In the first operation state (current storage state, row selection period) of this operation example, the switch SW1 is turned on by the control line CL1, the switch SW2 is turned on by the control line CL2, and the switch SW3 is turned off by the control line CL3. At this time, a current corresponding to the target gradation is supplied to the signal line SL in accordance with the current-luminance characteristics of the light emitting element LED.

  In this first operating state, the TFT Q operates in the saturation region because the second end and the gate of the TFT Q are short-circuited by the switch SW2. On the other hand, since the switch SW3 is OFF, no current flows through the light emitting element LED, and the light emitting element LED does not operate (emit light). The current supplied from the signal line SL flows in the TFT Q, and the gate voltage of the TFT Q is set to a voltage that allows the current to flow between the drain and source according to the current capability of the TFT Q. At this time, since the current from the signal line SL does not flow into the capacitance of the light emitting element LED, the gate voltage of the TFT Q is quickly set to a value at which the current from the signal line SL flows between the drain and source of the TFT Q. The

  The second operation state (current supply state) is a state in which a row other than the illustrated pixel row in the display device is selected. The switch SW1 is turned OFF by the control line CL1, and the switch SW2 is turned by the control line CL2. Is turned OFF and the switch SW3 is turned ON by the control line CL3.

  In this second operating state, the gate voltage of the TFT Q is maintained in the first operating state through the switch SW3 because the gate voltage in the first operating state is held by the capacitive element C. The current supplied from the signal line SL can be supplied to the light-emitting element LED, and the light-emitting element LED performs an operation (light emission) having a luminance of a target gradation.

  In the present embodiment, the TFT Q in the pixel stores a gate voltage that causes the current from the signal line SL to flow according to its capability, and the stored TFT Q supplies current to the light emitting element LED. Regardless of the characteristics, it is possible to store and supply a highly accurate current.

  When the operation example shown in FIG. 2 is performed, since the operations of the control line CL1 and the control line CL2 are the same, the control lines CL1 and CL2 can be shared by one control line. Further, when the switches SW1 and SW2 and the switch SW3 are configured by TFTs having different conductivity types, the control lines CL1 to CL3 can be shared to form one control line.

  FIG. 3 is a timing chart showing a second operation example of the first embodiment shown in FIG. This operation example is different from the first operation example shown in FIG. 2 in that the switch SW2 is turned off earlier than the switch SW1 in the first operation state. When such an operation is performed and when an element having a capacitance between the gate and the drain such as TFT is used as the switch SW2, the source and drain are short-circuited between the switch SW2 and the gate of TFT Q. The connected TFT can be connected as a dummy switch.

  In the operation example shown in FIG. 3, the control lines CL1 and CL2 cannot be shared, but the switch SW1 and the switch SW3 are reversely operated, so that the switch SW1 and the switch SW3 are differently conductive. The control lines CL1 and CL3 can be shared by configuring with a type (polarity) TFT.

  FIG. 4 is a timing chart showing a third operation example of the first embodiment shown in FIG. In this operation example, the illustrated pixel is selected in the first operation state (current storage state, row selection period), the switch SW1 is turned on by the control line CL1, the switch SW2 is turned on by the control line CL2, and the control line CL3 is turned on. The switch SW3 is turned OFF and the same operation as the first operation example shown in FIG. 2 is performed.

  The second operation state (current supply state) is a state in which a row other than the pixel shown in FIG. 1 is selected. The switch SW1 is turned off by the control line CL1, and the switch SW2 is turned off by the control line CL2. Switch SW3 is turned ON by line CL3.

  In this state, the gate voltage of TFT Q becomes the voltage stored in the capacitive element C in the first operation state, and TFT Q receives the current supplied from the signal line SL in the first operation state through the switch SW3. The light is supplied to the light emitting element LED, and the light emitting element LED emits light with the luminance of the target gradation.

  In the next third operation state (current stop state), in a state where a row other than the illustrated pixel row is selected, the switch is controlled by the control line CL3 before the illustrated pixel row is selected again. Turn SW3 OFF. As a result, the supply of current to the light emitting element LED is stopped, and the light emitting element LED does not operate (emit light).

  In the third operation example, among the first to third operation states, the light emitting element LED emits light in the second operation state, whereas the first operation state is a short period of time. The LED does not emit light and the third operating state does not emit light. As a result, the light emitting element LED can be made to emit light only for a fraction of one frame period. For example, when the light emitting element emits light for 1/3 of one frame period, in order to make the luminance on the time average the same as the case where light is emitted for the entire period, a current that is three times larger is passed. When the current value increases, the time for charging the wiring capacitance such as the signal line can be shortened, and the period of the first operation state necessary for storing the current can be shortened. Therefore, this operation example can cope with an increase in wiring capacity due to higher definition and larger screen. Further, in the third operation state in this operation example, since the light emitting element does not emit light, the display operation is similar to that of the CRT, and afterimages are less likely to remain, so that the display of moving images has high image quality.

  In the case of driving in this operation example, the switch SW1 and the switch SW2 operate in the same way, so that the control line CL1 and the control line CL2 can be shared.

  The third operation example and the second operation example can be combined. In other words, the timing chart shown in the figure may be modified so that the switch SW2 is turned off before the first operation state ends.

Second embodiment:
FIG. 5 is a circuit diagram showing a configuration of one pixel according to the second embodiment of the present invention. As shown in FIG. 5, a signal line SL that runs in the column direction, control lines CL1 to CL3 and voltage supply lines PB1 to PB3 that run in the row direction pass through the pixel 2, and TFT Q and switch SW1 ~ SW3, capacitive element C, and light emitting element LED are provided. The first end of either the drain or source of TFT Q is connected to the power supply line PB2, and a switch SW3 is connected between the second end of either the drain or source of TFT Q and the light emitting element LED. A switch SW1 is connected between the second end of the TFT Q1 and the signal line SL. The terminal opposite to the switch SW3 of the light emitting element LED is connected to the power supply line PB1. Further, a switch SW2 is connected between the signal line SL and the gate of the TFT Q, and a capacitive element C is connected between the gate of the TFT Q and the power supply line PB3. Here, the switches SW1, SW2, and SW3 are controlled by control lines CL1, CL2, and CL3, respectively.

  FIG. 9 shows a timing chart of the first operation example of the present embodiment. In this operation example, the first operation state (current storage state, row selection period) includes a precharge (voltage application) period and a current writing period. Thus, by providing a precharge period and applying an appropriate voltage at the time of precharge, the period of the first operation state can be shortened particularly when a low current value is stored in the pixel circuit.

  In the first operation example of the present embodiment, during the precharge period of the first operation state, the illustrated pixel 2 is selected, the switches SW1 and SW3 are turned OFF, the switch SW2 is turned ON, and the capacitive element C and A precharge voltage is applied to the gate of TFT Q through signal line SL. After that, during the current writing period in the first operating state, the switches SW1 and SW2 are turned on and the switch SW3 is turned off as in the first and second embodiments, and the current supplied through the signal line SL is converted to TFT. A voltage that flows between the drain and source of Q is applied to the capacitative element C and the gate of TFT Q to store the current.

  In the first operation state in each operation example of the first embodiment, since a voltage is applied to the capacitor element C by current, when the current value is low, the TFT is affected by the load of the signal line SL, etc. It takes time for the voltage applied to the gate of Q and the capacitive element C to stabilize. Thus, the first operation state is required for a long time. On the other hand, in this operation example, during the precharge period of the first operation state, the voltage is precharged to the gate of the TFT Q and the capacitive element C, so that it can be driven in a short time, and the precharge voltage can be The current writing period can be shortened by setting an appropriate voltage close to the voltage applied to the gate of the TFT Q or the capacitive element C during the period. At this time, the period of the first operation state (= precharge period + current writing period) can be shortened.

  The second operation state (current supply state) is a state in which pixels other than the illustrated row are selected. As in the first embodiment, the switches SW1 and SW2 are turned off and the switch SW3 is turned on. The stored current is supplied from TFT Q to the light emitting element LED.

  The precharge operation in this operation example can be similarly realized by changing the signal applied to the pixel 2 through the signal line SL without changing the timing of the switching operation of the first embodiment. However, in the first embodiment, when a voltage is applied to the gate of the TFT Q and the capacitive element C through the signal line SL in the precharge period of the first operating state, the gate and the capacitive element C of the TFT Q are applied. Since the current path exists, the applied voltage may be different from the voltage applied to the signal line SL. On the other hand, in the second embodiment, since only the switch SW2 is ON during the precharge period of the first operation state, there is no current path at the time of precharge, so the gate of the TFT Q and the capacitive element C In addition, it is possible to precharge a highly accurate voltage.

The operation process of this operation example is a change in the timing of the switch SW1 from OFF to ON in the first operation state, and this change is applied to the second and third operation examples of the first embodiment. In addition to the conventional advantages, the advantages of the present operation example can be provided. On the other hand, the second embodiment can perform all the operation examples of the first embodiment, and has the advantages associated therewith. As in the first embodiment, the configuration of the pixel 2 can be simplified by selecting an appropriate transistor conductivity type and sharing a control line in each operation.
Further, the pixel circuit of the second embodiment may perform the same operation as the first embodiment with the same timing chart as the first to third operation examples of the first embodiment. Is possible.

Third embodiment:
FIG. 7 is a circuit diagram showing a configuration of one pixel according to the third embodiment of the present invention. As shown in FIG. 7, a signal line SL running in the column direction, control lines CL1 to CL3 and voltage supply lines PB1 to PB3 and PB5 running in the row direction pass through the pixel 2, and TFT Q1, TFT Q2, switches SW1 to SW3, capacitive element C, and light emitting element LED are provided. TFT Q1 and Q2 are connected in series, and the end of TFT Q2 that is not connected to the drain or source TFT Q1 is connected to power line PB2, and is not connected to the drain or source TFT Q2 of TFT Q1 A switch SW3 is connected between the end and the light emitting element LED, and a switch SW1 is connected between the end not connected to the TFT Q2 of the TFT Q1 and the signal line SL. The terminal opposite to the switch SW3 of the light emitting element LED is connected to the power supply line PB1. Further, a switch SW2 is connected between the end of the TFT Q1 not connected to the TFT Q2 and the gate, and a capacitive element C is connected between the gate of the TFT Q1 and the power supply line PB3. A voltage supply line PB5 is connected to the gate. Here, the switches SW1, SW2, and SW3 are controlled by control lines CL1, CL2, and CL3, respectively.

  In the third embodiment, there is a TFT Q2 biased by the voltage supply line PB5. Thereby, for example, TFT Q1 and TFTQ2 are in cascode connection, and both TFT Q1 and TFT Q2 can be operated in the saturation region, so that the drain bias dependency of TFT Q1 in the saturation region can be improved.

  The operation of the third embodiment is the same as that of the first embodiment except for TFT Q2, and the advantages of the respective operation examples of the first embodiment can be obtained. Furthermore, this embodiment can realize the same operation as that of the second embodiment by changing the connection of the switches, and can obtain the advantages in the respective operation examples.

Fourth embodiment:
FIG. 8 is a circuit diagram showing a configuration of one pixel according to the fourth embodiment of the present invention. As shown in FIG. 8, a signal line SL running in the column direction, control lines CL1 to CL4 and voltage supply lines PB1 to PB4 running in the row direction pass through the pixel 2, and the TFT 2 Q, switches SW1 to SW4, a capacitive element C, and a light emitting element LED are provided. The first end of either the drain or source of TFT Q is connected to the voltage supply line PB2, and a switch SW3 is connected between the second end of either the drain or source of TFT Q and the light emitting element LED. A switch SW1 is connected between the second end of the TFT Q and the signal line SL. The terminal opposite to the switch SW3 of the light emitting element LED is connected to the voltage supply line PB1. One end of the switch SW4 is connected between the light emitting element LED and the switch SW3, and the other end is connected to the voltage supply line PB4. Further, a switch SW2 is connected between the second end of the TFT Q and the gate of the TFT Q, and a capacitive element C is connected between the gate of the TFT Q and the voltage supply line PB3. Here, the switches SW1, SW2, SW3, and SW4 are controlled by control lines CL1, CL2, CL3, and CL4, respectively.

  FIG. 9 is a timing chart showing an operation example of the fourth embodiment of the present invention shown in FIG. In this operation example, the illustrated pixel is selected in the first operation state (current storage state, row selection period), the switch SW1 is turned on by the control line CL1, the switch SW2 is turned on by the control line CL2, and the switch SW3 and The switch SW4 is continuously turned OFF and ON by the control line CL3 and the control line CL4, respectively. In this state, as in the case of the circuit of the first embodiment, a voltage that causes a current from the signal line SL to flow between the drain and source of the TFT Q is written to the gate of the TFT Q and the capacitive element C. At the same time, a voltage is applied to one end of the light emitting element LED from the voltage supply line PB4 by the switch SW4. The voltage applied from the voltage supply line PB4 to the light emitting element LED is a voltage at which the light emitting element LED does not emit light.

  The second operation state (current supply state) is a state in which a row other than the pixel shown in FIG. 8 is selected. The switch SW1 is turned off by the control line CL1, and the switch SW2 is turned off by the control line CL2. Switch SW3 is turned on by line CL3, and switch SW4 is turned off by control line CL4.

  In this state, the gate voltage of TFT Q becomes the voltage stored in the capacitive element C in the first operation state, and TFT Q receives the current supplied from the signal line SL in the first operation state through the switch SW3. The light is supplied to the light emitting element LED, and the light emitting element LED emits light with the luminance of the target gradation.

  In the next third operation state (current stop state), in a state where a row other than the illustrated pixel row is selected, the switch is controlled by the control line CL3 before the illustrated pixel row is selected again. Turn off SW3 and turn on switch SW4 with control line CL4. As a result, the supply of current to the light emitting element LED is stopped and the charge accumulated in the light emitting element LED is rapidly eliminated, and the light emitting element LED does not operate (emit light).

  This operation is basically the same as the third operation example of the first embodiment shown in FIG. 4, except that the charge accumulated in the light emitting element LED is forcibly removed by the switch SW4. The light emission of the light emitting element can be stopped simultaneously with the stop of the power supply to the light emitting element, and the light emission period of the light emitting element can be controlled more accurately. Here, the voltage applied by the voltage supply line PB4 can be, for example, the same voltage value as the voltage applied by the voltage supply line PB1, and in this case, one end of the switch SW4 is not the voltage supply line PB4, The voltage supply line PB1 can be used. At this time, since the voltage supply line PB4 is not required, the configuration of the pixel 2 can be simplified.

  Further, in the operation example shown in FIG. 9, the switch SW3 and the switch SW4 are reversely operated. However, the switch SW4 is a switch that is turned on only for a certain time at the start of the third operation state. You may change to

  Furthermore, operations corresponding to the first and second operation examples of the first embodiment can be performed on the fourth embodiment. In this case, the switch SW4 is operated so as to perform the reverse operation of the switch SW3.

  In the fourth embodiment, not only the first embodiment described above but also the switch SW4 and the control line CL4 are added to the second and third embodiments, respectively. Advantages of the embodiment can be obtained. In that case, in other words, it is possible to more accurately control the light emission time of the light emitting element without losing the advantages originally provided by the respective embodiments and their operations.

  In each of the operations of the first to fourth embodiments, as described in detail in the first embodiment, by selecting an appropriate transistor conductivity type and sharing a control line, the pixel 2 It is possible to simplify the configuration. Further, for example, the configuration can be simplified by eliminating the voltage supply line PB3 by connecting the terminal on the opposite side of the storage node of the capacitive element C to the voltage supply line PB1 or PB2. On the other hand, the current supplied to the light emitting element can be changed by changing the applied voltage value of the power supply line PB3 in the first operation state and the second operation state. For example, if the voltage value of the power supply line PB3 in the second operation state is changed to a side where the TFT Q is turned off from the voltage value in the first operation state, the gate voltage of the TFT Q is also equal to the same voltage due to the boot effect. Since the shift is performed, current can be prevented from flowing. Thereby, it is possible to easily insert the black state for improving the moving image display.

  Next, embodiments of the present invention will be described in detail with reference to the drawings. However, in the following description, the light emitting element will be described, but this is an example of a current load element, and other current load elements can be applied.

First embodiment:
FIG. 10 shows the configuration of one pixel according to the first embodiment of the present invention. Note that all the pixels in the following examples are pixels in the Kth row and Mth column in the display section shown in FIG. The pixel 2 of the first embodiment of the present invention includes a signal line SL (#M), a power supply line VCC, a ground line GND, a voltage supply line VS1, a control line CL1 (#K), and a control line CL3 (#K). , And p-TFT Qp, switches SW1 to SW3, a capacitive element C, and a light emitting element LED are provided. The source of the p-TFT Qp is connected to the power supply line VCC, and the drain thereof is connected to one end of the switches SW1 to SW3. The other end of the switch SW1 is connected to the signal line SL (#M), the other end of the switch SW2 is connected to the gate of the p-TFT Qp, and the other end of the switch SW3 is connected to the anode of the light emitting element LED. The switches SW1 and SW2 are controlled by a signal on the control line CL1 (#K), and the switch SW3 is controlled by a signal on the control line CL3 (#K). The cathode of the light emitting element LED is connected to the ground line GND, one end of the capacitive element C is connected to the gate of the p-TFT Qp, and the other end is connected to the voltage supply line VS1. The voltage of the voltage supply line VS1 is constant.

  The operation of this embodiment will be described below. FIG. 11 shows a first operation state of the present embodiment, FIG. 12 shows a second operation state, and FIG. 13 shows a timing chart of the operation. The first operation state (current storage state, row selection period) of this embodiment is a state in which the Kth row in the display device is selected, and the switch SW1 and the switch SW2 are controlled by the control line CL1 (#K). Turns on and the switch SW3 is turned off by the control line CL3 (#K). The signal line SL (#M) is supplied with a current corresponding to the target gradation in accordance with the current-luminance characteristics of the light emitting element LED. That is, as shown in FIG. 11, a current I flows from the power supply line VCC through the p-TFT Qp toward the signal line SL (#M).

  In this first operating state, the p-TFT Qp operates in the saturation region because the drain-gate is short-circuited by the switch SW2. On the other hand, since the switch SW3 is OFF, no current flows through the light emitting element LED, and the light emitting element LED does not operate (emit light). The current supplied from the signal line SL (#M) flows through the p-TFT Qp, and the gate voltage of the p-TFT Qp flows according to the current capability of the p-TFT Qp. Set to the correct voltage. At this time, the capacitance of the light-emitting element LED is irrelevant to the operation of passing current through the p-TFT Qp, and it is not necessary to charge / discharge with the current from the signal line SL (#M). Is set promptly.

  The second operation state (current supply state) of this embodiment is a state in which a line other than the K-th line in the display device is selected, and the switches SW1 and SW2 are turned off by the control line CL1 (#K) signal. The switch SW3 is turned on by the signal of the line CL3 (#K).

  In this operating state, the gate voltage of the p-TFT Qp in the first operating state is maintained as the gate voltage of the p-TFT Qp in the first operating state because the gate voltage in the first operating state is held by the capacitive element C. Is the same. The p-TFT Qp supplies the current supplied from the signal line SL (#M) to the light emitting element LED through the switch SW3 in the first operation state. The following operation is performed (emits light). That is, at this time, as shown in FIG. 9, the same current I as in FIG. 11 flows from the power supply line VCC through the p-TFT Qp and the light emitting element LED toward the ground line GND. In the first operation example, the TFT for storing current and the TFT for supplying current to the light emitting element LED are the same as described above, and therefore, it is possible to store and supply current with high accuracy.

Second embodiment:
FIG. 14 is a circuit diagram showing a configuration of a pixel according to the second embodiment of the present invention. The second embodiment is different from the first embodiment in that the TFT channel type for supplying current is changed from the p-channel type to the n-channel type. That is, an n-channel TFT (hereinafter referred to as n-TFT) is used instead of the p-TFT in the first embodiment. The pixel 2 of the second embodiment of the present invention includes a signal line SL (#M), a power supply line VCC, a ground line GND, a voltage supply line VS1, a control line CL1 (#K), and a control line CL3 (#K). , And n-TFT Qn, switches SW1 to SW3, a capacitive element C, and a light emitting element LED are provided. The source of the n-TFT Qn is connected to the ground line GND, and its drain is connected to one end of the switches SW1 to SW3. The other end of the switch SW1 is connected to the signal line SL (#M), the other end of the switch SW2 is connected to the gate of the n-TFT Qn, and the other end of the switch SW3 is connected to the cathode of the light emitting element LED. The switches SW1 and SW2 are controlled by a signal on the control line CL1 (#K), and the switch SW3 is controlled by a signal on the control line CL3 (#K). The anode of the light emitting element LED is connected to the power supply line VCC, one end of the capacitive element C is connected to the gate of the n-TFT Qn, and the other end is connected to the voltage supply line VS1. The voltage of the voltage supply line VS1 is constant.

  In this embodiment, the control timing chart is the same as that of the first embodiment shown in FIG. 13, and the circuit of this embodiment performs the same operation as that of the first embodiment, and has the same advantages. Have.

Third embodiment:
FIG. 15 is a circuit diagram showing a configuration of a pixel according to the third embodiment of the present invention, and FIG. 16 is a timing chart showing its operation.

  In the pixel 2 of this embodiment, the signal line SL (#M), the power supply line VCC, the ground line GND, the voltage supply line VS1, the control line CL1 (#K) pass, and p-TFT Qp1, p-TFT Qp2, n-TFT Qn1, n-TFT Qn2, capacitive element C, and light emitting element LED are provided. In this embodiment, n-TFT Qn1 is used as the switch SW1, n-TFT Qn2 is used as the switch SW2, and p-TFT Qp2 is used as the switch SW3 with respect to the first embodiment. P-TFT Qp in the example is p-TFT Qp1). The operation performed in accordance with the timing chart shown in FIG. 16 is the same as that in the first embodiment. However, by configuring as in the present embodiment, one control line can be provided.

Fourth embodiment:
FIG. 17 is a circuit diagram showing a configuration of a pixel according to the fourth embodiment of the present invention, and FIG. 18 is a timing chart showing its operation.

  Signal line SL (#M), power supply line VCC, ground line GND, voltage supply line VS1, control line CL1 (#K), control line CL2 (#K) pass through pixel 2 in this example. P-TFT Qp1, p-TFT Qp2, n-TFT Qn1, n-TFT Qn2, a capacitive element C, and a light emitting element LED are provided. This is different from the third embodiment in that a control line CL2 (#K) is added and the gate of n-TFT Qn2 is controlled by the control line CL2 (#K). The operations performed in accordance with the timing chart shown in FIG. 18 are basically the same as those in the third embodiment (see FIG. 16). However, in this embodiment, as shown in the timing chart of FIG. 18, the n-TFT Qn2 is turned off first by the control line CL2 (#K), and then the p-TFT is turned by the control line CL1 (#K). Qp2, n-TFT Qn1 is turned ON / OFF. By operating in this way, it is possible to prevent the noise associated with the ON / OFF operation of p-TFT Qp2 and n-TFT Qn1 from being transmitted to the gate of p-TFT Qp1. High current can be supplied to the light emitting device LED from p-TFT Qp1.

Fifth embodiment:
FIG. 19 is a circuit diagram showing the configuration of a pixel according to the fifth embodiment of the present invention, and FIG. 20 is a timing chart showing the operation thereof.

  In the pixel 2 of this embodiment, the signal line SL (#M), the power supply line VCC, the ground line GND, the voltage supply line VS1, the control line CL1 (#K), the control line CL2 (#K), the control line CL2B ( #K), and p-TFT Qp1, p-TFT Qp2, n-TFT Qn1, n-TFT Qn2, n-TFT Qn3, capacitive element C, and light emitting element LED are provided. It differs from the previous fourth embodiment (see FIG. 17) in that a control line CL2B (#K) and n-TFT Qn3 controlled by the control line CL2B (#K) are added. n-TFT Qn3 is short-circuited between the source and drain, and has an appropriate gate length / width ratio to the gate length (L) / width (W) ratio (W / L) of n-TFT Qn2, p -Connected between the gate of TFT Qp1 and the drain (or source) of n-TFT Qn2. Since n-TFT Qn2 has a capacitance (capacitance between gate and drain (or source)), when n-TFT Qn2 turns from ON to OFF, the accumulated charge is transferred and p-TFT The gate potential of Qp1 is disturbed. n-TFT Qn3 is used to compensate for the voltage error that occurs at the gate of p-TFT Qp1 by canceling this charge transfer, and is equivalent to the gate-drain (or source) capacitance of n-TFT Qn2. And is controlled by the control line CL2B (#K) to which the inverted signal of the control line CL2 (#K) of the n-TFT Qn2 is transmitted. In many cases, the gate length to width ratio of n-TFT Qn3 is half the gate length to width ratio of n-TFT Qn2, but this ratio may change depending on the timing conditions. There is. According to the present embodiment having the n-TFT Qn3, it becomes possible to supply a more accurate current to the light emitting element LED by the p-TFT Qp1.

Sixth embodiment:
In the sixth embodiment, the channel type of all TFTs in the third embodiment (see FIG. 15) is inverted. Therefore, the operation timing chart of this embodiment is obtained by inverting the signals of the control lines CL1 (#K) and CL1 (# (K + 1)) with respect to the timing chart of the third embodiment shown in FIG. It will be a thing.

Seventh embodiment:
In the seventh embodiment, the channel type of all TFTs in the fourth embodiment (see FIG. 17) is inverted. Therefore, the operation timing chart of this embodiment is different from the timing chart of the fourth embodiment shown in FIG. 18 in that the control lines CL1 (#K), CL1 (# (K + 1)), CL2 (#K) , CL2 (# (K + 1)) signal is inverted.

Eighth embodiment:
In the eighth embodiment, the channel type of all TFTs in the fifth embodiment (see FIG. 19) is inverted. Accordingly, the timing chart of the operation of this embodiment is different from the timing chart of the fifth embodiment shown in FIG. 20 in that the control lines CL1 (#K), CL1 (# (K + 1)), CL2 (#K) , CL2 (# (K + 1)), CL2B (#K), and CL2B (# (K + 1)) signals are inverted.

Ninth embodiment:
FIG. 21 is a timing chart showing the operation of the ninth embodiment of the present invention. The pixel configuration of the display device used in this embodiment is the same as that of the first embodiment shown in FIG.

  The first operation state (current storage state, row selection period) of this embodiment is a state in which the Kth row in the display device is selected, and the switch SW1 and the switch SW2 are controlled by the control line CL1 (#K). Turns on and the switch SW3 is turned off by the control line CL3 (#K). The signal line SL (#M) is supplied with a current corresponding to the target gradation in accordance with the current-luminance characteristics of the light emitting element LED.

  Since the operation in the first operation state is the same as that of the first embodiment described with reference to FIGS. 10 to 13, a detailed description thereof will be omitted.

  The second operation state (current supply state) of this embodiment is a state where the lines other than the Kth line in the display device are selected, and the switch SW1 and the switch SW2 are turned off and controlled by the control line CL1 (#K). The switch SW3 is turned on by the line CL3 (#K).

  In this second operating state, the gate voltage of the p-TFT Qp is maintained at the gate voltage of the first operating state by the capacitive element C. Therefore, the gate-source voltage of the p-TFT Qp is It is the same as the first operating state. At this time, the p-TFT Qp supplies the current supplied from the signal line SL (#M) to the light emitting element LED through the switch SW3 in the first operation state. An operation that results in brightness is performed (emits light).

  In the third operation state (current stop state) of this embodiment, a part of the period of the second operation state before the first operation state starts is switched by the switch SW1 and the switch by the control line CL1 (#K). The switch SW3 is turned off by the control line CL3 (#K) while keeping SW2 in the OFF state. During this period, since the switch SW3 is OFF, no current is supplied to the light emitting element LED, and the light emitting element LED does not operate (emit light).

  According to the present embodiment, in addition to the effect that the current can be stored at high speed and the stored current can be supplied to the light emitting element LED with high accuracy as in the first to eighth embodiments, the following effect can also be expected. That is, in the present embodiment, among the first to third operation states, the second operation state emits light from the light emitting element LED, whereas the first operation state is a short period of light emission. The element LED does not emit light and the third operating state does not emit light. As a result, the luminance averaged over time for the display device is calculated as follows: T1 is the period of the first operating state, T2 is the period of the second operating state, and T3 is the period of the third operating state. The brightness at T2 / (T1 + T2 + T3) times. For example, when one frame period, which is the product of the selection period and the number of control stages (rows), is T 1, T1 = 0.005T, T2 = 0.25T, T3 = 0.745T, the luminance as a display device is This is 0.25 times the luminance in the second operating state. For this reason, in this embodiment, the luminance of the light emitting element LED in the second operation state requires about four times the luminance of the operation example without the third operation state. Therefore, if the current-luminance characteristics of the light emitting element LED are in a proportional relationship, it is necessary to flow the current four times. Therefore, in the present embodiment, since the third operation state exists, the value of the current passed through the light emitting element LED can be increased as compared with the other embodiments. For this reason, the time for charging the wiring capacitance such as the signal line can be shortened, and the period of the first operation state necessary for storing the current can be shortened. Therefore, this embodiment can cope with an increase in wiring capacity and a reduction in selection time due to higher definition and larger screen. Further, in the third operation state in this embodiment, the light emitting element LED does not emit light, so that the display operation is similar to that of the CRT, and the afterimage is less likely to remain, so that the display of moving images has high image quality.

Tenth embodiment:
FIG. 22 is a circuit diagram showing a configuration of a pixel according to the tenth embodiment of the present invention. The pixel 2 in this embodiment passes the signal line SL (#M), the power supply line VCC, the ground line GND, the voltage supply line VS1, the control line CL1 (#K), and the control line CL3 (#K). P-TFT Qp1, p-TFT Qp2, n-TFT Qn1, n-TFT Qn2, a capacitive element C, and a light emitting element LED are provided. In the pixel 2 of this embodiment, a control line CL3 (#K) is added to the pixel of the third embodiment (see FIG. 12) to control p-TFT Qp2. FIG. 23 is a timing chart showing the operation of the present embodiment. This shows the signals of the control lines CL3 (#K) and CL3 (# (K + 1)) of the ninth embodiment shown in FIG. The operation of the circuit of this embodiment is the same as that of the ninth embodiment.

Eleventh embodiment:
FIG. 24 is a circuit diagram showing a configuration of a pixel according to the eleventh embodiment of the present invention, and FIG. 25 is a timing chart showing the operation thereof. In the pixel 2 of this embodiment, the signal line SL (#M), the power supply line VCC, the ground line GND, the voltage supply line VS1, the control line CL1 (#K), the control line CL2 (#K), the control line CL3 ( #K) is passing, and p-TFT Qp1, p-TFT Qp2, n-TFT Qn1, n-TFT Qn2, capacitive element C, and light emitting element LED are provided. The pixel 2 of this embodiment is obtained by adding a control line CL2 (#K) to the pixel of the tenth embodiment (see FIG. 22), thereby controlling n-TFT Qn2.

  The operation performed according to the timing chart shown in FIG. 25 is a combination of the operation of the tenth embodiment shown in FIG. 23 and the operation of the fourth embodiment shown in FIG. That is, n-TFT Qn2 is turned OFF first by the control line CL2 (#K), and then n-TFT Qn1 and p-TFT Qp2 are turned OFF and ON by the control lines CL1 (#K) and CL3 (#K). , P-TFT Qn1 and n-TFT Qp2 ON / OFF noise is not transferred to the gate terminal of p-TFT Qp1 after switching to the second operation state, and then the third operation state (P-TFT Qp2 is OFF) is executed.

Twelfth embodiment:
FIG. 26 is a circuit diagram showing a configuration of a pixel according to the twelfth embodiment of the present invention, and FIG. 27 is a timing chart showing the operation thereof. In the pixel 2 of this embodiment, the signal line SL (#M), the power supply line VCC, the ground line GND, the voltage supply line VS1, the control line CL1 (#K), the control line CL2 (#K), the control line CL2B ( #K), control line CL3 (#K) passes, and p-TFT Qp1, p-TFT Qp2, n-TFT Qn1, n-TFT Qn2, n-TFT Qn3, capacitive element C, light emitting element LED Is deployed. In the pixel of this embodiment, a control line CL3 (#K) and n-TFT Qn3 controlled by the control line CL3 (#K) are added to the pixel of the eleventh embodiment shown in FIG. Yes. In this embodiment, the control line CL2B (#K) and the n-TFT Qn3 controlled by the control line CL2B (#K) are added to the pixels of the eleventh embodiment (see FIG. 24). The eleventh embodiment and the fifth embodiment (see FIG. 19) are combined.

  The operation performed in accordance with the timing chart shown in FIG. 27 is a combination of the eleventh embodiment shown in FIG. 25 and the fifth embodiment shown in FIG. 20, and operates by the control line CL2 (#K). It has the feature that the switching noise of p-TFT Qn2 is absorbed by n-TFT Qn3.

  In each of the above-mentioned ninth to twelfth embodiments, the polarity of the TFT, as in the second embodiment for the first embodiment and the sixth to eighth embodiments for the third to fifth embodiments. A modified example is also conceivable as an example. In this case, as in the sixth to eighth embodiments corresponding to the third to fifth embodiments, when the switch TFT is used, the polarity of the TFT is changed and the signal of the control line is inverted.

Thirteenth embodiment:
FIG. 28 is a circuit diagram showing a configuration of a pixel according to the thirteenth embodiment of the present invention. The pixel 2 of this embodiment includes a signal line SL (#M), a power supply line VCC, a ground line GND, a voltage supply line VS1, a control line CL1 (#K), a control line CL2 (#K), a control line CL3 ( #K) passes, and p-TFT Qp, switches SW1 to SW3, capacitive element C, and light emitting element LED are provided. The source of the p-TFT Qp is connected to the power supply line VCC, and a switch SW3 controlled by the control line CL3 (#K) is connected between the drain of the p-TFT Qp and the anode of the light emitting element LED. A switch SW1 controlled by a control line CL1 (#K) is connected between the drain of the p-TFT Qp and the signal line SL. The cathode of the light emitting element LED is connected to the ground line GND. Further, a switch SW2 controlled by the control line CL2 (#K) is connected between the signal line SL and the gate of the p-TFT Qp, and between the gate of the p-TFT Qp and the voltage supply line VS1. The capacitor element C is connected. The operation of the thirteenth embodiment will be described below. FIG. 29 shows a timing chart of the operation of this example.

  The first operation state (current storage state, row selection period) of this embodiment is a state in which the Kth row is selected, and is composed of two periods. During the first period (precharge period), switch SW1 is turned off by control line CL1 (#K), switch SW2 is turned on by control line CL2 (#K), and switch SW3 is turned off by control line CL3 (#K). Become. In this period, an appropriate voltage is applied to the gate of the p-TFT Qp through the signal line SL (#M). In the second period (current writing period), the switch SW1 is turned on by the control line CL1 (#K), and the switches SW2 and SW3 are not changed from the first period. During this period, a current corresponding to the gray scale is applied to p-TFT Qp through signal line SL (#K), and the gate voltage of p-TFT Qp is the voltage at which the current flows between the drain and source. And the capacitor C holds (stores) the voltage. This current writing period corresponds to the first operation state of the first to twelfth embodiments.

  The second operation state (current supply state) of this embodiment is a state in which a line other than the K-th line in the display device is selected, and the switches SW1 and SW2 are turned off by the control line CL1 (#K) signal. The switch SW3 is turned on by the signal of the line CL3 (#K). In this operation state, the p-TFT Qp supplies the current stored in the first operation state to the light emitting element ELD as in the second operation state of the first to twelfth embodiments.

  The present embodiment is characterized by having a precharge period in which a voltage is applied to the gate of the p-TFT Qp in the first operation state. By applying an appropriate precharge voltage to the gate of the p-TFT Qp during the precharge period, the current writing period can be shortened for the correction level, and the period of the first operating state (pre- (Charging period + current writing period) can be shortened. In the first to twelfth embodiments, a first operation state in which a similar precharge period is provided can be realized, but a current path remains in the precharge period. On the other hand, in this embodiment, the switch SW1 is turned off during the precharge period, so that no current path remains and the voltage can be applied with high accuracy.

  Here, since the configuration of the thirteenth embodiment is obtained by changing the connection of the switch SW2 of the first embodiment, the first to twelfth embodiments are similar to the thirteenth embodiment. The invention in which the arrangement of the switch SW2 is changed can be realized in the same manner. FIG. 30 shows an example in which the connection of the switch SW2 is changed as in the thirteenth embodiment from the third embodiment (FIG. 15). These modified circuits can perform the operations of the first to twelfth embodiments and the thirteenth embodiment including the precharge operation while having the respective advantages.

Fourteenth embodiment:
FIG. 31 is a circuit diagram showing a configuration of a pixel according to the fourteenth embodiment of the present invention. The signal line SL (#M), the power supply line VCC, the ground line GND, the voltage supply lines VS1, VS3, the control line CL1 (#K), and the control line CL3 (#K) pass through the pixel 2 in this embodiment. P-TFT Qp1, p-TFT Qp2, switches SW1 to SW3, a capacitive element C, and a light emitting element LED are provided. The source of p-TFT Qp1 is connected to the power supply line VCC through p-TFT Qp2, and is controlled by the control line CL3 (#K) between the drain of p-TFT Qp1 and the anode of the light emitting element LED. Further, a switch SW1 controlled by a control line CL1 (#K) is connected between the drain of the p-TFT Qp1 and the signal line SL (#M). The cathode of the light emitting element LED is connected to the ground line GND. Further, a switch SW2 controlled by the control line CL1 (#K) is connected between the gate and drain of the p-TFT Qp1, and a capacitive element is connected between the gate of the p-TFT Qp1 and the voltage supply line VS1. C is connected, and the voltage supply line VS3 is connected to the gate of the p-TFT Qp2.

  The operation of the fourteenth embodiment is the same as that of the first embodiment. However, in this embodiment, there exists p-TFT Qp2 biased by the voltage supply line VS3. Thereby, for example, since both p-TFT Qp1 and p-TFT Qp2 can be operated in the saturation region, the drain voltage dependency of p-TFT Qp1 in the saturation region can be improved.

  Here, since the configuration of the fourteenth embodiment is obtained by adding p-TFT Qp2 to the first embodiment, in the first to twelfth embodiments, the configuration of the fourteenth embodiment is the same. Thus, an invention with p-TFT can be realized in the same way. FIG. 32 shows an example in which p-TFT Qp3 is added from the tenth embodiment (FIG. 22). Further, a configuration in which p-TFT is added to the thirteenth embodiment as in the fourteenth embodiment can also be realized.

Fifteenth embodiment:
FIG. 33 is a circuit diagram showing the configuration of the pixel of the fifteenth embodiment of the present invention, and FIG. 34 is a timing chart showing the operation of this embodiment. The pixel 2 in this embodiment includes a signal line SL (#M), a power supply line VCC, a ground line GND, a voltage supply line VS1, a voltage supply line VS2, a control line CL1 (#K), and a control line CL3 (#K). , The control line CL4 (#K) passes, and the p-TFT Qp, the switches SW1 to SW4, the capacitive element C, and the light emitting element LED are provided. The source of the p-TFT Qp is connected to the power supply line VCC, and a switch SW3 controlled by the control line CL3 (#K) is connected between the drain of the p-TFT Qp and the anode of the light emitting element LED. A switch SW1 controlled by a control line CL1 is connected between the drain of the p-TFT Qp and the signal line SL (#M). The cathode of the light emitting element LED is connected to the ground line GND. A switch SW4 controlled by a control line CL4 (#K) is connected between the anode of the light emitting element LED and the voltage supply line VS2. Further, a switch SW2 controlled by the control line CL1 (#K) is connected between the drain and gate of the p-TFT Qp, and a capacitor is connected between the gate of the p-TFT Qp and the voltage supply line VS1. Element C is connected.

  In the first operation state (current storage state, row selection period) in this embodiment in FIG. 34, the K-th row in the display device is selected, and the switch SW1 is switched by the control line CL1 (#K). Switch SW2 is ON, switch SW3 is OFF by control line CL3 (#K), and switch SW4 is ON by control line CL4 (#K). However, in this operating state, switch SW4 is either ON or OFF. But it can work.) Further, a current corresponding to the target gradation is supplied to the signal line SL (#M) in accordance with the current-luminance characteristics of the light emitting element LED. In the first operation state, the gate of the p-TFT Qp becomes a voltage that causes a current supplied through the signal line SL (#M) to flow between the drain and the source of the p-TFT Qp.

  The second operation state (current supply state) of this embodiment is a state in which a line other than the Kth line in the display device is selected, and the switch SW1 and the switch SW2 are turned off and controlled by the control line CL1 (#K). The switch SW3 is turned on by the line CL3 (#K), and the switch SW4 is turned off by the control line CL4 (#K). In this second operating state, the gate voltage of the p-TFT Qp is maintained at the gate voltage of the first operating state by the capacitive element C. Therefore, the gate-source voltage of the p-TFT Qp is It is the same as the first operating state. At this time, the current supplied from the signal line SL (#M) in the first operation state is supplied to the light emitting element LED through the switch SW3, so that the light emitting element LED operates at the brightness of the target gradation. Perform (emission).

  The third operation state (current stop state) of this embodiment is a state where a row other than the Kth row in the display device is selected, and the switch SW1 and the switch SW2 are turned off by the control line CL1 (#K). The switch SW3 is turned OFF by the control line CL3 (#K) and the switch SW4 is turned ON by the control line CL4 (#K). At the start of this operating state, the switch SW3 is turned off and the switch SW4 is turned on, so that no current is supplied to the light emitting element LED, and the voltage VS2 is applied to the anode of the light emitting element. If the voltage VS2 is made lower than the operating voltage of the light emitting element LED, the light emitting element LED does not operate (emit light) instantaneously at the start of this operation state.

  According to the present embodiment, the current can be stored at high speed as in the other embodiments, and the stored current can be supplied to the light emitting element LED with high accuracy.

  Further, according to the present embodiment, as in the ninth to twelfth embodiments, the current value flowing to the signal line and flowing to the light emitting element LED can be increased, so that the time for charging the wiring capacitance such as the signal line is short. And the period of the first operating state necessary for storing the current can be shortened. Therefore, this embodiment can cope with an increase in the wiring capacitance element C and a reduction in the selection time due to the higher definition and larger screen.

  Further, in this embodiment, the switch SW4 is provided, turned on at the start of the third operation state, and the voltage VS2 is applied to the light emitting element LED, whereby the light emission can be stopped instantaneously. In the ninth to twelfth embodiments, even if the current path is interrupted by the switch SW3, since the charge accumulated in the capacitance of the light emitting element itself exists, current flows through the light emitting element, and the voltage is sufficient. The light emitting element operates (emits light) until it becomes low. This light emission causes an error when the luminance of the display device is determined by the luminance in the second operation state and the period of each operation state. On the other hand, in this embodiment, since the light emission can be stopped instantaneously by the switch SW4, the brightness in the second operation state and the period of the first, second, and third operation states are highly accurate. The brightness of the display device can be determined. Similarly to the ninth to twelfth embodiments, since the light emission is stopped in the third operation state, the display operation is similar to that of the CRT, and the display of moving images has high image quality.

  Here, the configuration of the fifteenth embodiment is obtained by adding the switch SW4, the control line CL4 (#K), and the power supply line VS2 to the first embodiment (FIG. 10). In the first to twelfth embodiments, the invention of adding the switch SW4 or TFT and its control line as in the fifteenth embodiment can be realized in the same manner. FIG. 35 shows an example in which an n-TFT Qn3 and a voltage supply line VS2 are added to the third embodiment (FIG. 15). FIG. 36 shows an n-TFT in the tenth embodiment (FIG. 22). An example in which Qn3 and voltage supply line VS2 are added is shown. In addition to the features of the thirteenth and fourteenth embodiments, by adding the switch SW4 (or the TFT that performs the switch operation) to the thirteenth and fourteenth embodiments, the same features as the present embodiment are obtained. Can be realized similarly.

  The voltage supply line VS2 in the fifteenth embodiment may have a voltage value for instantaneously stopping light emission in the third operation state. Therefore, for example, by sharing the ground line GND, the configuration of the pixel 2 of the present embodiment can be simplified.

Sixteenth embodiment:
In the first to fifteenth embodiments, since the voltage supply line VS1 connected to one end of the capacitor having one end connected to the gate of the TFT is considered as a constant voltage, the voltage supply line VS1 is The power supply line VCC and ground line GND can be used, and in that case, the configuration can be simplified. Further, the voltage supply line VS1 can change the current value supplied to the light emitting element by changing the voltage value in the first operation state and the other operation states.

  For example, by shifting the voltage of the voltage supply line VS1 from the voltage value in the first operating state to such an extent that the TFT is turned off, the TFT can be turned off by a boot effect. If this operation is performed for the entire light emitting display device or for each line, it becomes possible to display the whole or for each line in a black display (in a state where the light emitting element is not operated).

  Although preferred embodiments and examples have been described above, the present invention is not limited to these embodiments, and appropriate modifications can be made without departing from the scope of the present invention. For example, as described above, an inorganic EL element other than a light emitting element or an element other than an organic EL element such as a light emitting diode may be used, and a more general current load element may be used. The third switch (SW3) inserted in the current path of the light emitting element may be on the power supply line (or ground line) side instead of the driving transistor side of the light emitting element. Furthermore, in the embodiment, the fourth switch (SW4) is installed only when the third switch is turned off early, but the third switch is turned off when the first switch is turned on. It may be installed in the apparatus. Furthermore, the switch used in the present invention is not specific to TFT. In addition, the switch is basically defined by the operation of the switch, and the example in which the configuration can be simplified is described in the above embodiment. However, the polarity of the transistor used for the switch is not limited as long as the operation is satisfied. .

  The first effect is that a highly accurate current can be supplied to the current load element. The reason for this is that, first, a signal is supplied to the signal line by a current, and the transistor that stores the current flowing in the signal line is the same as the transistor that supplies the current of the current load element. This is because the degree of operation of the current load element is no longer affected by the characteristic variation. Second, since the current from the signal line is stored without supplying the current to the current load element, the current from the signal line is accurately stored. This is because it can.

  The second effect is that the time for storing the current is short and it is possible to cope with high definition. The reason for this is that in the state of storing current, the switch between the transistor storing current and the current load element is turned off, so that the current is not affected by the large load (parallel capacitance and resistance) of the light emitting element. This is because it is possible to store the data.

  Further, according to the embodiment in which the switch SW2 is turned off earlier than the switch SW1, the noise generated when the switch SW1 fluctuates can be prevented from being transmitted to the TFT gate that drives the light emitting element. An accurate current can be supplied.

  Further, according to the embodiment in which the switch SW2 is inserted between the signal line and the gate of the transistor supplying the current, a highly accurate precharge operation can be performed and the period for storing the current can be shortened.

  According to the embodiment in which the transistor is inserted between the transistor for supplying current and the power supply line, the drain voltage dependency of the drain current of the transistor for supplying current is set by applying an appropriate bias to the gate of the transistor. The current can be improved and a highly accurate current can be supplied to the current load element.

  In the case where the current load element is a light emitting element, according to the embodiment in which an operation state in which no current is passed through the light emitting element is provided during the non-selection period of the pixel, the current value to be stored is increased and the current is stored. In addition to being able to perform the operation in a shorter time, the operation is CRT-like and it is difficult for the afterimage to remain, so that the moving image display can be made with high image quality.

It is a figure which shows the structure of the pixel of 1st embodiment of this invention. It is a timing chart (the 1) which shows the operation example of 1st embodiment of this invention. It is a timing chart (the 2) which shows the operation example of 1st embodiment of this invention. It is a timing chart (the 3) which shows the operation example of 1st embodiment of this invention. It is a figure which shows the structure of the pixel of 2nd embodiment of this invention. It is a timing chart which shows the operation example of 2nd embodiment of this invention. It is a figure which shows the structure of the pixel of 3rd embodiment of this invention. It is a figure which shows the structure of the pixel of 4th Embodiment of this invention. It is a timing chart which shows the operation example of 4th Embodiment of this invention. It is a figure which shows the structure of the pixel of 1st Example of this invention. It is operation | movement explanatory drawing (the 1) of 1st Example of this invention. It is operation | movement explanatory drawing (the 2) of 1st Example of this invention. It is a timing chart which shows operation | movement of the 1st Example of this invention. It is a figure which shows the structure of the pixel of the 2nd Example of this invention. It is a figure which shows the structure of the pixel of the 3rd Example of this invention. It is a timing chart which shows operation | movement of the 3rd Example of this invention. It is a figure which shows the structure of the pixel of the 4th Example of this invention. It is a timing chart which shows the operation | movement of the 4th Example of this invention. It is a figure which shows the structure of the pixel of the 5th Example of this invention. It is a timing chart which shows operation | movement of the 5th Example of this invention. It is a timing chart which shows the operation | movement of the 9th Example of this invention. It is a figure which shows the structure of the pixel of the 10th Example of this invention. It is a timing chart which shows operation | movement of the 10th Example of this invention. It is a figure which shows the structure of the pixel of the 11th Example of this invention. It is a timing chart which shows the operation | movement of the 11th Example of this invention. It is a figure which shows the structure of the pixel of the 12th Example of this invention. It is a timing chart which shows the operation | movement of the 12th Example of this invention. It is FIG. (1) which shows the structure of the pixel of 13th Example of this invention. It is a timing chart which shows the operation | movement of the 13th Example of this invention. It is FIG. (2) which shows the structure of the pixel of 13th Example of this invention. It is FIG. (1) which shows the structure of the pixel of 14th Example of this invention. It is FIG. (2) which shows the structure of the pixel of 14th Example of this invention. It is FIG. (1) which shows the structure of the pixel of 15th Example of this invention. It is a timing chart which shows the operation | movement of 15th Example of this invention. It is FIG. (2) which shows the structure of the pixel of 15th Example of this invention. It is FIG. (3) which shows the structure of the pixel of 15th Example of this invention. It is a schematic plan view of the display part of a light emission display apparatus. It is a figure which shows the structure of the pixel of a 1st prior art example. It is a figure which shows the structure of the pixel of the 2nd prior art example. It is a figure which shows the structure of the pixel of a 3rd prior art example.

Explanation of symbols

1 Display unit
2 pixels
C Capacitance element CL, CL1 to CL4 Control line
GND Grounding wire
LED light emitting elements PB1 to PB3, VCC power line
Q, Q1, Q2 TFT
Qn, Qn1-Qn4 n-TFT (n-channel TFT)
Qp, Qp1-Qp4 p-TFT (p-channel TFT)
SL signal line SW, SW1 to SW4 switch

Claims (2)

A drive transistor having a source connected to a power supply line or a ground line; a first switch connected between a signal line to which a current or voltage is supplied and a drain of the drive transistor; the signal line and the drive transistor; A second switch connected to the gate of the first transistor; a first voltage supply line connected to one end; a capacitive element connected to the gate of the driving transistor at the other end; and a ground line or a power line. A series connection of a current load element and a third switch connected between the drain of the drive transistor;
A current load device characterized in that the voltage supplied by the first voltage supply line can be changed.   The first switch, the second switch, and the third switch are constituted by transistors, and a drain and a source are short-circuited between the second switch transistor and the driving transistor, and the second switch The current load device according to claim 1, wherein a transistor that performs reverse operation of the transistor is connected as a dummy switch.

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