JP2008186907A - Manufacturing method for multilayer circuit board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method for a multilayer circuit board used for providing the multilayer circuit board which suppresses the generation of a clearance between the through-hole wall surface of an insulating layer and a via-hole conductor without deteriorating the interface conductivity of a wiring layer and have a high dimensional accuracy. <P>SOLUTION: The manufacturing method for the multilayer circuit board includes a process of superposing burning-shrinkage suppressing sheets 5 for suppressing a burning shrinkage in the direction vertical to the laminating direction of a green-sheet laminate 1 on the upper side and lower side of the green-sheet laminate 1, burning the burning-shrinkage suppressing sheets 5, and removing the burning-shrinkage suppressing sheets 5. The manufacturing method for the multilayer circuit board also has processes of: forming through-holes to a green sheet 1a arranged on at least a surface layer and filling the through-holes with paste 2 for the via-hole conductor; and coating and forming metallic foils 31 at places coating the through-holes of the top face of the green sheet 1a. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a multilayer circuit board in which firing shrinkage suppression sheets are stacked on the upper and lower sides of a green sheet laminate to suppress firing shrinkage in the XY direction of the green sheet laminate.

  Conventionally, as a multilayer circuit board applied to a semiconductor element housing package for mounting semiconductor elements such as ICs and LSIs, which are becoming increasingly integrated, and a hybrid integrated circuit device on which various electronic components are mounted, an alumina sintered body is used. Insulating substrates have been used in many cases. In recent years, the resistance of the wiring layer has been required to be reduced, so that the wiring layer mainly composed of a low resistance conductor such as Cu, Ag, or Au that melts at about 1050 ° C. can be simultaneously fired with the insulating substrate. A glass-ceramic sintered body that can be sintered at a low temperature of 1050 ° C. or lower has been used as an insulating substrate.

  A glass-ceramic sintered body is generally obtained by combining glass and ceramics. Among them, crystallized glass is used as a glass to precipitate crystals having desired characteristics and various characteristics. In recent years, research has been focused on the fact that a glass-ceramic sintered body having the above can be obtained.

  As a specific method of forming such a multilayer circuit board, a slurry prepared by adding a solvent to a glass ceramic raw material powder and an organic binder is formed into a sheet shape by a doctor blade method or the like, and the obtained green sheet is passed through. Holes are punched, and the through holes are filled with a conductor paste mainly composed of Cu, Ag, Au or the like. At the same time, a conductive paste mainly composed of Cu, Ag, Au or the like is formed on the green sheet by printing it into a wiring pattern by a screen printing method or the like, or after forming electrolytic copper foil or rolled copper foil into a desired pattern, the green sheet Crimp to. Thereafter, a plurality of these green sheets are pressure-laminated and fired at 800 to 1000 ° C. to produce a multilayer circuit board.

  On the other hand, in recent years, as the density of multilayer circuit boards has increased, the demand for higher dimensional accuracy has also increased. Improvement of substrate dimensional accuracy to cope with this is also an important technique. However, the multilayer circuit board manufactured by the above-described method shrinks in volume by about 40 to 50% by firing. At this time, the variation in the shrinkage rate (average of 15 to 20% in one direction) in the direction perpendicular to the stacking direction of the multilayer circuit board (XY direction) becomes the position variation of the wiring layer, resulting in poor substrate dimensional accuracy. It was. Here, the shrinkage rate is defined as a value obtained by dividing a value obtained by subtracting a dimension after firing from a dimension before firing by a dimension before firing.

Therefore, as a method for improving the dimensional accuracy of the substrate, a shrinkage suppression layer containing an inorganic material powder having a sintering temperature higher than that of the green sheet is formed on both upper and lower surfaces of the green sheet laminate in which green sheets containing glass and ceramics are laminated. After forming and firing at a temperature at which the shrinkage suppression layer does not sinter, the substrate size obtained by suppressing shrinkage in the XY direction of the green sheet laminate by peeling and removing the shrinkage suppression layer It is known that the accuracy can be increased (see Patent Document 1).
Japanese Patent No. 2554415

  In the method described in Patent Document 1, since the shrinkage of the green sheet laminate in the XY direction during firing is suppressed, the shrinkage of the green sheet laminate in the lamination direction (Z direction) increases.

  However, the conductor paste (via hole conductor paste) as a via-hole conductor filled in the through hole of the green sheet has a larger shrinkage in the XY direction than the green sheet in which the shrinkage in the XY direction is suppressed. This is because the via hole conductor paste and the surface wiring layer paste are solid phase sintered while the green sheet is liquid phase sintered.

  The green sheet is sintered by liquid phase sintering in which ceramics are rearranged when the glass softens and flows. At this time, since the glass on the green sheet side moves to the shrinkage suppression layer side by a small amount, the adhesion force between the green sheet and the shrinkage suppression layer is strengthened, so the shrinkage suppression effect in the XY direction with respect to the green sheet is large. .

  On the other hand, the via-hole conductor paste and the surface wiring layer paste are sintered by solid-phase sintering of the metal particles contained in the paste. Therefore, the adhesive force between the via-hole conductor paste and the surface wiring layer paste using the same metal particles is strong, but the adhesive force between the shrinkage suppression layer and the surface wiring layer paste is the same as that of the green sheet. It is weak compared with the adhesive force between the suppression layers. Also, the surface wiring layer paste has solid-phase sintering of the metal particles, thereby reducing the unevenness of the adhesion portion with the shrinkage suppression layer and reducing the frictional force between the surface wiring layer paste and the shrinkage suppression layer. Therefore, the shrinkage suppression effect of the shrinkage suppression layer on the surface wiring layer paste is weakened. Therefore, the shrinkage in the XY direction of the via-hole conductor paste is larger than that of the green sheet in which the shrinkage in the XY direction is suppressed.

  For this reason, a via-hole conductor peels from the through-hole (through-hole) wall surface formed in the insulating layer after baking, and a clearance gap will arise between the through-hole (through-hole) and via-hole conductor in an insulating layer. Due to the gap, the airtightness of the multilayer circuit board is deteriorated, and there is a problem that the insulating property of the multilayer circuit board is deteriorated when moisture or the like enters.

  The present invention has been made in view of such circumstances, and a multilayer circuit for obtaining a multilayer circuit board with high dimensional accuracy in which a gap is not generated between a through-hole wall surface of an insulating layer and a via-hole conductor. An object is to provide a method for manufacturing a substrate.

  The present invention is a method of manufacturing a multilayer circuit board in which a surface wiring layer is formed on the surface of an insulating base composed of a plurality of insulating layers, and via-hole conductors connected to the surface wiring layer are formed inside the insulating base. Forming a plurality of green sheets to be a plurality of insulating layers after firing, forming a through hole in at least the green sheet disposed in the surface layer, and filling the through hole with a via-hole conductor paste; A step of depositing and forming a metal foil at a position covering the through hole on the upper surface of the green sheet disposed in the surface layer, the via hole conductor paste being filled in the through hole, and the metal foil being covered on the upper surface Laminating the plurality of green sheets so that the formed green sheets are arranged on the surface layer to form a green sheet laminate, and the green A step of removing the firing shrinkage suppression sheet after firing by superimposing firing shrinkage suppression sheets for suppressing firing shrinkage in a direction perpendicular to the stacking direction of the green sheet laminate on the upper and lower sides of the sheet laminate It is characterized by having.

  Moreover, it is preferable to further include a step of depositing and forming a surface wiring layer paste on the upper surface of the green sheet disposed on the surface layer so as to partially overlap the metal foil.

  According to the present invention, when manufacturing a multilayer circuit board using a firing shrinkage-suppressing sheet, a metal foil is deposited and formed at a position covering at least the through hole (through hole) on the upper surface of the green sheet disposed on the surface layer. Thus, shrinkage of the via-hole conductor paste in the XY direction can be suppressed. Thereby, it is possible to realize a highly airtight multilayer circuit board in which a gap is not generated between the through-hole (through-hole) wall surface of the insulating layer after firing and the via-hole conductor.

  In addition, a multilayer that suppresses a decrease in interfacial conductivity of the surface wiring layer by forming a paste for the surface wiring layer so as to partially overlap the metal foil on the upper surface of the green sheet disposed on the surface layer A circuit board can be obtained.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
FIG. 1 is a cross-sectional view showing a state in which a firing shrinkage suppression sheet is superimposed on the upper side and the lower side of a green sheet laminate in the manufacturing process of the multilayer circuit board of the present invention, and FIG. 2 shows the multilayer circuit board of the present invention. It is an expanded sectional view which shows the surface wiring layer of the green sheet laminated body upper surface in a manufacturing process.

  The present invention is a method of manufacturing a multilayer circuit board in which a surface wiring layer is formed on the surface of an insulating substrate composed of a plurality of insulating layers, and via-hole conductors connected to the surface wiring layer are formed inside the insulating substrate.

  First, a plurality of green sheets (1a, 1b, 1c, 1d, 1e) to be insulating layers after firing are formed. As raw materials for forming the green sheets (1a, 1b, 1c, 1d, 1e), it is preferable to use those prepared at a ratio of 30 to 80% by mass of glass powder and 20 to 70% by mass of ceramic powder. Can be used to form an insulating layer made of glass ceramic that can be fired at a low temperature.

The glass powder contains at least SiO ₂ and contains at least one of Al ₂ O ₃ , B ₂ O ₃ , ZnO, PbO, alkaline earth metal oxide, and alkali metal oxide. For example, borosilicate glass such as SiO ₂ —B ₂ O ₃ system, SiO ₂ —B ₂ O ₃ —Al ₂ O ₃ system—MO system (where M represents Ca, Sr, Mg, Ba or Zn) , Alkali silicate glass, Ba glass, Pb glass, Bi glass and the like. These glasses are amorphous glass after firing, or after firing, lithium silicate, quartz, cristobalite, enstatite, cordierite, mullite, anosite, serdian, spinel, garnite, willemite. Any one of dolomite, petalite, diopside, and substituted derivatives thereof may be used.

For obtaining a high multi-layer wiring board having the coefficient of thermal expansion as the glass powder, 25 to 45 wt% of Si in terms of SiO _2, 10 to 25 wt% of Al in terms _{of Al} 2 _{O 3,} the Mg in terms of MgO A crystalline glass composed of 10 to 24% by mass, B is 5 to 20% by mass in terms of B ₂ O ₃ , Zn is 5 to 20% by mass in terms of ZnO, and Ca is 0.5 to 4% by mass in terms of CaO. It is preferable to use it. Such a crystalline glass has a high thermal expansion coefficient because a crystal phase with a high thermal expansion coefficient such as garnite (ZnO.Al ₂ O ₃ ) or enstatite (MgO.SiO ₂ ) is precipitated after firing. Can be obtained relatively easily.

As the ceramic powder, SiO ₂ such as quartz and cristobalite, Al ₂ O ₃ , ZrO ₂ , cordierite, mullite, forsterite, enstatite, spinel, magnesia and the like are preferably used. Of these, it is preferable to use alumina from the viewpoint of increasing strength, reducing cost, and quartz from the viewpoint of increasing thermal expansion.

  A predetermined amount of the above-mentioned raw material powder is weighed, and a slurry is prepared by adding an organic binder, an organic solvent, and a plasticizer, if necessary. To form a green sheet having a thickness of 10 to 500 μm.

  Next, a through-hole is formed in the green sheet 1a arranged on at least the surface layer of the plurality of green sheets (1a, 1b, 1c, 1d, 1e). The through hole is formed with a diameter of about 60 to 200 μm by laser, micro drill, punching or the like.

  The through-hole is filled with a via-hole conductor paste 2 that becomes a via-hole conductor after firing.

As the metal powder used for the via-hole conductor paste 2, a powder made of Cu, Ag, Au or the like is preferable in terms of low resistance. Further, for the purpose of adjusting the sintering start temperature of the metal powder, a metal powder coated with an inorganic oxide such as alumina or silica may be used. Furthermore, in order to adjust the sintering behavior of the via-hole conductor, improve the adhesive strength with the glass ceramic, and reduce the difference in thermal expansion between the via-hole conductor and the glass ceramic, glass powder may be included. Examples include borosilicate glass, zinc borosilicate glass, and lead borosilicate glass. In particular, SiO ₂ —Al ₂ O ₃ —BaO—CaO— is superior in that it is excellent in co-firing with metal powder at 800 to 1100 ° C. and can improve the adhesive strength with an insulating substrate made of glass ceramics. B ₂ O ₃ glass is preferred. In addition to the metal powder and glass powder, the sintering behavior can be adjusted by adding filler components such as alumina and silica and organic components such as resin beads. Via powder conductor paste 2 is prepared by adding the above metal powder and, if necessary, glass powder, and further adding an organic binder, an organic solvent, and a dispersant as required. The viscosity of the via-hole conductor paste 2 is preferably 100 to 350 Pa · s in consideration of the filling property to the through holes.

  Examples of the filling method include screen printing, but are not particularly limited. The formation of the through holes and the filling of the via-hole conductor paste 2 are not limited to the green sheet 1a disposed on the surface layer.

  Subsequently, in order to form the surface wiring layer 3 of the multilayer wiring board, the metal foil 31 is deposited and formed at a position covering at least the through hole (through hole) on the upper surface of the green sheet 1a arranged in the surface layer. A surface wiring layer paste 32 containing the same metal component as the metal component of the via-hole conductor paste 2 is deposited so that the portion overlaps the metal foil 31. The position covering the through hole (through hole) refers to a region in a range up to twice the diameter of the through hole (through hole).

  Here, the metal foil 31 is preferably Cu, Ag, Au or the like in terms of low resistance, and it is desirable to use the metal foil 31 made of the same metal as that used for the via-hole conductor paste 2. In addition, when the metal component of the via-hole conductor paste 2 is made of a plurality of metals or alloys, a metal foil 31 made of one metal forming a plurality of metals or alloys may be used. It is optimal to use the metal foil 31 made of the most contained metal.

  As a method for forming the metal foil 31, there is known a method of forming a desired circuit by a known photo-etching method or the like after the metal foil 31 is bonded to the upper surface of the green sheet 1a. Therefore, it is preferable to form the green sheet by a transfer method. As a forming method by the transfer method, first, a metal foil 31 is bonded onto a transfer film made of a polymer material, and then a mirror image resist is applied to the surface of the metal foil 31 in a circuit pattern, and etching treatment and resist removal are performed. I do. Next, after the transfer film on which the mirror image wiring pattern is formed is laminated and pressure-bonded by aligning the wiring pattern at a position covering the through-hole filled with the via-hole conductor paste 2, the metal foil 31 is peeled off by peeling off the transfer film. Adhere.

  Further, the surface wiring layer paste 32 to be deposited so as to partially overlap the metal foil 31 may be formed by a raw material and a manufacturing method used for forming the via-hole conductor paste 2. From the viewpoint of low resistance, it is preferable to use a metal such as Cu, Ag, or Au, and it is preferable to use a surface wiring layer paste 32 containing the same metal component as that used in the via-hole conductor paste 2. However, if the particle size of the metal powder used for the surface wiring layer paste 32 is large, the space between the metal particles in the surface wiring layer paste 32 becomes large, which greatly affects the unevenness caused by the conductor after firing. Therefore, the particle size of the metal powder used for the surface wiring layer paste 32 is desirably small, and the average particle size is preferably 5 μm or less. The viscosity of the surface wiring layer paste 32 is 10 to 120 Pa · s, particularly 20 to 80 Pa · s, from the viewpoint of paste printability, paste leveling property, and thin paste application. Is preferred.

  A plurality of the green sheets thus obtained are laminated in a predetermined lamination order, and the green sheet laminate 1 in which the green sheets 1a having the metal foil 31 and the surface wiring layer paste 32 formed on the outermost layer are disposed. Form. For the lamination of green sheets, a method of applying heat and pressure to the stacked green sheets and thermocompression bonding, a method of applying an adhesive composed of organic binder, plasticizer, solvent, etc. between the sheets, and thermocompression bonding are adopted. Is possible.

  Further, as shown in FIG. 1, a firing shrinkage suppression sheet for suppressing firing shrinkage in a direction (XY direction) perpendicular to the stacking direction of the green sheet laminate on the upper and lower sides of the green sheet laminate 1. 5 are arranged and these are overlapped. Specifically, the green sheet laminate 1 and the firing shrinkage suppression sheet 5 are aligned by image recognition, and a rigid press method or an isostatic press method is applied.

  The firing shrinkage suppression sheet 5 is removed after firing the green sheet laminate 1, and examples thereof include a green sheet mainly composed of ceramic powder that does not sinter at the firing temperature of the green sheet laminate 1. . Specifically, alumina that is versatile and inexpensive is most suitable. Furthermore, in order to increase the affinity between the green sheet laminate 1 and the firing shrinkage suppression sheet 5 in the firing process of the multilayer circuit board, it contains the same glass powder as the glass powder contained in the green sheet in a range of 20% by mass or less. May be. Thereby, the shrinkage suppressing effect is further enhanced, and a multilayer circuit board with higher dimensional accuracy can be obtained. Using this firing shrinkage suppression sheet 5, the green sheet laminate 1 and the firing shrinkage suppression sheet 5 are fired at a firing temperature lower than the firing shrinkage start temperature of the firing shrinkage suppression sheet 5 and sintering the green sheet laminate 1. Thereby, the baking shrinkage to the XY direction of the green sheet laminated body 1 can be suppressed.

  In addition, as this baking shrinkage suppression sheet | seat 5, what does not shrink by baking (sintered body) can also be employ | adopted. “No firing shrinkage” means, for example, that it has already been sintered and no longer shrinks by firing. As this firing shrinkage suppression sheet 5, an alumina sintered body or a low-temperature sintering with a high degree of crystallinity of 99% or more and low residual glass. Examples thereof include a silicon nitride sintered body, a silicon nitride sintered body, carbon, and a tungsten sintered body having excellent thermal conductivity. By bonding this firing shrinkage suppression sheet 5 to the green sheet laminate 1 using a viscous member such as an acrylic resin having excellent thermal decomposability, firing shrinkage in the XY direction of the green sheet laminate 1 is suppressed. be able to.

  And it transfers to the baking process which bakes the green sheet laminated body 1 and the baking shrinkage | contraction suppression sheet | seat 5 which were piled up.

  Specifically, after performing a degreasing treatment for decomposing and eliminating organic components, the main baking is performed. In this main baking, the green sheet laminate 1 and the baking shrinkage suppression sheet 5 are mutually maintained by maintaining separately at an intermediate temperature from degreasing to main baking in addition to the change in the heating rate and the holding time at the main baking temperature. It is also possible to increase the binding force and reduce warpage and swell. The firing temperature at this time is the end temperature of firing shrinkage of the green sheet laminate 1 when the firing shrinkage suppression sheet 5 is a green sheet mainly composed of ceramic powder that is not sintered at the firing temperature of the green sheet laminate 1. It is above and it is preferable that it is less than the starting temperature of the baking shrinkage of the baking shrinkage suppression sheet 5. Further, even if the firing shrinkage suppression sheet 5 is a sintered body, there is no restriction as in the case of a green sheet, but it is not less than the end temperature of firing shrinkage of the green sheet laminate 1 and the firing shrinkage suppression sheet 5 It is preferable that the temperature be lower than the firing shrinkage start temperature.

  Here, the firing shrinkage start temperature is defined as the temperature at which the volume shrinks by 0.3% when the target material is fired alone. The term “firing shrinkage end temperature” as used herein refers to a temperature at which the shrinkage amount is 90% or more with respect to the shrinkage amount from the state before firing to the state after firing. The volume shrinkage is determined by TMA (thermomechanical analysis) by press-molding each independently. At this time, each contracts isotropically and is converted from volumetric shrinkage of TMA to volume shrinkage.

  Prior to firing, the green sheet laminate 1 may be heat-treated at 100 to 800 ° C., particularly 400 to 750 ° C. to decompose and remove internal organic components as desired. Further, simultaneous firing at 800 to 1000 ° C., particularly 850 to 950 ° C. is preferable in terms of sufficient sintering and prevention of oversintering. At this time, when Cu is used as the metal powder in the via-hole conductor paste, firing is preferably performed in a nitrogen atmosphere from the viewpoint of preventing oxidation of Cu.

  After the firing step is completed in this manner, the firing shrinkage suppression sheet 5 remaining on the upper and lower surfaces of the multilayer circuit board after firing is usually subjected to ultrasonic cleaning, polishing, water jet, chemical blasting, sand blasting, wet blasting, etc. A multilayer circuit board can be obtained by removing by a technique.

  Thus, according to the method for manufacturing a multilayer circuit board of the present invention, since the position covering the through hole in the surface wiring layer 3 is formed by the metal foil, the metal molecules in the via-hole conductor paste 2 and The metal molecules of the metal foil 31 are necked. Since the metal foil 31 is not baked and contracted, the metal molecules in the via hole conductor necked with the metal molecules of the metal foil 31 cannot move in the X-Y direction, and as a result, the via hole conductor does not move in the X-Y direction. Shrinkage is suppressed. As a result, there is no peeling between the wall surface of the through-hole (through hole) formed in the insulating layer after firing and the via-hole conductor, and a highly airtight multilayer circuit board can be obtained. In particular, it is preferable to use a metal foil 31 formed of one metal contained in the via-hole conductor paste 2 because the metal molecules in the via-hole conductor paste 2 and the metal molecules in the metal foil 31 are more easily necked.

  Further, the surface wiring layer of the multilayer circuit board obtained by the present invention is composed of the metal foil 31 and the surface wiring portion that is partly electrically connected to the metal foil 31, so that the interfacial conductivity of the entire surface wiring layer is The rate can be prevented from greatly decreasing.

  In the present embodiment, the surface wiring layer of the multilayer circuit board has been described as being composed of the metal foil 31 and the surface wiring portion that is partly electrically connected to the metal foil 31. If the interfacial conductivity of the wiring layer is not a problem, the surface wiring layer may be formed only from the metal foil 31.

  A separation evaluation board for evaluating the presence or absence of a gap between the through hole (through hole) wall surface and the via hole conductor and an interface conductivity evaluation board were produced as follows. The separation evaluation board has an insulating layer having a width of 30 mm × 30 mm and a thickness of 330 μm, and a total of 25 via-hole conductors with a diameter of 90 μm are arranged in the center of the board in 5 rows × 5 columns at intervals of 500 μm. Is a land having a diameter of 125 μm. The interfacial conductivity evaluation substrate is a laminate in which an insulating substrate having a width of 50 mm × 50 mm and a thickness of 200 μm is laminated and a wiring layer having a diameter of 40 mm is provided between the layers. A manufacturing method will be described below.

First, a green sheet serving as an insulating layer after firing was produced. SiO ₂ is 35.9 mass%, B ₂ O ₃ is 12 mass%, Al ₂ O ₃ is 6.6 mass%, MgO is 17.5 mass%, CaO is 2.5 mass%, ZnO is 14.4 mass%. A glass powder containing 5% by mass, a quartz powder, and a CaZrO ₃ powder were prepared. These were weighed 58.7% by mass of glass, 36.5% by mass of quartz powder, and 4.8% by mass of CaZrO ₂ powder. A glass ceramic composition was prepared by adding a binder. Using the slurry prepared by adding acrylic resin as organic binder, dioctyl phthalate as plasticizer, and toluene as solvent to the above raw material powder, it is molded by the doctor blade method to produce green sheets with 200mmSQ and thickness of 125μm and 300μm did.

  Here, a through hole having a diameter of 90 μm was provided in a green sheet having a thickness of 125 μm by punching.

Next, a via-hole conductor paste was prepared. 18% by mass of SiO ₂ —Al ₂ O ₃ —BaO—CaO—B ₂ O ₃ glass is added to 100% by mass of copper powder, acrylic resin is used as an organic binder, and terpineol and dibutyl phthalate are mixed as a solvent. A solution (80:20 by mass ratio) was added and kneaded to prepare a via-hole conductor paste. The prepared via-hole conductor paste was filled into the through-holes provided earlier by screen printing.

  Subsequently, a copper foil having a purity of 99.5% or more was adhered to the polymer film, and after etching, a wiring pattern was formed to prepare a transfer sheet. Two types of wiring patterns were prepared, one with a land pattern with a diameter of 125 μm and the other with a solid pattern with a diameter of 40 mm.

  Next, while aligning the green sheet, the transfer sheet was laminated and thermocompression bonded at 60 ° C. and 3 MPa. Subsequently, the transfer sheet was peeled off.

Subsequently, a paste for the surface wiring layer, which is another region in the surface wiring layer, was produced. 4% by mass of SiO ₂ —Al ₂ O ₃ —BaO—CaO—B ₂ O ₃ glass is added to 100% by mass of copper powder, acrylic resin is used as an organic binder, and terpineol and dibutyl phthalate are mixed as a solvent. A solution (80:20 by mass ratio) was added and kneaded to prepare a surface wiring layer paste. The obtained surface wiring layer paste was printed by a screen printing method. A pattern having a diameter of 125 μm was printed as a land pattern directly on the via-hole conductor. A solid pattern with a diameter of 40 mm was printed on a green sheet having a thickness of 300 μm.

  A green sheet laminate was produced using the green sheet thus obtained. In the separation evaluation substrate, four green sheets were prepared, an adhesive was uniformly applied between the green sheets, and pressure lamination was performed under conditions of 45 ° C. and 4 MPa. In addition, as the interfacial conductivity evaluation substrate, a green sheet having a solid pattern with a diameter of 40 mm and a green sheet without a pattern were prepared and laminated so that the pattern was sandwiched between the green sheets. The lamination conditions were the same as those for the separation evaluation substrate.

  Next, 3.8% by mass of the same glass component as the glass component in the green sheet was weighed into 96.2% by mass of alumina powder as a firing shrinkage suppression sheet, and an organic binder was added to prepare an inorganic material composition. . Thereafter, in the same manner as the green sheet, a firing shrinkage suppression sheet having a thickness of 200 mmSQ and a thickness of 250 μm was produced. Thereafter, the shrinkage suppression sheet was pressure laminated at 45 ° C. and 5 MPa on the upper and lower sides of the green sheet laminate to obtain a laminate.

Subsequently, these laminates are placed on an Al ₂ O ₃ base plate and subjected to heat treatment at 750 ° C. in a nitrogen atmosphere in order to decompose and remove organic components such as an organic binder, and then in a nitrogen atmosphere. And calcination at 900 ° C. for 1 hour.

The obtained separation evaluation substrate was immersed in a fluorescent penetrant flaw detection liquid, kept in a desiccator for 2 hours in a vacuumed state until reaching a pressure of 1 × 10 ⁻² Pa, and then washed with tap water. The via-hole conductor portion was polished by about 50 μm from the substrate surface in the substrate stacking direction, and the presence / absence of penetration of the fluorescent penetrating flaw detection liquid into the through-hole (presence / absence of light emission) was evaluated. Evaluation is made by observing the polished substrate with a fluorescence microscope, and in the 25 via-hole conductors, a sample with a through hole in which one or more fluorescent portions are recognized (present in the table) is a defective product, and zero sample (not in the table) Was a good product.

The interface conductivity was measured under the condition of a measurement frequency of 10 GHz using the method disclosed in Japanese Patent Application Laid-Open No. 2000-46756. Specifically, it was performed by a cylindrical resonator method using a network analyzer. Here, a non-defective product having an interface conductivity of 50% or more was determined. The interface conductivity is standardized by copper conductivity 5.8 × 10 ⁷ / Ω · m.

  Sample No. 2 formed with copper foil in both the position (land) covering the through hole (via hole conductor) in the surface wiring layer and the other regions in the surface wiring layer. No. 4 showed no light emission from the fluorescent flaw detection solution, could suppress the shrinkage of the via-hole conductor in the XY direction, and confirmed that no separation occurred between the through-hole wall surface and the via-hole conductor.

  Then, a sample No. using a copper foil at a position (land) covering the through-hole (via-hole conductor) in the surface wiring layer and a conductor paste in other regions in the surface wiring layer. No. 3 showed no light emission from the fluorescent flaw detection liquid, no separation was generated, and it was confirmed that the interface conductivity was as high as 86%.

  On the other hand, both the position (land) covering the through-hole (via-hole conductor) in the surface wiring layer and the other regions in the surface wiring layer were sample No. In No. 1, the interface conductivity was as high as 85%, but light emission from the fluorescent flaw detection liquid was observed. This is due to the occurrence of separation between the wall surface of the through-hole and the via-hole conductor because the via-hole conductor does not have a shrinkage suppressing effect.

  Further, a sample No. 1 in which the position (land) covering the through hole (via hole conductor) in the surface wiring layer was formed with a conductor paste, and the other region in the surface wiring layer was formed with a copper foil. In No. 2, light emission from the fluorescent flaw detection liquid was observed, separation occurred, and it was confirmed that the interface conductivity was as low as 44% by roughening the copper foil.

It is sectional drawing which shows the state which accumulated the baking shrinkage | contraction suppression sheet | seat on the upper side and lower side of the green sheet laminated body in the manufacturing process of the multilayer circuit board of this invention. It is an expanded sectional view which shows the surface wiring layer of the green sheet laminated body upper surface in the manufacturing process of the multilayer circuit board of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Green sheet laminated body 1a-1e ... Green sheet 2 ... Via-hole conductor paste 3 ... Surface wiring layer 31 ... Metal foil 32 ... Surface wiring layer paste 4 ... Internal wiring layer 5 ... Firing shrinkage suppression sheet

Claims (2)

A surface wiring layer is formed on the surface of an insulating substrate composed of a plurality of insulating layers, and a manufacturing method of a multilayer circuit board in which a via-hole conductor connected to the surface wiring layer is formed inside the insulating substrate,
Forming a plurality of green sheets to be a plurality of insulating layers after firing;
Forming a through hole in at least the green sheet disposed in the surface layer, and filling the through hole with a via-hole conductor paste;
A step of depositing and forming a metal foil at a position covering the through hole on the upper surface of the green sheet disposed at least on the surface layer;
The green sheet laminate is formed by laminating the plurality of green sheets so that the green sheet having the via hole filled with the via hole conductor paste and the metal foil deposited on the upper surface is disposed on a surface layer. Forming a step;
A firing shrinkage suppression sheet for suppressing firing shrinkage in a direction perpendicular to the stacking direction of the green sheet laminate is superimposed and fired on the upper and lower sides of the green sheet laminate, and then the firing shrinkage suppression sheet is removed. A process for producing a multilayer circuit board. 2. The multilayer circuit board according to claim 1, further comprising a step of depositing a surface wiring layer paste on an upper surface of the green sheet disposed on a surface layer so as to partially overlap the metal foil. Production method.

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