JP2008172150A - Semiconductor device, semiconductor device manufacturing method, liquid crystal display, and polycrystalline silicon film - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device which has a film transistor of an excellent electrical characteristic and controls a variation of electrical characteristics among film transistors having a channel zone of the same area, a semiconductor device manufacturing method, a liquid crystal display, and a polycrystalline silicon film. <P>SOLUTION: The semiconductor device has a film transistor in whose channel zone a polycrystalline silicon film is used and where the number of silicon crystal grains included in the channel zone is 2-99. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor device, a semiconductor device manufacturing method, a liquid crystal display device, and a polycrystalline silicon film.

  In recent years, a technique for crystallizing an amorphous semiconductor film formed over an insulating substrate such as glass and forming a semiconductor film having the crystal structure (hereinafter referred to as a crystalline semiconductor film) has been widely studied. As a semiconductor film crystallization method, a thermal annealing method using a furnace annealing furnace, a rapid thermal annealing method (RTA method), a laser annealing method, or the like has been studied. In crystallization, any one or a combination of these methods can be used.

  A crystalline semiconductor film has very high mobility compared to an amorphous semiconductor film. For this reason, a thin film transistor (TFT) is formed using this crystalline semiconductor film. For example, an active matrix type in which a TFT for a pixel portion or a pixel portion and a drive circuit are formed on a single glass substrate. Are used in liquid crystal display devices.

  Usually, in order to crystallize an amorphous semiconductor film in a furnace annealing furnace, a heat treatment at 600 ° C. or more for 10 hours or more is required. The substrate material applicable to this crystallization is quartz, but the quartz substrate is expensive and particularly difficult to process into a large area. However, in order to increase production efficiency, it is indispensable to increase the area of the substrate. In recent years, use of a substrate having a side exceeding 1 m has been considered.

  On the other hand, the thermal crystallization method using a catalytic element that promotes crystallization of amorphous silicon disclosed in Patent Document 1 lowers the crystallization temperature, which has been regarded as a problem, and shortens the processing time. It is possible to do. In this method, a crystalline semiconductor film can be formed by adding a trace amount of an element such as nickel, palladium, or lead to an amorphous semiconductor film, and then performing a heat treatment at 600 ° C. for 1 hour.

  In addition, the laser annealing method can give high energy only to the semiconductor film without increasing the temperature of the substrate so much, so that it can be used not only for a glass substrate with a low strain point but also for a plastic substrate. This is a technology that is attracting attention.

  An example of the laser annealing method is a method in which a pulsed laser beam typified by an excimer laser is shaped by an optical system so that a square spot of several centimeters square or a linear shape with a length of 100 mm or more is formed on the irradiated surface. Is moved (or the irradiation position of the laser beam is moved relative to the irradiated object) to perform annealing. Here, “linear” does not mean “line” in a strict sense, but means a rectangle (or oval) having a large aspect ratio. For example, the aspect ratio is 2 or more (preferably 10 to 10,000), but it is still included in the laser light (rectangular beam) having a rectangular shape on the irradiation surface. Note that the linear shape is used to ensure sufficient energy density for annealing the irradiated object, and sufficient annealing can be performed on the irradiated object even in a rectangular or planar shape. If it is.

  A method of performing laser annealing in order to improve the crystallinity of the crystallized film after combining these and thermally crystallizing using a catalytic element that promotes crystallization of amorphous silicon is also disclosed in, for example, Patent Document 2 Has been.

Further, Patent Document 3 devises a method of changing the crystal grain size of the polycrystalline silicon film of the channel layer of the thin film transistor in the display portion and the channel layer of the thin film transistor for the driver circuit for driving.
JP-A-7-183540 JP 2000-216089 A Japanese Patent Laid-Open No. 5-190853

  For example, in the method disclosed in Patent Document 2 and the like, there are solid phase crystal grains thermally crystallized using the catalytic element up to a diameter of several μm to over 100 μm, and this large crystal grain is further subjected to laser annealing. This improves the crystallinity. A thin film transistor (TFT) using a crystalline silicon film manufactured by this method as an active layer may have good TFT characteristics.

  However, in the method of performing laser annealing to improve the crystallinity of the crystallized film after thermal crystallization using a catalytic element that promotes crystallization of the amorphous silicon, thermal crystallization using the catalytic element is performed. Although it is possible to manufacture the solid phase crystal grains having a diameter of several μm to more than 100 μm, the entire surface of the substrate becomes crystal grains having a substantially uniform size. For example, in the case of an active matrix type display device using liquid crystal or the like as a display medium, it is necessary to build field effect thin film transistors having channel regions of various sizes, and various sizes of crystal grains of uniform size. The field effect thin film transistor cannot satisfy the required electrical characteristics. Because, for example, when the crystal grain size is slightly larger than the channel region, there are one and a plurality of crystal grains existing in the channel region, that is, a crystal grain boundary is included in the channel region. Since some of them are not included, there is a problem that variation in electric characteristics such as mobility becomes large even in a field effect thin film transistor having a channel region of the same area. In such a case, the mobility is reduced by reducing the crystal grain size to some extent compared to the channel region so that a plurality of crystal grains exist in the channel region of all field effect thin film transistors, but the same area is obtained. It is possible to suppress variation in electrical characteristics between field effect thin film transistors having different channel regions.

  On the other hand, when the crystal grain size is too small compared to the channel region, the mobility is lowered or the ON current is insufficient, which is not desirable.

  The present invention has been made in view of such various points, and an object of the present invention is to suppress variation in electrical characteristics between thin film transistors having thin film transistors with good electrical characteristics and having channel regions of the same area. A semiconductor device, a method for manufacturing the semiconductor device, and a liquid crystal display device are provided.

  A semiconductor device according to the present invention includes a thin film transistor in which a polycrystalline silicon film is used for a channel region and the number of silicon crystal grains included in the channel region is 2 to 99.

  According to such a configuration, since the field-effect thin film transistor includes 2 to 99 (about several to several tens) crystal grains in the channel region, electric characteristics such as mobility are good, In addition, variation in characteristics between field effect thin film transistors having channel regions of the same area can be suppressed. According to the present inventor, when a polycrystalline silicon film is used as a channel region of a thin film transistor, the size of the crystal grain is changed in accordance with the size of the channel region of the thin film transistor, so that 2 to 99 (about several to several tens). It was verified that the above-described effect was achieved by including about 1) crystal grains.

  A liquid crystal display device according to the present invention is characterized in that a polycrystalline silicon film is used in a channel region, and a thin film transistor having 2 to 99 silicon crystal grains included in the channel region is provided in the liquid crystal display element. To do.

  According to such a configuration, a liquid crystal display device including the semiconductor device having the above-described effects can be obtained.

  A method of manufacturing a semiconductor device according to the present invention includes a film forming step of forming an amorphous silicon film on an insulating substrate, and a predetermined region of the amorphous silicon film formed on the insulating substrate is doped with hydrogen. A hydrogen doping step; a catalytic element doping step for doping the amorphous silicon film with a catalytic element that promotes crystallization of amorphous silicon; and a first crystal that heat-treats the amorphous silicon film doped with the catalytic element. And a second crystallization step of irradiating the amorphous silicon film subjected to the heat treatment with laser light.

  According to such a configuration, electrical characteristics such as mobility of the thin film transistor can be improved, and variation in characteristics between the field effect thin film transistors having the same channel area can be suppressed.

In the method for manufacturing a semiconductor device according to the present invention, even if the hydrogen concentration of the amorphous silicon film formed in the film forming step is 1.0 × 10 ^{20 to} 5.0 × 10 ²¹ atoms / cm ^3. Good.

  According to such a configuration, when the hydrogen concentration of the amorphous silicon film is in the above range, the generation is performed when thermal crystallization is performed using a catalyst element that promotes crystallization of amorphous silicon at the same concentration. The crystal grain size to be minimized is the smallest.

  Furthermore, in the method for manufacturing a semiconductor device according to the present invention, the amorphous silicon film may be formed in the film forming step by a plasma CVD method using a mixed gas of monosilane gas and argon gas.

  According to such a configuration, it is possible to easily form an amorphous silicon film having a uniform film thickness and in the hydrogen concentration range on a large-area insulating substrate.

  Further, in the method of manufacturing a semiconductor device according to the present invention, the patterning of the photoresist on the amorphous silicon film is performed between the film formation step and the hydrogen doping step to define a predetermined region to be doped with hydrogen. A step may be further provided.

  According to such a configuration, a desired region in the amorphous silicon film can be efficiently doped with hydrogen.

Furthermore, in the method for manufacturing a semiconductor device according to the present invention, the hydrogen concentration in a predetermined region of the amorphous silicon film doped with hydrogen in the hydrogen doping step is 1.0 × 10 ^{22 to} 2.5 × 10 ²² atoms / cm. ³ may be sufficient.

According to such a configuration, the crystal grain size generated when the thermal crystallization is performed using the catalytic element that promotes the crystallization of the amorphous silicon film having the same concentration has a hydrogen concentration of 1.0 × 10 ^20. It increases several times to several tens of times when an amorphous silicon film of up to 5.0 × 10 ²¹ atoms / cm ³ is thermally crystallized.

  In the method for manufacturing a semiconductor device according to the present invention, hydrogen doping in the hydrogen doping step may be performed by implanting hydrogen ions into the amorphous silicon film.

  According to such a configuration, hydrogen can be easily doped into a specific region of the large-area substrate.

  Furthermore, in the method for manufacturing a semiconductor device according to the present invention, the doping of hydrogen in the hydrogen doping step may be performed by exposing the amorphous silicon film to a hydrogen plasma atmosphere.

  According to such a configuration, hydrogen can be easily doped into a specific region of the large-area substrate.

  In the method for manufacturing a semiconductor device according to the present invention, the predetermined region doped with hydrogen in the hydrogen doping step may include at least a part of a channel region of the thin film transistor.

  Furthermore, in the method for manufacturing a semiconductor device according to the present invention, the catalyst doped in the catalytic element doping step is at least one of iron, cobalt, nickel, germanium, ruthenium, rhodium, palladium, osnium, iridium, platinum, copper, and gold. One kind of element may be included.

  According to such a configuration, crystallization of the amorphous silicon film can be favorably promoted.

Further, in the method for manufacturing a semiconductor device according to the present invention, the concentration of the catalytic element on the surface of the amorphous silicon film doped with the catalytic element in the catalytic element doping step is 1.0 × 10 ^{10 to} 1.0 × 10 ¹² atoms / cm ² may also be used.

When the concentration of the catalytic element for promoting crystallization of the amorphous silicon film on the film surface is less than 1.0 × 10 ¹⁰ atoms / cm ² , the effect of the catalytic element is small and the time required for crystallization is long. Thus, problems in manufacturing such as inferior manufacturing efficiency occur. Further, when the concentration on the film surface is higher than 1.0 × 10 ¹² atoms / cm ² , the catalytic element remains in a high concentration in the crystallized silicon film, and the TFT characteristics are deteriorated. Therefore, the catalytic element concentration in the amorphous silicon film surface as in the present invention, if ^{1.0 × 10 10 ~1.0 × 10 12} atoms / cm 2, it is possible to suppress these problems .

For example, nickel of 1.0 × 10 ¹¹ atoms / cm ² is added to the surface of the amorphous silicon film having the hydrogen concentration of 1 × 10 ^{20 to} 5.0 × 10 ²¹ atoms / cm ³ , When thermal crystallization is performed for 1 hour, there are many crystal grains having a crystal grain size of about 1 μm.

On the other hand, hydrogen is doped by implanting ions containing hydrogen or exposing the substrate to a hydrogen plasma atmosphere, and the hydrogen concentration is 1 × 10 ^{22 to} 2.5 × 10 ²² atoms / cm ³ . When nickel of 1.0 × 10 ¹¹ atoms / cm ² is added to the amorphous silicon film surface and thermal crystallization is performed at 600 ° C. for 1 hour, there are many crystal grains having a crystal grain size of about 10 μm. .

  This is thought to be due to the fact that the generation of crystal nuclei, which is the first stage when silicon is grown in solid phase crystals, is inhibited by hydrogen.

  Furthermore, in the method for manufacturing a semiconductor device according to the present invention, the heat treatment of the amorphous silicon film in the first crystallization step may be performed in a temperature range of 500 to 800 ° C.

  When the heat treatment of the amorphous silicon film is performed at a temperature lower than 500 ° C., there are problems in manufacturing such as a slow growth rate of solid-phase crystals and poor manufacturing efficiency. In addition, when the heat treatment is performed at a temperature higher than 800 ° C., a crystal grain having a small particle size of 0.2 μm or less, for example, which does not originate from a catalytic element that promotes crystallization of the amorphous silicon film grows, and TFT characteristics are improved. Getting worse. For this reason, these problems can be suppressed by performing the heat treatment of the amorphous silicon film in the temperature range of 500 to 800 ° C. as in the present invention.

  In the semiconductor device manufacturing method according to the present invention, the wavelength of the laser light irradiated in the second crystallization step may be 126 to 370 nm.

  Furthermore, in the method for manufacturing a semiconductor device according to the present invention, the laser beam irradiated in the second crystallization step may be a pulsed excimer laser beam.

  In addition, the method for manufacturing a semiconductor device according to the present invention uses a linear laser beam that linearly irradiates the surface of the amorphous silicon film as the laser light irradiated in the second crystallization step, and uses the linear laser beam as the laser beam. Irradiation may be performed by step scanning in the minor axis direction.

  According to such a configuration, since the linear laser beam is irradiated by step scanning in the minor axis direction, a large-area silicon film can be processed efficiently and simply.

  Furthermore, in the method for manufacturing a semiconductor device according to the present invention, the energy for partially melting the crystal structure obtained by heat-treating the amorphous silicon film doped with the catalytic element with the laser light in the second crystallization step. You may irradiate with density.

  According to such a configuration, in order to irradiate the laser beam in the second crystallization step with an energy density that partially melts the crystal structure obtained by heating the amorphous silicon film doped with the catalytic element. As a result, a crystallized silicon film having sufficient crystallinity over the entire surface can be obtained. If the laser beam is irradiated with an energy density that completely melts the crystal obtained in the first crystallization step, the TFT characteristics may be deteriorated.

The polycrystalline silicon film according to the present invention is characterized in that the number of silicon crystal grains contained is 1 × 10 ⁴ to 1 × 10 ⁸ [pieces / mm ² ].

  According to such a configuration, by using the polycrystalline silicon film for a channel region of a field effect thin film transistor, electrical characteristics such as mobility are good, and characteristics between field effect thin film transistors having a channel region of the same area are obtained. Variations can be suppressed.

  According to the present invention, there are provided a semiconductor device, a semiconductor device manufacturing method, and a liquid crystal display device, which have thin film transistors with good electrical characteristics and suppress variation in electrical characteristics between thin film transistors having channel regions of the same area. be able to.

  Hereinafter, a semiconductor device and a liquid crystal display device including the same according to embodiments of the present invention will be described in detail with reference to the drawings. Further, an example of an array substrate provided with a thin film transistor (TFT) used in a liquid crystal display device will be described as a semiconductor device. The present invention is not limited to the following embodiment.

(Embodiment)
(Thin Film Transistor Manufacturing Method)
Below, the manufacturing method of the thin-film transistor (TFT) provided with the crystalline semiconductor film by this invention is demonstrated using figures.

  In this embodiment, a case where a thin film transistor 50 having a channel region size of 2 μm × 2 μm and a thin film transistor 60 having a size of 30 μm × 30 μm are formed over the same substrate will be described.

(Film formation process)
First, as shown in FIG. 1, a silicon oxide film 11 having a thickness of about 100 nm made of, for example, tetraethyl orthosilicate (TEOS) or the like is formed on a glass substrate (insulating substrate) 10.

Next, the RF plasma chemical vapor deposition (plasma CVD) method using a mixed gas of SiH ₄ (monosilane) gas and Ar (argon) gas has a thickness of, for example, 50 nm on the silicon oxide film 11 and hydrogen in the film. An amorphous silicon film 12 having a concentration of, for example, 1.0 × 10 ^{20 to} 5.0 × 10 ²¹ atoms / cm ³ is formed.

(Patterning process)
Next, after applying a photoresist to the entire surface of the amorphous silicon film 12 deposited on the glass substrate 10, as shown in FIGS. 2 and 3, the channel of the thin film transistor 60 having a channel region of 30 μm × 30 μm is obtained. Development is performed so that the opening 14 is provided only in the region including the region 13, and patterning is performed. The opening 14 is formed at a position to be a target region for hydrogen doping described later. The thickness of the photoresist layer 15 is, for example, 2.0 μm.

(Hydrogen doping process)
Next, hydrogen ions are implanted from the surface of the photoresist layer 15 at an acceleration voltage of 10 keV. The ion doping apparatus used is not only monoatomic hydrogen ions, because ions are extracted from a hydrogen plasma generated by an ion source using a tungsten filament, accelerated, and then injected into the glass substrate 10 without mass separation. Cluster ions in which multiple hydrogen atoms are bonded are also implanted. Therefore, it is possible to dope the amorphous silicon film 12 with hydrogen from the opening 14 of the photoresist layer efficiently in a short time. The hydrogen doping is preferably performed so that, for example, the hydrogen concentration in a predetermined region of the amorphous silicon film 12 is 1.0 × 10 ^{22 to} 2.5 × 10 ²² atoms / cm ³ .

(Catalyst element doping process)
Next, after the photoresist layer 15 is stripped by a normal photoresist stripping step, as shown in FIG. 4, a catalytic element 17 is added to the entire surface of the amorphous silicon film 16 having partially different hydrogen concentrations. The catalyst element 17 is an element that promotes crystallization of the amorphous silicon film in the heat treatment described later, and is, for example, Ni. Ni is diffused after being deposited on the amorphous silicon film 16 by, for example, resistance heating. In FIG. 4, the catalytic element 17 is shown in a film shape, but actually, the catalytic element 17 is dispersed in the vicinity of the surface of the amorphous silicon film 16.

(First crystallization step)
Next, the amorphous silicon film 16 is heated to crystallize the amorphous silicon film 16 to obtain the crystalline silicon film (polycrystalline silicon film 18) shown in FIG. The amorphous silicon film 16 is crystallized by solid phase crystallization (SPC) by heat treatment. Hereinafter, such crystallization by heat treatment is referred to as first crystallization.

  As described above, since the catalytic element 17 is added to the amorphous silicon film 16, it is easily crystallized when the amorphous silicon film 16 is heated at 600 ° C. for 1 hour in an electric furnace in a nitrogen atmosphere. .

  Next, the natural oxide film formed on the surface of the polycrystalline silicon film 18 during crystallization is removed. The removal of the oxide film is performed, for example, by wet etching in which a 1% hydrofluoric acid solution is immersed in the surface of the polycrystalline silicon film 18 for 90 seconds and spin-dried. Such wet etching is simple and excellent in mass productivity. The substrate from which the oxide film has been removed is dried and immediately introduced into the chamber. The chamber is provided with a laser beam irradiation mechanism. The chamber is filled with, for example, an oxygen concentration of 20% and a nitrogen concentration of 80%, and the atmospheric pressure is 1 atm.

(Second crystallization step)
Next, the polycrystalline silicon film 18 is irradiated with a laser beam 19 (pulse oscillation excimer laser beam). Hereinafter, this crystallization by the laser beam is referred to as second crystallization. FIG. 6 is a view showing a state in which the laser beam 19 is relatively scanned with respect to the polycrystalline silicon film 18. The laser beam 19 is irradiated with an energy density that partially melts the polycrystalline silicon film 18. When the laser beam 19 partially melts the polycrystalline silicon film 18, the crystal grows as a seed crystal, which has not been melted, and as a result, a crystal grain having a large grain size can be obtained. As the laser beam 19, for example, an XeCl laser beam having an energy density of 340 mJ / cm ² , a pulse width of 30 ns, and a wavelength of 308 nm is used.

  As shown in FIG. 6, the laser beam 19 is formed in a linear shape having a length of 100 mm or more so that the energy distribution is uniform on the surface of the polycrystalline silicon film 18. The polycrystalline silicon film 20 having sufficient crystallinity over almost the entire surface can be obtained by scanning the laser beam 19 that scans from the lower side to the upper side in the step of 20 μm / pulse. The term “linear” here does not mean “line” in a strict sense, but means a rectangle or an ellipse with a large aspect ratio. The linear laser beam includes, for example, a laser beam (rectangular beam) having an aspect ratio of 2 or more, more preferably 10 to 10,000, and a rectangular shape on the irradiation surface. For example, the laser beam 19 is formed into a linear shape of 125 mm × 0.4 mm. The reason why the laser beam 19 is formed into a linear shape is to secure an energy density for performing sufficient annealing on the irradiated object, so that sufficient annealing can be performed on the irradiated object. If there is, the irradiation surface of the laser beam 19 may be a rectangular shape other than a linear shape, or may be a square of several cm square.

The polycrystalline silicon film 20 produced in this way has a silicon crystal grain number of 1 × 10 ⁴ to 1 × 10 ⁸ [pieces / mm ² ].

  In this embodiment, hydrogen is doped into the amorphous silicon film 12 in the opening 14 region of the photoresist layer 15 by ion implantation. However, the method of doping hydrogen is not limited to this. For example, the amorphous silicon film in the opening 14 of the photoresist layer 15 can also be obtained by introducing hydrogen gas into the chamber, generating hydrogen plasma by RF, and exposing the same substrate as in FIG. It is possible to dope 12 with hydrogen.

In this embodiment, Ni is used as the catalyst element, and the surface concentration of the catalyst element in the amorphous silicon film is 1 × 10 ¹¹ atoms / cm ² , but the present invention is not limited to this. The catalytic element may contain at least one element selected from the group consisting of iron, cobalt, nickel, germanium, ruthenium, rhodium, palladium, osnium, iridium, platinum, copper, and gold, for example. The surface concentration of the catalytic element in the amorphous silicon film is preferably 1 × 10 ¹⁰ to 1 × 10 ¹² atoms / cm ² . When the surface concentration is less than 1 × 10 ¹⁰ atoms / cm ² , the effect of the catalytic element is small, and the time required for crystallization becomes long, which is not preferable in the manufacturing process. On the other hand, when the surface concentration is higher than 1 × 10 ¹² atoms / cm ² , the catalytic element remains in a high concentration in the crystallized silicon film, and the TFT characteristics deteriorate.

  Furthermore, in this embodiment, the temperature of the heat treatment was 600 ° C., but the present invention is not limited to this. For example, the temperature of the heat treatment is preferably 500 to 800 ° C. When the temperature of the heat treatment is less than 500 ° C., the solid phase crystal growth rate is slow, which is not preferable in the production process. On the other hand, when the temperature of the heat treatment is higher than 800 ° C., in addition to the formation of crystal grains having a diameter of, for example, several μm or more due to the catalytic element, the particle diameter is small without causing the catalytic element (for example, , 0.2 μm or less) crystal grains are formed. For this reason, high carrier mobility cannot be obtained.

  Moreover, in this embodiment, although heating time was 1 hour, this invention is not limited to this. The heating time varies depending on the deformation amount of the glass substrate, the amount of impurity diffusion from the glass substrate, the heating temperature, and the like, but may be, for example, 15 minutes to 24 hours.

  Furthermore, in this embodiment, the wavelength of the laser beam 19 is 308 nm, but the present invention is not limited to this, and may be in the range of 126 to 370 nm, for example.

  In this embodiment, the XeCl laser beam is used as an example of the laser beam 19 (pulsed excimer laser beam). However, the present invention is not limited to this, and other pulsed excimer laser beams such as KrF and XeF are used. ArCl or KrCl laser beam may be used.

Furthermore, in the present embodiment, the energy density of the laser beam 19 for partially melting the polycrystalline silicon film 18 is exemplified as 340 mJ / cm ² , but the present invention is not limited to this. However, according to the research result of the present inventor, when the energy density of the laser beam is 370 mJ / cm ² or more, the energy density is too high, and the polycrystalline silicon film 18 is completely melted to form a region that becomes a microcrystal. appear. Also, the energy density of the laser beam is less than 320 mJ / cm ^2, from the results of X-ray diffraction analysis, the crystallinity as compared with the case where the energy density of the laser beam is 320 mJ / cm ² or more is reduced I understand. Therefore, as shown in this embodiment, when the energy density is 340 mJ / cm ² , the polycrystalline silicon film 18 can be partially melted, and the polycrystalline silicon film 18 having sufficient crystallinity on almost the entire surface. Can be obtained.

  In addition, when laser annealing is used in the second crystallization, a large-area silicon film can be efficiently and simply formed by step scanning a pulsed excimer laser beam linearly formed on the surface of the silicon film in the short axis direction. Can be processed.

  A field effect thin film transistor using a polycrystalline silicon film manufactured according to the above-described manufacturing method as an active layer has high carrier mobility, and variation in electrical characteristics is suppressed for each channel region size.

  In the manufacturing method disclosed in Patent Document 3, the polycrystalline silicon film having a different crystal grain size is not on the same plane, and the polycrystalline silicon film of the channel layer of the thin film transistor in the display portion is amorphous silicon. It is clearly different from the present invention in that it is a silicon film crystallized at the time of film formation, rather than crystallizing after film formation.

(Manufacturing process of thin film transistors 50 and 60)
Next, a manufacturing process of an n-channel field effect thin film transistor (hereinafter referred to as “n-channel TFT”) 30 using the above-described polycrystalline silicon film 20 as an active layer will be described with reference to FIG. Here, although the size of the channel region is different, the subsequent steps are the same as those of the thin film transistors 50 and 60 except that the crystal grain size of the region including the channel region 13 of the thin film transistor 60 doped with hydrogen from the opening 14 is large. It is the same.

  First, as shown in FIG. 7, the polycrystalline silicon film 20 formed on the glass substrate 10 and the silicon oxide film 11 corresponds to the channel regions 13 and 31, the source regions 32 and 33, and the drain regions 34 and 35, respectively. Pattern to shape. As shown in FIG. 8, a gate insulating film made of an oxide film having a thickness of about 100 nm is formed by an atmospheric pressure chemical vapor deposition (APCVD) method so as to cover the patterned polycrystalline silicon film 20. 40 is formed.

  Next, as shown in FIG. 9, an aluminum film 41 having a thickness of about 300 nm is formed on the gate insulating film 40 as a conductive film, and the aluminum film 41 is patterned into a predetermined shape as shown in FIG. The electrode 43 is formed. Using this gate electrode 43 as a mask, phosphorus ions are implanted into the regions to be the source regions 32 and 33 and the drain regions 34 and 35, and the source regions 32 and 33 and the drains are formed on both sides of the channel regions 31 and 13 immediately below the gate electrode 43. Regions 34 and 35 are formed.

  After that, as shown in FIG. 11, an interlayer insulating film 46 is formed by depositing an oxide film having a thickness of 500 nm on the entire surface of the glass substrate 10 so as to cover the gate electrode 43 by the APCVD method. Next, as shown in FIG. 12, contact hole portions are formed in the gate insulating film 40 and the interlayer insulating film 46 on the source regions 32 and 33 and the drain regions 34 and 35, and the electrode material is contacted by sputtering. It is deposited on the hole portion, and an ohmic contact is realized between the electrode material and the source regions 32 and 33 and the drain regions 34 and 35 through the contact hole portion. The extraction electrode 47 is formed by patterning this electrode material into a predetermined shape.

  As described above, n-channel thin film transistors 50 and 60 including 2 to 99 (about several to several tens) crystal grains in the channel region are completed. In addition, a liquid crystal display device is manufactured using the n-channel thin film transistors 50 and 60 as switching elements (liquid crystal display elements) of an active matrix substrate.

  In this embodiment, the n-channel TFT 30 has been described as an example of the TFT. However, the present invention is not limited to this. For example, a p-channel TFT may be manufactured using a polycrystalline silicon film. Further, a semiconductor device using an n- or p-channel TFT as a switching element may be further manufactured.

(Configuration of liquid crystal display device 90 including thin film transistors 50 and 60)
Next, the configuration of the liquid crystal display device 90 including the thin film transistors 50 and 60 manufactured by the above-described manufacturing method will be described.

  The liquid crystal display device is an active matrix type in which the thin film transistor 50 or 60 manufactured by the manufacturing method of this embodiment is used as a switching element for driving a pixel electrode.

  The liquid crystal display device 90 includes an array substrate 91 having a plurality of thin film transistors 50 or 60 (switching elements) arranged in a matrix, and a color filter as a counter substrate that has a color layer and is bonded to the array substrate 91. A substrate (not shown) is provided, and a liquid crystal layer and a spacer (both not shown) are arranged between the array substrate 91 and the color filter substrate. A backlight (not shown) is disposed on the back surface of the array substrate 91.

  As shown in FIG. 12, the thin film transistors 50 and 60 of the liquid crystal display device 90 according to the present embodiment constitute an n-channel field effect thin film transistor (n-channel TFT) using the polycrystalline silicon film 20 as an active layer. Each channel region contains 2 to 99 (about several to several tens) crystal grains.

  As shown in FIG. 13, the array substrate 91 includes a plurality of source lines 92 (signal lines) extending in the vertical direction (vertical direction in FIG. 13) and a plurality of gates extending in the horizontal direction (horizontal direction in FIG. 13). A thin film transistor 50 or 60 having a source electrode 94, a drain electrode 95, and a gate electrode 96 in the vicinity of each intersection, and the thin film transistor 50 or 60. A pixel electrode 97 electrically connected to the drain electrode 95 is disposed. The drain electrode 95 extends from the position of the thin film transistor 50 or 60 to a substantially central position of the pixel region, and an end portion of the drain electrode 95 is a substantially rectangular auxiliary capacitance electrode.

(Example)
The carrier mobility of the n-channel TFT manufactured by the manufacturing method according to the above-described embodiment was measured. At this time, the hydrogen concentration in the amorphous silicon film produced in the film formation step was 3 × 10 ²¹ atoms / cm ³ . The hydrogen concentration in the amorphous silicon film produced by the hydrogen doping process was 2 × 10 ²² atoms / cm ³ . Furthermore, the concentration (surface concentration) of the catalytic element on the surface of the amorphous silicon film produced in the catalytic element doping step was 1 × 10 ¹¹ atoms / cm ² .

The carriers of the n-channel TFT manufactured as described above showed high carrier mobility (300 cm ² / V · s) in both of the thin film transistor 50 and the thin film transistor 60 having greatly different channel region sizes.

  In addition, when 100 thin film transistors having exactly the same size as the thin film transistors 50 and 60 were formed on the same substrate by the same method as in this embodiment, the carrier mobility variation was as small as ± 3% or less, respectively. .

  Furthermore, the crystal grain size was different between the region covered with the photoresist layer and the region doped with hydrogen from the opening of the photoresist layer. Specifically, the average crystal grain size of the polycrystalline silicon film in the region covered with the photoresist layer was about 1 μm, whereas the region doped with hydrogen from the opening of the photoresist layer. The average crystal grain size of the polycrystalline silicon film was about 10 μm. That is, both the thin film transistor 50 having a channel region size of 2 μm × 2 μm and the thin film transistor 60 having a size of 30 μm × 30 μm always have the channel region formed of several crystal grains.

As a comparative example, when a thin film transistor was manufactured without hydrogen doping and the same measurement was performed, the carrier mobility and the carrier mobility variation of the thin film transistor having a channel region size of 2 μm × 2 μm were the same, The carrier mobility of a thin film transistor having a channel region size of 30 μm × 30 μm was as low as 150 cm ² / V · s. This is because a channel region of 30 μm × 30 μm is formed with hundreds of crystal grains.

(Function and effect)
Next, operational effects will be described.

  In the semiconductor device (array substrate 91) according to this embodiment, a polycrystalline silicon film is used for the channel regions 13 and 31, and the number of silicon crystal grains contained in the channel region is several to several tens (2 to 99). Thin film transistors 50 and 60 are provided. In addition, the method for manufacturing a semiconductor device (array substrate 91) including the thin film transistors 50 and 60 according to the present embodiment includes a film forming step for forming the amorphous silicon film 12 on the glass substrate 10, A hydrogen doping step for doping hydrogen into a predetermined region of the formed amorphous silicon film 12, and a catalytic element doping step for doping the amorphous silicon film 12 with a catalytic element 17 for promoting crystallization of amorphous silicon; A first crystallization step of performing heat treatment on the amorphous silicon film 12 doped with the catalyst element 17, and a second crystallization step of irradiating the amorphous silicon film 12 subjected to the heat treatment with laser light. It is characterized by having.

  According to such a configuration, electrical characteristics such as mobility of the thin film transistor can be improved, and variation in characteristics between the field effect thin film transistors having the same channel area can be suppressed.

  As described above, the present invention is useful for semiconductor devices, semiconductor device manufacturing methods, liquid crystal display devices, and polycrystalline silicon films.

It is sectional drawing of the amorphous silicon film 12 in the film | membrane formation process which concerns on embodiment of this invention. It is sectional drawing of the amorphous silicon film 12 in the patterning process which concerns on embodiment of this invention. It is a top view of the amorphous silicon film 12 in the patterning process which concerns on embodiment of this invention. It is sectional drawing of the amorphous silicon film | membrane 16 in the catalyst element doping process which concerns on embodiment of this invention. FIG. 4 is a cross-sectional view of a polycrystalline silicon film 18 in a first crystallization process according to an embodiment of the present invention. It is a figure which shows the mode of the laser beam irradiation to the polycrystal silicon film | membrane 18 in the 2nd crystallization process which concerns on embodiment of this invention. 2 is a plan view of a polycrystalline silicon film 20 patterned into a shape corresponding to channel regions 13 and 31, source regions 32 and 33, and drain regions 34 and 35 according to an embodiment of the present invention. FIG. 1 is a cross-sectional view of a polycrystalline silicon film 20 on which a gate insulating film 40 according to an embodiment of the present invention is formed. It is sectional drawing of the polycrystalline silicon film 20 in which the aluminum film 41 based on embodiment of this invention was formed. 2 is a cross-sectional view of a polycrystalline silicon film 20 on which a gate electrode 43 according to an embodiment of the present invention is formed. FIG. 2 is a cross-sectional view of a polycrystalline silicon film 20 on which an interlayer insulating film 46 according to an embodiment of the present invention is formed. FIG. 3 is a cross-sectional view of a polycrystalline silicon film 20 on which an extraction electrode 47 according to an embodiment of the present invention is formed. FIG. It is a top view of the liquid crystal display device 90 using the array substrate 91 provided with the thin-film transistors 50 and 60 which concern on embodiment of this invention.

Explanation of symbols

10 Glass substrate
11 Silicon oxide film
12 Amorphous silicon film
13,31 channel region
14 opening
15 Photoresist layer
16 Amorphous silicon film
17 Catalyst element
18 Polycrystalline silicon film
19 Laser beam
20 Polycrystalline silicon film
30 n-channel TFT
32, 33 source area
34, 35 Drain region
40 Gate insulation film
41 Aluminum film
43 Gate electrode
46 Interlayer insulation film
47 Lead electrode
50,60 thin film transistor
90 Liquid crystal display
91 Array substrate

Claims (18)

  A semiconductor device including a thin film transistor in which a polycrystalline silicon film is used for a channel region and the number of crystal grains of silicon included in the channel region is 2 to 99.   A liquid crystal display device in which a polycrystalline silicon film is used in a channel region and a thin film transistor in which the number of crystal grains of silicon contained in the channel region is 2 to 99 is included in the liquid crystal display element. A film forming step of forming an amorphous silicon film on an insulating substrate;
A hydrogen doping step of doping a predetermined region of the amorphous silicon film formed on the insulating substrate with hydrogen;
A catalytic element doping step of doping the amorphous silicon film with a catalytic element that promotes crystallization of amorphous silicon;
A first crystallization step of heat-treating the amorphous silicon film doped with the catalyst element;
A second crystallization step of irradiating the amorphous silicon film subjected to the heat treatment with laser light;
A method for manufacturing a semiconductor device having a thin film transistor comprising: In the manufacturing method of the semiconductor device according to claim 3,
A method for manufacturing a semiconductor device, wherein the amorphous silicon film formed in the film formation step has a hydrogen concentration of 1.0 × 10 ^{20 to} 5.0 × 10 ²¹ atoms / cm ³ . In the manufacturing method of the semiconductor device according to claim 3,
A method of manufacturing a semiconductor device, wherein the formation of an amorphous silicon film in the film forming step is performed by a plasma CVD method using a mixed gas of monosilane gas and argon gas. In the manufacturing method of the semiconductor device according to claim 3,
Fabrication of a semiconductor device further comprising a patterning step for patterning a photoresist on the amorphous silicon film for defining a predetermined region doped with hydrogen between the film forming step and the hydrogen doping step Method. In the manufacturing method of the semiconductor device according to claim 3,
A method for manufacturing a semiconductor device, wherein a hydrogen concentration in the predetermined region of the amorphous silicon film doped with hydrogen in the hydrogen doping step is 1.0 × 10 ^{22 to} 2.5 × 10 ²² atoms / cm ³ . In the manufacturing method of the semiconductor device according to claim 3,
A method for manufacturing a semiconductor device, wherein the doping of hydrogen in the hydrogen doping step is performed by implanting hydrogen ions into the amorphous silicon film. In the manufacturing method of the semiconductor device according to claim 3,
A method for manufacturing a semiconductor device, wherein the doping of hydrogen in the hydrogen doping step is performed by exposing the amorphous silicon film to a hydrogen plasma atmosphere. In the manufacturing method of the semiconductor device according to claim 3,
The method for manufacturing a semiconductor device, wherein the predetermined region doped with hydrogen in the hydrogen doping step includes at least a part of a channel region of the thin film transistor. In the manufacturing method of the semiconductor device according to claim 3,
The catalyst doped in the catalytic element doping step includes at least one element selected from iron, cobalt, nickel, germanium, ruthenium, rhodium, palladium, osnium, iridium, platinum, copper and gold. Device manufacturing method. In the manufacturing method of the semiconductor device according to claim 3,
Method for producing a catalyst element concentration in the amorphous silicon film surface doped with the catalyst element in the catalyst element doping step ^{is, 1.0 × 10 10 ~1.0 × 10} 12 atoms / cm 2 at which the semiconductor device. In the manufacturing method of the semiconductor device according to claim 3,
A method for manufacturing a semiconductor device, wherein the heat treatment of the amorphous silicon film in the first crystallization step is performed in a temperature range of 500 to 800 ° C. In the manufacturing method of the semiconductor device according to claim 3,
A method of manufacturing a semiconductor device, wherein the wavelength of the laser light irradiated in the second crystallization step is 126 to 370 nm. In the manufacturing method of the semiconductor device according to claim 3,
A method for manufacturing a semiconductor device, wherein the laser beam irradiated in the second crystallization step is a pulsed excimer laser beam. In the manufacturing method of the semiconductor device according to claim 3,
As the laser beam irradiated in the second crystallization step, a linear laser beam that linearly irradiates the surface of the amorphous silicon film is used, and the linear laser beam is irradiated by step scanning in the short axis direction. A method for manufacturing a semiconductor device. In the manufacturing method of the semiconductor device according to claim 3,
A method of manufacturing a semiconductor device, wherein the laser light in the second crystallization step is irradiated with an energy density that partially melts a crystal structure obtained by heat-treating an amorphous silicon film doped with the catalyst element. A polycrystalline silicon film having a silicon crystal grain number of 1 × 10 ⁴ to 1 × 10 ⁸ [pieces / mm ² ].

Images