JP3630593B2 - Semiconductor device, method for manufacturing semiconductor device, and liquid crystal display device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device, a method for manufacturing the semiconductor device, and a liquid crystal display device. If you mention further,The invention disclosed in this specification relates to a method for manufacturing a semiconductor device, such as a thin film transistor, using a crystalline thin film semiconductor and having a gate electrode.thisAs an application range of thin film transistors, active matrix liquid crystal display devices are known.A liquid crystal display device using the semiconductor device also relates to the present invention.The
With its liquid crystal display deviceIn this case, a thin film transistor is arranged as a switching element in each of hundreds of thousands or more of pixels arranged in a matrix, and fine and high-definition display is performed.
[0002]
[Prior art]
In recent years, a transistor (referred to as a thin film transistor or a TFT) using a thin film semiconductor formed over a glass or quartz substrate has attracted attention. This is a technique in which a thin film semiconductor having a thickness of several hundreds to several thousands Å is formed on the surface of a glass substrate or a quartz substrate, and a transistor (insulated gate type field effect transistor) is formed using the thin film semiconductor.
[0003]
As such a thin film transistor, those using an amorphous silicon (amorphous silicon) thin film and those using crystalline silicon have been put into practical use. Since a thin film transistor using crystalline silicon has excellent characteristics, the future is expected.
In thin film transistors using crystalline silicon semiconductors that are currently in practical use, the crystalline silicon thin film is formed by thermal annealing of an amorphous silicon film or by direct vapor deposition of a crystalline silicon film. Has been obtained by the method. However, from the viewpoint of lowering the temperature of the process, a light annealing method for crystallizing an amorphous silicon film by irradiating intense light such as a laser is considered promising. (For example, JP-A-4-37144)
[0004]
There are two main methods for obtaining a crystalline semiconductor thin film by light annealing. The first method is a method of photo-annealing after etching into the shape of an element for forming a semiconductor thin film. Another method is a method in which a flat film is optically annealed and then etched into the shape of an element to be formed. In general, it has been known that the former can provide better characteristics (particularly field effect mobility) than the latter. In the former method, it is presumed that the film contracts as a result of optical annealing and stress is applied to the central portion of the pattern.
[0005]
[Problems to be solved by the invention]
However, there are also problems in this case. That is, although the initial characteristics are good, the characteristics deteriorate rapidly with use for a long time.
[0006]
The cause of the deterioration of characteristics caused by the conventional method will be described with reference to FIG. First, it is assumed that an amorphous silicon island-shaped semiconductor region 31 of a rectangle 32 as shown in FIG. When this is light-annealed, the film is slightly shrunk due to crystallization (the dotted line in the figure indicates the size of the island-shaped semiconductor region before the light annealing). Further, in this contraction process, a region 33 in which strain is accumulated is formed on the outer periphery of the island region. The crystallinity of such a region 33 is not so good. (Fig. 3 (B))
[0007]
When the gate electrode 34 is formed across such an island region (FIG. 3C), as shown in FIG. 3D, (a-b) cross section along the gate electrode is shown. Under the gate electrode 34 and the gate insulating film 35, a region 33 in which strain is accumulated exists. When a voltage is applied to the gate electrode, charges are trapped because the interface characteristics between the region 33 and the gate insulating film 35 are not good, and deterioration is caused by a parasitic channel caused by the charges. (Fig. 3 (D))
[0008]
The present invention has been made in view of such characteristic deterioration, and an object thereof is to provide a method for manufacturing an insulated gate semiconductor device with little deterioration.
Another object of the present invention is to provide a semiconductor device manufactured by the manufacturing method and a liquid crystal display device using the semiconductor device.
[0009]
[Means for Solving the Problems]
The first of the present invention includes the following steps.
(1) A step of etching an amorphous semiconductor film into a first shape having a width of the narrowest portion of 100 μm or less to form an island-shaped semiconductor region
(2) A step of crystallizing the semiconductor region by crystallizing or improving crystallinity
(3) A step of forming a second shape semiconductor region by etching at least a portion forming the gate electrode or channel of the semiconductor device at least 10 μm from the end of the end portion (or peripheral portion) of the semiconductor region.
[0010]
The second aspect of the present invention includes the following steps.
(1) A step of etching an amorphous semiconductor film into a first shape having a width of the narrowest portion of 100 μm or less to form an island-shaped semiconductor region
(2) A step of crystallizing the semiconductor region by crystallizing or improving crystallinity
(3) A step of etching part or all of the end portion (or peripheral portion) of the semiconductor region
(4) A step of forming a gate insulating film so as to cover the semiconductor region
(5) A step of forming a gate electrode across the etched portion of the end portion of the semiconductor region.
(6) Introducing or diffusing N-type or P-type impurities using the gate electrode as a mask
[0011]
In the first and second aspects of the present invention, the first shape is any one of a rectangle, a regular polygon, and an oval (including a circle), and more generally a shape that is not concave at any point on the outer periphery. Is preferable.
[0012]
In the above structure, the amorphous semiconductor film is formed over a substrate having an insulating surface such as a glass substrate or a quartz substrate. The amorphous silicon film is formed by a plasma CVD method or a low pressure thermal CVD method. In the optical annealing, various excimer lasers such as KrF excimer laser (wavelength 248 nm) and XeCl excimer laser (wavelength 308 nm), Nd: YAG laser (wavelength 1064 nm), the second harmonic (wavelength 532 nm), third A harmonic (wavelength 355 nm) or the like may be used. In the present invention, the light source may be pulsed oscillation or continuous oscillation. Further, as disclosed in Japanese Patent Laid-Open No. 6-318701, crystallization is promoted by utilizing a metal element (for example, Fe, Co, Ni, Pd, Pt, etc.) that promotes crystallization of silicon during optical annealing. You may squeeze it.
[0013]
The invention disclosed in this specification is particularly effective when an island-shaped semiconductor region is formed using a region that can be regarded as a single crystal or a single crystal. The region that can be regarded as a single crystal or a single crystal is obtained by scanning an amorphous silicon film or a crystalline silicon film with a laser beam that has been linearly processed, as will be described in detail later in the embodiments. It can be obtained by irradiation.
[0014]
A region that can be regarded as a single crystal or a single crystal is defined as a region that satisfies the following conditions.
-Grain boundaries are not substantially present.
・ 1 × 10 hydrogen or halogen element to neutralize point defects¹⁵~ 1x10^{2 0}Atom cm^-3Contains at a concentration of
-1 x 10 carbon and nitrogen atoms¹⁶~ 5x10¹⁸Atom cm^-3Contains at a concentration of
・ 1 × 10 oxygen atoms¹⁷~ 5x10¹⁹Atom cm^-3Contains at a concentration of
The concentration of the element is defined as the minimum value of the measured value measured by SIMS (secondary ion analysis method).
[0015]
Embodiment
In the invention disclosed in this specification, only the channel portion is etched so as not to be adjacent to the channel that greatly affects the characteristics of the semiconductor device. This is the same as etching so that such a region does not remain in a portion where the gate electrode crosses.
[0016]
FIG. 1 shows the basic configuration of the present invention. First, a plurality (four in the figure) of island-shaped amorphous semiconductor regions 11 having a rectangle 12 having a long side a and a short side b are formed as a first shape. In the present invention, the width of the narrowest portion of the first shape needs to be 100 μm or less. Above that, the effect of improving the characteristics due to the shrinkage of the film during the optical annealing is not recognized. Therefore, b is 100 μm or less. (Fig. 1 (A))
[0017]
Next, light annealing is performed. As a result, the island-shaped semiconductor region shrinks at the same time as it crystallizes (the dotted line in the figure indicates the size of the island-shaped semiconductor region before the light annealing). The periphery of the new island area is indicated at 14. In addition, a region 13 in which strain is accumulated due to the contraction process is formed around the island-shaped semiconductor region. (Fig. 1 (B))
Thereafter, the outer peripheral portion of the island-shaped semiconductor region 11 is etched to form a semiconductor region 15 for forming a target element (FIG. 1C), a gate insulating film (not shown), and a gate electrode 16 are formed. Form. (Figure 1 (D))
[0018]
In consideration of the fact that it is not necessary to remove all the accumulated regions of distortion, the method shown in FIG. 2 is also possible. First, an amorphous semiconductor region 21 having a rectangular shape 22 is formed (FIG. 2A), and when this is photo-annealed, the region contracts as in FIG. 1, and strain is accumulated in the peripheral portion. 23 is formed. (Fig. 2 (B))
Then, the region 24 including the periphery of the portion where the gate electrode is to be formed is etched (FIG. 2C), and a gate insulating film (not shown) and the gate electrode 26 are formed. Since there is no strain accumulation region in the channel 25 below the gate electrode, degradation can be reduced as in the case of FIG. (Fig. 2 (D))
[0019]
In the present invention, the shape of the amorphous semiconductor region (first shape) during the light annealing is preferably as simple as possible. For example, a rectangle, a regular polygon, a circle, an ellipse including an ellipse, or the like. For example, as shown in FIG. 4A, when light annealing is performed on a semiconductor region 41 having a shape 42 with a recess at the center, the recess 44 at the center is pulled up and down when the film shrinks. Cracks are likely to occur. (Fig. 4 (B))
[0020]
This is because, as shown in FIG. 4C (the arrow indicates the direction of contraction), the contraction of the film occurs around the widest portion. Therefore, as the first shape, it is preferable to use a shape that is not constricted and is convex at all points or not concave at any point.
[0021]
From such a viewpoint, for example, even if a rectangle as shown in FIG. 1 is adopted as the first shape, it is not preferable that the ratio of the long side a and the short side b is too large. In the present invention, a / b ≦ 10 is preferable.
[0022]
In addition, when the island-shaped semiconductor region is configured as a region that can be regarded as a single crystal, or a region that can be regarded as a substantially single crystal, strain is also accumulated in the periphery of the island-shaped semiconductor region during the crystallization. End up.
[0023]
Since this distortion is concentrated in the periphery of the island-shaped semiconductor region, the adverse effect of the distortion can be suppressed by removing the periphery of the island-shaped semiconductor region.
[0024]
【Example】
[Example 1]
The present embodiment will be described with reference to FIG. FIG. 5 shows a cross-sectional view of two thin film transistors. The left one is a cross section obtained by cutting the thin film transistor perpendicular to the gate electrode (perpendicular to ab in FIG. 3), and the right one is FIG. 5 is a cross-section taken along the gate electrode (along ab in FIG. 3). The state seen from above may be referred to FIG.
[0025]
First, a silicon oxide film 502 was formed as a base film on a glass substrate 501 to a thickness of 3000 mm by sputtering or plasma CVD. Next, an amorphous silicon film 503 having a thickness of 500 mm was formed by plasma CVD or low pressure thermal CVD. Then, the amorphous silicon film was doped with phosphorus to form N-type impurity regions 504 and 505 to be the source / drain of the thin film transistor. (Fig. 5 (A))
[0026]
Next, this amorphous silicon film 503 was etched to form island-like silicon regions 506 and 507. (Fig. 5 (B))
Next, the silicon film was crystallized by irradiation with KrF excimer laser light. At this time, the phosphorus-introduced regions 504 and 505 are simultaneously crystallized and activated. The energy density of the laser was preferably 150 to 500 mJ / cm2. Further, the laser irradiation process may be divided into two or more times, and laser beams with different energies may be irradiated.
[0027]
In this example, initially, the energy density is 250 mJ / cm.²2 to 10 pulses of laser light, and then an energy density of 400 mJ / cm²Were irradiated with 2 to 10 pulses. The substrate temperature during laser irradiation was 200 ° C. The optimum energy density of the laser depends on the substrate temperature and the amorphous silicon film quality.
As a result, a region 508 in which strain is accumulated is formed at the ends of the island-like silicon regions 506 and 507. (Fig. 5 (C))
[0028]
Next, the end portions 509 of the island-like silicon regions were etched to newly form island-like silicon regions 510 and 511. A portion etched in this step is indicated by a dotted line 509 in the figure. (Fig. 5 (D))
A silicon oxide film 512 (gate insulating film) having a thickness of 1200 mm was formed by plasma CVD. Further, an aluminum film (including 0.3% scandium (Sc)) having a thickness of 5000 mm was deposited thereon by sputtering, and this was etched to form gate electrodes 513 and 514. (Fig. 5 (E))
[0029]
Next, a silicon oxide film 515 (interlayer insulator) having a thickness of 5000 mm was deposited by a plasma CVD method, and a contact hole was opened therein. Then, an aluminum film having a thickness of 5000 mm was deposited by sputtering, and this was etched to form source / drain electrodes / wirings 516 and 517. (Fig. 5 (F))
Through the above process, a thin film transistor was completed. In order to stabilize the characteristics, it is preferable to anneal in a hydrogen atmosphere (250 to 350 ° C.) at 1 atm after the contact hole opening step.
[0030]
[Example 2]
The present embodiment will be described with reference to FIG. Like FIG. 5, FIG. 6 shows a cross-sectional view of two thin film transistors. The left one is a cross section of the thin film transistor cut perpendicularly to the gate electrode, and the right one is cut parallel to the gate electrode. It is a cross section. Note that the state seen from above may be referred to FIG.
[0031]
First, a silicon oxide film 602 was formed as a base film on a glass substrate 601 to a thickness of 3000 mm by sputtering or plasma CVD. Next, an amorphous silicon film 603 was formed to a thickness of 500 mm by plasma CVD or low pressure thermal CVD. And the aqueous solution containing 1-100 ppm nickel acetate (or cobalt acetate) was apply | coated to the surface, and the nickel acetate (cobalt acetate) layer 604 was formed. Since the nickel acetate (cobalt acetate) layer 604 is extremely thin, it is not necessarily a film. (Fig. 6 (A))
[0032]
Next, this is thermally annealed at 350 to 450 ° C. for 2 hours in a nitrogen atmosphere to decompose nickel acetate (cobalt acetate), and at the same time, nickel (or cobalt) is diffused into the amorphous silicon film 603. It was. Then, the amorphous silicon film 603 was etched to form island silicon regions 605 and 606. (Fig. 6 (B))
[0033]
Next, the silicon film was crystallized by light annealing by irradiating KrF excimer laser light. In this example, initially, the energy density is 200 mJ / cm.²2 to 10 pulses of laser light, and then an energy density of 350 mJ / cm²Were irradiated with 2 to 10 pulses. The substrate temperature during laser irradiation was 200 ° C.
[0034]
The optimum energy density of the laser depends on the concentration of the added nickel (cobalt) in addition to the substrate temperature and the amorphous silicon film quality. In this example, as a result of analysis by secondary ion mass spectrometry (SIMS) method, 1 × 10¹⁸~ 5x10¹⁸Atom / cm³It was confirmed that nickel (cobalt) having a concentration of 5 was contained.
As described above, Japanese Patent Application Laid-Open No. 6-318701 discloses a method of performing light annealing using a catalyst element that promotes crystallization.
As a result, a region 607 in which strain was accumulated was formed at the ends of the island-like silicon regions 605 and 606. (Fig. 6 (C))
[0035]
Next, of the end portion 607 of the island-like silicon region, only the portion where the gate electrode crosses was etched to newly form an island-like silicon region. A portion etched in this step is indicated by a dotted line 608 in the figure. (Fig. 6 (D))
Then, a silicon oxide film 609 (gate insulating film) having a thickness of 1200 mm was formed by plasma CVD. Further, a polycrystalline silicon film (containing 1% phosphorus) having a thickness of 5000 mm was deposited thereon by low pressure CVD, and this was etched to form gate electrodes 610 and 611. (Fig. 6 (E))
[0036]
Next, phosphorus ions were introduced into the silicon film by ion doping using the gate electrode as a mask. In this example, phosphine (PH) diluted to 5% with hydrogen as a doping gas.₃) Was used. The acceleration voltage was preferably 60 to 110 kV. The dose is 1 × 10¹⁴~ 5x10¹⁵Atom / cm²It was. In this manner, N-type impurity regions (= source / drain) 612 and 613 were formed.
[0037]
After doping, the impurity could be activated by performing thermal annealing at 450 ° C. for 4 hours. This is because nickel (cobalt) is contained in the semiconductor region. (See JP-A-6-267989)
After the thermal annealing step for activation, light annealing may be performed by irradiating laser light or the like.
[0038]
After the above step, the dangling bonds at the interface between the gate insulating film and the semiconductor region were neutralized by annealing in a hydrogen atmosphere (250 to 350 ° C.) at 1 atm. (Fig. 6 (F))
Next, a silicon oxide film 616 (interlayer insulator) having a thickness of 5000 mm was deposited by a plasma CVD method, and a contact hole was opened therein. Then, an aluminum film having a thickness of 5000 mm was deposited by sputtering, and this was etched to form source / drain electrodes / wirings 614 and 615. (Fig. 6 (G))
[0039]
Example 3
In this embodiment, a metal element that promotes crystallization of silicon is introduced into an amorphous silicon film, and laser irradiation is performed to form a region that can be regarded as a substantially single crystal. An example in which an active layer of a thin film transistor is formed using a region that can be regarded as a single crystal is shown.
[0040]
FIG. 7 shows some steps of the thin film transistor described in this embodiment. First, a silicon oxide film 702 was formed as a base film on a glass substrate 701 to a thickness of 3000 mm by a plasma CVD method or a sputtering method. Next, an amorphous silicon film 703 was formed to a thickness of 500 mm by plasma CVD or low pressure thermal CVD.
[0041]
Then, the sample is placed on the spinner 700 together with the substrate. In this state, a nickel acetate solution adjusted to a predetermined nickel concentration was applied to form a water film 704. This state is shown in FIG. Then, by performing spin drying using a spinner, unnecessary nickel acetate solution was blown off, and a small amount of nickel element was held in contact with the surface of the amorphous silicon film.
[0042]
Next, an active layer 705 of the thin film transistor is formed by patterning. In this state, the active layer 705 is composed of an amorphous silicon film. (Fig. 7 (B))
[0043]
In this state, laser light was irradiated to crystallize the active layer 705 made of an amorphous silicon film. The laser beam used here is linearly beam processed. The laser light is irradiated so that the linear laser is scanned from one side of the active layer toward the opposite side. As the laser light, it is necessary to use a pulsed excimer laser. Here, a KrF excimer laser (wavelength 248 nm) is used.
[0044]
This laser light irradiation is performed while heating the substrate to a temperature of 500.degree. This is to alleviate a sudden change in the crystal structure following the laser light irradiation. The heating temperature is preferably in the range of 450 ° C. to a temperature below the strain point of the glass substrate.
[0045]
When a linear laser beam is irradiated on the amorphous silicon film, the region irradiated with the laser beam is instantaneously melted. Then, by scanning and irradiating the linear laser light, crystal growth proceeds gradually, and a region that can be regarded as a single crystal can be obtained.
[0046]
That is, as shown in FIG. 7C, when a linear laser beam 708 is irradiated while gradually scanning from one end of an active layer formed of an amorphous silicon film as shown in FIG. A region that can be regarded as a single crystal grows with the irradiation of the laser beam, and finally, the entire active layer can be regarded as a single crystal.
[0047]
In this way, an active layer 709 composed of a silicon thin film that can be regarded as a single crystal was obtained. (Fig. 7 (D))
[0048]
The region that can be regarded as a single crystal shown here needs to satisfy the following conditions in the region.
-Grain boundaries are not substantially present.
・ 1 × 10 hydrogen or halogen element to neutralize point defects¹⁵~ 1x10²⁰Atom cm^-3Contains at a concentration of
-1 x 10 carbon and nitrogen atoms¹⁶~ 5x10¹⁸Atom cm^-3Contains at a concentration of
・ 1 × 10 oxygen atoms¹⁷~ 5x10¹⁹Atom cm^-3Contains at a concentration of
[0049]
Further, in the case where a metal element that promotes crystallization of silicon as shown in this embodiment is used, the metal element is contained in the film at 1 × 10 5.¹⁶~ 5x10¹⁹cm^-3Must be included at a concentration of The meaning of this concentration range is that if the concentration range is higher than this, the characteristics as a metal appear, and the characteristics as a semiconductor cannot be obtained. It is not possible to get.
[0050]
As can be seen from the above, the region of the silicon film that can be regarded as a single crystal obtained by irradiation with the laser beam is essentially different from a general single crystal such as a single crystal wafer.
[0051]
Even during crystallization by this laser light irradiation, film shrinkage occurs, and the distortion accumulates toward the periphery of the active layer. That is, distortion concentrates and accumulates in a portion indicated by 710 in FIG.
[0052]
In general, the thickness of the active layer is about several hundred to several thousand. The size is several μm square to several hundred μm square. That is, it has a very thin film shape. In such a thin thin film state, when crystal growth as shown in FIG. 7C proceeds, strain concentrates on the periphery thereof, that is, near the growth end point of crystal growth or in a region where crystal growth does not proceed further. Will occur.
[0053]
As described above, the strain is concentrated around the active layer mainly due to two causes. The presence of such a region in which strain is concentrated in the active layer causes an adverse effect on the operation of the thin film transistor and is not preferable.
[0054]
Therefore, also in this embodiment, the entire periphery of the active layer is etched. In this way, an active layer 711 which is formed of a region substantially regarded as a single crystal as shown in FIG. 7E and in which the influence of stress is reduced can be obtained. (Fig. 7 (E))
[0055]
After obtaining the active layer 711, as shown in FIG. 8A, a silicon oxide film having a thickness of 1000 mm was formed as a gate insulating film 712 so as to cover the active layer 711 by a plasma CVD method. Further, a polycrystalline silicon film doped with a large amount of P (phosphorus) was formed into a thickness of 5000 mm by low pressure thermal CVD, and patterned to form a gate electrode 713. (Fig. 8 (A))
[0056]
Next, P (phosphorus) ions were implanted by plasma doping or ion implantation to form a source region 714 and a drain region 716 in a self-aligning manner. A region 715 in which impurity ions are not implanted is defined as a channel formation region by using the gate electrode 713 as a mask. (Fig. 8 (B))
[0057]
Next, a silicon oxide film 717 was formed as an interlayer insulating film to a thickness of 7000 mm by plasma CVD using TEOS gas. Then, after forming the contact hole, a source electrode and a drain electrode were formed using a laminated film of titanium and aluminum. Although not shown in the drawing, a contact electrode to the gate electrode 713 was also formed at the same time. Finally, a heat treatment for 1 hour was performed in a hydrogen atmosphere at 350 ° C. to complete the thin film transistor as shown in FIG.
[0058]
The thin film transistor thus obtained is composed of a silicon film whose active layer can be regarded as a single crystal. Therefore, the electrical characteristics of the thin film transistor are those using a single crystal silicon film manufactured using SOI technology or the like. It can be comparable to a thin film transistor.
[0059]
Example 4
This example is an example in which, in the configuration shown in Example 3, the method of irradiating the amorphous silicon film patterned to form the active layer is devised so as to facilitate crystallization. It is.
[0060]
FIG. 9 shows a laser beam irradiation method for the active layer in the process shown in the third embodiment. In this case, linear laser light having a longitudinal direction parallel to one side of the patterned amorphous silicon film 901 (hereinafter referred to as an active layer because it becomes an active layer) is irradiated. By scanning in the direction of the arrow while irradiating, the active layer 901 is transformed into a region that can be regarded as a single crystal.
[0061]
The method shown in this embodiment is characterized in that the scanning direction of the linear laser beam 900 is set so that crystal growth proceeds from the corner portion of the active layer 901 as shown in FIG. When the laser light irradiation method shown in FIG. 10 is adopted, crystal growth proceeds gradually from a narrow region to a wide region as shown in FIG. 11, and thus crystal growth is likely to proceed smoothly. Compared with the case where laser light is irradiated in the state shown in FIG. 9, it is easier to form a region that can be regarded as a single crystal, and the reproducibility thereof can be improved.
[0062]
【The invention's effect】
According to the present invention, deterioration of an insulating gate type semiconductor device manufactured using a semiconductor film crystallized by optical annealing can be reduced. In the embodiment, the description has focused on the silicon semiconductor, but the same effect can be obtained in other semiconductors (for example, silicon germanium alloy semiconductor, zinc sulfide semiconductor, silicon carbide semiconductor, etc.). Thus, the present invention has industrial value.
[Brief description of the drawings]
FIG. 1 is a conceptual diagram (viewed from above) of a manufacturing process of the present invention.
FIG. 2 is a conceptual diagram (viewed from above) of a manufacturing process of the present invention.
FIG. 3 shows an example of a manufacturing process of a conventional method (a view and a cross section viewed from above).
FIG. 4 shows the force applied to a thin film semiconductor during optical annealing.
5 is a cross-sectional view of a manufacturing process of Example 1. FIG.
6 shows a cross-sectional view of a manufacturing process of Example 2. FIG.
7 is a cross-sectional view showing a manufacturing process of Example 2. FIG.
8 is a cross-sectional view showing a manufacturing process of Example 2. FIG.
FIG. 9 is a top view showing a state of irradiation with a linear laser beam on an active layer (semiconductor region on an island).
FIG. 10 is a top view showing a state of irradiation with a linear laser beam on an active layer (semiconductor region on an island).
FIG. 11 shows a state of crystallization according to irradiation of a linear laser beam on an active layer (semiconductor region on an island).
[Explanation of symbols]
11 Island-like semiconductor region
12 Outer periphery of island-shaped semiconductor region before optical annealing
13 Strain accumulated region by light annealing
14 Outer periphery of island-shaped semiconductor region after photo annealing
15 Semiconductor region for constituting a semiconductor element
16 Gate electrode
21 Island-like semiconductor region
22 Outer periphery of island-shaped semiconductor region before optical annealing
23 Strain accumulated by light annealing
24 Region etched after light annealing
25 Channels of semiconductor devices
26 Gate electrode
31 Island-like semiconductor region
32 Outer periphery of island-shaped semiconductor region before optical annealing
33 Strain accumulated region by light annealing
34 Gate electrode
35 Gate insulation film
41 Island-like semiconductor region
42 Outer periphery of island-shaped semiconductor region before light annealing
43 Strain accumulated region by light annealing
501 glass substrate
502 Base film (silicon oxide)
503 Amorphous silicon film
504, 505 N-type impurity region
506, 507 island-like semiconductor region
508 Distorted region
509 Etched part
510,511 island-like semiconductor region
512 Gate insulating film (silicon oxide)
513, 514 Gate electrode (aluminum)
515 Interlayer insulating film (silicon oxide)
516, 517 Source / drain electrode / wiring (aluminum)
601 Glass substrate
602 Base film (silicon oxide)
603 Amorphous silicon film
604 nickel acetate (or cobalt) layer
605, 606 Island-like semiconductor region
607 Distorted region
608 Etched part
609 Gate insulating film (silicon oxide)
610, 611 Gate electrode (polycrystalline silicon)
612, 613 Source / drain
614, 615 Source / drain electrode and wiring (aluminum)
614 Interlayer insulator (silicon oxide)
701 Glass substrate
702 Base film (silicon oxide film)
703 Amorphous silicon film
704 Water film of nickel acetate solution
705 Active layer (island-like semiconductor region)
707 Crystallized region
708 Laser light
709 Crystallized active layer
710 Distorted area
711 Active layer (island-like semiconductor region)
712 Gate insulating film (silicon oxide film)
713 Gate electrode
714 Source region
715 channel formation region
716 drain region
717 Interlayer insulating film (silicon oxide film)
718 Source electrode
719 Drain electrode
901 Active layer (island-like semiconductor region)
900 Linear laser beam

Claims (12)

A step of doping an amorphous semiconductor film with phosphorus to form an N-type impurity region to be a source region and a drain region;
Etching the amorphous semiconductor film in which the N-type impurity region is formed to form a first island-shaped semiconductor region having a narrowest portion having a width of 100 μm or less;
Irradiating the first island-shaped semiconductor region with laser light to crystallize, and activating the N-type impurity region;
Etching a strain region generated in the first island-shaped semiconductor region when the first island-shaped semiconductor region is crystallized to form a second island-shaped semiconductor region;
A method for manufacturing a semiconductor device, comprising: A step of doping an amorphous semiconductor film with phosphorus to form an N-type impurity region to be a source region and a drain region;
Etching the amorphous semiconductor film in which the N-type impurity region is formed to form a first island-shaped semiconductor region having a narrowest portion having a width of 100 μm or less;
Irradiating the first island-shaped semiconductor region with laser light to crystallize, and activating the N-type impurity region;
A portion of the strained region generated in the first island-shaped semiconductor region when the first island-shaped semiconductor region is crystallized is selectively etched to cross the gate electrode, whereby the second island Forming a semiconductor region;
Forming a gate insulating film on the second island-shaped semiconductor region;
Forming a gate electrode on the gate insulating film across the etched portion of the second island-shaped semiconductor region;
A method for manufacturing a semiconductor device, comprising: 3. The method for manufacturing a semiconductor device according to claim 1, wherein the shape of the film surface of the first island-shaped semiconductor region is any one of a rectangle, a regular polygon, and an oval. A step of doping an amorphous semiconductor film with phosphorus to form an N-type impurity region to be a source region and a drain region;
The amorphous semiconductor film in which the N-type impurity region is formed is etched to form a rectangular first having a short side of 100 μm or less and a ratio of the long side a to the short side b of a / b ≦ 10. Forming an island-like semiconductor region;
Irradiating the first island-shaped semiconductor region with laser light to crystallize, and activating the N-type impurity region;
Etching a strain region generated in the first island-shaped semiconductor region when the first island-shaped semiconductor region is crystallized to form a second island-shaped semiconductor region;
A method for manufacturing a semiconductor device, comprising: A step of doping an amorphous semiconductor film with phosphorus to form an N-type impurity region to be a source region and a drain region;
The amorphous semiconductor film in which the N-type impurity region is formed is etched to form a rectangular first having a short side of 100 μm or less and a ratio of the long side a to the short side b of a / b ≦ 10. Forming an island-like semiconductor region;
Irradiating the first island-shaped semiconductor region with laser light to crystallize, and activating the N-type impurity region;
A portion of the strained region generated in the first island-shaped semiconductor region when the first island-shaped semiconductor region is crystallized is selectively etched to cross the gate electrode, whereby the second island Forming a semiconductor region;
Forming a gate insulating film on the second island-shaped semiconductor region;
Forming a gate electrode on the gate insulating film across the etched portion of the second island-shaped semiconductor region;
A method for manufacturing a semiconductor device, comprising: Step is divided into two or more irradiation steps, and a method for manufacturing a semiconductor device according to any one of claims 1 to 5, characterized in that takes place in different energy densities respectively irradiating the laser beam . The laser beam is a method for manufacturing a semiconductor device according to any one of claims 1 to 6, characterized in that a second harmonic wave of YAG laser. The laser beam is a method for manufacturing a semiconductor device according to any one of claims 1 to 6, characterized in that a third harmonic of a YAG laser. The laser beam is a method for manufacturing a semiconductor device according to any one of claims 1 to 8, characterized in that a continuous wave laser light. The laser beam is a method for manufacturing a semiconductor device according to any one of claims 1 to 8, characterized in that the linear a beam processed laser light. Wherein a produced by the method according to any one of claims 1 to 10. A liquid crystal display device comprising the semiconductor device according to claim 11 .

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