JP2008154289A - Class-d amplification apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a class-D amplification apparatus which achieves high-precision and high-speed switching and reduces the apparatus in size while, in the prior art, in order to achieve high-speed switching, a large-sized FET having withstand voltage equal to that of a high-power FET is provided at a source side of the high-power FET, thereby preventing reduction of the apparatus in size and deteriorating precision of switching. <P>SOLUTION: The present invention relates to a class-D amplification apparatus which comprises a plurality of class-D amplifiers as a big step PA and a binary step PA, each of the class-D amplifiers comprising a small-power transistor Q14 which controls ON/OFF of amplifier output in accordance with an audio signal, at a gate side of high-power transistors Q10 and Q12 which perform switching in timing of opposite phases, and small-power transistors Q15, Q16 which are turned on/off by the audio signal and extracts charge at high speed, at a GND side of a transformer. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a class D amplifying apparatus used for an amplitude modulation transmitter, and more particularly to a class D amplifying apparatus capable of realizing high-speed and uniform switching and miniaturizing the apparatus.

Conventionally, a class D amplifying apparatus is used in a transmitter using an amplitude modulation method based on digital modulation control.
A general amplitude modulation transmitter including a class D amplifier will be described with reference to FIG. FIG. 2 is a configuration diagram of a general amplitude modulation transmitter including a class D amplifier.
As shown in FIG. 2, a general amplitude modulation transmitter is used for digital broadcasting or the like, and includes an A / D converter 1, an encoder 2, a plurality of big steps PA3, and a plurality of binary steps PA4. A carrier wave oscillator (OSC) 5, an FET driver IC 6, an output synthesizer (synthetic transformer) 7, a bandpass filter (BPF) 8, and a first power supply 9.

Each component will be described.
The A / D converter 1 converts an input modulation signal (sound) into a digital signal having a plurality of bits (for example, 12 bits).
The encoder 2 converts the signal into a signal for switching (on / off control) a big step PA3 and a binary step PA4 described later.

The big step PA (equal output power amplifier) 3 is composed of a FET (Field Effect Transistor) and is a high frequency amplifier that amplifies an input signal. As the big step PA3, there are N amplifiers PA1 to PAN (N = 26 in this case).
The binary step PA (binary power amplifier) 4 is an amplifier having a configuration similar to that of the big step PA3. As the binary step PA4, n amplifiers (here, n = 8) of 1/2 PA to 1/2 nPA are included. is there.
Each big step PA3 and each binary step PA4 are class D amplifiers that perform class D operation.

The carrier wave oscillator 5 is a high frequency oscillator that generates a carrier wave signal (rectangular wave) having a frequency f0.
The FET driver IC 6 is provided in one-to-one correspondence with each big step PA 3 and each binary step PA 4, and controls on / off of the corresponding big step PA 3 or binary step PA 4 based on the signal from the encoder 2. The big step PA3 or the binary step PA4 is operated in the class D by using the carrier wave signal from the carrier wave oscillator 5.

The output synthesizer 7 synthesizes and outputs output signals from the plurality of big steps PA3 and binary steps PA4.
A portion composed of a plurality of big steps PA3, binary steps PA4, and output synthesizer 7 is referred to as a class D amplifier.
The BPF 8 attenuates unnecessary high frequency components from the signal synthesized by the output synthesis unit 7.
The first power source 9 is a power source that supplies power to the class D amplifier.

The operation of a general amplitude modulation transmitter having the above configuration will be described.
In the transmitter, an audio signal which is a signal to be transmitted is converted into a 12-bit digital signal by the A / D converter 1, and a predetermined bit on the MSB (Most Significant Bit) side and an LSB (Least Significant) are converted by the encoder 2. Bit) side predetermined bits are extracted.

  The predetermined bits on the MSB side are respectively output to the FET driver ICs 6 corresponding to the 26 big step PA3, and the big step PA3 is controlled to be turned on / off by the FET driver IC6 and performs an amplification operation.

  Similarly, a predetermined bit on the LSB side is output to an FET driver IC 6 corresponding to eight binary steps PA4, and the binary step PA4 is ON / OFF controlled by the FET driver IC6 and is based on a fine information portion in the digital audio signal. Make corrections.

  The carrier wave (carrier) of the frequency f0 output from the carrier wave oscillator 5 is supplied to each big step PA3 and binary step PA4 via each FET driver IC6, and drives the big step PA3 and binary step PA4.

The outputs of each big step PA3 and binary step PA4 are output to the output combining unit 7 and combined, and unnecessary high frequency components are removed by the BPF 8 and output from the antenna. The output power is determined by the number of big steps PA3, the winding ratio of the synthesis transformer of the output synthesis unit 7, and the voltage of the first power supply 9.
In this way, the operation of a general amplitude modulation transmitter is performed.

Next, the configuration and operation of a conventional class D amplifier used for the big step PA3 and binary step PA4 of the amplitude modulation transmitter will be described with reference to FIG. FIG. 3 is a configuration diagram of a conventional class D amplifier.
As shown in FIG. 3, the conventional class D amplifier includes FET driver ICs 11a, 11b, and 11c, transistors Q1 and Q2, a pulse transformer 14, and high power transistors Q3 to Q7. The voltage of the first power supply 20 is applied to Q7. The transistors Q1 to Q7 are all formed of FETs.
Further, an inverting circuit is provided in front of the FET driver IC 11b, and the carrier wave signal is inverted and input to the FET driver IC 11b.

  The FET driver ICs 11a, 11b, and 11c are included in the FET driver IC 6 of FIG. 2. The FET driver IC 11a receives the carrier wave signal and drives the transistor Q1, and the FET driver IC 11b receives the inverted signal of the carrier wave. The transistor Q2 is driven in response to the input.

  Further, the FET driver IC 11c drives the transistor Q7 upon receiving an audio signal. When an audio signal is input, the transistor Q7 is turned on to obtain an amplifier output.

The pulse transformer 14 amplifies a digital signal, and is composed of four secondary side parts 14a to 14d. The pulse transformers 14a and 14d output a rectangular wave when the transistor Q1 is turned on, and 14b and 14c. Is to output a rectangular wave when the transistor Q2 is turned on.
The high power transistors Q3, Q4, Q5, and Q6 are composed of large FETs that can withstand the high voltage (about 180 to 200 V) of the first power supply 20, and perform switching of the amplifier.
The transistor Q7 enables high-speed switching operation in the above switching.

The operation of the class D amplifier having the above configuration will be described.
A carrier wave f0 from the carrier wave oscillator 5 is inputted to the FET driver IC 11a, and a signal having a phase opposite to that of the carrier wave f0 is inputted to the FET driver IC 11b and outputted as gate signals of the transistors Q1 and Q2. The transistors Q1 and Q2 alternately perform on / off operations according to the input gate signal. Thereby, the switching operation of the high power transistors Q3, Q4, Q5, and Q6 is performed, the class D amplification operation is performed by the combination of ON / OFF, and the amplifier output is connected to the series addition combining unit (“output combining unit 7” in FIG. Output).

  Specifically, a rectangular wave signal having the same phase as the carrier wave signal is output from the pulse transformers 14a and 14d and input to the gates of the high power transistor Q3 and the high power transistor Q6. That is, when the transistor Q1 is on, the high power transistors Q3 and Q6 are on.

  Similarly, a rectangular wave signal having a phase opposite to that of the carrier wave signal is output from the pulse transformers 14b and 14c and input to the gates of the high power transistors Q5 and Q4. That is, when the transistor Q2 is on, the high power transistors Q5 and Q4 are on.

  When the audio signal is turned on, the transistor Q7 is turned on, and the amplifier output is output to the serial addition / synthesis unit.

Here, the switching characteristics of the class D amplifier will be described with reference to FIG. FIG. 4 is an explanatory diagram showing the switching characteristics of a conventional class D amplifier.
In the digital amplitude modulation type transmitter described above, a single wave is formed by a class D amplifier that combines a plurality of class D amplifiers. Therefore, in order to obtain a high-quality output signal, each class D amplifier is used. Uniformity and high-speed switching are important factors.

  For example, as shown in FIG. 4, when the rise and fall switching of the class D amplifier is slow, spikes (zag) and glitches (dents) occur due to timing, resulting in deterioration of S / N ratio and spurious. There is a risk of deterioration of characteristics such as deterioration.

  Therefore, in the class D amplifier shown in FIG. 3, in order to realize high-speed switching, a transistor Q7 is provided on the source side of the high power transistors Q5 and Q6, GND is forcibly floated, and the gate-source has the same potential. This is a method for creating an off-state.

In addition, as a prior art regarding an amplitude modulation transmitter, there is JP-A 2004-201123 “Amplitude modulation transmitter” (applicant: Hitachi Kokusai Electric Inc., inventor: Atsushi Hisamatsu) published on July 15, 2004. .
This prior art includes a first amplification unit that amplifies the amplitude of the amplified signal based on the first magnification signal, a second amplification unit that amplifies the amplitude of the amplified signal based on the second magnification signal, And an amplitude modulation transmitter comprising: a drive unit that drives an output signal of the second amplifying unit; and a combining unit that combines the outputs of the first and second amplifying units and outputs the resultant signal as an output signal. The distortion due to the rise / fall time difference at the time of switching is reduced.

JP 2004-201123 A

  However, in the class D amplifier constituting the conventional class D amplifier, the transistor Q7 is provided on the source side of the transistors Q5 and Q6 in FIG. 3 in order to realize high-speed switching. Since it is applied, it is necessary to configure a large high-power transistor having a breakdown voltage equivalent to that of the high-power transistors Q3 to Q6, and further, it must be provided for each big step PA3 and binary step PA4. In addition, there is a problem that the heat radiation from Q7 may adversely affect the characteristics of the output signal.

  Furthermore, there is a problem that the larger the FET is, the larger the on-resistance and input capacitance of the FET are, and due to these variations, the delicate timing of switching tends to occur, and the higher the frequency, the more prominent.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a class D amplification device that realizes high-speed switching with high accuracy and can reduce the size of the device.

  The present invention for solving the above-described problems of the conventional example includes a class D amplifier including a plurality of full-bridge amplifiers and a synthesizer that synthesizes outputs from the plurality of amplifiers in series. A first transistor that is turned on / off in accordance with a carrier signal of the second signal, a second transistor that is turned on / off in accordance with a signal having a phase opposite to that of the carrier signal, and a center on the primary side by turning on / off of the first and second transistors And a pulse transformer that outputs an in-phase or anti-phase rectangular wave to the carrier signal from the secondary side, and a carrier wave signal that is output from the secondary side of the pulse transformer is turned on / off by the in-phase rectangular wave. The third and fourth transistors constituting the full bridge type, and the carrier wave signal output from the secondary side of the pulse transformer is turned on / off with a rectangular wave of opposite phase The fifth and sixth transistors constituting the full bridge type, the power source for applying a voltage to the third to sixth transistors constituting the full bridge type, and on / off depending on the presence or absence of an audio signal, The base of the fifth transistor and the fifth transistor are turned on / off by an inverted output of the presence / absence of an audio signal, and the base of the fourth transistor on the secondary side of the pulse transformer. An eighth transistor is characterized in that the other terminal with respect to the terminal to be connected and the terminal to be connected to the base of the fifth transistor is set to the ground level when turned on.

  According to the present invention, in a class D amplifying apparatus including a plurality of full-bridge amplifiers and a synthesizer that serially combines outputs from the plurality of amplifiers, the amplifier is turned on / off according to a carrier signal from an oscillator. 1 transistor, a second transistor that is turned on / off according to a signal opposite in phase to the carrier wave signal, and a push-pull operation centered on the primary side by turning on / off the first and second transistors, A pulse transformer that outputs a rectangular wave of the same phase or opposite phase to the carrier wave signal from the side, and a carrier wave signal that is output from the secondary side of the pulse transformer is turned on / off with the rectangular wave of the same phase to form a full bridge type. And a fourth transistor, and a carrier wave signal output from the secondary side of the pulse transformer is turned on / off with a rectangular wave of opposite phase to form a full bridge type. 5 and the sixth transistor, a power source for applying a voltage to the third to sixth transistors constituting the full bridge type, and on / off according to the presence or absence of an audio signal, the third transistor and the fifth transistor A seventh transistor whose base is set to the ground level when it is turned on, a terminal connected to the base of the fourth transistor on the secondary side of the pulse transformer, and a fifth transistor which are turned on / off by the inverted output of the presence / absence of an audio signal Since the other terminal with respect to the terminal connected to the base is a class D amplifier having an eighth transistor that is set to the ground level when it is turned on, the high voltage is not applied to the seventh and eighth transistors. Stable switching can be performed with a low-power transistor, and the size of the device can be reduced. Rukoto can, there is an effect that it is possible to enable fast switching by further eighth transistor.

Embodiments of the present invention will be described with reference to the drawings.
The class D amplifier according to the embodiment of the present invention includes a low power FET for controlling on / off of the amplifier on the gate side of two high power FETs operating at different timings and the GND side of the transformer. Thus, high-speed switching can be realized without using a high-power FET, and the device can be miniaturized.

  The class D amplification device (the present amplification device) according to the present embodiment is used for the general amplitude modulation transmitter shown in FIG. 2, and the configuration of the amplitude modulation transmitter itself is the same as FIG. . The class D amplifying device according to the present embodiment includes 26 big step PAs and 8 binary step PAs as in the conventional device shown in FIG. The configuration of the class D amplifier of the binary step PA4 is different from the conventional one.

A configuration of a class D amplifier (the present amplifier) used as a big step PA or a binary step PA constituting the present amplification device will be described with reference to FIG. FIG. 1 is a configuration diagram of a class D amplifier constituting the class D amplifier according to the embodiment of the present invention.
As shown in FIG. 1, the basic configuration of the class D amplifier according to this embodiment is similar to that of the conventional class D amplifier shown in FIG. 24, transistors Q10 to Q13, and a first power supply 29. These correspond to the FET driver ICs 11a and 11b, the transistors Q1 and Q2, the pulse transformer 14, and the high power transistors Q3 to Q6 in the conventional class D amplifier shown in FIG. 3, and the operation is also the same.

As a characteristic part of the class D amplifier according to the present embodiment, instead of the transistor Q7 that has been provided conventionally, a transistor Q14, a transistor Q15, a transistor Q16, and an FET driver IC 21c for driving them, An FET driver IC 21d is provided.
When this amplifier is applied to an amplitude modulation transmitter, the FET driver ICs 21a, 21b, 21c, and 21d shown in FIG. 1 are all included in the FET driver IC 6 shown in FIG.

The transistor Q14 and the driving FET driver IC 21c are provided on the gate side of the high power transistors Q10 and Q12, and the transistors Q15 and Q16 and the driving FET driver IC 21d are provided on the GND side of the pulse transformer 24. ing.
1 shows one of the 32 class D amplifiers, the configuration of the other class D amplifiers (PA2 to PA32) is the same. The serial addition / synthesis unit has the same configuration and operation as the conventional one.

The characteristic part of this amplifier is demonstrated.
The FET driver IC 21c receives an audio signal and drives the transistor Q14.
The transistor Q14 is an FET for controlling on / off of the amplifier output. Since the voltage of the first power supply 29 is not applied to Q14, it is composed of a small power FET that operates at 0 to 10V, and is small and capable of high-speed switching.

  When an audio signal is input, Q14 is turned on via the FET driver IC 21c, the gate of the high power transistor Q10 or Q12 is turned on, and the amplifier is turned on. As described with reference to FIG. 2, the high power transistors Q10 and Q12 are repeatedly turned on and off at opposite timings, and the amplifier output from the serial addition synthesis unit is output while the audio signal is being input. Is done.

Further, the FET driver IC 21d receives an inverted signal of the audio signal by the inverting circuit and drives the transistors Q15 and Q16.
Transistors Q15 and Q16 are FETs for low power similar to Q14, and are turned on when the audio signal is off, and the GND on the secondary side of the transformer is floated, so that the charges accumulated during the on time can be quickly GND. The amplifier can be turned on and off at high speed.

Next, the operation of this amplifier will be briefly described.
The carrier wave signal input from the carrier wave oscillator is input to the gates of the transistors Q8 and Q9 through the FET driver ICs 21a and 21b as gate input signals having opposite phases, and Q8 and Q9 are alternately turned on / off in opposite phases. Do.

  As a result, a push-pull operation is performed with the primary side midpoint of the pulse transformer 24 as the center, and a rectangular wave signal in phase with the carrier wave signal is output from the pulse transformers 24a and 24d in response to the on / off of the transistor Q8. And input to the gates of the high power transistor Q10 and the high power transistor Q13. That is, when the transistor Q8 is on, the high power transistors Q10 and Q13 are on.

  Similarly, a rectangular wave having a phase opposite to that of the carrier wave is output from the pulse transformers 24b and 24c according to the on / off state of the transistor Q9, and is input to the gates of the high power transistors Q12 and Q11. That is, when the transistor Q9 is on, the high power transistors Q12 and Q11 are on.

  That is, when the high power transistors Q10 and Q13 are on, the high power transistors Q12 and Q11 are off, and when the high power transistors Q10 and Q13 are off, the high power transistors Q12 and Q11 are on. It is.

In addition to this, along with the on / off of the audio signal, when the audio signal is on, the transistor Q14 is turned on, and the gates of the high power transistors Q10 and Q12 are connected to the GND side through the diode, and the current is By flowing, a rectangular wave signal is applied to the pulse transformers 24a and 24b, and further, a rectangular wave signal is also applied to the gates of the high power transistors Q11 and Q13, and an output (amplifier output) is output to the serial addition combining unit. . The output when the high power transistors Q10 and Q13 are turned on and the output when Q12 and Q11 are turned on are alternately output to the serial addition synthesis unit.
Also, when the audio signal is off, the transistors Q15 and 16 are turned on to remove the remaining charge at high speed.

In FIG. 1, the transistor Q14 is turned on when the audio signal is turned on, and the signal input to the gates of the transistors Q10 and Q12 on the secondary side of the pulse transformer 24 is dropped to GND (ground level). Although it functions as a control signal for the gate of Q12, the influence on the transistors Q10 to Q13 is separated. Further, when the transistors Q15 and Q16 are OFF, the transistors Q10 to Q13 can be switched at high speed by floating the GND on the secondary side of the pulse transformer 24.
When the transistors Q15 and Q16 are turned on, the charge is forcibly removed and the transistors Q10 to Q13 are appropriately switched.
In this way, the operation of the present amplifier is performed.

  According to the class D amplifier according to the embodiment of the present invention, the transistors Q8 and Q9 that repeat ON / OFF in opposite phases based on the carrier wave signal, and the push-pull centering on the primary side midpoint by the ON / OFF. A class-D amplifier including a pulse transformer 24 that performs operation and power transistors Q10 to Q13 that perform switching thereby, and an audio signal is connected to the gate side of the power transistors Q10 and Q12 that perform switching at phases opposite to each other. Is provided with transistors Q14 for controlling on / off of the amplifier output, and transistors Q15, Q16 that are turned on / off by an audio signal on the GND side of the transformer to extract charges at high speed. Therefore, Q14, Q15, Q16 As a small power transistor, the size is reduced and Q15, Q16 There is an effect that it is possible to enable faster switching.

  The amplitude modulation transmitter according to the embodiment of the present invention includes a plurality of big step PA3 and a plurality of binary step PA4 each including a class D amplifier, and combines and outputs the outputs from the amplifiers. An amplifier is provided, and the class D amplifier is provided with a transistor Q14 for controlling on / off of the amplifier output by an audio signal on the gate side of the power transistors Q10 and Q12 that perform switching at phases opposite to each other, and the GND side of the transformer Since it is a class D amplifier equipped with transistors Q15 and Q16 that are turned on / off by an audio signal and extracts charges at high speed, Q14, Q15, and Q16 are used as low-power transistors to reduce the size of the entire transmitter. , Q15, and Q16 have an effect of enabling high-speed switching.

  The present invention is particularly suitable for a class D amplifying device that realizes high-speed and uniform switching and can reduce the size of the device.

It is a block diagram of the class D amplifier which comprises the class D amplifier which concerns on embodiment of this invention. It is a block diagram of the general amplitude modulation transmitter provided with the class D amplifier. It is a block diagram of the conventional class D amplifier. It is explanatory drawing which shows the switching characteristic of the conventional class D amplifier.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... A / D converter, 2 ... Encoder, 3 ... Big step PA, 4 ... Binary step PA, 5 ... Carrier wave oscillator, 6 ... FET driver IC, 7 ... Output composition part, 8 ... Band pass filter, 9 ... First 1 power supply, 11 ... FET driver IC, 14 ... pulse transformer, 20 ... first power supply, 21 ... FET driver IC, 24 ... pulse transformer, 29 ... first power supply

Claims (1)

In a class D amplifying apparatus comprising a plurality of full-bridge amplifiers and a synthesizer that serially synthesizes outputs from the plurality of amplifiers,
The amplifier is
A first transistor that turns on and off in accordance with a carrier signal from an oscillator;
A second transistor that is turned on / off according to a signal having a phase opposite to that of the carrier signal;
A pulse transformer that performs a push-pull operation around the primary side midpoint by turning on and off the first and second transistors, and outputs an in-phase or anti-phase rectangular wave to the carrier signal from the secondary side;
A third transistor and a fourth transistor that are turned on / off with a rectangular wave in phase with the carrier wave signal output from the secondary side of the pulse transformer to form a full bridge;
A fifth transistor and a sixth transistor which are turned on / off with a rectangular wave having a reverse phase to the carrier wave signal output from the secondary side of the pulse transformer, and constitute a full bridge type;
A power supply for applying a voltage to the third to sixth transistors constituting a full-bridge type;
A seventh transistor that is turned on / off depending on the presence or absence of an audio signal, and sets the bases of the third transistor and the fifth transistor to the ground level when turned on;
The other terminal with respect to the terminal connected to the base of the fourth transistor and the terminal connected to the base of the fifth transistor on the secondary side of the pulse transformer is turned on / off by the inverted output of the presence or absence of the audio signal And an eighth transistor that is set to the ground level when turned on.

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