JP2008147207A - Thin-film transistor substrate - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a thin-film transistor substrate which does not cause cracking in the electrode or a semiconductor thin film constituting the thin-film transistor nor exfoliate easily even with heat or atmosphere when a thin-film transistor substrate is produced using a plastic base exhibiting poor dimensional stability. <P>SOLUTION: The thin-film transistor substrate comprises a plastic base 10, a compressive stress film 12 composed of an inorganic material on the plastic base 10, and a metal electrode film 15 or a semiconductor thin-film 13 formed on the compressive stress film 12. Preferably, the compressive stress film 12 has a stress value of 0.05 GPa or above and an absolute value of 1.0 GPa or less, and the compressive stress film 12 is preferably any one selected from a group of silicon oxide film, silicon nitride film, aluminum oxide film, aluminum nitride film, aluminum oxynitride film, and silicon oxynitride film. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a thin film transistor substrate, and more particularly to a thin film transistor substrate having a plastic base material, in which a metal electrode film or a semiconductor thin film constituting the thin film transistor is not cracked and hardly peeled off.

  In an active matrix drive type display device, a polysilicon thin film transistor (hereinafter referred to as TFT) is used as a switching element provided in each pixel or a circuit element constituting a peripheral circuit on a display substrate of the display device. Yes. A liquid crystal display panel, which is one of active matrix drive type display devices, is often used for mobile display applications such as mobile phones and PDAs, and a TFT substrate having further weight reduction and impact resistance is desired. . Particularly in recent years, a TFT substrate using a plastic substrate instead of a glass substrate has been proposed.

As a method for manufacturing a TFT substrate using a plastic substrate, two types of manufacturing methods are mainly known. One is a method in which a TFT is manufactured on a glass substrate by a conventional technique, and then the TFT is peeled off from the glass substrate, and the peeled TFT is bonded to a plastic substrate. Since this method can use the conventional technique of producing TFTs on a glass substrate, it can produce TFTs with high performance. However, since complicated processes such as peeling and bonding are added, an increase in manufacturing cost is inevitable. There is a difficulty. The other is a method in which a TFT is directly formed on a plastic substrate using a plastic substrate (see, for example, Patent Documents 1 and 2).
JP 2000-68518 A (paragraph number 0017) JP 2000-188402 A (paragraph number 0028)

  In the method of directly manufacturing a TFT on a plastic substrate, a plastic substrate having a larger linear expansion coefficient and less dimensional stability than a glass substrate is used, so that the plastic substrate is heated by heat applied during the manufacturing process of the TFT substrate. Even when a low-temperature process suitable for a plastic substrate is developed as a manufacturing process of a TFT substrate, it is easily extended even at a low temperature (for example, 150 ° C.) used for drying moisture. Further, when water is used as in a cleaning process, the plastic substrate may be stretched due to swelling.

  By the way, most TFTs are composed of electrodes and semiconductor thin films made of inorganic materials, but these films are mostly those having tensile stress and do not have elasticity like a plastic substrate. When the plastic substrate is stretched, the electrodes and the semiconductor thin film cannot follow the elongation of the plastic substrate, and stress concentrates to cause cracks, and in the worst case, the film may peel off.

  The present invention has been made in order to solve the above-described problems, and the object thereof is to configure a thin film transistor by heat and atmosphere applied when a thin film transistor substrate is manufactured using a plastic substrate having poor dimensional stability. It is an object of the present invention to provide a thin film transistor substrate that does not cause cracks in the electrode and the semiconductor thin film and is difficult to peel off.

  In the process of studying to solve the above problems, the present inventor formed a compressive stress film on a plastic base material, and when the plastic base material was stretched due to heat or moisture during the manufacture of a thin film transistor substrate Even so, the inventors have discovered that a crack does not occur in the electrode or the semiconductor thin film and that a phenomenon that is difficult to peel off occurs, and the present invention has been completed based on the knowledge.

  That is, the thin film transistor substrate of the present invention comprises at least a plastic substrate, a compressive stress film made of an inorganic material formed on the plastic substrate, and a metal electrode film or a semiconductor thin film formed on the compressive stress film. It is characterized by having.

  According to the present invention, the compressive stress film made of an inorganic material is formed on the plastic substrate, and the metal electrode film or the semiconductor thin film having a tensile stress is formed thereon. Therefore, the compressive stress film and the metal electrode film or the semiconductor are formed. Stress cancellation occurs between the thin film and the total stress as a laminated film composed of the compressive stress film and the metal electrode film or the semiconductor thin film is reduced. As a result, even when heat and moisture are applied during the manufacture of thin film transistor substrates and the plastic base material is stretched and compressive stress is generated in the plastic base material, the laminated film with the reduced total stress generates compressive stress. Stress concentration does not occur on the plastic substrate, and cracks and peeling do not occur in the metal electrode film and semiconductor thin film. Furthermore, since a laminated film of a compressive stress film made of an inorganic material and a metal electrode film or semiconductor thin film having a tensile stress is an inorganic laminated film, a metal electrode film or a semiconductor thin film is formed on a plastic substrate made of an organic material. Compared to the case, the adhesion between the compressive stress film and the metal electrode film or the semiconductor thin film is superior. As a result, even when heat or moisture is applied during the manufacture of the thin film transistor substrate and the plastic substrate is somewhat stretched, no cracks or peeling occurs in the metal electrode film or the semiconductor thin film.

  In the thin film transistor substrate of the present invention, it is preferable that a stress value of the compressive stress film has an absolute value of 0.05 GPa or more and 1.0 GPa or less.

  According to this invention, since the stress value of the compressive stress film is within the above range, even if the tensile stress of the metal electrode film or the semiconductor thin film formed thereon has various values, the compressive stress film and the tensile stress The total stress as a laminated film composed of a metal electrode film or a semiconductor thin film having a large thickness can be reduced. In particular, if a compressive stress film having a large stress value is formed, the film includes a compressive stress film and a metal electrode film or a semiconductor thin film The stress of the laminated film can be made a compressive stress as a whole. As a result, even when heat or moisture is applied during the manufacture of the thin film transistor substrate and the plastic base material is stretched and compressive stress is generated on the plastic base material, the laminated film provided on the plastic base material has low stress or compression. Since it is a stress film, the laminated film does not cause stress concentration on the plastic base material on which compressive stress is generated, and the metal electrode film and the semiconductor thin film do not crack or peel off.

  In the thin film transistor substrate of the present invention, (a) the compressive stress film is selected from the group consisting of a silicon oxide film, a silicon nitride film, an aluminum oxide film, an aluminum nitride film, an aluminum oxynitride film, and a silicon oxynitride film. (B) The metal electrode film is preferably a copper film, an aluminum film, a molybdenum film, or a chromium film, and the semiconductor thin film is preferably polycrystalline silicon or amorphous silicon.

  The compressive stress is a force that the formed film tends to stretch, and the tensile stress is a force that the formed film tends to shrink.

  According to the thin film transistor substrate of the present invention, stress cancellation occurs between the compressive stress film and the metal electrode film or semiconductor thin film having a tensile stress, and the total stress as a laminated film composed of the compressive stress film and the metal electrode film or semiconductor thin film is reduced. Therefore, even when heat or moisture is applied during the manufacture of a thin film transistor substrate and the plastic base material is stretched and compressive stress is generated in the plastic base material, the laminated film with the reduced total stress has a compressive stress. Stress concentration does not occur on the generated plastic substrate, and cracks and peeling do not occur in the metal electrode film and semiconductor thin film. Furthermore, since the thin film transistor substrate of the present invention has excellent adhesion between a compressive stress film made of an inorganic material and a metal electrode film or semiconductor thin film having a tensile stress, heat and moisture are added during the manufacture of the thin film transistor substrate, so Even when the material is somewhat elongated, cracks and peeling are unlikely to occur in the metal electrode film and the semiconductor thin film.

  Such a thin film transistor substrate of the present invention improves the production yield, and further, for example, when combined with an organic EL element or the like, a flexible display can be designed.

  Hereinafter, the thin film transistor substrate of the present invention will be described in detail. FIG. 1 is a schematic cross-sectional view showing an example of the TFT element portion of the thin film transistor substrate of the present invention, and FIG. 2 is a schematic cross-sectional view showing another example of the TFT element portion of the thin film transistor substrate of the present invention. 3 and 4 are explanatory views showing the manufacturing process of the thin film transistor substrate of the present invention. FIG. 5 is a schematic diagram for explaining the action of the compressive stress film formed on the plastic substrate and the metal electrode film or semiconductor thin film having tensile stress. In addition, this invention is not limited to the form of drawing or the following embodiment.

  The thin film transistor substrate of the present invention includes the TFT element portion 1 shown in FIGS. 1 and 2, and includes a plastic substrate 10, a compressive stress film 12 formed on the plastic substrate 10, and a compressive stress film 12. It has at least the metal electrode film 15 or the semiconductor thin film 13 having a tensile stress formed thereon. Such a thin film transistor substrate can be used, for example, as a display panel constituting an active matrix drive type display device. In FIG. 5, the metal electrode film 15 or the semiconductor thin film 13 having a tensile stress is shown as the tensile stress film 50, but in FIGS. 1 to 4, the metal electrode film 15 or the semiconductor thin film 13 is shown as the tensile stress film. It is not shown as 50.

  More specifically, the TFT element unit 1 shown in FIG. 1 includes a plastic substrate 10, an inorganic adhesion film 11 formed on the plastic substrate 10, and a compressive stress composed of an inorganic material formed on the inorganic adhesion film 11. The film 12, the polysilicon film 13 (source side diffusion film 13s, channel film 13c, and drain side diffusion film 13d) formed on the compressive stress film 12, and the gate insulating film 14 formed on the polysilicon film 13 And a metal electrode 15 (source electrode 15s, gate electrode 15g and drain electrode 15d) formed on the gate insulating film 14 or through a contact hole of the gate insulating film 14, and a protective film 18 covering the metal electrode 15 and the like. And have.

  In the following, the structure of the TFT element portion 1 having the top gate / top contact structure shown in FIG. 1 will be described as an example, and the details will be described in the order of the manufacturing steps based on FIGS. 3 and 4. The substrate is not limited to the illustrated example, and may be a form in which a compressive stress film 12 made of an inorganic material and a metal electrode film 15 or a semiconductor thin film 13 having a tensile stress are laminated in that order on a plastic substrate 10. For example, the present invention can also be applied to the bottom gate / top contact structure shown in FIG. 2A, the bottom gate / bottom contact structure shown in FIG. 2B, and the top gate / bottom contact structure shown in FIG.

  The plastic substrate 10 forms a supporting substrate for the thin film transistor substrate. For example, polyether sulfone (PES), polyethylene naphthalate (PEN), polyamide, polybutylene terephthalate, polyethylene terephthalate, polyphenylene sulfide, polyether ether. The organic base material which consists of a ketone, a liquid crystal polymer, a fluororesin, a polycarbonate, a polynorbornene-type resin, a polysulfone, a polyarylate, a polyamide imide, a polyether imide, a thermoplastic polyimide, etc., or those composite base materials can be mentioned. The plastic substrate 10 is not particularly limited, and may be rigid, or may be a thin flexible film having a thickness of about 5 μm to 300 μm. The use of the flexible plastic substrate 10 can be applied to a film display or the like because the thin film transistor substrate can be made flexible.

  First, as shown in FIG. 3A, an inorganic adhesion film 11 is formed on the prepared plastic substrate 10 as necessary. The inorganic adhesion film 11 is not an essential film, and may not be provided when the adhesion between the compressive stress film 12 described later and the plastic substrate 10 is good. When the inorganic adhesion film 11 is provided, it is necessary that it be formed at least in the region where the TFT is formed, but it may or may not be formed in other regions. It may be formed. The inorganic adhesion film 11 is formed of any material selected from the group consisting of chromium, titanium, aluminum, silicon, chromium oxide, titanium oxide, aluminum oxide, silicon nitride, and silicon oxynitride. Among these, a metal-based inorganic adhesion film made of chromium, titanium, aluminum, silicon, or the like is preferably used.

  Although the range of the thickness of the inorganic adhesion film 11 varies slightly depending on the material constituting the film, it is usually preferably in the range of 1 to 200 nm, and more preferably in the range of 3 to 50 nm. In the case of a metal-based inorganic adhesion film made of chromium, titanium, aluminum, or silicon, it is more preferably within a range of 3 to 10 nm, and chromium oxide, titanium oxide, aluminum oxide, silicon nitride, or acid In the case of a compound-based inorganic adhesion film made of silicon nitride, it is more preferably in the range of 5 to 50 nm.

  The inorganic adhesion film 11 can be formed by various methods such as a DC sputtering method, an RF magnetron sputtering method, and a plasma CVD method, but in practice, a preferable method according to the material constituting the film is adopted. Is done. Usually, a DC sputtering method, an RF magnetron sputtering method, or the like is preferably used.

  Next, as shown in FIG. 3B, a compressive stress film 12 is formed on the plastic substrate 10 (or on the inorganic adhesion film 11 when the inorganic adhesion film 11 is formed on the plastic substrate 10). To do. The compressive stress film 12 is an indispensable film formed at least on the TFT element portion 1 where the thin film transistor is formed, but it may or may not be formed in any other region. It may be formed on the entire surface. The compressive stress film 12 is directly provided on the plastic base material 10 without using the inorganic adhesive film 11 as described above when the adhesiveness between the compressive stress film 12 and the plastic base material 10 is good.

  The compressive stress film 12 may be a film having a compressive stress that the formed film tends to stretch, and is preferably a film having a larger compressive stress.

  Here, the action of the compressive stress film 12 will be described in detail. FIG. 5 is a schematic diagram for explaining the action of the compressive stress film 12 formed on the plastic substrate 10 and the tensile stress film 50 made of the metal electrode film or semiconductor thin film constituting the present invention. FIG. 5A shows an example in which the compressive stress film 12 is not provided between the plastic substrate 10 and the tensile stress film 50, and FIG. 5B shows an example between the plastic substrate 10 and the tensile stress film 50. An example in which a compressive stress film 12 is provided is shown. As shown in FIG. 5A, when a metal electrode film or a semiconductor thin film, which is a tensile stress film 50, is formed on a plastic substrate 10, if the heat is applied or exposed to water in the subsequent process, the plastic A compressive stress is generated in the base material 10 so as to extend, and a stress in the opposite direction is generated between the plastic base material 10 and the tensile stress film 50. Since the tensile stress film 50 made of an inorganic film such as a metal electrode film or a semiconductor thin film has a smaller linear expansion coefficient than the plastic base material 10, the plastic base material 10 and the metal electrode film or semiconductor thin film that is the tensile stress film 50 When the stress concentration due to the opposite stress generated between the tensile stress film 50 and the tensile stress film 50 is weak, the tensile stress film 50 is cracked at the portion where the adhesion between the plastic substrate 10 and the tensile stress film 50 is weak. The tensile stress film 50 may be peeled off.

  On the other hand, as shown in FIG. 5B, when a metal electrode film or semiconductor thin film that is the tensile stress film 50 is formed on the plastic substrate 10 via the compressive stress film 12, heat is generated in the subsequent steps. Even if compressive stress is generated in the plastic substrate 10 due to the application of water or exposure to water, stress in the same direction is generated between the plastic substrate 10 and the compressive stress film 12. At this time, even if the compressive stress film 12 is an inorganic film having a smaller linear expansion coefficient than the plastic base material 10, the stress generated between the plastic base material 10 and the compressive stress film 12 is in the same direction. Therefore, stress concentration is unlikely to occur in the compressive stress film 12. In addition, the tensile stress film 50 and the compressive stress film 12 generate stresses in opposite directions, but since both films made of inorganic films are excellent in adhesion, cracks and the like are unlikely to occur. Stress cancellation occurs between them, and the total stress as the laminated film 51 composed of the compressive stress film 12 and the tensile stress film 50 is reduced. From these results, even when heat or moisture is applied during the manufacture of the thin film transistor substrate and the plastic substrate 10 is stretched to cause a compressive stress in the plastic substrate 10, the laminated film 51 having a reduced total stress is obtained. No stress concentration occurs on the plastic substrate 10 that has generated compressive stress, and no cracks or peeling occurs in the tensile stress film 50 such as a metal electrode film or a semiconductor thin film.

  The compressive stress film 12 preferably has a stress that is somewhat larger than that having a stress that is too small, and specifically has an absolute value that is recognized as “substantially compressive stress”, that is, It is preferable to have an absolute value of 0.05 GPa or more. The upper limit is preferably 1.0 GPa. In the present invention, the stress direction of the compressive stress film 12 is the same as the stress direction of the plastic substrate 10, and the compressive stress film 12 is in close contact with the metal electrode film 15 or the semiconductor thin film 13 which is the tensile stress film 50. Since it is better than the compressive stress film 12 having a small stress even within the range of the above absolute value (0.05 GPa or more) and 1.0 GPa or less to the extent that it is recognized as having substantially compressive stress. It is preferable to form the compressive stress film 12 having a large stress. Further, by setting the stress value of the compressive stress film 12 within the above range, even if the tensile stress of the tensile stress film 50 formed on the compressive stress film 12 has various values, the compressive stress film 12 and the tensile stress are reduced. The total stress as the laminated film 51 including the film 50 can be reduced.

  In particular, when the compressive stress film 12 having an absolute value of 0.2 GPa or more and 1.0 GPa or less is formed, in most cases, the stress of the laminated film 51 composed of the compressive stress film 12 and the tensile stress film 50 as a whole. Since compressive stress can be obtained, even when heat or moisture during the manufacturing process is applied and the plastic substrate 10 is stretched to cause compressive stress in the plastic substrate 10, the laminate provided thereon The film 51 is a film having a low stress or a compressive stress. As a result, the laminated film 51 or the tensile stress film 50 does not cause stress concentration on the plastic substrate 10 that has generated compressive stress, and does not crack or peel off.

  The compressive stress film 12 is preferably any one selected from the group of inorganic films such as a silicon oxide film, a silicon nitride film, an aluminum oxide film, an aluminum nitride film, an aluminum oxynitride film, and a silicon oxynitride film, In particular, a silicon oxide film is preferable from the viewpoint of ease of film formation. These films become compressive stress films according to normal film forming conditions, but can be formed as tensile stress films by changing the film forming conditions. However, in the present invention, these films have compressive stress. The film is formed under film conditions.

The stress described above can be measured using a measuring instrument based on the Newton ring method. This measurement method can be performed using, for example, a film stress measurement system (measuring machine name: FT-900, NIDEK Co., Ltd.) or the like, and a compressive stress film to be measured is formed on a silicon substrate. Then, the curvature radius of the silicon substrate deformed by the film stress of the compressive stress film is obtained, and the relational expression between the curvature radius and the film stress [Stoney's formula: σ = E × D ² / {(1-ν) × 6 × d × r}, E: Young's modulus of silicon substrate, D: thickness of silicon substrate, d: thin thickness of compressive stress film, ν: Poisson's ratio, r: radius of curvature. ].

  The thickness of the compressive stress film 12 is not particularly limited as long as it has the above-described film stress, and the range is slightly different depending on the material of the actually formed film, but the thickness is usually 100 nm or more. It is preferably in the range of 1000 nm or less, and more preferably in the range of 100) to 300 nm from the viewpoint of film formation time. If the thickness of the compressive stress film 12 is less than 100 nm, it may be too thin to achieve a desired stress. On the other hand, when the thickness of the compressive stress film 12 exceeds 1000 nm, the stress to be generated is saturated, so that the film formation time becomes long and the cost increases.

  The compressive stress film 12 can be formed by various methods such as a DC sputtering method, an RF magnetron sputtering method, and a plasma CVD method. In practice, a preferable method according to the material constituting the film is adopted. Is done. Usually, a DC sputtering method, an RF magnetron sputtering method, or the like is preferably used.

  Next, as shown in FIG. 3C, a non-doped amorphous silicon film 21 a is formed on the compressive stress film 12. In the example of FIGS. 3 and 4, this amorphous silicon film 21a becomes the tensile stress film 50 shown in FIG. The tensile stress of the amorphous silicon film 21a varies depending on the film forming method and film forming conditions, but in any case, the tensile stress has a tensile stress and is formed on the above-described compressive stress film 12. A laminated film 51 composed of the stress film 50 (see FIG. 5B) is formed. In the laminated film 51, as described above, stress cancellation occurs between the compressive stress film 12 and the tensile stress film 50, and the total stress as the laminated film 50 is reduced. Therefore, heat and moisture are added during the manufacture of the thin film transistor substrate. Even when the plastic base material 10 is stretched and compressive stress is generated in the plastic base material 10, the laminated film 51 in which the total stress is reduced causes stress concentration on the plastic base material 10 in which the compressive stress is generated. Therefore, no cracks or peeling occurs in the amorphous silicon film 21a.

The amorphous silicon film 21a can be formed by various methods such as an RF magnetron sputtering method and a CVD method. For example, when an amorphous silicon film is formed by the RF magnetron sputtering method, for example, the film is formed with a thickness of, for example, 50 nm under a film formation temperature: room temperature, a film formation pressure: 0.2 Pa, and a gas: argon film formation condition. I can make a film. In addition, even when an amorphous silicon film is formed by the CVD method, the film can be formed at a film formation temperature of about 25 ° C. However, since SiH ₄ is used as a source gas, a dehydrogenation process at about 400 ° C. is performed after the film formation. (About 1 hour in a vacuum) is required. The compressive stress film 12 acts as a buffer film against heat applied during the dehydrogenation process, and can prevent interface peeling with the plastic substrate 10 based on the heat during the dehydrogenation process.

  A silicon oxide film (not shown) is preferably formed on the amorphous silicon film 21a. This silicon oxide film is formed to a thickness of about 50 to 150 nm by, for example, an RF magnetron sputtering method, and the amorphous silicon film 21a or polysilicon is formed in processes such as laser irradiation, resist process, ion implantation, resist ashing, and laser activation described later. It acts to protect the membrane 21p. This silicon film (not shown) is removed by wet etching using, for example, a 2% HF solution, at least before the defect processing step for the polysilicon film 13 described later.

Next, as shown in FIG. 3D, laser irradiation 22 is performed to crystallize the amorphous silicon film 21a and change it to a low resistance polysilicon film 21p. The laser irradiation 22 is a crystallization means for crystallizing the amorphous silicon film 21a to form a polysilicon film 21p (polycrystalline silicon film). Various lasers such as a XeCl excimer laser and a CW (Continuous Wave) laser are used. It can be carried out. For example, when crystallization is performed using a XeCl excimer laser, as an example, pulse width: 30 nsec (FWHM (full width at half-maximum)), energy density: 400 mJ / cm ² , room temperature conditions Can be done. The compressive stress film 12 acts as a buffer film for buffering the heat applied during laser irradiation in this step, and can prevent interface peeling from the plastic substrate 10 based on the heat applied during laser irradiation.

  Further, the amorphous silicon film 21a formed on the compressive stress film 12 becomes the polysilicon film 21p by the laser irradiation 22, but the crystallized polysilicon film 21p formed on the compressive stress film 12 also has a certain amount. Has tensile stress. The tensile stress at this time varies depending on the type of film, laser irradiation conditions, and the like, but in any case, it has a tensile stress and is formed on the above-described compressive stress film 12 to compress the compressive stress film 12 and the tensile stress film 50. Is formed (see FIG. 5B). Accordingly, in this laminated film 51, stress cancellation occurs between the compressive stress film 12 and the tensile stress film 50 as in the case of the amorphous silicon film 21a described above, and the total stress as the laminated film 50 is reduced, so that the thin film transistor substrate Even when heat or moisture is applied during production of the plastic base material 10 and the plastic base material 10 is compressed and a compressive stress is generated, the laminated film 51 in which the total stress is reduced is the plastic that has generated the compressive stress. Stress concentration does not occur on the base material 10, and cracks and peeling do not occur in the polysilicon film 21p.

  Next, as shown in FIG. 3E, a resist film 23 is formed on the polysilicon film 21p, and then the resist film 23 is patterned. The resist film 23 is a resist film for shielding impurity ions added to a predetermined region of the polysilicon film 21p. For example, various positive photoresists on the market are preferably used. The resist film 23 is formed to a thickness of, for example, about 700 nm by applying a resist to the entire surface by means of a spinner or the like, and drying and curing the resist film. Said compressive-stress film | membrane 12 has a buffer effect also with respect to the heat | fever of the drying process added at this process.

After patterning the resist film, ion implantation 24 is performed as shown in FIG. In the ion implantation 24, for example, phosphorus (P) is implanted at an implantation voltage of 10 keV and a room temperature at a doping level of 2 × 10 ¹⁵ / cm ² . By such ion implantation, a source-side diffusion film 13s and a drain-side diffusion film 13d are formed in the polysilicon film 21p, and a channel film 13c is formed between the films 13s and 13d.

  Next, as shown in FIG. 3F, the resist film 23 is removed by a plasma ashing method. The plasma ashing method is a method in which a plasma oxygen gas reacts with the resist film 23 and the organic resist film 23 is decomposed (ashed) into carbon dioxide gas or water to be removed. The plasma ashing method uses a commercially available apparatus called plasma asher (not shown). For example, gas: oxygen gas, gas flow rate: 60 sccm, applied power: 500 W, pressure: 6.6 Pa, treatment time: 10 minutes Can be done. Specifically, after the inside of the chamber is set to a predetermined oxygen gas atmosphere, a substrate in the TFT element manufacturing process is placed on the cathode electrode plate, and an RF transmitter is provided between the cathode electrode plate and the opposing anode electrode. A device that generates oxygen plasma by applying a high-frequency voltage is used.

Next, as shown in FIG. 3G, the formed source-side diffusion film 13s and drain-side diffusion film 13d are irradiated with an energy beam 25 to activate both films 13s and 13d. As the energy beam 25, the same XeCl excimer laser as described above can be used. As an example, it can be performed under the conditions of a pulse width of 30 nsec (FWHM), an energy density of 100 to 250 mJ / cm ² , and room temperature. Further, a silicon oxide film (not shown) formed on the amorphous silicon film 21a is removed by wet etching after this activation process and before the following defect processing process.

  After the activation process, a defect process using oxygen plasma is generally performed to reduce defects in the polysilicon film 21p. For example, the oxygen plasma treatment is performed under the conditions of RF 100 W, 1 Torr, and 150 ° C., and thereafter, the drying treatment is performed under the condition of 120 ° C.

Next, as shown in FIG. 4H, dry etching is performed to form islands. As the etching gas, SF ₆ or the like can be used. After the island is formed, washing with water, washing under a condition of 120 ° C. and drying are performed.

Next, as shown in FIG. 4I, a gate insulating film 14 is formed on the entire surface including the source side diffusion film 13s, the channel film 13c, and the drain side diffusion film 13d. The gate insulating film 14 is formed by using, for example, an RF magnetron sputtering apparatus and applying power to an 8-inch SiO ₂ target: 1.0 kW (= 3 W / cm ² ), pressure: 1.0 Pa, gas: argon + O ₂ ( 50%) of silicon oxide having a thickness of about 100 nm is formed.

  Next, as shown in FIG. 4J, the contact hole 26 is formed by selectively etching the gate insulating film 14 on the source side diffusion film 13s and the drain side diffusion film 13d using a resist process. . For example, after forming a resist film on the gate insulating film 14, the resist film is patterned by exposure and development by a resist process using a photomask. The gate insulating film 14 in the contact hole forming portion exposed by the patterning is wet etched using, for example, a 2% HF solution to form the contact hole 26, and then the resist film is removed by the plasma ashing method similar to the above.

  Next, as shown in FIG. 4K, after depositing an aluminum (Al) film having a thickness of, for example, 200 nm on the entire surface, patterning is performed by wet etching to form a source electrode 15s, a drain electrode 15d, and a gate electrode 15g. To do. The electrode material may be copper (Cu) or other conductive material, or may be formed by other film forming processes such as sputtering.

  Next, as shown in FIG. 4L, a protective film 18 is formed so as to cover the entire element. A preferable example of the protective film 18 is a silicon oxide film. The protective film 18 is preferably formed with a thickness of about 20 nm by, for example, RF magnetron sputtering.

  Finally, as shown in FIG. 4 (M), treatment with high-pressure steam 28 is performed to terminate silicon defects in the polysilicon film. For example, a dangling bond on the silicon surface is terminated by high-pressure steam treatment, and a leak path at the interface between the polysilicon 13 and the gate insulating film 14 is eliminated. Thus, the thin film transistor of one embodiment illustrated in FIG. 4M is manufactured.

  As described above, according to the present invention, the compressive stress film 12 made of an inorganic material is formed on the plastic substrate 10, and the tensile stress film 50 such as a metal electrode film or a semiconductor thin film is formed thereon. Even when heat or moisture is applied during the manufacture of the substrate and the plastic base material 10 is stretched to cause a compressive stress in the plastic base material 10, the laminated film 51 or the tensile stress film 50 is a plastic base that has generated the compressive stress. Stress concentration does not occur on the material 10, and cracks and peeling do not occur. As a result, it is possible to manufacture a thin film transistor substrate with a very high yield, which can be preferably applied particularly to a polysilicon TFT for a mobile display using a plastic substrate, and for a mobile display using a liquid crystal display or an organic EL display. It can contribute to cost reduction and reliability improvement.

  3 and 4 are manufacturing examples of the TFT element portion 1 of FIG. 1 having a top gate / top contact structure, but the thin film transistor substrate of the present invention is not limited to the illustrated process examples. It can be formed in various modifications. For example, the metal electrode film applied as the tensile stress film 50 may be a copper film, an aluminum film, a molybdenum film, or a chromium film, or the semiconductor thin film may be polycrystalline silicon or amorphous silicon. Good.

  A TFT element portion 1A having a bottom gate / top contact structure shown in FIG. 2A includes a plastic substrate 10, an inorganic adhesion film 11 formed on the plastic substrate 10 as necessary, and its inorganic adhesion. The compressive stress film 12 formed on the film 11, the gate electrode 15g formed on the compressive stress film 12, the gate insulating film 14 formed so as to cover the gate electrode 15g, and the gate insulating film 14 on the gate insulating film 14 A polysilicon film 13 formed so as to face the gate electrode 15g, a source electrode 15s and a drain electrode 15d formed separately on the polysilicon film 13, and a protective film 18 provided so as to cover them And have. In the TFT element portion 1A of this form, the tensile stress film 50 becomes the gate electrode 15g, and therefore the laminated film 51 (see FIG. 5B) of the compressive stress film 12 and the tensile stress film 50 is the compressive stress film 12. And a gate electrode 15g.

  Moreover, the TFT element portion 1B having a bottom gate / bottom contact structure shown in FIG. 2B includes a plastic substrate 10, an inorganic adhesion film 11 formed on the plastic substrate 10 as necessary, and an inorganic adhesion thereof. A compressive stress film 12 formed on the film 11, a gate electrode 15g formed on the compressive stress film 12, a gate insulating film 14 formed so as to cover the gate electrode 15g, and a separation on the gate insulating film 14 A source electrode 15s and a drain electrode 15d formed in the recessed portion, a polysilicon film 13 formed so as to straddle the source electrode 15s and the drain electrode 15d, and a protective film 18 provided so as to cover them. Have. In the TFT element portion 1B of this form, as in the case of FIG. 2A, the tensile stress film 50 becomes the gate electrode 15g, and therefore, the laminated film 51 of the compressive stress film 12 and the tensile stress film 50 (FIG. 5B). )) Is a laminated film of the compressive stress film 12 and the gate electrode 15g.

  A TFT element portion 1C having a top gate / bottom contact structure shown in FIG. 2C includes a plastic substrate 10, an inorganic adhesion film 11 formed on the plastic substrate 10 as necessary, and its inorganic adhesion. The compressive stress film 12 formed on the film 11, the source electrode 15s and the drain electrode 15d formed on the compressive stress film 12 apart from each other, and the gap between the source electrode 15s and the drain electrode 15d are formed. An insulating layer 19; a polysilicon film 13 formed thereon; a gate insulating film 14 formed on the polysilicon film 13; a gate electrode 15g formed on the gate insulating film 14; And a protective film 18 provided so as to cover it. In the TFT element portion 1C of this form, the tensile stress film 50 becomes the source electrode 15s and the drain electrode 15d. Therefore, the laminated film 51 of the compressive stress film 12 and the tensile stress film 50 (see FIG. 5B) is The compression stress film 12 is a laminated film of the source electrode 15s and the drain electrode 15d.

  Hereinafter, the present invention will be described in more detail with reference to Examples and Comparative Examples. In addition, this invention is not limited to a following example.

(Example 1)
Polyether sulfone (PES) having a thickness of 0.2 mm and a thickness of 100 mm × 100 mm is used as the plastic substrate 10, and an aluminum film as the inorganic adhesion film 11 is formed on the plastic substrate by a DC sputtering method (deposition pressure: 0. After forming a thickness of 5 nm by 2 Pa (argon), input power of 1 kW, and deposition time of 10 seconds, a silicon oxide film as the compressive stress film 12 is further formed by RF magnetron sputtering (deposition pressure of 0.3 Pa (argon: oxygen = 3: 1), an input power of 2 kW, and a film formation time (1.5 hours) to form a thickness of 500 nm Further, an amorphous silicon film 21a is formed by RF magnetron sputtering (film formation temperature: room temperature, film formation pressure: 1.0 Pa). (Argon)) was formed to a thickness of 50 nm, and then the steps shown in FIGS. To prepare a n-type transistor substrate based on illustrated specific conditions in the description column.

After patterning the resist film, phosphorus (P) is doped at an injection voltage of 10 keV and a doping level of 2 × 10 ¹⁵ / cm ² at room temperature as described in FIG. Ion implantation was performed so that Further, as described in FIG. 4K and its description column, after depositing an aluminum (Al) film having a thickness of 200 nm as a metal electrode film, patterning is performed by wet etching to form a source electrode 15s and a drain electrode 15d. And the gate electrode 15g was formed.

(Example 2)
In Example 1, instead of the silicon oxide film as the compressive stress film 12, an aluminum nitride film was formed by RF sputtering (film forming pressure 0.5 Pa (argon: nitrogen = 1: 1), input power 2 kW, film forming time 10 minutes. The n-type transistor substrate was manufactured in the same manner as in Example 1 except that the thickness was 300 nm.

(Example 3)
An n-type transistor substrate was manufactured in the same manner as in Example 1 except that a polyethylene naphthalate film (PEN) having a thickness of 0.2 mm × length 100 mm × width 100 mm was used as the plastic substrate.

Example 4
An n-type transistor substrate was produced in the same manner as in Example 2 except that a polyethylene naphthalate film (PEN) having a thickness of 0.2 mm × length 100 mm × width 100 mm was used as the plastic substrate.

(Example 5)
In Example 1, a silicon oxide film as the compressive stress film 12 is formed to a thickness of 100 nm by RF sputtering (film forming pressure 0.3 Pa (argon: oxygen = 3: 1), input power 2 kW, film forming time 20 minutes). Otherwise, an n-type transistor substrate was manufactured in the same manner as in Example 1.

(Example 6)
In Example 1, a silicon oxide film as the compressive stress film 12 is formed with a thickness of 1000 nm by RF sputtering (film forming pressure 0.3 Pa (argon: oxygen = 3: 1), input power 4 kW, film forming time 2 hours). Otherwise, an n-type transistor substrate was manufactured in the same manner as in Example 1.

(Example 7)
In Example 1, an aluminum oxide film as the compressive stress film 12 is formed to a thickness of 500 nm by RF sputtering (film forming pressure 0.3 Pa (argon: oxygen = 3: 1), input power 2 kW, film forming time 1 hour). Otherwise, an n-type transistor substrate was manufactured in the same manner as in Example 1.

(Example 8)
In Example 1, instead of the silicon oxide film as the compressive stress film 12, a silicon nitride film was formed by RF sputtering (film forming pressure 0.5 Pa (argon: nitrogen = 1: 1), input power 2 kW, film forming time 25 minutes. The n-type transistor substrate was manufactured in the same manner as in Example 1 except that the thickness was 300 nm.

(Comparative Example 1)
A thin film transistor substrate was manufactured in the same manner as in Example 1 except that the compressive stress film 12 was not formed.

(Comparative Example 2)
A thin film transistor substrate was manufactured in the same manner as in Example 3 except that the compressive stress film 12 was not formed.

(Comparative Example 3)
In Example 1, the thin film transistor substrate was formed in the same manner as in Example 1 except that the film forming condition of the silicon oxide film formed as the compressive stress film 12 was changed so that the compressive stress of 0.05 GPa or more was not generated. Manufactured. Note that the silicon oxide film that does not generate compressive stress is formed by RF magnetron sputtering (deposition pressure: 2.0 Pa (argon: oxygen = 1: 1), input power: 0.5 kW, deposition time: 1.5 hours). The film was formed under the condition of forming 300 nm.

(Comparative Example 4)
In Example 2, the thin film transistor substrate was fabricated in the same manner as in Example 2 except that the film forming condition of the aluminum nitride film formed as the compressive stress film 12 was changed so that the compressive stress of 0.05 GPa or more was not generated. Manufactured. Note that an aluminum nitride film that does not generate compressive stress is formed by an RF magnetron sputtering method (film formation pressure 0.5 Pa (argon: nitrogen = 1: 1), input power 1 kW, film formation time 100 seconds). The film was formed.

(Stress measurement)
The stress of the compressive stress film was evaluated by forming only the compressive stress film used in Examples 1 to 8 and Comparative Examples 3 and 4 on a silicon substrate having a thickness of 0.525 mm and a thickness of 6 inches. The curvature radius is obtained by a measuring instrument using the Newton ring method, and the relational expression between the obtained curvature radius and the film stress [Stoney's formula: σ = E × D ² / {(1-ν) × 6 × d × r} , E: Young's modulus of silicon substrate, D: thickness of silicon substrate, d: film thickness of compressive stress film, ν: Poisson's ratio, r: radius of curvature] : FT-900, NIDEK Co., Ltd.), the film stress σ was calculated. The Young's modulus E of the silicon substrate was calculated as 168.9 GPa. The Poisson's ratio ν was calculated as 0.064. The obtained stresses all showed compressive stress, and the values are shown in Table 1.

  In Examples 1 to 8 and Comparative Examples 1 to 4, an amorphous silicon film having a thickness of 50 nm was formed as the semiconductor thin film. When the stress of only this amorphous silicon film was measured by the same method as described above, It was confirmed to have a tensile stress of 0.3 GPa. In Examples 1 to 8 and Comparative Examples 1 to 4, an aluminum film having a thickness of 200 nm was formed as the metal electrode film. When the stress of only this aluminum film was measured by the same method as described above, it was about 0. It was confirmed to have a tensile stress of 2 GPa. Furthermore, when the stress of only the chromium film having a thickness of 50 nm was measured by the same method as described above, the tensile stress was about 0.15 GPa, and the stress of only the chromium film having a thickness of 200 nm was measured by the same method as described above. As a result, it was confirmed that it had a tensile stress of about 0.5 GPa.

(Evaluation of cracks and adhesion)
In addition, the presence or absence of cracks and adhesion were evaluated. The presence or absence of occurrence of cracks was evaluated by visually observing each thin film transistor substrate obtained in Examples 1 to 8 and Comparative Examples 1 to 4, and those having no cracks were evaluated as “◎”. The results are shown in Table 1. On the other hand, for adhesion (peeling resistance), a scotch mending tape (manufactured by Sumitomo 3M, length 30 m × width 12 mm) was used, and a part of the tape (length 30 mm) was used in Examples 1 to 8 and Comparative Example 1. After being attached on each thin film transistor substrate obtained in -4, it was peeled off at once and evaluated by a tape peeling test method for evaluating the presence or absence of peeling. In the evaluation of adhesion, “◎” indicates that no peeling or cracking occurred, and “○” indicates that there was no problem in practical use although there was slight discoloration at the edge portion, etc. Although peeling occurred by repeating the peeling test, those that were practically usable were marked with “Δ”, and those that were difficult to use due to peeling on the element portion were marked with “x”.

  The adhesion results are shown in Table 1. As can be seen from the results in Table 1, all the thin film transistor substrates on which a silicon oxide film, an aluminum nitride film, an aluminum oxide film, and a silicon nitride film formed as a film having a compressive stress of 0.05 GPa or more are preferable results. However, a thin film transistor substrate on which a silicon oxide film and an aluminum nitride film that do not have a compressive stress of 0.05 GPa or more, and a thin film transistor substrate on which a compressive stress film is not formed are susceptible to cracking or peeling. It was a thing.

It is a schematic cross section which shows an example of the thin-film transistor substrate of this invention. It is a schematic cross section which shows the other example of the thin-film transistor substrate of this invention. It is explanatory drawing which shows the manufacturing process of the thin-film transistor substrate of this invention. It is explanatory drawing which shows the manufacturing process of the thin-film transistor substrate of this invention. It is a schematic diagram for demonstrating the effect | action of the compressive stress film | membrane and tensile stress film | membrane formed on the plastic base material.

Explanation of symbols

1, 1A, 1B, 1C TFT element part 10 Plastic substrate 11 Inorganic adhesion film 12 Compressive stress film 13 Polysilicon film (semiconductor thin film)
13s Source side diffusion film 13c Channel film 13d Drain side diffusion film 14 Gate insulating film 15 Metal electrode film 15s Source electrode 15g Gate electrode 15d Drain electrode 18 Protective film 19 Insulating film 21a Amorphous silicon film 21p Polysilicon film 22 Laser annealing 23 Resist film 24 Ion implantation 25 Energy beam 26 Contact hole 28 High-pressure water vapor 50 Tensile stress film (metal electrode film or semiconductor thin film)
51 Multilayer film

Claims (5)

  A thin film transistor substrate comprising at least a plastic substrate, a compressive stress film made of an inorganic material formed on the plastic substrate, and a metal electrode film or a semiconductor thin film formed on the compressive stress film.   The thin film transistor substrate according to claim 1, wherein a stress value of the compressive stress film has an absolute value of 0.05 GPa or more and 1.0 GPa or less.   3. The compressive stress film according to claim 1, wherein the compressive stress film is any one selected from the group consisting of a silicon oxide film, a silicon nitride film, an aluminum oxide film, an aluminum nitride film, an aluminum oxynitride film, and a silicon oxynitride film. Thin film transistor substrate.   4. The thin film transistor substrate according to claim 1, wherein the metal electrode film is a copper film, an aluminum film, a molybdenum film, or a chromium film.   The thin film transistor substrate according to claim 1, wherein the semiconductor thin film is polycrystalline silicon or amorphous silicon.

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