JP2008101974A - Detector, gyro-sensor, and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a detector, a gyro-sensor or the like materializing detection processing with low noise. <P>SOLUTION: This detector includes a drive circuit and a detection circuit. The detection circuit includes a sensitivity adjustment circuit 80 performing sensitivity adjustment by variably controlling a gain, an offset adjustment circuit 90 performing adjustment for removing an initial offset voltage of an output signal of the detector, and a synchronous demodulation circuit 100 performing synchronous demodulation based on a reference signal RS. The demodulation circuit 100 performs noninverting amplification and inverting amplification of a signal by using an operational amplifier OPD included in the adjustment circuit 80 and an operational amplifier OPE included in the adjustment circuit 90, and performs synchronous demodulation. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a detection device, a gyro sensor, and an electronic device.

  Electronic devices such as a digital camera, a video camera, a mobile phone, and a car navigation system incorporate a gyro sensor (physical quantity transducer) for detecting a physical quantity that changes due to an external factor. Such a gyro sensor detects a physical quantity such as an angular velocity and is used for so-called camera shake correction, attitude control, GPS autonomous navigation, and the like.

  In recent years, the gyro sensor is required to be lighter and smaller and to have high detection accuracy, and a piezoelectric vibration gyro sensor has attracted attention as one of the gyro sensors. Among them, a quartz piezoelectric vibration gyro sensor using quartz as a piezoelectric material is expected as an optimum sensor for incorporation into many devices. This vibration gyro sensor detects a physical quantity corresponding to the Coriolis force generated by the rotation.

  In such a vibration gyro sensor, the output signal (output current) from the vibrator becomes a very weak signal as the vibrator becomes lighter and smaller. Therefore, the detection device that detects a desired signal (a signal corresponding to a physical quantity such as Coriolis force) based on such a weak output signal has a performance capable of detecting the desired signal with as much gain as possible without distortion and low noise. Is required.

  Further, in the vibration gyro sensor, unnecessary signals having a phase difference of 90 degrees with respect to the sensor signal are removed by synchronous detection by the synchronous detection circuit. For this reason, the synchronous detection circuit is provided with a non-inverting amplifier and an inverting amplifier.

However, when such non-inverting amplifiers and inverting amplifiers are provided, noise such as flicker noise (1 / f noise) increases due to these amplifiers, and the S / N ratio deteriorates. It was found to occur.
JP-A-6-160100

  The present invention has been made in view of the above technical problems, and an object of the present invention is to provide a detection device, a gyro sensor, and an electronic device that can realize detection processing with low noise.

  The present invention includes a drive circuit that drives a vibrator to excite the vibrator, and a detection circuit that receives an output signal from the vibrator and detects a desired signal. The detection circuit variably controls the gain. A sensitivity adjustment circuit that performs sensitivity adjustment, an offset adjustment circuit that performs adjustment to remove an initial offset voltage of the output signal of the detection device, and a synchronous detection circuit that performs synchronous detection based on a reference signal, the synchronization The detection circuit relates to a detection device that performs synchronous detection by performing non-inversion amplification and inversion amplification of a signal using a first operational amplifier included in the sensitivity adjustment circuit and a second operational amplifier included in the offset adjustment circuit. .

  According to the present invention, the sensitivity adjustment circuit and the offset adjustment circuit each include a first operational amplifier and a second operational amplifier. The synchronous detection circuit realizes synchronous detection by performing non-inversion amplification and inversion amplification of the signal before synchronous detection using these first and second operational amplifiers. Therefore, according to the present invention, since the non-inverting amplifier and the inverting amplifier necessary for the synchronous detection are substituted by the first and second operational amplifiers of the sensitivity adjustment circuit and the offset adjustment circuit, the non-inverting amplifier is included in the synchronous detection circuit itself. It is not necessary to provide an inverting amplifier. Accordingly, since the number of amplifiers in the detection device can be reduced, the circuit can be reduced in size and the S / N ratio can be improved.

  Further, in the present invention, the synchronous detection circuit outputs a signal amplified by the first operational amplifier included in the sensitivity adjustment circuit after synchronous detection in a first period in which the reference signal is at a first voltage level. In the second period in which the reference signal is at the second voltage level, the signal amplified by the second operational amplifier included in the offset adjustment circuit is output as a signal after synchronous detection. May be.

  In this way, synchronous detection can be realized by alternately outputting the signal amplified by the first operational amplifier or the second operational amplifier as a signal after synchronous detection according to the voltage level of the reference signal. become.

  Further, in the present invention, the synchronous detection circuit is turned off when the first switching element and one end thereof are connected to one end of the first switching element, and the first switching element is turned on, A second switching element that is turned on when the first switching element is in an off state, and a signal amplified by the second operational amplifier is input to the other end of the first switching element; The signal amplified by the first operational amplifier may be input to the other end of the first switching element.

  In this way, the first and second switching elements are alternately turned on and off, so that the signals amplified by the first and second operational amplifiers are alternately output as signals after synchronous detection. Thus, synchronous detection can be realized.

  According to the present invention, the sensitivity adjustment circuit includes a variable resistor whose resistance value is variably controlled based on sensitivity adjustment data, and the first operational amplifier that amplifies a signal with a gain determined by the resistance value of the variable resistor. May be included.

  In this way, the sensitivity adjustment can be performed simply by monitoring the voltage of the output signal of the detection device and inputting adjustment data for setting the sensitivity to the reference value to the sensitivity adjustment circuit.

  In the present invention, the sensitivity adjustment circuit may operate as a variable gain amplifier and as a high-pass filter.

  In this way, the DC component can be cut by the high-pass filter, and the situation where the DC signal is amplified by the sensitivity adjustment circuit can be prevented. Therefore, it is possible to prevent a situation where the variable gain amplifier of the sensitivity adjustment circuit, the operational amplifier on the rear stage, and the like are in a saturated operation state. Further, since the number of circuit blocks can be reduced, the S / N ratio can be improved.

  In the present invention, the high-pass filter that is an active filter and the variable gain amplifier may share the first operational amplifier.

  In this way, since the number of operational amplifiers serving as noise sources can be reduced, the circuit can be reduced in size and the S / N ratio can be improved.

  In the present invention, the sensitivity adjustment circuit includes a capacitor provided between an input node and a first node, a resistor provided between the first node and a node of the first power supply voltage, and an output. A resistance value between the output node and the output tap, and a resistance value between the output tap and the first power supply voltage node are set to be sensitive to each other. The variable resistor controlled variably based on the adjustment data, and the first node is connected to the non-inverting input terminal, the output tap of the variable resistor is connected to the inverting input terminal, and the output terminal is connected to the output terminal. The first operational amplifier to which the output node is connected may be included.

  In this way, since the cutoff frequency and the resistance value of the variable resistor can be controlled separately, it is possible to reduce the noise by reducing the resistance value of the variable resistor while lowering the cutoff frequency.

  In the present invention, the sensitivity adjustment circuit includes a resistor provided between the input node and the first node, a capacitor provided between the first node and the second node, an output node, A variable resistor provided between the second node and the resistance value of which is variably controlled based on sensitivity adjustment data; and the second node is connected to the inverting input terminal thereof, and the non-inverting input terminal thereof. And the first operational amplifier to which the node of the first power supply voltage is connected.

  In this way, the input voltage range of the operational amplifier can be widened, and the design of the dynamic range of the operational amplifier can be facilitated.

  In the present invention, the detection circuit includes a filter unit that performs a filtering process on a signal after synchronous detection, and the filter unit includes a discrete-time filter and a continuous time provided on the upstream side of the discrete-time filter. The continuous-time filter may include a frequency characteristic that removes an offset variation of an unnecessary signal due to an environmental change.

  According to the present invention, the offset adjustment circuit performs adjustment for removing the initial offset voltage. As a result, the detection apparatus can output a signal from which the initial offset voltage has been removed after the offset adjustment. In the present invention, the filter unit that performs the filtering process on the signal after the synchronous detection includes a discrete time filter and a continuous time filter provided on the preceding stage, and the continuous time filter is an unnecessary signal due to an environmental change. It has a frequency characteristic for removing the offset fluctuation amount. Therefore, even when an environmental change such as a temperature fluctuation occurs after the offset adjustment, the offset fluctuation of the unnecessary signal due to the environmental change is removed by the continuous time filter. Therefore, even if a special circuit for removing the offset fluctuation is not provided, the offset fluctuation can be removed by effectively using the continuous time filter on the upstream side of the discrete time filter.

  In the present invention, the continuous-time filter attenuates an offset variation of an unnecessary signal that appears in a frequency band of frequency k × fd (k is a natural number) by the synchronous detection by the synchronous detection circuit below the amplitude of the desired signal. It may have frequency characteristics.

  In this way, the offset fluctuation that appears in the frequency band of the frequency k × fd by synchronous detection can be effectively removed by using the continuous time filter. Accordingly, it is possible to efficiently remove the offset fluctuation.

  In the present invention, the continuous-time filter is a first-order low-pass filter, wherein the amplitude of the desired signal is A0, the offset fluctuation of the unnecessary signal appearing at the frequency k × fd is ΔAk, and the filter at the frequency fd When the attenuation factor is a, the continuous-time filter may have a frequency characteristic that attenuates an offset variation of an unnecessary signal so that ΔAk × (a / k) ≦ A0.

  In this way, even when a first-order low-pass filter is used as the continuous-time filter, it is possible to easily realize a filter that can remove the offset variation of the frequency k × fd.

In the present invention, the continuous-time filter is a second-order low-pass filter, wherein the amplitude of the desired signal is A0, the offset fluctuation of the unnecessary signal appearing at the frequency k × fd is ΔAk, and the filter at the frequency fd When the attenuation factor is a, the continuous-time filter may have a frequency characteristic that attenuates an offset variation of an unnecessary signal so that ΔAk × (a / k ² ) ≦ A0.

  In this way, even when a secondary low-pass filter is used as the continuous-time filter, it is possible to easily realize a filter that can remove the offset variation of the frequency k × fd.

  In the present invention, the discrete-time filter removes a component of the detuning frequency Δf = | fd−fs | corresponding to the difference between the drive-side resonance frequency fd and the detection-side resonance frequency fs of the vibrator, thereby obtaining a desired signal. It may have a frequency characteristic that allows the frequency component to pass through.

  In this way, even when the detuning frequency Δf is sufficiently small with respect to the frequency fd, the unnecessary signal component of the detuning frequency Δf can be reliably and easily removed. Further, while the unnecessary signal having the detuning frequency Δf is removed by the discrete time filter, the offset fluctuation of the unnecessary signal appearing in the frequency band of k × fd can also be removed by the continuous time filter. Therefore, an unnecessary signal and its offset fluctuation can be efficiently removed.

  The present invention also relates to a gyro sensor including any one of the detection devices described above and the vibrator.

  The present invention also relates to an electronic device including the gyro sensor described above and a processing unit that performs processing based on angular velocity information detected by the gyro sensor.

  Hereinafter, preferred embodiments of the present invention will be described in detail. The present embodiment described below does not unduly limit the contents of the present invention described in the claims, and all the configurations described in the present embodiment are indispensable as means for solving the present invention. Not necessarily.

1. FIG. 1 shows a configuration example of a gyro sensor 510 including a detection device 30 of the present embodiment and an electronic apparatus 500 including a gyro sensor 510. The electronic device 500 and the gyro sensor 510 are not limited to the configuration shown in FIG. 1, and various modifications such as omitting some of the components or adding other components are possible. In addition, as the electronic device 500 of the present embodiment, various devices such as a digital camera, a video camera, a mobile phone, a car navigation system, a robot, a game machine, and a portable information terminal can be considered.

  Electronic device 500 includes a gyro sensor 510 and a processing unit 520. Further, a memory 530, an operation unit 540, and a display unit 550 can be included. A processing unit (CPU, MPU, etc.) 520 performs control of the gyro sensor 510 and the like and overall control of the electronic device 500. The processing unit 520 performs processing based on angular velocity information (physical quantity) detected by the gyro sensor (physical quantity transducer) 510. For example, processing for camera shake correction, posture control, GPS autonomous navigation, and the like is performed based on the angular velocity information. A memory (ROM, RAM, etc.) 530 stores a control program and various data, and functions as a work area and a data storage area. The operation unit 540 is for the user to operate the electronic device 500, and the display unit 550 displays various information to the user.

  The gyro sensor 510 includes the vibrator 10 and the detection device 30. The vibrator 10 in FIG. 1 is a tuning fork type piezoelectric vibrator formed from a thin plate of a piezoelectric material such as quartz, and includes driving vibrators 11 and 12 and detection vibrators 16 and 17. The drive vibrators 11 and 12 are provided with drive terminals 2 and 4, and the detection vibrators 16 and 17 are provided with detection terminals 6 and 8.

  The drive circuit 40 included in the detection device 30 outputs a drive signal (drive voltage) to drive the vibrator 10 (physical quantity transducer in a broad sense) and receives a feedback signal from the vibrator 10. Thereby, the vibrator 10 is excited. The detection circuit 60 receives a detection signal (detection current, electric charge) from the vibrator 10 driven by the drive signal, and detects (extracts) a desired signal (Coriolis force signal) from the detection signal.

  Specifically, an alternating drive signal (drive voltage) from the drive circuit 40 is applied to the drive terminal 2 of the drive vibrator 11. Then, the driving vibrator 11 starts to vibrate due to the reverse voltage effect, and the driving vibrator 12 also starts to vibrate due to the tuning fork vibration. At this time, a current (charge) generated by the piezoelectric effect of the drive vibrator 12 is fed back from the drive terminal 4 to the drive circuit 40 as a feedback signal. As a result, an oscillation loop including the vibrator 10 is formed.

  When the drive vibrators 11 and 12 vibrate, the detection vibrators 16 and 17 vibrate at a vibration speed v in the direction shown in FIG. Then, a current (charge) generated by the piezoelectric effect of the detection vibrators 16 and 17 is output from the detection terminals 6 and 8 as a detection signal. Then, the detection circuit 60 receives the detection signal from the vibrator 10 and detects a desired signal (desired wave) that is a signal corresponding to the Coriolis force. That is, when the vibrator 10 (gyro sensor) rotates around the detection shaft 19, a Coriolis force Fc is generated in a direction orthogonal to the vibration direction of the vibration speed v. For example, when the angular velocity when rotating around the detection axis 19 is ω, the mass of the vibrator is m, and the vibration speed of the vibrator is v, the Coriolis force is expressed as Fc = 2 m · v · ω. Accordingly, the detection circuit 60 detects (extracts) a desired signal (sensor signal) that is a signal corresponding to the Coriolis force, whereby the rotational angular velocity ω of the gyro sensor (vibrator) can be obtained. By using the obtained angular velocity ω, the processing unit 520 can perform various processes for camera shake correction, posture control, GPS autonomous navigation, and the like.

  The vibrator 10 has a drive side resonance frequency fd and a detection side resonance frequency fs. Specifically, the natural resonance frequency of drive vibrators 11 and 12 (the natural resonance frequency of drive vibration mode) is fd, and the natural resonance frequency of detection vibrators 16 and 17 (the natural resonance frequency of detection vibration mode). Is fs. In this case, a constant frequency difference is provided between fd and fs so that the drive vibrators 11 and 12 and the detection vibrators 16 and 17 do not cause unnecessary resonance coupling. The detuning frequency Δf = | fd−fs |, which is this frequency difference, is set to a frequency that is sufficiently smaller than fd and fs.

  Although FIG. 1 shows an example in which the vibrator 10 is a tuning fork type, the vibrator 10 of the present embodiment is not limited to such a structure. For example, it may be T-shaped or double T-shaped. The piezoelectric material of the vibrator 10 may be other than quartz.

2. Detection Device FIG. 2 shows a configuration example of the detection device 30 of the present embodiment. The detection device 30 is not limited to the configuration in FIG. 2, and various modifications such as omitting some of the components or adding other components are possible.

  The detection device 30 includes a drive circuit 40 that drives the vibrator 10 to excite the vibrator, and a detection circuit 60 that receives an output signal (charge, current) from the vibrator 10 and detects a desired signal (desired wave). Including.

  The drive circuit (oscillation circuit) 40 includes an I / V conversion circuit 42 that converts current into voltage, an AGC (Automatic Gain Control) circuit 44 that performs automatic gain control, and a binarization circuit (comparator) 46. In the drive circuit 40, in order to keep the sensitivity of the gyro sensor constant, it is necessary to keep the amplitude of the drive voltage supplied to the vibrator 10 (drive vibrator) constant. Therefore, an AGC circuit 44 for automatically adjusting the gain is provided in the oscillation loop of the drive vibration system. Specifically, the AGC circuit 44 automatically adjusts the gain variably so that the amplitude of the input signal ID (vibration vibration speed v) becomes constant. The phase is adjusted so that the phase shift in the oscillation loop is 0 degree. At the time of oscillation startup, the gain of the oscillation loop is set to a gain larger than 1 in order to enable high-speed oscillation startup.

  The I / V conversion circuit 42 converts a current (charge) that is a signal ID from the vibrator 10 into a voltage, and outputs the voltage as a drive signal VD1. The I / V conversion circuit 42 can be realized by a capacitor, a resistor, and an operational amplifier.

  The AGC circuit 44 monitors the drive signal VD1 and controls the gain of the oscillation loop. The AGC circuit 44 includes a gain control amplifier (GCA) for controlling the oscillation amplitude in the oscillation loop and a gain control circuit for outputting a control voltage for adjusting the gain of the gain control amplifier in accordance with the oscillation amplitude. be able to. The gain control circuit also includes a rectifier circuit (full-wave rectifier circuit) that converts the AC drive signal VD1 from the I / V converter circuit 42 into a DC signal, and the voltage of the DC signal from the rectifier circuit and the reference voltage. A circuit that outputs a control voltage corresponding to the difference can be included.

  The binarization circuit 46 binarizes the drive signal VD1 that is a sine wave, and outputs a reference signal (synchronization signal) RS obtained by the binarization process to the synchronous detection circuit 100. The reference signal RS is also output to the filter unit 110 (SCF 114). The binarization circuit 46 can be realized by a comparator that receives the sine wave (alternating current) signal VD1 from the I / V conversion circuit 42 and outputs a rectangular wave reference signal RS. Another circuit may be provided between the I / V conversion circuit 42 and the binarization circuit 46 or between the binarization circuit 46 and the synchronous detection circuit 100. For example, a high-pass filter or a phase shift circuit (phase shifter) may be provided.

  The detection circuit 60 includes an amplification circuit 70, a sensitivity adjustment circuit 80, an offset adjustment circuit 90, a synchronous detection circuit 100, and a filter unit 110. Note that some of these may be omitted.

  The amplifier circuit 70 amplifies the output signals ISP and ISM from the vibrator 10. The amplifier circuit 70 includes Q / V conversion circuits 72 and 74 and a differential amplifier circuit 76. The Q / V conversion circuits 72 and 74 receive the signals ISP and ISM from the vibrator 10 and convert the charge (current) generated in the vibrator 10 into a voltage. The differential amplifier circuit 76 performs differential amplification of the signals VS1P and VS1M from the Q / V conversion circuits 72 and 74.

  FIG. 3A shows a configuration example of the Q / V (I / V) conversion circuits 72 and 74. The Q / V conversion circuits 72 and 74 include a feedback capacitor CA1 and a feedback resistor RA1 provided between nodes NA1 and NA2, and an operational amplifier (operational amplifier) OPA, and have frequency characteristics of a low-pass filter. An input node NA1 is connected to the inverting input terminal (−) of the operational amplifier OPA, and a node of the reference power supply voltage AGND (analog ground) is connected to the non-inverting input terminal (+).

  When the circuit of FIG. 3A is made to function as a Q / V conversion circuit, the capacitance value of CA1 and the resistance value of RA1 so that the cut-off frequency fc = 1 / 2πCR is sufficiently smaller than the resonance frequency fd. Set. As a result, the phase changes by about −90 degrees at the resonance frequency fd. On the other hand, when the circuit of FIG. 3A is made to function as an I / V conversion circuit, the capacitance value of CA1 and the value of RA1 are set so that the cutoff frequency fc = 1 / 2πCR is sufficiently higher than the resonance frequency fd. Set the resistance value. In this case, since the phase hardly changes, a phase shift circuit for changing the phase of the reference signal RS by +90 degrees or -90 degrees is necessary.

  FIG. 3B shows a configuration example of the differential amplifier circuit 76. The differential amplifier circuit 76 includes resistors RB1, RB2, RB3, RB4 and an operational amplifier OPB. By making the resistance ratio of RB1 and RB2 equal to the resistance ratio of RB3 and RB4, the differential amplifier circuit 76 in FIG. 3B has first and second input signals (VS1P, Differential amplification for amplifying the difference of VS1M) is performed. Thereby, the electrostatic coupling leakage signal which is an unnecessary signal (interference signal) in phase with the sensor signal (desired signal) can be removed.

  The sensitivity adjustment circuit 80 in FIG. 2 performs sensitivity adjustment processing. Specifically, the sensitivity is adjusted by variably controlling the gain. The sensitivity adjustment circuit 80 includes an operational amplifier OPD (first operational amplifier). Specifically, the sensitivity adjustment circuit 80 amplifies the signal with a variable resistor whose resistance value is variably controlled based on sensitivity adjustment data, or with a gain (amplification factor) determined by the resistance value (resistance ratio) of the variable resistor. An operational amplifier OPD or the like can be included. The sensitivity adjustment circuit 80 preferably operates as a variable gain amplifier and preferably operates as a high-pass filter. It is more desirable that the high-pass filter that is an active filter and the variable gain amplifier share an operational amplifier.

  The offset adjustment circuit 90 performs offset adjustment processing. Specifically, adjustment is performed to remove the initial offset voltage (offset voltage) of the output signal VSQ of the detection device 30. For example, when the typical temperature is 25 ° C., offset adjustment processing is performed so that the voltage of the output signal VSQ matches the reference output voltage. The offset adjustment circuit 90 includes an operational amplifier OPE (second operational amplifier). Specifically, the offset adjustment circuit 90 includes an operational amplifier OPE, adjusts the voltage of the signal VS4 input to the offset adjustment circuit 90 based on the adjustment data of the initial offset, and the amplified signal subjected to the offset adjustment VS5 is output.

  The synchronous detection circuit (detection circuit, detector) 100 performs synchronous detection on the amplified signals VS4 and VS5 based on the reference signal (reference clock) RS. By this synchronous detection, a mechanical vibration leakage signal that is an unnecessary signal having a phase difference of 90 degrees with respect to the sensor signal can be removed.

  The filter unit 110 performs a filtering process on the signal VS6 after synchronous detection. Specifically, low-pass filter processing for removing high frequency components is performed.

  In this embodiment, the non-inverting amplifier and the inverting amplifier of the synchronous detection circuit 100 are replaced with the operational amplifier OPD included in the sensitivity adjustment circuit 80 and the operational amplifier OPE included in the offset adjustment circuit 90. That is, the synchronous detection circuit 100 performs synchronous detection by performing non-inversion amplification and inversion amplification of the signal VS2 from the amplification circuit 70 using the operational amplifier OPD included in the sensitivity adjustment circuit 80 and the operational amplifier OPE included in the offset adjustment circuit 90. . For example, the synchronous detection circuit 100 outputs a non-inverted amplified signal of the signal VS2 using the operational amplifier OPD, and outputs an inverted amplified signal of the signal VS2 using the operational amplifier OPE, thereby realizing synchronous detection. More specifically, the synchronous detection circuit 100 amplifies (for example, non-inverted) by the operational amplifier OPD of the sensitivity adjustment circuit 80 in the first period (for example, positive period) in which the reference signal is at the first voltage level (for example, H level). The amplified signal VS4 is output as a signal VS6 after synchronous detection. On the other hand, in the second period (for example, the negative period) in which the reference signal RS is at the second voltage level (for example, L level), the signal VS5 amplified (for example, inverted and amplified) by the operational amplifier OPE of the offset adjustment circuit 90 is synchronized. It outputs as signal VS6 after detection.

  FIG. 4 shows an example of a signal waveform for explaining the operation of the detection device 30. The drive signal VD1 is a sine wave whose frequency is the drive-side natural frequency fd. The drive signal VD1 is binarized by the binarization circuit 46, whereby a rectangular wave reference signal RS is obtained. The signal VS5 (sensor signal) input to the synchronous detection circuit 100 is amplitude-modulated (AM-modulated) according to the magnitude (angular velocity) of the Coriolis force. The signal VS5 is synchronously detected by the reference signal RS, and the obtained signal VS6 is smoothed by the filter unit 110, so that the DC component of the desired signal is output as the signal VSQ. That is, the voltage level of the signal VSQ becomes a voltage level corresponding to the magnitude of the Coriolis force, and the rotational angular velocity of the gyro sensor can be obtained by obtaining this voltage level.

3. Unnecessary signal The sensor signal includes a desired signal (desired wave) and an unnecessary signal (unnecessary wave). In the present embodiment, a combination of a desired signal and an unnecessary signal is referred to as a sensor signal.

  Since the amplitude of the unnecessary signal is generally much larger than the amplitude of the desired signal, the required performance for the detection device 30 is high. This unnecessary signal may be caused by mechanical vibration leakage, electrostatic coupling leakage, detuning frequency Δf, 2fd (2ωd), DC offset, or the like.

  The unnecessary signal of mechanical vibration leakage is generated due to an imbalance of the shape of the vibrator 10 or the like. Since the unnecessary signal of mechanical vibration leakage superimposed on the signal ISP and the unnecessary signal of mechanical vibration leakage superimposed on the signal ISM are in opposite phases, they cannot be removed by the differential amplifier circuit 76. However, the unnecessary signal of mechanical vibration leakage superimposed on the signal VS5 has a 90-degree phase difference from the desired signal in the signal VS5, and therefore can be removed by the synchronous detection circuit 100.

  The unnecessary signal of the electrostatic coupling leakage is generated when the drive signal VD2 in FIG. 2 leaks to the input terminals of the ISP and ISM through the parasitic capacitances CP and CM. That is, capacitive coupling is formed by the parasitic capacitances CP and CM, and a signal whose phase is advanced by about 90 degrees (π / 2) from the drive signal VD2 near the drive signal frequency is an ISP as an unnecessary signal for electrostatic coupling leakage. , Superimposed on both IM. Since the unnecessary signal superimposed on the signal ISP and the unnecessary signal superimposed on the signal ISM are in phase with each other, the differential amplifier circuit 76 can remove them.

  The 2fd unnecessary signal is generated when the vibrator vibrates at a harmonic frequency of 2fd for some reason. DC offset unnecessary signals are caused by input leakage, electrostatic coupling leakage imbalance, phase shift between the desired signal and the reference signal, duty shift of the reference signal, DC offset of the circuit block, etc. appear.

  Next, the removal of unnecessary signals will be described in detail using the frequency spectrums of FIGS. 5 (A) to 5 (C). FIG. 5A shows a frequency spectrum before synchronous detection. As shown in FIG. 5A, in the sensor signal before synchronous detection, there is a DC offset unnecessary signal in the DC frequency band. Further, an unnecessary signal and a desired signal of mechanical vibration leakage exist in the frequency band of fd.

  FIG. 5B shows the frequency spectrum after synchronous detection. The desired signal in the fd frequency band in FIG. 5A appears in the DC and 2fd frequency bands after synchronous detection, as shown in FIG. 5B. Further, an unnecessary signal (DC offset) in the DC frequency band in FIG. 5A appears in the fd frequency band after synchronous detection, as shown in FIG. 5B. Further, an unnecessary signal (mechanical vibration leakage) in the fd frequency band of FIG. 5A appears in the 2fd frequency band after synchronous detection, as shown in FIG. 5B. In FIG. 5A, if an unnecessary signal exists in the 2fd frequency band, it appears in the 3fd and fd frequency bands after synchronous detection. The mixed noise after detection is noise generated by a circuit subsequent to the synchronous detection circuit 100.

  FIG. 5C shows the frequency spectrum after the filter processing. By smoothing (LPF) the signal after the synchronous detection by the filter unit 110, the frequency components of the unnecessary signals in the frequency bands such as fd and 2fd are removed.

  Since the desired signal in VS4 (VS5) in FIG. 2 is amplitude-modulated as described in FIG. 4, it can be expressed as A (t) sin (ωd × t). Further, an unnecessary signal (interference wave) of mechanical leakage vibration in VS4 is 90 degrees out of phase with the desired signal, and therefore can be expressed as Bsin (ωd × t + π / 2). Since the sensor signal at VS4 is the sum of the desired signal and the unnecessary signal at VS4, it can be expressed as A (t) sin (ωd × t) + Bsin (ωd × t + π / 2). The drive signal can be expressed as Csin (ωd × t). A (t), B, and C are amplitudes, and ωd = 2πfd.

The synchronous detection can be regarded as multiplication of a sensor signal (desired signal + unnecessary signal) and a drive signal (reference signal) at VS4. Therefore, for the desired signal among the sensor signals in VS4,
A (t) sin (ωd × t) × Csin (ωd × t)
= {(A (t) × C) / 2} × {1-cos (2ωd × t)}
It becomes. Therefore, as shown in FIG. 5B, the desired signal appears in the DC and 2fd frequency bands after synchronous detection.

On the other hand, regarding the unnecessary signal of mechanical vibration leakage among the sensor signals in VS4,
Bsin (ωd × t + π / 2) × Csin (ωd × t)
= {− (B × C) / 2} × cos (2ωd × t + π / 2)
It becomes. Therefore, as shown in FIG. 5B, the unnecessary signal of mechanical vibration leakage appears in the frequency band of 2fd (2ωd) after synchronous detection and does not appear in DC.

  Next, synchronous detection will be described with reference to the schematic diagrams of FIGS. 6 (A) to 6 (D). In practice, the amplitude B of the unnecessary signal (mechanical leakage vibration) is much larger than the amplitude A (t) of the desired signal, but for the convenience of the drawing, the amplitude A (t) is equal to B.

  As shown in FIG. 6A, when the phase of the desired signal in VS4 and the phase of the reference signal (drive signal) are completely aligned, the desired signal and unnecessary signal in VS6 after synchronous detection are shown in FIG. It becomes like (B). That is, the desired signal has a complete full-wave rectified waveform, and the unnecessary signal has a waveform in which the areas of the positive part and the negative part are equal. Therefore, smoothing by the filter unit 110 causes the DC component of the desired signal to be output as the signal VSQ, and the component of the unnecessary signal does not appear as the signal VSQ.

  On the other hand, when the phase of the desired signal at VS4 and the phase of the reference signal (drive signal) are shifted by γ as shown in FIG. 6C, the desired signal and unnecessary signal at VS6 after synchronous detection are shown in FIG. It becomes like 6 (D). That is, the desired signal is not a complete full-wave rectified waveform but includes a negative component. In addition, the area of the positive portion and the negative portion of the unnecessary signal is not equal. Accordingly, in the signal VSQ obtained by the smoothing in the filter unit 110, the DC component of the desired signal is smaller than that in the case of FIG. 6B, and the unnecessary signal component appears as the signal VSQ.

4). Non-inverting Amplification and Substitution of Inverting Amplifier FIG. 7 shows a configuration of a synchronous detection circuit of a comparative example. This synchronous detection circuit includes an inverting amplifier 102, a non-inverting amplifier 104, an inverter 106, and switching elements SE1 and SE2. One end of the switching element SE1 and one end of the switching element SE2 are connected to the node NE4 of the output signal Q. The input signal IN is inverted and amplified by the inverting amplifier 102, and a signal IN1 having a phase opposite to that of the input signal IN is input to the other end of the switching element SE1. The input signal IN is non-inverted and amplified by the non-inverting amplifier 104, and a signal IN2 having the same phase as the input signal IN is input to the other end of the switch SE2.

  Thus, in the synchronous detection circuit of the comparative example, since it is necessary to create a non-inverted signal and an inverted signal for synchronous detection, an inverting amplifier 102 and a non-inverting amplifier 104 as shown in FIG. 7 are provided.

  However, when such an inverting amplifier 102 and a non-inverting amplifier 104 are provided in the synchronous detection circuit, the S / N ratio deteriorates due to these amplifiers. That is, these amplifiers themselves become noise sources, and the S / N ratio deteriorates due to flicker noise (1 / f noise) generated by the amplifiers.

  Therefore, in this embodiment, as shown in FIG. 2, the non-inverting amplifier and the inverting amplifier of the synchronous detection circuit 100 are replaced with an operational amplifier OPD included in the sensitivity adjustment circuit 80 and an operational amplifier OPE included in the offset adjustment circuit 90.

  Specifically, as shown in FIG. 8, the synchronous detection circuit 100 uses the operational amplifier OPD included in the sensitivity adjustment circuit 80 as a non-inverting amplifier, for example, and uses the operational amplifier OPE included in the offset adjustment circuit 90 as an inverting amplifier. Do.

  6A and 6B, in the synchronous detection circuit 100, the switching element SE2 is in the positive period (first period) in which the reference signal RS is at the H level (first voltage level). Since the signal is turned on, the signal VS4 non-inverted and amplified by the operational amplifier OPD of the sensitivity adjustment circuit 80 is output as the signal VS6 after synchronous detection. On the other hand, in the positive period (second period) in which the reference signal RS is at the L level (second voltage level), the switching element SE1 is turned on. Therefore, the signal VS5 inverted and amplified by the operational amplifier OPE of the offset adjustment circuit 90. Is output as a signal VS6 after synchronous detection.

  More specifically, in the synchronous detection circuit 100 of the present embodiment, the switching element SE1 (first switching element) and one end (output) thereof are connected to one end (output) of the switching element SE1, and SE1 is in the ON state. The switching element SE2 (second switching element) that is turned off when SE1 is turned off. That is, the switching element SE1 configured by the MOS transistor is ON / OFF controlled by the inverted signal RSX of the reference signal RS, and the switching element SE2 also configured by the MOS transistor is ON / OFF controlled by the reference signal RS. That is, synchronous detection is performed by alternately turning on the switching elements SE1 and SE2.

  As shown in FIG. 8, the signal VS5 amplified (inverted and amplified) by the operational amplifier OPE of the offset adjustment circuit 90 is input to the other end (input) of the switching element SE1, and the other end (input) of the switching element SE2 is input. The signal VS4 amplified (non-inverted amplification) by the operational amplifier OPD is input to.

  According to the configuration of FIG. 8, the inverting amplifier 102 of FIG. 7 can be replaced with the operational amplifier OPE included in the offset adjustment circuit 90. That is, the operational amplifier OPE can be shared by the offset adjustment circuit 90 and the synchronous detection circuit 100. Further, according to the configuration of FIG. 8, the non-inverting amplifier 104 of FIG. 7 can be replaced with an operational amplifier OPD included in the sensitivity adjustment circuit 80. That is, the operational amplifier OPD can be shared by the sensitivity adjustment circuit 80 and the synchronous detection circuit 100. In this way, the number of amplifiers (op-amps) in the detection device can be reduced, so that the circuit can be reduced in scale. In addition, since the number of circuit blocks serving as noise sources is reduced, the S / N ratio can be improved. Therefore, it is possible to provide a detection device that can realize detection processing with low noise.

5. Sensitivity Adjustment In the gyro sensor 510, sensitivity adjustment is performed to adjust the overall gain of the detection device 30 so that the sensitivity matches a given reference value. This sensitivity (V / degree / sec) is the amount of change per unit angular velocity of the output voltage VQ (VSQ voltage) in FIG. 9, and corresponds to the slope of the straight line of the output voltage VQ. After this sensitivity adjustment, offset adjustment described later is performed.

  Until now, from the viewpoint of ease of sensitivity adjustment and ease of understanding, a circuit for adjusting such sensitivity has been provided on the rear side of the filter unit 110 in FIG. That is, the sensitivity adjustment is generally performed after removing unnecessary signals and the like to obtain a DC (direct current) signal.

  However, it has been found that if the sensitivity adjustment circuit is provided on the rear side of the filter unit 110, system noise increases. That is, when the sensitivity adjustment is performed after the low-pass filter processing of the filter unit 110 becomes a DC signal, noise generated by the sensitivity adjustment circuit itself appears in the output voltage VQ. In addition, flicker noise (1 / f noise) increases as the frequency decreases. Therefore, if sensitivity adjustment is performed in a DC signal state, the adverse effect of flicker noise also increases. Further, if a sensitivity adjustment circuit for performing gain adjustment is provided on the rear stage side, not only the desired signal but also noise generated by the circuit on the front stage of the sensitivity adjustment circuit is amplified, and the S / N ratio deteriorates.

  Therefore, in the present embodiment, as shown in FIG. 2, the sensitivity adjustment circuit 80 is provided on the upstream side of the synchronous detection circuit (detector) 100. Specifically, a sensitivity adjustment circuit 80 is provided between the amplifier circuit 70 and the synchronous detection circuit 100 (offset adjustment circuit).

  If the sensitivity adjustment circuit 80 is provided on the upstream side of the synchronous detection circuit 100 in this way, sensitivity adjustment is performed in the state of a signal of frequency fd instead of a DC signal. Therefore, the adverse effect of flicker noise (1 / f noise) that decreases as the frequency increases can be minimized. Further, the noise generated in the sensitivity adjustment circuit 80 itself appears in the fd frequency band by synchronous detection as shown in FIG. 5B and can be removed by the filter unit 110. Therefore, the adverse effect of noise generated in the sensitivity adjustment circuit 80 itself can be reduced. Furthermore, since the number of circuit blocks on the front stage side of the sensitivity adjustment circuit 80 is reduced compared to the case where the sensitivity adjustment circuit is provided on the rear stage side of the filter unit 110, the sensitivity adjustment circuit 80 amplifies the noise of these circuit blocks. Degradation of the S / N ratio due to can be minimized.

6). Configuration of Sensitivity Adjustment Circuit FIGS. 10A and 10B show a configuration example of the sensitivity adjustment circuit 80 (Programmable Gain Amp). FIG. 10A shows a non-inverting amplification type example. The sensitivity adjustment circuit 80 of FIG. 10A includes variable resistors RD1 and RD2 provided between the output node ND3 and a node of the reference power supply voltage AGND (first power supply voltage in a broad sense). Further, the input node ND1 is connected to the non-inverting input terminal (+), and the operational amplifier OPD1 (OPD) is connected to the inverting input terminal (−) of the output tap QT (node ND2) of the variable resistors RD1 and RD2. .

  In FIG. 10A, the resistance value of the variable resistor RD2 between the output node ND3 and the output tap QT and the resistance value of the variable resistor RD1 between the output tap QT and the node of AGND are the sensitivity adjustment data DPGA [m : 0]. Thereby, the gain of the sensitivity adjustment circuit 80 is adjusted, and sensitivity adjustment is performed.

  For example, assuming that the resistance values of the resistors RD1 and RD2 are R1 and R2, the gain of the sensitivity adjustment circuit 80 which is a PGA is G = (R1 + R2) / R1. Thus, the operational amplifier OPD1 amplifies the signal with a gain determined by the resistance values (resistance ratios) of the variable resistors RD1 and RD2.

  FIG. 10B shows an example of an inverting amplification type. The sensitivity adjustment circuit 80 in FIG. 10B includes a variable resistor RD3 provided between the input node ND4 and the node ND5, and a variable resistor RD4 provided between the node ND5 and the output node ND6. Also included is an operational amplifier OPD2 (OPD) in which the node ND5 is connected to its inverting input terminal and the node of the power supply voltage AGND is connected to its non-inverting input terminal. In FIG. 10B, when the resistance values of the variable resistors RD3 and RD4 are R3 and R4, the gain of the sensitivity adjustment circuit 80 is G = −R4 / R3.

  11A and 11B show another configuration example of the sensitivity adjustment circuit 80. FIG. In FIGS. 11A and 11B, the sensitivity adjustment circuit 80 operates as a variable gain amplifier (PGA) and as a high-pass filter. An operational amplifier is shared by the high-pass filter, which is an active filter, and the variable gain amplifier.

  FIG. 11A shows a non-inverting amplification type example. The sensitivity adjustment circuit 80 in FIG. 11A includes a capacitor CD1 provided between the input node ND8 and the node ND9 (first node), and a resistor RD5 provided between the node ND9 and the node of the power supply voltage AGND. including. Variable resistors RD6 and RD7 provided between output node ND11 and the node of AGND are also included. Further, the node ND9 is connected to the non-inverting input terminal, the output tap QT (node ND10) of the variable resistors RD6 and RD7 is connected to the inverting input terminal, and the output node ND11 is connected to the output terminal OPD3 ( OPD).

  In FIG. 11A, the resistance value of the variable resistor RD7 between the output node ND11 and the output tap QT and the resistance value of the variable resistor RD6 between the node of the output tap QT and AGND are the sensitivity adjustment data DPGA [m : 0]. Thereby, the gain of the sensitivity adjustment circuit 80 is adjusted, and sensitivity adjustment is performed.

  For example, when the resistance values of the variable resistors RD6 and RD7 are R6 and R7, the gain of the sensitivity adjustment circuit 80 which is PGA is G = (R6 + R7) / R6. Specifically, a plurality of output taps are provided for the variable resistor, and the variable resistor RD6 is selected by selecting the output tap QT corresponding to the adjustment data DPGA [m: 0] from the plurality of output taps. , The resistance values R6 and R7 of RD7 are determined, and the gain G = (R6 + R7) / R6 is determined.

  FIG. 11B shows an example of an inverting amplification type. The sensitivity adjustment circuit 80 in FIG. 11B is provided between the resistor RD8 provided between the input node ND12 and the node ND13 (first node), and between the node ND13 and the node ND14 (second node). The capacitor CD2 is included. Further, it includes a variable resistor RD9 which is provided between the output node ND15 and the node ND14 and whose resistance value is variably controlled based on the adjustment data DPGA [m: 0]. Also included is an operational amplifier OPD4 (OPD) in which the node ND14 is connected to its inverting input terminal and the node of the power supply voltage AGND is connected to its non-inverting input terminal.

  In FIG. 11B, when the resistance values of the variable resistors RD8 and RD9 are R8 and R9, the gain of the sensitivity adjustment circuit 80 is G = −R9 / R8. Note that it is possible to modify the components shown in FIGS. 11A and 11B or add other components.

  Specifically, the sensitivity adjustment using the sensitivity adjustment circuit 80 of FIGS. 10A to 11B is realized as follows. First, after the manufacture of the gyro sensor, the output voltage VQ of the detection device 30 is monitored. Then, for example, the gyro sensor is rotated from a stationary state at a given rotational angular velocity, and the sensitivity that is the amount of change in the output voltage VQ at that time (straight line in FIG. 9) is obtained. Then, adjustment data DPGA [m: 0] for matching the obtained sensitivity with the reference sensitivity is written in a non-illustrated nonvolatile memory or the like. Then, the sensitivity adjustment circuit 80 adjusts the gain of the operational amplifier based on the adjustment data DPGA [m: 0] so that the sensitivity of the detection device 30 matches the reference sensitivity.

  Here, the sensitivity adjustment circuit 80 in FIGS. 11A and 11B operates as a variable gain amplifier and also operates as a high-pass filter having filter characteristics (frequency characteristics, phase characteristics) as shown in FIG. 12, for example. . Specifically, in FIG. 11A, a capacitor CD1, a resistor RD5, and an operational amplifier OPD3 constitute a high-pass active filter. That is, the operational amplifier OPD3 functions as a buffer for a high-pass filter including the capacitor CD1 and the resistor RD5. The variable resistors RD6 and RD7 and the operational amplifier OPD3 constitute a variable gain amplifier. That is, in FIG. 11A, the operational amplifier OPD3 is shared by the high-pass active filter and the variable gain amplifier.

  On the other hand, in FIG. 11B, the resistor RD8, the capacitor CD2, the resistor RD9, and the operational amplifier OPD4 constitute a high-pass active filter. The resistor RD8, the variable resistor RD9, and the operational amplifier OPD4 constitute a variable gain amplifier. That is, in FIG. 11B, the operational amplifier OPD4 is shared by the high-pass active filter and the variable gain amplifier.

  If the sensitivity adjustment circuit 80 is operated as a high-pass filter as shown in FIG. 12, the DC component can be cut and a situation where the DC signal is amplified by the variable gain amplifier (PGA) can be prevented. Therefore, it is possible to prevent the variable gain amplifier of the sensitivity adjustment circuit 80 and the operational amplifier on the rear stage (for example, the operational amplifier of the offset adjustment circuit) from being saturated due to excessive input and causing the output to overflow. Further, DC noise can be removed by this high-pass filter, and the S / N ratio can be improved.

  In FIGS. 11A and 11B, an operational amplifier is shared by the high-pass active filter and the variable gain amplifier. Therefore, the number of operational amplifiers can be reduced as compared with the case where an operational amplifier for an active filter and an operational amplifier for a variable gain amplifier are provided separately. Therefore, the circuit can be reduced in size and the number of circuit blocks that become noise sources is reduced, so that the S / N ratio can be improved.

  The circuit of FIG. 11A has an advantage that the cut-off frequency and the gain (resistance value of the variable resistor) can be controlled independently of those of FIG. 11B. For example, in the high-pass filter of FIG. 12, in order to cut the DC component and pass the desired signal, it is desirable to make the cut-off frequency fc as low as possible. Here, when the capacitance value is C and the resistance value is R, the cutoff frequency is expressed as fc = 1 / 2πCR. When the capacitance value C2 of CD2 in FIG. 11B is increased, the circuit area is increased. Therefore, in order to reduce the cut-off frequency fc, it is necessary to increase the resistance value R8 of the resistor RD8.

  However, when the resistance value R8 is increased in this way, noise (thermal noise or the like) generated at the resistor RD8 increases, and the S / N ratio decreases. For example, the gain of the variable gain amplifier in FIG. 11B is G = −R9 / R8, and the variable range of the gain is −1.2 to 5.0, for example. Therefore, when the resistance value R8 is increased, the resistance value R9 must also be increased. Therefore, the noise generated in the variable resistor RD9 also increases, and the S / N ratio decreases.

  In contrast, in FIG. 11A, the cut-off frequency fc is determined by the capacitance value C1 of the capacitor CD1 and the resistance value R5 of the resistor RD5. On the other hand, the gain of the variable gain amplifier is G = (R6 + R7) / R6, and is determined by the resistance values R6 and R7 of the variable resistors RD6 and RD7. That is, the cutoff frequency fc and the gain can be adjusted separately. Therefore, even when the resistance value R5 of RD5 is increased in order to lower the cut-off frequency fc, it is not necessary to increase the resistance values R6 and R7 of RD6 and RD7. Accordingly, since the resistance values R6 and R7 of RD6 and RD7 can be made sufficiently smaller than the resistance value R9 of RD9 in FIG. 11B, noise generated in these variable resistors RD6 and RD7 can be reduced, and S / The N ratio can be improved. Note that in the circuit of FIG. 11B, the node ND14 is set to the potential of AGND by a virtual short circuit. Therefore, there is an advantage that the input voltage range of the operational amplifier OPD4 can be made wider than that of the circuit of FIG. 11A, and the design of the dynamic range of the operational amplifier can be facilitated.

7). Connection Configuration Example FIG. 13 shows a connection configuration example of the sensitivity adjustment circuit 80, the offset adjustment circuit 90, and the synchronous detection circuit 100, and a specific configuration example of the offset adjustment circuit 90. The configuration of the offset adjustment circuit 90 is not limited to that shown in FIG. 13, and various modifications such as changing / deleting the components or adding other components are possible.

  The offset adjustment circuit 90 includes a D / A conversion circuit 92 and an addition circuit (addition / subtraction circuit) 94. The D / A conversion circuit 92 converts the initial offset adjustment data DDA [m: 0] into an analog initial offset adjustment voltage VA.

  The adder circuit 94 adds the adjustment voltage VA from the D / A conversion circuit 92 to the voltage of the input signal VS4. The adder circuit 94 includes resistors RE1, RE2, and RE3 provided between the nodes NE5 and NE6, NE1, and NE2, respectively. Also included is an operational amplifier OPE whose node NE5 is connected to its inverting input terminal and whose node AGND is connected to its non-inverting input terminal.

  For example, in this embodiment, the voltage of the output signal VSQ of the detection device 30 is monitored after the gyro sensor is manufactured. Then, initial offset adjustment data for making the VSQ voltage coincide with the reference output voltage is written in a non-illustrated nonvolatile memory or the like. Then, the adjustment data DDA [m: 0] written in the nonvolatile memory or the like is input to the D / A conversion circuit 92, and the D / A conversion circuit 92 adjusts the initial offset according to DDA [m: 0]. The voltage VA is output. Then, the adder circuit 94 performs adjustment for removing the initial offset voltage by adding the adjustment voltage VA to the voltage of the signal VS4.

  As shown in FIG. 13, the offset adjustment circuit 90 is provided on the upstream side of the synchronous detection circuit 100. Synchronous detection circuit 100 includes switching elements SE <b> 1 and SE <b> 2 (first and second switching elements) and an inverter 106. These switching elements SE1 and SE2 are constituted by MOS transistors (transfer gates).

  One end of the switching element SE1 and one end of the switching element SE2 are connected via a node NE4 of the output signal Q (VS6). The output of the adder circuit 94 is input to the other end of the switching element SE1. The signal VS4 is input to the other end of the switching element SE2. The addition circuit 94 of the offset adjustment circuit 90 outputs a signal VS5 having a phase opposite to that of the signal VS4, which is obtained by adding the voltage of the signal VS4 and the adjustment voltage VA, to the other end of the switching element SE1. .

  The switching element SE1 is on / off controlled by the inverted signal RSX of the reference signal RS, and the switching element SE2 is on / off controlled by the reference signal RS. That is, when the switching element SE1 is in the on state, the switching element SE2 is in the off state, and when the switching element SE1 is in the off state, the switching element SE2 is in the on state. Thus, synchronous detection is realized by switching elements SE1 and SE2 being turned on alternately.

  For example, it is assumed that the resistance values of the resistors RE1, RE2, and RE3 of the adder circuit 94 are all equal. The voltage of the signal VS4 is V1, the initial offset adjustment voltage is VA, and the output voltage of the adder circuit 94 is V2. Then, V2 = − (V1 + VA) is established. Therefore, when the reference signal RS becomes H level, the switching element SE1 is turned off, and the switching element SE2 is turned on, the voltage V1 of the signal VS4 is output from the synchronous detection circuit 100. Next, when the reference signal RS becomes L level, the switching element SE1 is turned on, and the switching element SE2 is turned off, the voltage V2 = − (V1 + VA) is output from the synchronous detection circuit 100. That is, an inverted signal of the signal obtained by adding the adjustment voltage VA to the voltage V1 of the input signal VS4 is output. This makes it possible to achieve both addition of the adjustment voltage and synchronous detection.

  In FIG. 13, the circuit of FIG. 11A is used as the sensitivity adjustment circuit 80, but the present embodiment is not limited to this. For example, the circuit shown in FIG. 10A may be used as the sensitivity adjustment circuit 80. Alternatively, as the sensitivity adjustment circuit 80, an inverting amplification type circuit shown in FIGS. 10B and 11B may be used. In this case, for example, the output signal VS4 of the inverting amplification type sensitivity adjustment circuit 80 may be input to the switching element SE1, for example, and the output signal VS5 of the offset adjustment circuit 90 may be input to the switching element SE2.

8). Offset adjustment The offset adjustment circuit 90 is configured so that, for example, when the environmental temperature is 25 ° C. (typical temperature), the output voltage (VSQ voltage) of the detection device 30 matches the reference output voltage (for example, VDD / 2). Make adjustments. For example, in FIG. 14A, the output voltage VQ does not match the reference output voltage VR. In this case, as shown in FIG. 14B, the offset adjustment circuit 90 performs adjustment so that the initial offset voltage | VQ−VR | is removed and becomes zero. Specifically, the output voltage VQ of the detection device 30 is monitored after manufacturing the gyro sensor. Then, initial offset adjustment data for making the output voltage VQ coincide with the reference output voltage VR is written in a non-illustrated nonvolatile memory or the like. Then, the offset adjustment circuit 90 performs the offset adjustment based on the adjustment data so that the output voltage VQ of the detection device 30 matches VR.

  By doing so, at least when the ambient temperature is 25 ° C. and the angular velocity of the gyro sensor is 0, the output voltage (zero voltage) VQ of the detection device 30 matches the reference output voltage VR. .

  However, as shown in FIG. 14B, the offset voltage has a positive or negative temperature characteristic (temperature drift). Therefore, even if the initial offset voltage is removed to zero, there is a problem that the offset fluctuation due to temperature change (environmental change in a broad sense) does not become zero.

  For example, even if the initial offset voltage is removed, the DC offset of FIG. 5A and the offset fluctuation of mechanical leakage vibration appear in the frequency bands of fd and 2fd after synchronous detection. Further, if there is a temperature variation in the phase shift described with reference to FIGS. 6C and 6D, the offset variation of the phase shift unnecessary signal appears in the DC frequency band. Therefore, due to these reasons, the sensitivity adjusted at the time of shipment by the sensitivity adjustment circuit 80 also has a temperature fluctuation component. In order to solve such a problem, the following method is adopted in the present embodiment.

  FIG. 15 shows a configuration example of the filter unit 110 of the present embodiment. The filter unit 110 includes an SCF (switched capacitor filter) 114 that is a discrete-time filter. The filter unit 110 includes a pre-filter (pre-filter) 112 provided on the front side of the SCF 114 (discrete time filter in a broad sense) and a post filter (post-filter) 116 provided on the rear side of the SCF 114. Including. These pre-filter 112 and post-filter 116 are continuous-time filters.

  In the present embodiment, the prefilter 112 (continuous time type filter in a broad sense) has a frequency characteristic (attenuating below the amplitude of the desired signal) that eliminates offset fluctuations of unnecessary signals due to environmental changes such as temperature changes and voltage changes. Frequency characteristics).

  That is, when the SCF 114 is provided in the filter unit 110 as shown in FIG. 15, the SCF 114 samples a signal in discrete time, and therefore aliasing, which is a frequency folding phenomenon due to sampling, occurs. For example, when the sampling frequency is fsp, a harmonic frequency signal of fsp / 2 (= fd / 2) is folded back into the DC frequency region and the S / N ratio is deteriorated.

  In order to prevent such an adverse effect of aliasing, in FIG. 15, a prefilter 112 for anti-aliasing is provided on the front side of the SCF 114. That is, when the sampling frequency is fsp (= fd), the prefilter 112 has anti-aliasing frequency characteristics for removing frequency components equal to or higher than fsp / 2 (= fd / 2).

  In this embodiment, paying attention to the presence of such an anti-aliasing pre-filter 112, the pre-filter 112 is effectively utilized. That is, the anti-aliasing pre-filter 112 is also used as a filter for removing an offset variation of an unnecessary signal due to an environmental change. In this way, it is not necessary to provide a separate filter for removing the offset variation of the unnecessary signal. Therefore, the circuit can be reduced in size and the number of circuit blocks that become noise sources is reduced, so that the S / N ratio can be improved.

  FIGS. 16A to 16C show examples of frequency spectrums after the initial offset voltage is removed as shown in FIG. 14B. If the offset voltage has a positive or negative temperature characteristic as shown in FIG. 14B, even if the initial offset voltage is removed, the offset fluctuation of the DC offset unnecessary signal as shown in FIG. Minutes appear in the DC frequency band. Further, the offset fluctuation of the unnecessary signal of mechanical vibration leakage appears in the fd frequency band.

  After synchronous detection, as shown in FIG. 16B, the offset fluctuation of the DC offset unnecessary signal appears in the fd frequency band, and the offset fluctuation of the mechanical vibration leakage unnecessary signal appears in the 2fd frequency band.

  That is, if the environmental temperature is 25 ° C., the offset adjustment by the offset adjustment circuit 90 removes unnecessary signal components in the DC and fd frequency bands of FIG.

  However, when the environmental temperature is deviated from 25 ° C., offset fluctuations of these unnecessary signals due to temperature changes appear in the frequency bands of DC and fd. For example, when the amplitude of an unnecessary signal of mechanical vibration leakage increases due to temperature change, the increase appears in the fd frequency band before synchronous detection, and appears in the 2fd frequency band after synchronous detection. Such an offset variation of the unnecessary signal cannot be removed in the adjustment process after manufacturing the gyro sensor, but needs to be adjusted and removed dynamically during the operation of the gyro sensor.

  Further, when such an offset fluctuation appears in the DC frequency band after synchronous detection or is turned back to the DC frequency band by discrete sampling of the SCF 114, the sensitivity adjusted by the sensitivity adjustment circuit 80 also shifts. That is, it appears as a temperature variation of sensitivity.

  In this case, a method of incorporating a special temperature compensation circuit for removing such an offset variation in the detection device 30 is also conceivable.

  However, according to this method, the scale of the circuit is increased by the provision of the temperature compensation circuit. Further, since the number of circuit blocks serving as noise sources increases, the S / N ratio deteriorates.

  In this regard, in this embodiment, the pre-filter 112 necessary for anti-aliasing is effectively used from the beginning, and the offset fluctuations of these unnecessary signals are removed as shown in FIG. Therefore, the circuit can be reduced in size, and the number of circuit blocks serving as noise sources is reduced, so that the S / N ratio can be improved.

That is, the purpose of the normal anti-aliasing prefilter is as follows (A1).
(A1) Unnecessary signals such as random noise and pulse noise generated in the circuit are prevented from returning to the SCF passband.

On the other hand, in this embodiment, in addition to the role (A1), the prefilter 112 has the following role (A2).
(A2) The quality of the desired signal (Coriolis force signal) present in the DC is generated by synchronous detection, and the offset fluctuation of the unnecessary signal such as fd, 2fd, etc., which is always present in k × fd, is turned back to DC by sampling in the SCF 114. Deteriorating (S / N ratio) is prevented.

The above (A2) is caused by the following conditions (B1) to (B3) peculiar to the gyro sensor.
(B1) The gyro sensor performs synchronous detection.
(B2) A strong spectrum corresponding to the offset fluctuation of the unnecessary signal appears at fd and 2fd by synchronous detection.
(B3) Since the sampling frequency of the SCF is fsp = fd, offset fluctuations of unnecessary signals such as fd and 2fd are turned back to DC where the desired signal exists.

  That is, the offset fluctuation (see FIG. 16B) of the unnecessary signal appearing at fd and 2fd after the synchronous detection is larger than the amplitude of the desired signal.

  Also, as will be described later, in order to simplify the system configuration, it is desirable that the sampling frequency of the SCF 114 be fsp = fd. When fsp = fd, the offset variation of the unnecessary signals of fd and 2fd is folded back to DC exactly by sampling at the SCF 114.

  On the other hand, the desired signal (see FIG. 16A) present in fd before synchronous detection appears in DC by synchronous detection (see FIG. 16B). Therefore, unless any countermeasure is taken, the quality of the desired DC signal is extremely deteriorated due to aliasing of the offset fluctuation of the unnecessary signal existing in fd and 2fd. Specifically, when the offset fluctuation amount of the unnecessary signals of fd and 2fd is turned back and the offset fluctuation amount larger than the minimum resolution of the desired signal is superimposed on the DC, even if the gyro sensor is in a stationary state, it is as if the gyro sensor is stationary. It gives false information as if the sensor is rotating at a constant angular velocity.

  In order to solve such a problem, the present embodiment pays attention to the presence of the pre-filter 112 in the preceding stage of the SCF 114, and gives this pre-filter 112 not only the above (A1) but also the role (A2). ing.

9. Frequency characteristics of continuous-time filter In a sensor that handles a minute signal such as a gyro sensor, the amplitude of an unnecessary signal is much larger than the amplitude of a desired signal. Therefore, when the amplitude of an unnecessary signal such as mechanical vibration leakage fluctuates due to temperature variation, the offset variation that is the amplitude variation of the unnecessary signal also becomes very large compared to the amplitude (DC component) of the desired signal. Therefore, if the attenuation of the pre-filter 112 is not set appropriately, the S / N ratio may be deteriorated due to the return to the DC component of the offset fluctuation due to the sampling of the SCF 114.

  Therefore, in the present embodiment, the offset fluctuation amount of the unnecessary signal that appears in the frequency band of frequency k × fd (k is a natural number) by the synchronous detection by the synchronous detection circuit 100 is desired for the prefilter 112 that is a continuous-time filter. A frequency characteristic (filter characteristic, attenuation characteristic) that attenuates below the amplitude of the signal (minimum resolution) is provided. For example, it has a frequency characteristic that attenuates an offset variation (see FIG. 16B) of an unnecessary signal that appears in the frequency bands of the frequencies fd, 2fd, and 3fd to be equal to or less than the amplitude of the desired signal. The amplitude of the desired signal is an amplitude corresponding to the minimum resolution of the desired signal, and is an amplitude value corresponding to an angular velocity (unit: dps: degree per second) that is a detection target of the detection apparatus of the present embodiment. The amplitude of the desired signal is the amplitude of the desired signal in the DC frequency region.

  In this way, even when a very large offset variation (amplitude variation of the unnecessary signal) appears in the frequency k × fd compared to the desired signal, the offset variation can be reliably removed by the pre-filter 112. . Therefore, it is possible to prevent the S / N ratio from deteriorating due to the return to the DC component of the offset fluctuation due to the sampling in the SCF 114. Therefore, it is possible to provide a detection device that is optimal for a gyro sensor that handles minute signals.

  FIG. 17 schematically shows the frequency characteristics of the prefilter 112. As indicated by D1 in FIG. 17, the prefilter 112 has sufficient attenuation characteristics at fsp / 2 (= fd / 2). Therefore, it is possible to prevent the S / N ratio from deteriorating due to the return of random noise (thermal noise, 1 / f noise, etc.) due to sampling in the SCF 114, and the prefilter 112 serves as a normal anti-aliasing filter. Can be given.

  When the pre-filter 112 is a primary low-pass filter, the attenuation gradient is −20 dB / dec. The amplitude (minimum resolution) of the desired signal (DC component) is A0, the offset fluctuation of the unnecessary signal appearing at the frequency k × fd (k is a natural number) is ΔAk, and the filter attenuation rate at the frequency fd is a. And In this case, the prefilter 112 may have a frequency characteristic that attenuates the offset fluctuation of the unnecessary signal so that ΔAk × (a / k) ≦ A0.

  For example, in D2 of FIG. 17, the offset fluctuation amount of the unnecessary signal appearing at the frequency fd is ΔA1, and the attenuation factor (attenuation factor) of the filter at the frequency fd is a. Therefore, ΔA1 × a ≦ A0 is satisfied.

  Further, in D3 of FIG. 17, the offset fluctuation amount of the unnecessary signal appearing at the frequency 2fd is ΔA2, and the attenuation factor of the filter at the frequency 2fd is a / k = a / 2 because the prefilter 112 is first-order. is there. Therefore, ΔA2 × (a / 2) ≦ A0 is satisfied.

  Although not shown in FIG. 17, the offset fluctuation amount of the unnecessary signal appearing at the frequency 3fd is ΔA3, and the attenuation factor of the filter at the frequency 3fd is a / k = a because the prefilter 112 is first-order. / 3. Therefore, ΔA3 × (a / 3) ≦ A0 is established.

  If the above conditions are satisfied, when the pre-filter 112 is a first-order low-pass filter, the offset fluctuation amount of the unnecessary signal that appears in the frequency bands of the frequencies fd, 2fd, and 3fd is less than the amplitude of the desired signal. Can be attenuated.

Note that a secondary low-pass filter may be used as the prefilter 112. When the pre-filter 112 is a secondary low-pass filter, the attenuation gradient is −40 dB / dec. Therefore, in this case, the prefilter 112 may have a frequency characteristic that attenuates the offset fluctuation of the unnecessary signal so that ΔAk × (a / k ² ) ≦ A0.

  For example, the offset fluctuation amount of the unnecessary signal appearing at the frequency fd is ΔA1, and the attenuation factor of the filter at the frequency fd is a, so that ΔA1 × a ≦ A0 is satisfied.

The offset fluctuation amount of the unnecessary signal appearing at the frequency 2fd is ΔA2, and the attenuation factor of the filter at the frequency 2fd is a / k ² = a / 4 because the prefilter 112 is second order. Therefore, ΔA2 × (a / 4) ≦ A0 is satisfied.

The offset fluctuation amount of the unnecessary signal appearing at the frequency 3fd is ΔA3, and the attenuation factor of the filter at the frequency 3fd is a / k ² = a / 9 because the prefilter 112 is second order. Therefore, ΔA3 × (a / 9) ≦ A0 is satisfied.

  If the above conditions are satisfied, when the pre-filter 112 is a second-order low-pass filter, the offset fluctuation amount of the unnecessary signal that appears in the frequency bands of the frequencies fd, 2fd, and 3fd is less than the amplitude of the desired signal. Can be attenuated.

  FIG. 18A shows a configuration example of the prefilter 112. FIG. 18A shows an example of a first-order low-pass filter. Prefilter 112 includes a resistor RI1 and a capacitor CI1 provided between nodes NI2 and NI3, and a resistor RI2 provided between nodes NI1 and NI2. Also included is an operational amplifier OPI having its inverting input terminal connected to the node NI2 and its non-inverting input terminal connected to the AGND node. The circuit shown in FIG. 18A can also be used as the post filter 116 shown in FIG.

  Note that a secondary low-pass filter may be used as the prefilter 112. FIG. 18B is an example of a secondary low-pass filter. The low-pass filter in FIG. 18B includes resistors RH1, RH2, and RH3 provided between the node NH2 and nodes NH4, NH3, and NH1, a capacitor CH1 provided between the nodes NH3 and NH4, and a node NH2. And a capacitor CH2 provided between the nodes of AGND. Also included is an operational amplifier OPH having its inverting input terminal connected to the node NH3 and its non-inverting input terminal connected to the AGND node.

  In the first-order low-pass filter of FIG. 18A, the cutoff frequency is fc = 1 / (2π × C1 × R1), where C1 is the capacitance value of the capacitor CI1 and R1 is the resistance value of the resistor RI1. The attenuation gradient is −20 dB / dec. Therefore, when a first-order low-pass filter is used, the attenuation at the frequencies fd and 2fd is reduced as shown by G2 and G3 by sufficiently reducing the cutoff frequency fc as shown by G1 in FIG. can do. Therefore, the offset fluctuation amount of the unnecessary signal as shown in G7 can also be attenuated, and even when this offset fluctuation amount is turned back to DC, it becomes possible to make it less than the minimum resolution of the desired signal.

In the secondary low-pass filter of FIG. 18B, when the capacitance values of the capacitors CH1 and CH2 are C1 and C2, and the resistance values of the resistors RH1 and RH2 are R1 and R2, the cutoff frequency is fc = 1 / {2π × (C1 × C2 × R1 × R2) ^1/2 }. The attenuation gradient is −40 dB / dec. As described above, the secondary low-pass filter has a large attenuation gradient although the number of elements increases. Accordingly, sufficient attenuation can be obtained at the frequencies fd and 2fd as indicated by G5 and G6 without reducing the cut-off frequency fc as much as indicated by G4 in FIG. Accordingly, it is possible to reduce the circuit scale as compared with the first-order low-pass filter of FIG. Further, the offset fluctuation of the unnecessary signal can be sufficiently attenuated, and the offset fluctuation can be reliably removed.

10. Of the unnecessary signals of the detuning frequency, the unnecessary signal caused by the detuning frequency Δf = | fd−fs | is mixed with the signal of the detection-side resonance frequency fs in the sensor signal. Is generated. For example, in order to improve the response of the gyro sensor, the detection vibrator may be oscillated at a natural resonance frequency fs with a minute amplitude in an idling manner. Alternatively, an external vibration from outside the gyro sensor may be applied to the vibrator, and the detection vibrator may vibrate at the natural resonance frequency fs. When the detection vibrator vibrates at the frequency fs as described above, a signal of the frequency fs is mixed into the signal VS5 input to the synchronous detection circuit 100. Since the synchronous detection circuit 100 performs synchronous detection based on the reference signal RS having the frequency fd, an unnecessary signal having a detuning frequency Δf = | fd−fs | corresponding to the difference between the frequencies fd and fs is generated.

For example, the mixed frequency fs signal can be expressed as Dsin (ωs × t). Note that ωs = 2πfs. And since synchronous detection can be regarded as multiplication of a sensor signal and a drive signal (reference signal), about a signal of frequency fs among sensor signals,
Csin (ωd × t) × Dsin (ωs × t)
= {− (D × C) / 2} × [cos {(ωd + ωs) t} −cos {(ωd−ωs) t}]
It becomes. As is clear from the above equation, when a signal with a frequency fs is mixed, an unnecessary signal with a detuning frequency Δf = | fd−fs | is generated after synchronous detection.

  Here, the detuning frequency Δf = | fd−fs | is sufficiently smaller than fd and fs. Accordingly, a steep attenuation characteristic as shown in FIG. 20 is necessary to remove the unnecessary signal of the component of the detuning frequency Δf. Accordingly, there is a problem that it is difficult to remove unnecessary signals of such a component of the detuning frequency Δf only with a conventional continuous-time low-pass filter.

  In order to solve such a problem, in FIG. 15, the filter unit 110 is provided with an SCF 114 that is a discrete time filter. The SCF 114 removes the component of the detuning frequency Δf = | fd−fs | corresponding to the difference between the drive-side resonance frequency fd and the detection-side resonance frequency fs of the vibrator, and removes the frequency component (DC component) of the desired signal. Has frequency characteristics to pass.

  As shown in FIG. 15, when the filter unit 110 is provided with an SCF 114 (discrete time filter in a broad sense), it is easy to realize a steep attenuation characteristic as shown in FIG. Therefore, even when the detuning frequency Δf is extremely smaller than the frequency fd, the unnecessary signal component in the frequency band of the detuning frequency Δf is reliably and easily removed without adversely affecting the desired signal in the passband. it can.

  In addition, the continuous-time filter has a disadvantage that if the capacitance value C of the capacitor and the resistance value R of the resistor vary, the frequency characteristic of the filter also varies, making it difficult to obtain a stable frequency characteristic. For example, the absolute values of C and R vary by about ± 20%, and the cut-off frequency of the continuous-time filter (RC filter) is determined by C × R. When the cutoff frequency varies, the amplitude of the desired signal in the pass band is attenuated or the phase is changed, thereby degrading the signal quality.

  On the other hand, in the SCF 114, the filter characteristics can be determined by the capacitance ratio and the sampling frequency (clock frequency). For example, since the accuracy of the capacitance ratio is 0.1% or less, there is little variation in the cut-off frequency. Therefore, according to the SCF 114, it is possible to easily realize a steep attenuation characteristic that reliably removes an unnecessary signal having the detuning frequency Δf while passing a desired signal in the pass band.

  As a comparative example of the present embodiment, a method may be considered in which a band pass filter is provided on the upstream side of the synchronous detection circuit, and a signal of frequency fd is passed by this band pass filter and a signal of frequency fs is removed.

  However, in the method of this comparative example, it is necessary to set the Q value of the bandpass filter to a large value such as 50 or more. Therefore, when this band pass filter is realized by the SCF, it is necessary to strictly manage the capacity ratio, which reduces the yield and the like. Also, when trying to obtain the same attenuation, the low-pass filter is n-order and the band-pass filter is 2 × n-order. Therefore, the SCF band-pass filter has a larger number of elements and a larger circuit area than the SCF low-pass filter.

  On the other hand, in this embodiment, since the SCF 114 of the low-pass filter is provided, the capacity ratio can be easily managed and the circuit area can be reduced compared to the case of the band-pass filter.

  FIG. 21 shows a configuration example of the SCF 114. The SCF 114 in FIG. 21 includes a switched capacitor circuit 210 provided between the nodes NG1 and NG2, a capacitor CG4 provided between the nodes NG2 and NG3, and a switched capacitor provided between the nodes NG2 and NG5. A capacitor circuit 212 and a capacitor CG5 are included. Further, it includes a switched capacitor circuit 214 provided between nodes NG3 and NG4 and a capacitor CG6 provided between nodes NG4 and NG5. The inverting input terminal is connected to the node NG2, the non-inverting input terminal is connected to the AGND node, the operational amplifier OPG1, the inverting input terminal is connected to the node NG4, and the non-inverting input terminal is the AGND node. An operational amplifier OPG2 connected to the. Here, the switching elements SG1 to SG6 of the switched capacitor circuits 210, 212, and 214 can be configured by MOS transistors (transfer gates). The SCF 114 is not limited to the configuration shown in FIG. 21, and various modifications can be made.

  In the present embodiment, the SCF 114 is operated based on a clock corresponding to the reference signal RS (the reference signal itself or a clock generated by the reference signal; a clock having the same frequency as the reference signal). Specifically, for example, a non-overlapping two-phase clock (sampling clock) is generated by the reference signal RS. Then, based on the generated clock, the switching elements SG1 to SG6 in FIG. 21 are turned on / off to operate the SCF 114.

  In this way, since the operation clock of the SCF 114 can be generated by effectively using the reference signal RS, the circuit can be reduced in scale. In addition, since the frequency fd of the reference signal RS and the sampling frequency (clock frequency) of the SCF 114 can be matched, the design of the frequency characteristics of the filter can be facilitated. In addition, when fd, which is the drive-side resonance frequency, varies due to an environmental change (temperature change) or a change with time, the sampling frequency of the SCF 114 also varies according to this variation. Therefore, the cutoff frequency of the SCF 114 can be changed and adjusted according to the change in the frequency fd. Therefore, even when an environmental change or a change with time occurs, an unnecessary signal having the detuning frequency fd can be reliably removed.

  As described above, in this embodiment, unnecessary signals having the detuning frequency fd are removed by the SCF 114, and offset fluctuations of unnecessary signals appearing in fd, 2fd, 3fd, etc. by synchronous detection are used for anti-aliasing of the SCF 114. Each filter has a different role sharing such as removal by the pre-filter 112 provided in the filter. That is, an unnecessary signal that requires a steep attenuation characteristic such as an unnecessary signal due to a detuning frequency is removed by the SCF 114, and an offset variation of the unnecessary signal is removed by the pre-filter 112. By clarifying the division of roles in this way, unnecessary signals can be efficiently removed with a small circuit.

  Although the present embodiment has been described in detail as described above, it will be easily understood by those skilled in the art that many modifications can be made without departing from the novel matters and effects of the present invention. Accordingly, all such modifications are intended to be included in the scope of the present invention. For example, in the specification or drawings, terms (SCF, prefilter, temperature change, etc.) described at least once together with different terms (discrete time filter, continuous time filter, environmental change, etc.) having a broader meaning or the same meaning are The different terms can be used anywhere in the specification or drawings. Further, the structure of the vibrator, the configuration of the detection device, the gyro sensor, and the electronic device are not limited to those described in this embodiment, and various modifications can be made. It is also possible to realize the discrete time filter with a filter other than the SCF (for example, a digital filter).

Configuration examples of electronic devices and gyro sensors. The structural example of a detection apparatus. 3A and 3B are configuration examples of a Q / V (I / V) conversion circuit and a differential amplifier circuit. The signal waveform example for demonstrating operation | movement of a detection apparatus. 5A to 5C are examples of frequency spectra. FIG. 6A to FIG. 6D are explanatory diagrams of synchronous detection. The structural example of the synchronous detection circuit of a comparative example. Explanatory drawing of the method of substituting the operational amplifier of a sensitivity adjustment circuit and an offset adjustment circuit for the non-inverting amplifier of a synchronous detection circuit, and an inverting amplification type. Explanatory drawing of sensitivity adjustment. 10A and 10B are configuration examples of the sensitivity adjustment circuit. FIG. 11A and FIG. 11B show other configuration examples of the sensitivity adjustment circuit. High-pass filter frequency characteristics. A connection configuration example of a sensitivity adjustment circuit, an offset adjustment circuit, and a synchronous detection circuit. 14A and 14B are explanatory diagrams of offset adjustment. The structural example of a filter part. FIGS. 16A to 16C show examples of frequency spectra. Explanatory drawing of the frequency characteristic of a pre filter. 18A and 18B are configuration examples of the prefilter. Explanatory drawing of the frequency characteristic at the time of using a primary and secondary pre-filter. Explanatory drawing of a detuning frequency. SCF configuration example.

Explanation of symbols

OPD (OPD1 to OPD4), OPE first and second operational amplifiers,
SE1, SE2, first and second switching elements 10 vibrator, 30 detector, 40 drive circuit, 42 I / V conversion circuit,
44 AGC circuit, 46 binarization circuit, 60 detection circuit, 70 amplification circuit,
72, 74 Q / V (I / V) conversion circuit, 76 differential amplifier circuit, 80 sensitivity adjustment circuit,
90 offset adjustment circuit, 100 synchronous detection circuit, 110 filter unit,
112 pre-filter, 114 SCF, 116 post-filter,
500 electronic equipment, 510 gyro sensor, 520 processing unit, 530 memory,
540 operation unit, 550 display unit

Claims (15)

A drive circuit for driving the vibrator to excite the vibrator;
A detection circuit that receives an output signal from the vibrator and detects a desired signal;
The detection circuit includes:
A sensitivity adjustment circuit that variably controls gain to adjust sensitivity;
An offset adjustment circuit that performs adjustment to remove the initial offset voltage of the output signal of the detection device;
A synchronous detection circuit that performs synchronous detection based on a reference signal,
The synchronous detection circuit is
A detection apparatus that performs synchronous detection by performing non-inversion amplification and inversion amplification of a signal using a first operational amplifier included in the sensitivity adjustment circuit and a second operational amplifier included in the offset adjustment circuit. In claim 1,
The synchronous detection circuit is
In the first period in which the reference signal is at the first voltage level, the signal amplified by the first operational amplifier included in the sensitivity adjustment circuit is output as a signal after synchronous detection, and the reference signal is the second signal. And a signal amplified by the second operational amplifier included in the offset adjustment circuit is output as a signal after synchronous detection in the second period of the voltage level of. In claim 1 or 2,
The synchronous detection circuit is
A first switching element;
One end of the first switching element is connected to one end of the first switching element. The second switching element is turned off when the first switching element is turned on, and turned on when the first switching element is turned off. Switching elements
The signal amplified by the second operational amplifier is input to the other end of the first switching element, and the signal amplified by the first operational amplifier is input to the other end of the first switching element. A detection device characterized by that. In any one of Claims 1 thru | or 3,
The sensitivity adjustment circuit includes:
A variable resistor whose resistance value is variably controlled based on sensitivity adjustment data;
And a first operational amplifier for amplifying a signal with a gain determined by a resistance value of the variable resistor. In any one of Claims 1 thru | or 4,
The sensitivity adjustment circuit includes:
A detection apparatus that operates as a variable gain amplifier and operates as a high-pass filter. In claim 5,
The detection apparatus, wherein the high-pass filter which is an active filter and the variable gain amplifier share the first operational amplifier. In any one of Claims 1 thru | or 6.
The sensitivity adjustment circuit includes:
A capacitor provided between the input node and the first node;
A resistor provided between the first node and a node of the first power supply voltage;
It is provided between an output node and a node of the first power supply voltage, and a resistance value between the output node and the output tap and a resistance value between the output tap and the node of the first power supply voltage are sensitive. A variable resistor that is variably controlled based on the adjustment data of
The first node is connected to the non-inverting input terminal, the output tap of the variable resistor is connected to the inverting input terminal, and the first operational amplifier has the output node connected to the output terminal. A detection device characterized by that. In any one of Claims 1 thru | or 6.
The sensitivity adjustment circuit includes:
A resistor provided between the input node and the first node;
A capacitor provided between the first node and the second node;
A variable resistor provided between the output node and the second node, the resistance value of which is variably controlled based on sensitivity adjustment data;
A detection apparatus comprising: the first operational amplifier having the inverting input terminal connected to the second node and the non-inverting input terminal connected to the first power supply voltage node. In any one of Claims 1 thru | or 8.
The detection circuit includes:
Including a filter unit for filtering the signal after synchronous detection;
The filter unit is
A discrete time filter;
A continuous-time filter provided on the front side of the discrete-time filter,
The continuous time filter is:
A detection apparatus having frequency characteristics for removing offset fluctuations of unnecessary signals due to environmental changes. In claim 9,
The continuous time filter is:
A detection apparatus having a frequency characteristic of attenuating an offset variation of an unnecessary signal that appears in a frequency band of frequency k × fd (k is a natural number) by synchronous detection by the synchronous detection circuit below an amplitude of a desired signal. In claim 10,
The continuous-time filter is a first-order low-pass filter;
When the amplitude of the desired signal is A0, the offset fluctuation amount of the unnecessary signal appearing at the frequency k × fd is ΔAk, and the attenuation factor of the filter at the frequency fd is a,
The continuous time filter is:
A detection device having frequency characteristics for attenuating offset fluctuations of unnecessary signals so that ΔAk × (a / k) ≦ A0 is satisfied. In claim 10,
The continuous-time filter is a second-order low-pass filter;
When the amplitude of the desired signal is A0, the offset fluctuation amount of the unnecessary signal appearing at the frequency k × fd is ΔAk, and the attenuation factor of the filter at the frequency fd is a,
The continuous time filter is:
A detection apparatus having a frequency characteristic for attenuating an offset fluctuation amount of an unnecessary signal so that ΔAk × (a / k ² ) ≦ A0 is satisfied. In any of claims 9 to 12,
The discrete time filter is:
It has a frequency characteristic that removes the component of the detuning frequency Δf = | fd−fs | corresponding to the difference between the drive side resonance frequency fd and the detection side resonance frequency fs of the vibrator and allows the frequency component of the desired signal to pass. A featured detection device. A detection device according to any one of claims 1 to 13,
The vibrator;
A gyro sensor comprising: A gyro sensor according to claim 14,
A processing unit for performing processing based on angular velocity information detected by the gyro sensor;
An electronic device comprising:

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