JP2008071877A - GaN-BASED SEMICONDUCTOR ELEMENT - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a GaN-based semiconductor element capable of causing the inverted distribution of a channel layer and reducing on resistance. <P>SOLUTION: On a sapphire substrate 1, a GaN buffer layer 2, an undoped GaN layer 3, an n<SP>+</SP>-type GaN drain layer 4, an n<SP>-</SP>-type GaN layer 5, and a p-type GaN-based multilayer film channel layer 6 are laminated. The p-type GaN-based multilayer film channel layer 6 is, for example, in a multilayered film structure where a p-type GaN layer and the undoped GaN layer are laminated alternately. A GaN layer without doping any impurities is used as an intermediate layer, thus expanding a depletion layer region laterally. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a GaN-based semiconductor element used for a semiconductor amplifying element such as a power transistor that can obtain a large current.

  MOS type FETs and HEMTs (High Electron Mobility Transistors) using GaN-based III-V group compound semiconductors such as GaN and AlGaN for the channel layer are more operating than MOS type FETs and HEMTs using Si, GaAs, etc. The device has been attracting attention as a device capable of high temperature operation and large current operation with a high withstand voltage and a small on-resistance.

For example, as shown in FIG. 5, the GaN-based semiconductor element includes a GaN buffer layer 52, an undoped GaN layer 53, an n ⁺ -type GaN drain layer 54, and an n ⁻ -type GaN layer 5 on a semi-insulating sapphire substrate 51. The p-type GaN channel layer 56 is laminated, and an n-type GaN source layer 57 having a striped ridge shape is formed on the p-type GaN channel layer 56. A source electrode 60 is formed over the entire surface of the ridge shape of the n-type GaN source layer 57 and a part of the surface of the p-type GaN channel layer 56.

On the other hand, the gate electrode 59 is formed on the insulating film 58 laminated on the surface of the p-type GaN channel layer 56, and the drain electrode 61 is formed on the exposed surface of the mesa-etched n ⁺ -type GaN drain layer 54.
JP 2004-260140 A

  In the conventional GaN-based semiconductor device, when a bias voltage is applied to the gate electrode 59, a depletion layer is generated in the p-type GaN channel layer 56 as shown in FIG. Direction). If the depletion layer does not spread to the side, the depletion layer cannot reach the vicinity of the n-type GaN source layer 57, the inversion distribution hardly occurs, the on-resistance increases, and the drain electrode 61 and the source electrode There was a problem that current did not flow between 60.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a GaN-based semiconductor element that can easily cause an inversion distribution of a channel layer and can reduce on-resistance.

  In order to achieve the above object, the invention according to claim 1 is a GaN-based semiconductor element comprising a channel layer made of a GaN-based semiconductor, and a source layer and a drain layer arranged with the channel layer interposed therebetween, The channel layer is a GaN-based semiconductor device having a multilayer structure including an undoped GaN-based layer in the middle.

  The invention according to claim 2 is the GaN-based semiconductor device according to claim 1, wherein a GaN layer is formed on the side of the multilayer film of the channel layer that contacts the electrode.

  The invention according to claim 3 is the GaN-based semiconductor device according to claim 2, wherein the channel layer includes an AlGaN layer doped with impurities.

  According to a fourth aspect of the present invention, the undoped GaN-based layer comprises an undoped GaN layer or an undoped AlGaN layer. The GaN-based semiconductor device according to any one of the first to third aspects, It is.

  According to the present invention, since the channel layer has a multilayer structure and an undoped GaN-based layer that is not doped with impurities is inserted as an intermediate layer, only one n-type or p-type GaN layer is provided. As compared with, the depletion layer spreads in the lateral direction, and inversion distribution is likely to occur, and the on-resistance can be reduced.

  In addition, the above-mentioned undoped GaN-based layer is composed of undoped AlGaN, or by inserting an AlGaN layer doped with impurities in the intermediate layer, the channel layer has cracks rather than a multilayer film structure based on the GaN layer. Can be suppressed.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a cross-sectional structure of a GaN-based semiconductor device of the present invention, FIG. 2 is a top view of the GaN-based semiconductor device of FIG. 1 as viewed from above, and the AA cross-section of FIG. It corresponds to. The GaN-based semiconductor element of the present invention uses a III-V group GaN-based semiconductor that is a hexagonal compound semiconductor, and the III-V group GaN-based semiconductor is a quaternary mixed crystal Al _x Ga _y In _z. N (x + y + z = 1, 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1). 1 and 2 show examples of the NPN structure, the present invention can also be applied to the PNP structure.

A GaN buffer layer 2, an undoped GaN layer 3, an n ⁺ -type GaN drain layer 4, an n ⁻ -type GaN layer 5, and a p-type GaN-based multilayer channel layer 6 are stacked on the sapphire substrate 1. An n-type GaN source layer 8 having a ridge shape is formed on the film channel layer 6. The n-type GaN source layer 8 has a ridge portion A, a ridge portion B, and two ridge portions. From the top surface to the side surface of the ridge portion A and ridge portion B, the p-type between the ridge portions A and B is further provided. A source electrode 10 is formed over the surface of the GaN-based multilayer film channel layer 6. A selective growth mask 7 made of an insulating material is formed so as to sandwich the ridge portions A and B, and a gate electrode 9 is formed on the selective growth mask 7.

In addition, a drain electrode 12 is formed in the exposed n ⁺ -type GaN drain layer 4 inside the groove formed by mesa etching, and a p-type GaN-based multilayer film is formed so that leakage does not occur due to the drain electrode 12. An insulating film 11 is provided from the channel layer 6 to part of the side surfaces of the n ⁻ -type GaN layer 5 and the n ⁺ -type GaN drain layer 4. As will be described later, the n-type GaN source layer 8 is formed by selective growth, and the selective growth mask 7 used at that time is used as an insulating film for the gate electrode 9.

For the selective growth mask 7, a transparent insulator such as SiO ₂ , Si ₃ N ₄ , ZrO ₂ , Al ₂ O ₃ or the like is used. Further, Si is used for the n-type dopant, and Mg is used for the p-type dopant. A multilayer metal film made of TaSi / Au or the like is used for the source electrode 10 and the drain electrode 12, and a multilayer metal film made of Ni / Au or the like is used for the gate electrode.

The n ⁺ -type GaN drain layer 4 is doped with impurity Si so that the carrier concentration becomes 1 × 10 ¹⁸ cm ⁻³ , for example, in order to make an ohmic contact with the drain electrode 12, and the n ⁻ -type GaN layer Reference numeral 5 denotes an intermediate layer provided to lower the energy barrier at the junction interface between the n-type layer and the p-type layer to facilitate current flow, and is doped with impurity Si so as to be 1 × 10 ¹⁷ cm ^−3. Has been.

  The p-type GaN-based multilayer channel layer 6 is formed by laminating several semiconductor layers, an example of which is shown in FIGS. FIG. 3 shows an example in which the p-type GaN-based multilayer channel layer 6 has a multilayer structure of a p-type GaN layer 6a and an undoped GaN-based layer. An undoped GaN layer 6b is used as the undoped GaN-based layer.

A p-type GaN layer 6a is disposed on the side in contact with the n ⁻ -type GaN layer 5 (lowermost layer), an undoped GaN layer 6b is disposed thereon, and a p-type GaN layer 6a and p-type GaN are disposed thereon. Layers 6a and undoped GaN layers 6b are alternately and repeatedly stacked, and a stacked structure in which a semiconductor layer (uppermost layer) in contact with the n-type GaN source layer 8 and the source electrode 10 is a p-type GaN layer 6a It has become.

  That is, the uppermost layer and the lowermost layer are composed of a p-type GaN layer 6a, an undoped GaN layer 6b that is not doped with impurities is inserted as an intermediate layer, and the undoped GaN layer 6b is sandwiched with the p-type GaN layer 6a. It has a sandwiched structure.

  By doing so, the undoped GaN layer 6b that is not doped with impurities has a depletion layer in the lateral direction (in the direction of the arrow in the figure) as compared with the p-type GaN layer 6a doped with impurities to increase the carrier concentration. Since it is easy to spread, the depletion layer can be extended to just below the n-type GaN source layer 8 as the entire channel layer, and an inversion distribution can be easily caused.

Further, since the uppermost layer of the p-type GaN-based multilayer channel layer 6 needs to make ohmic contact with the source electrode 10, it is necessary to make the p-type GaN layer 6a. The p-type GaN layer 6a needs to have a high carrier concentration so as to be in ohmic contact with the source electrode 10 and not to turn on the element when no voltage is applied to the gate electrode. Impurity Mg is doped so as to be 4 × 10 ¹⁶ to 1 × 10 ¹⁸ cm ⁻³ .

  On the other hand, FIG. 4 shows another configuration of the p-type GaN-based multilayer channel layer 6. As in FIG. 3, the uppermost layer is a p-type GaN layer, and the intermediate layer sandwiched between the impurity-doped semiconductor layers is the same as the undoped GaN layer 6b, but the intermediate layer is doped p-type. The semiconductor layer is not a p-type GaN layer but a p-type AlGaN layer 6c. Thus, by using a p-type AlGaN layer as the p-type doped layer other than the uppermost layer, there is an advantage that the strength can be increased and the occurrence of cracks can be suppressed.

  Although not shown, in the configuration of FIG. 3 or FIG. 4, the undoped GaN layer 6b may be replaced with an undoped AlGaN layer. This effect is that the generation of cracks can be suppressed as described above.

  By the way, if the number of stacked multilayer films in FIGS. 3 and 4 is too large, the thickness of one layer becomes too thin, and the depletion layer in the undoped GaN layer or the undoped AlGaN layer may not be expanded in the lateral direction. Therefore, it is desirable that the undoped GaN-based layer that is not doped with impurities be about 1 to 2 layers. In the PNP structure MOSFET, since the channel layer is n-type, the p-type GaN layer 6a can be replaced with an n-type GaN layer, and the p-type AlGaN layer 6c can be replaced with an n-type AlGaN layer.

Next, a method for manufacturing the GaN-based semiconductor device shown in FIGS. As a manufacturing method, an MOCVD method (metal organic chemical vapor deposition method) is mainly used. First, the sapphire substrate 1 is transferred into the MOCVD apparatus, and the GaN buffer layer 2 is grown on the sapphire substrate 1 at a low temperature of 600 to 700 ° C. Thereafter, the substrate temperature is raised to 1000 ° C. or higher, and the undoped GaN layer 3, n ⁺ -type GaN drain layer 4, n ⁻ -type GaN layer 5, and p-type GaN-based multilayer channel layer 6 are epitaxially grown in this order on the GaN buffer layer 2. . The structure of the p-type GaN-based multilayer channel layer 6 is as described above.

Regarding the production of each semiconductor layer, for example, when producing a GaN layer, together with hydrogen or nitrogen as a carrier gas, trimethylgallium (TMGa) as a Ga atom source gas and ammonia (as a nitrogen atom source gas) NH ₃₎ was used. In the case of n-type GaN, silane (SiH ₄ ) or the like as an n-type dopant gas, and in the case of p-type GaN, CP ₂ Mg (cyclopentadiethyl magnesium) or the like as a p-type dopant gas is used. Add to the reaction gas. When fabricating the AlGaN layer, TMGa, added trimethylaluminum (TMA) in NH _3.

  In this way, by supplying the reaction gas corresponding to the components of each semiconductor layer, the dopant gas for making the n-type and p-type, the crystal is grown in order by changing to the optimum growth temperature, thereby having a predetermined composition. A semiconductor layer of a predetermined conductivity type was formed to a required thickness. The doping concentration of impurities was controlled by the flow rate of each source gas.

  Next, the laminated wafer is taken out from the MOCVD apparatus, and a selective growth mask is laminated on the p-type GaN-based multilayer channel layer 6 by CVD, plasma CVD, sputtering, or the like, and a resist is applied on the selective growth mask. After patterning into a shape, the entire shape of the selective growth mask is formed by etching, and selectively removed by etching to form an opening, and then the resist is removed.

  1 and 2, the opening of the selective growth mask 7 substantially coincides with the region where the n-type GaN source layer 8 is formed, and the region where the selective growth mask is removed (the broken line portion in FIG. 2). This corresponds to a circular central mask portion, and is a pattern in which openings are provided concentrically around the center mask portion. When crystal growth is performed from the opening, the formed epitaxial layer has a shape having a ridge portion connected in a donut shape.

  By the way, since the growth substrate such as a sapphire substrate and GaN have different lattice constants, the GaN-based semiconductor layer grown on the growth substrate has dislocations (lattice defects) extending vertically from the substrate. Yes. As a method for reducing such dislocations, selective lateral growth (ELO: Epitaxial Lateral Overgrowth) is well known. In the present invention, the above selective growth is used.

  In this selective growth, the p-type GaN-based multilayer channel layer 6 is covered with a selective growth mask 7 such as a dielectric mask, so that growth first occurs from the opening of the selective growth mask 7 (selective growth), and thereafter Crystal growth is also formed in the lateral direction by expanding the growth layer on the selective growth mask 7.

  Next, crystal growth is started again in the MOCVD apparatus, and the n-type GaN source layer 8 is formed by selective growth in which crystal growth is performed from the opening of the selective growth mask 7. The n-type GaN source layer 8 has a structure having a ridge shape on the left and right sides of the ridge portion A and the ridge portion B. More specifically, it is formed in a ring shape so that a ridge shape surrounds the center recess between the ridge portions A and B.

  Thereafter, the selective growth mask present in the central depression sandwiched between the ridges A and B is removed by wet etching using a hydrofluoric acid (HF) solution or the like. A portion surrounded by a broken line in FIG. 2 corresponds to a region where the selective growth mask is removed.

  Next, the source electrode 10 is formed over the surface of the p-type GaN-based multilayer channel layer 6 from which the left and right ridge side surfaces of the n-type GaN source layer 8 and the selective growth mask have been removed by vapor deposition, sputtering, or the like. A gate electrode 9 is formed on the remaining selective growth mask 7 by vapor deposition, sputtering, or the like.

  The source electrode 10 is formed across the inner side surface of the ridge portion connected in a donut shape in the n-type GaN source layer 8, a part of the top surface of the ridge portion, and the region where the selective growth mask is removed. As shown in FIG. 2, the source electrode 10, the n-type GaN source layer 8, the gate electrode 9, the selective growth mask 7 and the like are formed concentrically when viewed from above.

Next, by performing mesa etching, p-type GaN-based form a groove portion of a multilayer film channel layer 6 toward ^{the n +} -type GaN drain layer 4, to expose the ^{n +} -type GaN drain layer 4, an insulating film such as SiO ₂ 11 is stacked in a groove formed by mesa etching by CVD, plasma CVD, sputtering, etc., and the surface of the exposed n ⁺ -type GaN drain layer 4 and a part of the side surface are left, covered with a resist, and etched. Part of the insulating film 11 (the part not covered with the resist) is removed, and the drain electrode 12 is formed by vapor deposition, sputtering, or the like in the region from which the insulating film 11 has been removed. In this way, the GaN-based semiconductor device shown in FIGS.

In the above embodiment, the GaN-based semiconductor element configured to form the n-type GaN source layer 8 using selective growth has been described. However, the p-type GaN-based multilayer channel layer shown in FIGS. 5 is applicable to the conventional GaN-based semiconductor device structure that does not use the selective growth of FIG. 5, and instead of the p-type GaN channel layer 56, the p-type GaN-based multilayer film of FIGS. A channel layer structure may be applied.

It is a figure which shows the cross-section of the GaN-type semiconductor element of this invention. It is the figure which looked at the GaN-type semiconductor element of FIG. 1 from the upper surface. It is a figure which shows the laminated structure of the GaN-type multilayer film channel layer in this invention. It is a figure which shows the other laminated structure of the GaN-type multilayer film channel layer in this invention. It is a figure which shows the cross-section of the conventional GaN-type semiconductor element.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Sapphire substrate 2 GaN buffer layer 3 Undoped GaN layer 4 n ⁺ type GaN drain layer 5 n ⁻ type GaN layer 6 p type GaN-based multilayer channel layer 7 Mask for selective growth 8 n type GaN source layer 9 Gate electrode 10 Source electrode 11 Insulating film

Claims (4)

A GaN-based semiconductor element comprising a channel layer made of a GaN-based semiconductor, and a source layer and a drain layer arranged with the channel layer interposed therebetween,
The channel layer is formed of a multilayer film structure including an undoped GaN-based layer in the middle thereof.   2. The GaN-based semiconductor device according to claim 1, wherein a GaN layer is formed on a side of the multilayer film of the channel layer that contacts the electrode.   The GaN-based semiconductor device according to claim 2, wherein the channel layer includes an AlGaN layer doped with impurities.   4. The GaN-based semiconductor device according to claim 1, wherein the undoped GaN-based layer includes an undoped GaN layer or an undoped AlGaN layer. 5.

Images