JP2008028234A - Multiple-pattern wiring board - Google Patents

Multiple-pattern wiring board Download PDF

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JP2008028234A
JP2008028234A JP2006200681A JP2006200681A JP2008028234A JP 2008028234 A JP2008028234 A JP 2008028234A JP 2006200681 A JP2006200681 A JP 2006200681A JP 2006200681 A JP2006200681 A JP 2006200681A JP 2008028234 A JP2008028234 A JP 2008028234A
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conductor
wiring
wiring board
region
board
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Minoru Tomita
穣 冨田
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Kyocera Corp
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Kyocera Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a multiple-pattern wiring board in which unwanted capacitance (stray capacitance) due to the existence of a connection conductor is small, and disadvantage such as deterioration in transmission characteristics of an electric signal is suppressed in singulated individual wiring boards. <P>SOLUTION: In the multiple-pattern wiring board 10, a plurality of wiring board regions 2 are disposed vertically and horizontally on the center of a mother board 1, a frame-like dummy region 3 surrounding the wiring board regions 2 is provided on an external peripheral portion, and each of the wiring board regions 2 has a wiring conductor 4 coated with a plating layer on an exposed surface and a connection conductor 5 for plating to be connected to the wiring conductor 4. In each of the wiring board regions 2, the connection conductor 5 is formed so that it does not overlap in plan view on a wiring conductor 4 different from the wiring conductor 4 connected to the connection conductor 5. This configuration can suppress the generation of stray capacitance due to a fact that the connection conductor 5 opposes the wiring conductor 4 with one part of the mother board 1 sandwiched, and deterioration of electric characteristics can be prevented. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、半導体素子や弾性表面波素子等の電子部品を搭載するために用いられる配線基板となる配線基板領域を、複数個、母基板の中央部に縦横の並びに配列して成る複数個取り配線基板に関するものである。   In the present invention, a plurality of wiring board regions, which are wiring boards used for mounting electronic components such as semiconductor elements and surface acoustic wave elements, are arranged in a vertical and horizontal arrangement at the center of the mother board. The present invention relates to a wiring board.

従来から、例えば半導体素子や弾性表面波素子等の電子部品を搭載するために用いられる配線基板は、酸化アルミニウム質焼結体等のセラミックス材料から成る四角平板状の絶縁基体の上面に電子部品を搭載するための搭載部を有し、この搭載部またはその周辺から絶縁基体の下面にかけてタングステン等の金属材料から成る複数の配線導体が形成された構造を有している。   Conventionally, for example, wiring boards used for mounting electronic components such as semiconductor elements and surface acoustic wave elements have electronic components placed on the upper surface of a square plate-like insulating base made of a ceramic material such as an aluminum oxide sintered body. A mounting portion for mounting is provided, and a plurality of wiring conductors made of a metal material such as tungsten are formed from the mounting portion or its periphery to the lower surface of the insulating base.

配線導体のうち搭載部またはその周辺に位置する部分には、露出表面に電子部品の電極がはんだやボンディングワイヤ等を介して電気的に接続される。また、配線導体の下面に導出された部分は、配線基板を外部の電気回路にはんだや導電性接着剤等を介して電気的かつ機械的に接続される。このはんだの濡れ性やボンディングワイヤのボンディング性等の特性を向上させるため、配線導体の表面にはニッケルや金等のめっき層が被着される。   An electrode of an electronic component is electrically connected to the exposed surface of the wiring conductor on the mounting portion or the periphery thereof via solder, a bonding wire, or the like. Further, the portion led out to the lower surface of the wiring conductor is electrically and mechanically connected to the external electric circuit via the solder or conductive adhesive. In order to improve characteristics such as the wettability of the solder and the bonding property of the bonding wire, a plating layer such as nickel or gold is deposited on the surface of the wiring conductor.

このような配線基板は、一般に、1枚の広面積のセラミック母基板から複数個の配線基板を同時集約的に得るようにした、いわゆる複数個取り配線基板の形態で製作されている。   Such a wiring board is generally manufactured in the form of a so-called multi-piece wiring board in which a plurality of wiring boards are obtained simultaneously from a single large-area ceramic mother board.

複数個取り配線基板は、平板状の母基板の中央部に配線基板となる配線基板領域が縦横の並びに複数個配列形成されるとともに、外周部に配線基板領域を取り囲む枠状のダミー領域が形成された構造を有している。なお、ダミー領域は、複数個取り配線基板の取り扱いを容易とすること等のために設けられている。   In the multi-chip wiring board, a plurality of wiring board areas to be the wiring board are arranged in the center of the flat mother board, and a frame-like dummy area surrounding the wiring board area is formed in the outer periphery. Has a structured. The dummy area is provided in order to facilitate handling of a plurality of wiring boards.

配線導体に対するめっき層の被着も、この複数個取り配線基板の状態で行なわれる。すなわち、ダミー領域に枠状の導体を形成しておくとともに、各配線基板領域の配線導体から枠状の導体にかけて接続用の導体を母基板の表面や内層に形成して枠状の導体と各配線導体とを電気的に接続しておく。枠状の導体は、複数の接続導体を一括して電気的に接続してめっき用の電流を供給するための共通導体として機能する。そして、例えばニッケルの電解めっき浴中で、枠状の導体に外部の電源からめっき用の電流を供給することにより、枠状の導体および接続用の導体を介して各配線導体に電流が供給されて電解めっき法によりめっき層が被着される。   The plating layer is also applied to the wiring conductor in the state of the plurality of wiring boards. In other words, a frame-shaped conductor is formed in the dummy area, and a connection conductor is formed on the surface or inner layer of the mother board from the wiring conductor of each wiring board area to the frame-shaped conductor. The wiring conductor is electrically connected. The frame-shaped conductor functions as a common conductor for electrically connecting a plurality of connecting conductors together to supply a plating current. Then, for example, in a nickel electrolytic plating bath, a current for plating is supplied to the frame-shaped conductor from an external power source, whereby a current is supplied to each wiring conductor via the frame-shaped conductor and the connecting conductor. Then, a plating layer is deposited by electrolytic plating.

なお、複数個取り配線基板は、例えば、配線基板領域同士の境界、および配線基板領域とダミー領域との境界に沿って、ダイシングカットやあるいは予め形成しておいた分割溝に沿って分割(チョコレートブレーク)すること等により、個片の配線基板に分割される。
特開2005−101164号公報 特開2005−72050号公報
Note that the multi-wiring circuit board is divided along, for example, dicing cuts or pre-formed dividing grooves along the boundary between the wiring board regions and the boundary between the wiring substrate region and the dummy region (chocolate). The circuit board is divided into individual wiring boards by, for example, breaking.
JP 2005-101164 A JP 2005-72050 A

しかしながら、上記従来技術の複数個取り配線基板においては、各配線基板領域に接続導体が形成されていることから、接続導体と、この接続導体が接続された配線導体とは異なる配線導体との間に母基板の一部が介在することとなるときに、次のような問題点があった。   However, since the connection conductor is formed in each wiring board region in the conventional multi-circuit board, the connection conductor and a wiring conductor different from the wiring conductor to which the connection conductor is connected are provided. When a part of the mother board is interposed in the substrate, there are the following problems.

すなわち、配線基板領域を個片に分割したときに、個々の配線基板には配線導体に接続された状態で不要な接続導体が残留してしまう。また、この残留した接続導体は、母基板(個片における絶縁基体)の一部を介して対向する他の配線導体に対して電気的に独立したものである場合がある。このように不要な接続導体が残留するとともに、その接続導体と、その接続導体とは電気的に独立した配線導体とが母基板の一部を挟んで対向することにより、配線導体と接続導体との間に、母基板の一部を誘電体として不要な静電容量(浮遊容量)が大きく生じてしまい、配線導体によって伝送する電気信号の伝送特性等の配線基板としての特性が低下する(例えば、電気信号の伝送遅延)等の不具合が生じるというものである。   That is, when the wiring board region is divided into individual pieces, unnecessary connection conductors remain on the individual wiring boards while being connected to the wiring conductors. In addition, the remaining connection conductor may be electrically independent of other wiring conductors facing each other through a part of the mother board (insulating base in the piece). In this way, unnecessary connection conductors remain, and the connection conductors and the wiring conductors that are electrically independent of the connection conductors face each other with a part of the mother board interposed therebetween. During this period, unnecessary capacitance (floating capacitance) is generated by using a part of the mother board as a dielectric, and the characteristics of the wiring board such as the transmission characteristic of the electric signal transmitted by the wiring conductor are deteriorated (for example, , Such as transmission delay of electrical signals).

なお、配線導体が対向する接続導体と電気的に独立したものとなるのは、例えば、個片に分割されるときに枠状導体と接続導体との電気的な接続が切断されることにより対向する接続導体との電気的な接続が切断される場合や、もともとその対向する接続導体とは電気的に接続されていないもの(他の接続導体からめっき用の電流を供給されるものや、めっき層の被着が不要なもの等)である場合等である。   Note that the wiring conductor is electrically independent from the opposing connection conductor, for example, when the electrical connection between the frame conductor and the connection conductor is cut when the wiring conductor is divided into pieces. When the electrical connection with the connecting conductor to be disconnected is cut off, or is not originally electrically connected to the opposing connecting conductor (those that are supplied with plating current from other connecting conductors, plating For example, it is not necessary to apply a layer.

本発明は、かかる従来技術の問題点に鑑みて完成されたものであり、その目的は、接続導体が存在することに起因する不要な静電容量(浮遊容量)が小さく、個片の配線基板における電気信号の伝送特性の劣化等の不具合が抑制された複数個取り配線基板を提供することにある。   The present invention has been completed in view of the problems of the prior art, and an object of the present invention is to reduce unnecessary electrostatic capacitance (floating capacitance) due to the presence of connection conductors, and to provide individual wiring boards. It is an object of the present invention to provide a multiple wiring board in which problems such as deterioration of transmission characteristics of electrical signals are suppressed.

本発明の複数個取り配線基板は、母基板の中央部に複数個の配線基板領域が縦横の並びに配列されるとともに、外周部に前記配線基板領域を取り囲む枠状のダミー領域が設けられ、前記配線基板領域に、露出表面にめっき層が被着される配線導体および該配線導体に接続するめっき用の接続導体が形成されてなる複数個取り配線基板であって、前記接続導体は、平面視で前記配線導体と重ならないように形成されていることを特徴とするものである。   A plurality of wiring board according to the present invention has a plurality of wiring board regions arranged vertically and horizontally in the center portion of the mother board, and a frame-like dummy region surrounding the wiring board region is provided on the outer peripheral portion. A wiring board region is a plurality of wiring boards in which a wiring conductor having a plating layer deposited on an exposed surface and a connection conductor for plating connected to the wiring conductor are formed. And is formed so as not to overlap the wiring conductor.

また、本発明の複数個取り配線基板は、上記構成において、好ましくは、前記配線基板領域同士の境界および前記配線基板領域と前記ダミー領域との境界に沿って捨代領域が形成され、該捨代領域に、複数の前記接続導体を互いに接続する補助導体が形成されていることを特徴とするものである。   In the above-described configuration, the multi-layer wiring board of the present invention preferably has a marginal area formed along a boundary between the wiring board areas and a boundary between the wiring board area and the dummy area. An auxiliary conductor for connecting the plurality of connection conductors to each other is formed in the substitute region.

本発明の複数個取り配線基板によれば、接続導体は、平面視で配線導体と重ならないように形成され、接続導体と配線導体とが母基板の一部を介して対向することが防止されていることから、配線基板領域(個々の配線基板)に不要な接続導体が残留したとしても、接続導体と配線導体との間に、母基板の一部を誘電体として大きな静電容量が生じることは効果的に防止される。したがって、個片の配線基板における電気信号の伝送特性の劣化等の不具合が抑制された複数個取り配線基板を提供することができる。   According to the multiple wiring board of the present invention, the connection conductor is formed so as not to overlap the wiring conductor in plan view, and the connection conductor and the wiring conductor are prevented from facing each other through a part of the mother board. Therefore, even if unnecessary connection conductors remain in the wiring board region (individual wiring boards), a large capacitance is generated between the connection conductors and the wiring conductors by using a part of the mother board as a dielectric. This is effectively prevented. Therefore, it is possible to provide a multi-piece wiring board in which problems such as deterioration of transmission characteristics of electric signals in the individual wiring board are suppressed.

また、本発明の複数個取り配線基板は、配線基板領域同士の境界および配線基板領域とダミー領域との境界に沿って捨代領域が形成され、捨代領域に、複数の接続導体を互いに接続する補助導体が形成されているときには、隣り合う配線基板領域間の接続導体同士の電気的な接続を、補助導体を介して行なわせることができる。そのため、例えば配線基板領域同士の境界において隣り合う配線基板領域の接続導体同士を直接接続させるために、配線基板領域内で接続導体を不要に長く引き回すような必要はなく、また、接続導体の配置位置の自由度を高めることができる。したがって、接続導体を、その接続導体が接続された配線導体とは異なる配線導体と平面視で重ならないように形成することがより容易に行なえるようになり、接続導体の残留に起因する個片の配線基板における電気特性の劣化等の不具合がより確実に抑制された、複数個取り配線基板を提供することができる。   In addition, in the multiple wiring board of the present invention, a spare area is formed along the boundary between the wiring board areas and the border between the wiring board area and the dummy area, and a plurality of connection conductors are connected to each other in the spare area. When the auxiliary conductor to be formed is formed, electrical connection between the connection conductors between the adjacent wiring board regions can be performed via the auxiliary conductor. Therefore, for example, in order to directly connect the connection conductors of the adjacent wiring board regions at the boundary between the wiring board regions, there is no need to unnecessarily route the connection conductors in the wiring board region, and the arrangement of the connection conductors The degree of freedom of position can be increased. Therefore, it becomes easier to form the connection conductor so that it does not overlap with the wiring conductor different from the wiring conductor to which the connection conductor is connected in plan view, and the individual pieces caused by the residual connection conductor. It is possible to provide a wiring board having a plurality of layers in which defects such as deterioration of electrical characteristics in the wiring board are more reliably suppressed.

本発明の複数個取り配線基板について添付図面を参照しつつ説明する。   A multiple wiring board according to the present invention will be described with reference to the accompanying drawings.

図1(a)は、本発明の複数個取り配線基板の実施の形態の一例の平面透視図であり、図1(b)は、図1(a)の反対側から見た平面図である。   FIG. 1A is a plan perspective view of an example of an embodiment of a multiple wiring board according to the present invention, and FIG. 1B is a plan view seen from the opposite side of FIG. .

図1(a)および(b)において、1は母基板、2は配線基板領域、3はダミー領域、4は配線導体、5は接続導体、8は接続導体5が接続されている枠状導体であり、10が複数個取り配線基板を示している。   1A and 1B, 1 is a mother board, 2 is a wiring board area, 3 is a dummy area, 4 is a wiring conductor, 5 is a connection conductor, and 8 is a frame-like conductor to which the connection conductor 5 is connected. And 10 indicates a wiring board.

母基板1は、平板状の酸化アルミニウム質焼結体(アルミナセラミックス),窒化アルミニウム質焼結体,ムライト質焼結体,窒化珪素質焼結体,炭化珪素質焼結体,ガラスセラミックス焼結体等の電気絶縁材料から成る。   The mother substrate 1 is a flat aluminum oxide sintered body (alumina ceramic), aluminum nitride sintered body, mullite sintered body, silicon nitride sintered body, silicon carbide sintered body, glass ceramic sintered body. It consists of an electrically insulating material such as a body.

母基板1は、例えば、酸化アルミニウム質焼結体からなる場合であれば、酸化アルミニウム等の原料粉末を有機溶剤およびバインダとともにシート状に加工して形成したセラミックグリーンシートを、所定の形状および寸法に加工した後、必要に応じて複数を厚み方向に積層するとともに1300〜1600℃で焼成することにより作製される。   If the mother substrate 1 is made of, for example, an aluminum oxide sintered body, a ceramic green sheet formed by processing a raw material powder such as aluminum oxide together with an organic solvent and a binder into a sheet shape is formed into a predetermined shape and dimensions. After being processed into a plurality, it is produced by laminating a plurality in the thickness direction as needed and firing at 1300 to 1600 ° C.

母基板1の中央部には、複数個の配線基板領域2が縦横の並びに配列されている。この例では、母基板1の中央部に縦2個×横3個の計6個の配線基板領域2が配列されている。各配線基板領域2は、それぞれが個々の配線基板(図示せず)となる領域であり、その上面中央部等の露出面に、電子部品(図示せず)を搭載する搭載部2aを有している。   A plurality of wiring board regions 2 are arranged vertically and horizontally in the central portion of the mother board 1. In this example, a total of six wiring board regions 2 of 2 vertical × 3 horizontal are arranged in the central portion of the mother board 1. Each wiring board area 2 is an area to be an individual wiring board (not shown), and has a mounting portion 2a for mounting an electronic component (not shown) on an exposed surface such as a central portion of the upper surface. ing.

配線基板領域2は、図1に示したような正方形状で平板状のものだけに限定されず、細長い長方形状のものや、上面や下面等の一部に凹部あるいは凸部(図示せず)を有し、その凹部の底面や凸部の上面を搭載部としたもの等でもかまわない。   The wiring board region 2 is not limited to a square and flat plate shape as shown in FIG. 1, but a long and narrow rectangular shape, or a concave portion or a convex portion (not shown) on a part of the upper surface or the lower surface. It is also possible to use a mounting portion on the bottom surface of the concave portion or the upper surface of the convex portion.

なお、搭載部2aに搭載される電子部品としては、受光素子や発光素子等の光半導体素子および半導体集積回路素子を含む半導体素子,水晶振動子や弾性表面波素子等の圧電素子,圧力センサー素子,容量素子,抵抗器等が挙げられる。   The electronic components mounted on the mounting portion 2a include optical semiconductor elements such as light receiving elements and light emitting elements and semiconductor elements including semiconductor integrated circuit elements, piezoelectric elements such as crystal resonators and surface acoustic wave elements, and pressure sensor elements. , Capacitive elements, resistors and the like.

各配線基板領域2の上面や下面等の露出表面には配線導体4が形成されている。この配線導体4は、電子部品と電気的に接続され、これを外部の電気回路等に電気的に接続させるための導電路として機能する。   A wiring conductor 4 is formed on an exposed surface such as an upper surface or a lower surface of each wiring board region 2. The wiring conductor 4 is electrically connected to an electronic component and functions as a conductive path for electrically connecting it to an external electric circuit or the like.

この配線導体4は、一部が電子部品の搭載部2aに位置し、他の一部が配線基板領域2の下面等の搭載部2a外に位置するように形成しておくことにより、電子部品から外部の電気回路等への電気的な導電路として機能させることができる。この場合、配線導体4の搭載部2aに位置する部位に電子部品の電極をはんだやボンディングワイヤ等の接続材を介して接続することにより、電子部品の電極が配線導体4と電気的に接続され、配線導体4を介して配線基板領域2(個片の配線基板)の搭載部2a外に導出される。そして、配線導体4のうち配線基板領域2の搭載部2a外に導出された部位、例えば配線基板領域2の下面に露出した部位を外部電気回路にはんだや導電性接着剤等を介して電気的に接続することにより、電子部品と外部電気回路とが電気的に接続される。   The wiring conductor 4 is formed so that a part thereof is positioned on the mounting part 2a of the electronic component and the other part thereof is positioned outside the mounting part 2a such as the lower surface of the wiring board region 2. It can be made to function as an electrical conduction path from an external electric circuit or the like. In this case, the electrode of the electronic component is electrically connected to the wiring conductor 4 by connecting the electrode of the electronic component to a portion located on the mounting portion 2a of the wiring conductor 4 via a connecting material such as solder or a bonding wire. Then, it is led out of the mounting portion 2a of the wiring board region 2 (individual piece of wiring board) through the wiring conductor 4. Then, a portion of the wiring conductor 4 that is led out of the mounting portion 2a of the wiring board region 2, for example, a portion that is exposed on the lower surface of the wiring substrate region 2 is electrically connected to an external electric circuit through solder, conductive adhesive, or the like. By connecting to the electronic component, the electronic component and the external electric circuit are electrically connected.

配線導体4は、タングステンやモリブデン,マンガン,銅,銀,パラジウム,金,白金等の金属材料により形成される。   The wiring conductor 4 is made of a metal material such as tungsten, molybdenum, manganese, copper, silver, palladium, gold, or platinum.

配線導体4は、例えば、タングステンからなる場合であれば、タングステンの粉末に有機溶剤およびバインダを添加し混練して作製した金属ペーストを、母基板1となるセラミックグリーンシートに、スクリーン印刷法等の手段で所定パターンに塗布することにより形成することができる。   If the wiring conductor 4 is made of tungsten, for example, a metal paste prepared by adding an organic solvent and a binder to a tungsten powder and kneading the ceramic paste on a ceramic green sheet serving as the mother substrate 1 can be obtained by screen printing or the like. It can form by apply | coating to a predetermined pattern by a means.

また、配線導体4は、その露出表面に、ニッケルや金,銅,パラジウム,錫,白金等のめっき層(図示せず)が被着される。   The wiring conductor 4 is coated with a plating layer (not shown) of nickel, gold, copper, palladium, tin, platinum or the like on the exposed surface.

めっき層は、配線導体4の酸化腐食を防止することや、配線導体4に対するはんだの濡れ性,ボンディングワイヤのボンディング性等の特性を向上させること等のためのものである。   The plating layer is for preventing oxidative corrosion of the wiring conductor 4 and improving characteristics such as solder wettability to the wiring conductor 4 and bonding property of the bonding wire.

めっき層は、好適にはワット浴やシアン系金めっき浴等のめっき浴を用いた電解めっき法により形成される。例えば、ニッケルのめっき層であれば、硫酸ニッケルおよび塩化ニッケルを主成分とし、ホウ酸等の緩衝剤や光沢剤等の添加剤を含むワット浴を準備し、これを適当な温度およびpH(例えば、40〜65℃、pH3.8〜4.5)に調整した後、配線導体4が形成されている母基板1をワット浴中に浸漬する。そして、外部電源(整流器等)から配線導体4に所定の電流密度(例えば2〜10A/dm)で電流を供給することにより、ニッケルのめっき層が形成される。なお、電流を供給する時間は、被着させようとするめっき層の厚みに応じて適宜調整する。 The plating layer is preferably formed by an electrolytic plating method using a plating bath such as a watt bath or a cyan gold plating bath. For example, in the case of a nickel plating layer, a watt bath containing nickel sulfate and nickel chloride as main components and containing a buffering agent such as boric acid and an additive such as a brightening agent is prepared. 40 to 65 ° C., pH 3.8 to 4.5), and then the mother board 1 on which the wiring conductor 4 is formed is immersed in a watt bath. Then, a nickel plating layer is formed by supplying current from the external power source (such as a rectifier) to the wiring conductor 4 at a predetermined current density (for example, 2 to 10 A / dm 2 ). The time for supplying the current is appropriately adjusted according to the thickness of the plating layer to be deposited.

このようなめっき用の電流は、配線導体4に接続された接続導体5を介して配線導体4に供給される。   Such a plating current is supplied to the wiring conductor 4 via the connection conductor 5 connected to the wiring conductor 4.

本例においては、母基板1の外周部に、縦横の並びに配列された複数の配線基板領域2を取り囲む枠状のダミー領域3が設けられるとともに、ダミー領域3に、例えば配線基板領域2とダミー領域3との境界に沿って、枠状導体6が形成されている。枠状導体8は、複数の接続導体5を一括して電気的に接続してめっき用の電流を供給するための共通導体として機能する。なお、ダミー領域3は、枠状導体8を形成するスペースを確保することや、複数個取り配線基板10の取り扱いを容易とすること等のために設けられている。   In this example, a frame-like dummy region 3 surrounding a plurality of wiring substrate regions 2 arranged vertically and horizontally is provided on the outer peripheral portion of the mother substrate 1, and the dummy region 3 includes, for example, a wiring substrate region 2 and a dummy A frame-shaped conductor 6 is formed along the boundary with the region 3. The frame-shaped conductor 8 functions as a common conductor for electrically connecting a plurality of connecting conductors 5 in a lump and supplying a plating current. The dummy region 3 is provided for securing a space for forming the frame-shaped conductor 8 and for facilitating the handling of the plurality of wiring boards 10.

そして、接続導体5および枠状導体8を介して、各配線基板領域2の配線導体4にめっき用の電流が供給される。すなわち、枠状導体8の一部を母基板1の側面まで延在させるとともに、この延在部分(図示せず)にめっき用治具の端子を接続し、整流器等の外部の電源から治具の端子を介して枠状導体8にめっき用の電流を供給する。枠状導体8に供給されためっき用の電流は、接続導体5を介して配線導体4に供給される。この場合、各配線基板領域2の間で接続導体5を互いに電気的に接続しておくことにより、縦横の並びの配列の最外周の配線基板領域2から順次、配列の内側に位置する配線基板領域2にめっき用の電流が供給される。   Then, a plating current is supplied to the wiring conductor 4 in each wiring board region 2 through the connection conductor 5 and the frame-shaped conductor 8. That is, a part of the frame-shaped conductor 8 is extended to the side surface of the mother board 1, and a terminal of a plating jig is connected to the extended portion (not shown), and the jig is supplied from an external power source such as a rectifier. A plating current is supplied to the frame-shaped conductor 8 through the terminals. The plating current supplied to the frame conductor 8 is supplied to the wiring conductor 4 via the connection conductor 5. In this case, by connecting the connection conductors 5 to each other between the wiring board regions 2, the wiring boards positioned inside the array sequentially from the outermost wiring board region 2 of the vertical and horizontal array. A current for plating is supplied to the region 2.

枠状導体8および接続導体5は、配線導体4と同様の金属材料(タングステンやモリブデン,マンガン,銅,銀,パラジウム,金,白金等)により形成される。   The frame-shaped conductor 8 and the connection conductor 5 are formed of the same metal material (tungsten, molybdenum, manganese, copper, silver, palladium, gold, platinum, etc.) as the wiring conductor 4.

例えば、枠状導体8および接続導体5がタングステンからなる場合であれば、タングステンの粉末に有機溶剤およびバインダを添加し混練して作製した金属ペーストを、母基板1となるセラミックグリーンシートに、スクリーン印刷法等の手段で所定パターンに塗布することにより形成することができる。   For example, if the frame-shaped conductor 8 and the connecting conductor 5 are made of tungsten, a metal paste prepared by adding an organic solvent and a binder to tungsten powder and kneading is applied to a ceramic green sheet serving as the mother substrate 1 with a screen. It can be formed by applying to a predetermined pattern by means such as a printing method.

また、配線基板領域2同士の境界に沿って、ダイシングカットすることにより、あるいは予め形成しておいた分割溝に沿って分割(チョコレートブレーク)することにより、各配線基板領域2が個片の配線基板に分割される。分割された各々の個片の配線基板には、配線導体4に接続されていた接続導体4が残留する。   Further, each wiring board region 2 is separated into individual pieces by dicing cutting along the boundary between the wiring board regions 2 or by dividing (chocolate breaks) along a dividing groove formed in advance. Divided into substrates. The connection conductor 4 connected to the wiring conductor 4 remains on each of the divided wiring boards.

本発明の複数個取り配線基板10において、接続導体5は、平面視で配線導体4と重ならないように形成されている。接続導体5と配線導体4とが平面視で重ならないように形成され、接続導体5と配線導体4とが母基板1の一部を介して対向することがないことから、配線基板領域2(個々の配線基板)に不要な接続導体5が残留したとしても、接続導体5と配線導体4との間で、両者間に母基板1の一部が誘電体として介在することにより大きな静電容量が生じることは効果的に防止される。したがって、不要な静電容量(浮遊容量)が小さく、分割後の個片の基板における電気特性の劣化等の不具合が抑制された、複数個取り配線基板10を提供することができる。   In the multiple wiring board 10 of the present invention, the connection conductor 5 is formed so as not to overlap the wiring conductor 4 in plan view. The connection conductor 5 and the wiring conductor 4 are formed so as not to overlap each other in plan view, and the connection conductor 5 and the wiring conductor 4 do not face each other through a part of the mother board 1. Even if unnecessary connection conductors 5 remain on the individual wiring boards), a large capacitance is caused between the connection conductors 5 and the wiring conductors 4 by interposing a part of the mother board 1 between them as a dielectric. Is effectively prevented from occurring. Therefore, it is possible to provide a multi-wiring substrate 10 that has a small unnecessary capacitance (floating capacitance) and suppresses problems such as deterioration of electrical characteristics in the divided substrate.

つまり、配線導体4に電解めっき層を形成するためだけの目的で形成された接続導体5が配線導体4に接続された状態で個片の配線基板に残ったとしても、めっき後には不要となる接続導体5による電気特性の劣化等の不具合が抑制された、信頼性の高い配線基板を得ることが可能な複数個取り配線基板10を提供することができる。   That is, even if the connection conductor 5 formed only for the purpose of forming the electrolytic plating layer on the wiring conductor 4 remains on the individual wiring board while being connected to the wiring conductor 4, it is not necessary after plating. It is possible to provide a multiple wiring substrate 10 that can obtain a highly reliable wiring substrate in which problems such as deterioration of electrical characteristics due to the connection conductor 5 are suppressed.

接続導体5は、例えば、セラミックグリーンシートに印刷される接続導体5となる金属ペーストのパターンが、他のセラミックグリーンシートに印刷される配線導体4となる金属ペーストのパターンと平面視で重ならないようにすることにより、配線導体4と平面視で重ならないように形成することができる。   The connection conductor 5 is, for example, such that the pattern of the metal paste that becomes the connection conductor 5 printed on the ceramic green sheet does not overlap with the pattern of the metal paste that becomes the wiring conductor 4 printed on another ceramic green sheet in plan view. Therefore, the wiring conductor 4 can be formed so as not to overlap with the planar view.

また、図2(a)に平面図で示すように、本発明の複数個取り配線基板10において、配線基板領域2同士の境界および配線基板領域2とダミー領域3との境界に沿って捨代領域6が形成され、捨代領域6に、複数の接続導体5を互いに接続する補助導体7が形成されていることが好ましい。   Further, as shown in the plan view of FIG. 2A, in the multiple wiring substrate 10 according to the present invention, separation is performed along the boundary between the wiring substrate regions 2 and the boundary between the wiring substrate region 2 and the dummy region 3. It is preferable that the region 6 is formed, and the auxiliary region 7 that connects the plurality of connection conductors 5 to each other is formed in the surplus region 6.

このような補助導体7が形成されていると、隣り合う配線基板領域2間の接続導体5同士の電気的な接続を、補助導体7を介して行なわせることができる。そのため、例えば図2(b)に平面図で示す場合のように、配線基板領域2同士の境界において隣り合う配線基板領域2の接続導体5同士を直接接続させるために、配線基板領域2内で接続導体を不要に長く引き回すような必要はなく、また、接続導体5の配置位置の自由度を高めることができる。したがって、接続導体5を、その接続導体5が接続された配線導体4とは異なる配線導体4と平面視で重ならないように形成することがより容易に行なえるようになり、接続導体5の残留に起因する個片の配線基板における電気特性の劣化等の不具合がより確実に抑制された、複数個取り配線基板10を提供することができる。   When such an auxiliary conductor 7 is formed, electrical connection between the connection conductors 5 between the adjacent wiring board regions 2 can be performed via the auxiliary conductor 7. Therefore, for example, as shown in the plan view of FIG. 2B, in order to directly connect the connection conductors 5 of the adjacent wiring board regions 2 at the boundary between the wiring board regions 2, The connection conductor does not need to be routed unnecessarily long, and the degree of freedom of the arrangement position of the connection conductor 5 can be increased. Therefore, the connection conductor 5 can be more easily formed so as not to overlap with the wiring conductor 4 different from the wiring conductor 4 to which the connection conductor 5 is connected in plan view. Thus, it is possible to provide the multi-piece wiring board 10 in which problems such as deterioration of electrical characteristics in the individual wiring board due to the above are more reliably suppressed.

なお、図2(a)および(b)は本発明の複数個取り配線基板10の他の例の一部を拡大して示す平面図であり、図2(a)は補助導体7を形成した部分を示し、図2(b)は補助導体7を形成しない部分を示す。図2において図1と同じ部位には同じ符号を付している。   2 (a) and 2 (b) are enlarged plan views showing a part of another example of the multiple wiring substrate 10 of the present invention, and FIG. 2 (a) shows an auxiliary conductor 7 formed thereon. FIG. 2B shows a portion where the auxiliary conductor 7 is not formed. In FIG. 2, the same parts as those in FIG.

なお、補助導体7は、複数個取り配線基板10の捨代領域6に形成されているため、複数個取り配線基板10をダイシングカット等の分割方法により個片に分割するときに捨代領域とともに除去される。そのため、個片の配線基板に補助導体7が残留することはなく、配線基板において補助導体7に起因して浮遊容量が発生するようなことはない。   In addition, since the auxiliary conductor 7 is formed in the removal area 6 of the multi-piece wiring board 10, when the multi-wiring board 10 is divided into pieces by a dividing method such as dicing cut, Removed. Therefore, the auxiliary conductor 7 does not remain on the individual wiring board, and no stray capacitance is generated due to the auxiliary conductor 7 in the wiring board.

また、枠状導体8は、母基板1がダイシングカットされる場合、少なくとも母基板1の表面に形成されていることが好ましい。この場合、枠状導体8がダイシングカットするときの目印になり、より容易にダイシングカットすることができる。この場合の表面は、例えば、ダイシングカットするために複数個取り配線基板10を載置したときに上向きになる面であり、電子部品の搭載部2aを有する面(上面)である。また、上下両面に枠状導体8を形成してもかまわない。   The frame-shaped conductor 8 is preferably formed on at least the surface of the mother board 1 when the mother board 1 is cut by dicing. In this case, the frame-shaped conductor 8 becomes a mark when the dicing is cut, and the dicing can be cut more easily. The surface in this case is, for example, a surface (upper surface) that faces upward when a plurality of wiring boards 10 are placed for dicing cutting and has an electronic component mounting portion 2a. Further, the frame-like conductors 8 may be formed on both the upper and lower surfaces.

なお、補助導体7についても、枠状導体8と同様に、少なくとも母基板1の表面に形成しておくことが好ましい。補助導体7は、ダイシングカットされる捨代領域6に形成されているので、ダイシングカット時の目印として効果的である。   The auxiliary conductor 7 is also preferably formed at least on the surface of the mother board 1 in the same manner as the frame-shaped conductor 8. Since the auxiliary conductor 7 is formed in the abandoned region 6 to be diced, it is effective as a mark when diced.

なお、本発明は以上の実施の形態および以下の実施例に限定されるものではなく、本発明の要旨を逸脱しない範囲内で種々の変更を施すことは差し支えない。例えば、枠状導体8は、母基板1の表面だけでなく、母基板1の内部にも形成してもよい。   The present invention is not limited to the above embodiment and the following examples, and various modifications may be made without departing from the scope of the present invention. For example, the frame conductor 8 may be formed not only on the surface of the mother board 1 but also inside the mother board 1.

本発明の具体的な実施例について以下に詳細に説明する。   Specific embodiments of the present invention will be described in detail below.

本実施例における複数個取り配線基板は、酸化アルミニウム質焼結体からなる平板状の母基板に、タングステンにより配線導体を形成し、配線導体の露出表面にニッケルめっき層および金めっき層を順次被着させたものである。この複数個取り配線基板について配線導体の伝送特性を測定し、従来技術の複数個取り配線基板と比較した。   In the present embodiment, the multi-layer wiring board is formed by forming a wiring conductor with tungsten on a flat mother board made of an aluminum oxide sintered body, and sequentially covering the exposed surface of the wiring conductor with a nickel plating layer and a gold plating layer. It is what I wore. The transmission characteristics of the wiring conductors were measured for this multi-piece wiring board and compared with the conventional multi-pitch wiring board.

なお、母基板は、1辺の長さが5cmの正方形板状であり、外周に沿って5mmの幅で枠状のダミー領域を設けた。また、ダミー領域の内側を8×8の領域に区画し、各領域を配線基板領域とした。各配線基板領域は1辺の長さが5mmの正方形状である。この配線基板領域の上面の中央部を、電子部品としての半導体集積回路素子の搭載部とした。この母基板を備える複数個取り配線基板は、以下の方法により作製した。   The mother substrate was a square plate having a side length of 5 cm, and a frame-like dummy region having a width of 5 mm was provided along the outer periphery. Further, the inside of the dummy area was divided into 8 × 8 areas, and each area was defined as a wiring board area. Each wiring board region has a square shape with a side length of 5 mm. A central portion of the upper surface of the wiring board region was used as a mounting portion for a semiconductor integrated circuit element as an electronic component. A plurality of wiring boards provided with this mother board were produced by the following method.

(作製方法)
まず、酸化アルミニウム粉末を97質量%含有し、添加物として酸化ケイ素および酸化マグネシウムを含有してなる原料粉末を、有機溶剤(トルエン)およびバインダ(アクリル系樹脂)とともに混練してスラリーを作製し、このスラリーをドクターブレード法により成形して母基板となる複数のセラミックグリーンシートを作製した。
(Production method)
First, a raw material powder containing 97% by mass of aluminum oxide powder and containing silicon oxide and magnesium oxide as additives is kneaded with an organic solvent (toluene) and a binder (acrylic resin) to produce a slurry, The slurry was molded by a doctor blade method to produce a plurality of ceramic green sheets to be a mother substrate.

次に、タングステンの粉末に前述のものと同等の有機溶剤およびバインダーを添加し混練してタングステンの金属ペーストを作製し、この金属ペーストをセラミックグリーンシートの表面に、配線導体,接続導体および枠状導体の所定パターンにスクリーン印刷法により印刷した。   Next, an organic solvent and binder equivalent to those described above are added to the tungsten powder and kneaded to produce a tungsten metal paste. This metal paste is formed on the surface of the ceramic green sheet on the wiring conductor, connection conductor and frame shape. It printed by the screen-printing method on the predetermined pattern of the conductor.

配線導体は、各配線基板領域の上面において搭載部から外周近くまで導出するとともに、この導出端から配線基板領域において母基板を厚み方向に貫通して下面側に導出し、下面側の導出端から下面の外周にかけて直線状に伸びるようなパターンで形成した。   The wiring conductor is led out from the mounting portion to the outer periphery on the upper surface of each wiring board region, and is led out from the leading end to the lower surface side through the mother board in the thickness direction in the wiring substrate region, and from the leading end on the lower surface side. It was formed in a pattern extending linearly over the outer periphery of the lower surface.

なお、この配線導体のうち母基板を厚み方向に貫通する部位は、母基板となるセラミックグリーンシートの所定位置に、打ち抜き用の金属ピンを用いた機械的な孔あけ加工により貫通孔を形成し、その貫通孔内に金属ペーストをスクリーン印刷法により充填することにより形成した。   In addition, a portion of the wiring conductor that penetrates the mother board in the thickness direction is formed with a through hole by a mechanical drilling process using a metal pin for punching at a predetermined position of the ceramic green sheet serving as the mother board. The through hole was filled with a metal paste by a screen printing method.

そして、これらのセラミックグリーンシートを積層し、還元雰囲気中、約1550℃で焼成して複数個取り配線基板として完成させた後、配線導体の露出表面に、厚さ約4〜7μmのニッケルめっき層および厚さ約1〜1.5μmの金めっき層を電解めっき法により順次被着させるとともに、個片の配線基板に分割して伝送特性を測定するための試料とした。なお、ニッケルめっき層はワット浴により被着させ、金めっき層はシアン系金めっき浴により被着させた。各めっき層を被着させる前には、複数個取り配線基板に対してアルカリ脱脂や酸処理等の周知のめっき前処理を施した。また、複数個取り配線基板の各配線基板領域の分割は、母基板の捨代領域に沿ってダイシングカットを施すことにより行なった。   Then, these ceramic green sheets are laminated and fired at about 1550 ° C. in a reducing atmosphere to complete a wiring board, and then a nickel plating layer having a thickness of about 4 to 7 μm is formed on the exposed surface of the wiring conductor. In addition, a gold plating layer having a thickness of about 1 to 1.5 μm was sequentially deposited by an electrolytic plating method, and divided into individual wiring boards to obtain a sample for measuring transmission characteristics. The nickel plating layer was deposited by a Watt bath, and the gold plating layer was deposited by a cyan gold plating bath. Prior to depositing each plating layer, a well-known pre-plating treatment such as alkali degreasing and acid treatment was applied to the wiring board. Further, the division of each wiring board region of the multi-wiring wiring board was performed by performing dicing cut along the surplus area of the mother board.

(測定)
上記の方法により作製した試料(個片)について、伝送特性の確認として、後述する部位における浮遊容量およびインピーダンスの測定を行った。浮遊容量の測定は、インピーダンスアナライザ(横河ヒューレットパッカード社製、型名4192A)を用いて行ない、インピーダンスの測定はTDR法によるインピーダンス測定器(Agilent社製、型名86100A、84754A)により行なった。
(Measurement)
For the sample (individual piece) produced by the above method, as a confirmation of the transmission characteristics, stray capacitance and impedance were measured at a site described later. The stray capacitance was measured using an impedance analyzer (Yokogawa Hewlett Packard, model name 4192A), and the impedance was measured by an impedance measuring instrument (Agilent, model name 86100A, 84754A) by the TDR method.

なお、各配線導体を伝送される電気信号は移動体通信機器に使用される周波数帯2.5GHzの電気信号とし、配線導体のインピーダンスは50Ωになるように設定した。   The electric signal transmitted through each wiring conductor was an electric signal having a frequency band of 2.5 GHz used for mobile communication equipment, and the impedance of the wiring conductor was set to 50Ω.

浮遊容量およびインピーダンスの測定は、以下に示す、本発明の複数個取り配線基板である実施例1〜4と、従来技術の複数個取り配線基板である比較例1および2について行なった。   The measurement of the stray capacitance and the impedance was carried out for Examples 1 to 4 which are the multi-cavity wiring boards of the present invention and Comparative Examples 1 and 2 which are the multi-cavity wiring boards of the prior art as shown below.

(実施例1)
図3に示すように、配線導体4は線幅100μmの折れ線状のパターンで搭載部2aから導出させるとともにビア導体(図示せず)を介して配線基板領域2の下面側に導出させ、この導出部分から下面の外周にかけて、幅が約100μmの直線のパターンで、複数個形成した。この直線状のパターンの部分は、個片の配線基板を外部の電気回路基板にはんだ等を介して電気的に接続するときのパッドとして機能する。なお、図3は、本実施例の複数個取り配線基板の一つの配線基板領域2を拡大して示す平面図である。図3において図1と同じ部位には同じ符号を付している。
(Example 1)
As shown in FIG. 3, the wiring conductor 4 is led out from the mounting portion 2a in a polygonal line pattern having a line width of 100 μm, and led out to the lower surface side of the wiring board region 2 through a via conductor (not shown). A plurality of linear patterns having a width of about 100 μm were formed from the portion to the outer periphery of the lower surface. The portion of the linear pattern functions as a pad when the individual wiring board is electrically connected to an external electric circuit board via solder or the like. FIG. 3 is an enlarged plan view showing one wiring board region 2 of the multiple wiring board of this embodiment. In FIG. 3, the same parts as those in FIG.

接続導体5は、線幅約150μmであり、対応する配線導体4のうち搭載部2aから導出されている部分と一端が直接接し、他端が配線基板領域2の外周に達するようなパターンで複数個形成した。接続導体5のうち配線基板領域2aの外周に達している部分同士が配線基板領域2の境界において互いに接することにより、めっき用の電流を、隣り合う配線基板領域2の間で順次通電させることができる。   The connection conductor 5 has a line width of about 150 μm, and a plurality of patterns are arranged so that one end of the corresponding wiring conductor 4 is directly in contact with one end of the corresponding wiring conductor 4 and the other end reaches the outer periphery of the wiring board region 2. Individually formed. The portions of the connecting conductor 5 that reach the outer periphery of the wiring board region 2 a are in contact with each other at the boundary of the wiring board region 2, whereby a plating current can be sequentially passed between the adjacent wiring board regions 2. it can.

実施例1において、接続導体5のうちの一つである接続導体5aを、その接続導体5aが接続された配線導体4aとは異なる配線導体4bのうち配線基板領域2の下面に位置する部位との間の距離dが、平面視で100μmになるようにして形成しており、平面視で重ならないようにして形成し、測定用の配線導体とした。この配線導体4bについて接続導体5aとの間の浮遊容量およびインピーダンスの測定を行なった。   In the first embodiment, the connection conductor 5a, which is one of the connection conductors 5, is a part of the wiring conductor 4b that is different from the wiring conductor 4a to which the connection conductor 5a is connected. The distance d between them is 100 μm in a plan view, and is formed so as not to overlap in a plan view, thereby forming a wiring conductor for measurement. The wiring conductor 4b was measured for stray capacitance and impedance with the connection conductor 5a.

(実施例2)
接続導体5aと、その接続導体5aが接続された配線導体4aとは異なる配線導体4bとの間の距離dを50μmとし、それ以外は実施例1と同様にして作製した。
(Example 2)
The distance d between the connecting conductor 5a and the wiring conductor 4b different from the wiring conductor 4a to which the connecting conductor 5a is connected was set to 50 μm, and the other manufacturing was performed in the same manner as in Example 1.

(実施例3)
接続導体5aと、その接続導体5aが接続された配線導体4aとは異なる配線導体4bとの間の距離dを50μmとし、それ以外は実施例1と同様にして作製した。
(Example 3)
The distance d between the connecting conductor 5a and the wiring conductor 4b different from the wiring conductor 4a to which the connecting conductor 5a is connected was set to 50 μm, and the other manufacturing was performed in the same manner as in Example 1.

(実施例4)
接続導体5aと、その接続導体5aが接続された配線導体4aとは異なる配線導体4bとが、互いの外辺同士が平面視で同じ位置となる(d=0μm)ようにして形成し、それ以外は実施例1と同様にして作製した。
Example 4
The connecting conductor 5a and the wiring conductor 4b different from the wiring conductor 4a to which the connecting conductor 5a is connected are formed so that their outer sides are at the same position (d = 0 μm) in plan view, Except for the above, it was manufactured in the same manner as in Example 1.

(比較例1)
接続導体5aに対して、その接続導体5aが接続された配線導体4aとは異なる配線導体4bが平面視で完全に重なるようにして形成し、それ以外は実施例1と同様にして作製した。
(Comparative Example 1)
The wiring conductor 4a, which is different from the wiring conductor 4a to which the connecting conductor 5a is connected, is formed so as to be completely overlapped with the connecting conductor 5a in plan view.

(比較例2)
接続導体5aに対して、その接続導体5aが接続された配線導体4aとは異なる配線導体4bが、平面視で、その線幅の半分(幅50μm程度)が重なるようにして形成し、それ以外は実施例1と同様にして作製した。
(Comparative Example 2)
A wiring conductor 4b different from the wiring conductor 4a to which the connecting conductor 5a is connected is formed on the connecting conductor 5a so that half of the line width (about 50 μm in width) overlaps in plan view. Was prepared in the same manner as in Example 1.

これらの実施例1〜4および比較例1,2の浮遊容量およびインピーダンスの測定結果を表1に示す。

Figure 2008028234
Table 1 shows the measurement results of stray capacitance and impedance of Examples 1 to 4 and Comparative Examples 1 and 2.
Figure 2008028234

表1に示すように、本発明の複数個取り配線基板の実施例1〜4は、浮遊容量が小さく抑制されるとともにインピーダンスの整合もとれており、伝送特性が良好である。   As shown in Table 1, in the first to fourth embodiments of the multiple wiring substrate of the present invention, the stray capacitance is suppressed to be small and impedance matching is taken, and the transmission characteristics are good.

ただし、実施例4のように、接続導体5aと、その接続導体5aが接続された配線導体4aとは異なる配線導体4bとが平面視で重ならない場合でも、互いの外辺が平面視で同じ位置であるような場合には、浮遊容量が大きくなる傾向が見られた。製法(スクリーン印刷等)上の精度を考慮した場合、接続導体5aと、その接続導体5aが接続された配線導体4aとは異なる配線導体4bとの間の距離dは、配線導体4bの1/2程度以上の幅(この実施例の場合であれば約50μm)とすることが望ましいと考えられる。   However, even in the case where the connection conductor 5a and the wiring conductor 4b different from the wiring conductor 4a to which the connection conductor 5a is connected do not overlap in plan view as in the fourth embodiment, the outer sides of the connection conductor 5a are the same in plan view. In the case of the position, the stray capacitance tended to increase. In consideration of accuracy in the manufacturing method (screen printing or the like), the distance d between the connecting conductor 5a and the wiring conductor 4b different from the wiring conductor 4a to which the connecting conductor 5a is connected is 1 / of the wiring conductor 4b. A width of about 2 or more (about 50 μm in the case of this embodiment) is considered desirable.

また、比較例1および2のように、接続導体5aと配線導体4bとが平面視で重なる場合には、配線導体5aと接続導体4bとの重なりの範囲にかかわらず、配線導体4bにおける浮遊容量が大きく伝送特性が低いものになっている。   Further, when the connection conductor 5a and the wiring conductor 4b overlap in plan view as in Comparative Examples 1 and 2, the stray capacitance in the wiring conductor 4b regardless of the overlapping range of the wiring conductor 5a and the connection conductor 4b. Is large and the transmission characteristics are low.

(a)は本発明の複数個取り配線基板の実施の形態の一例を示す平面透視図であり、(b)はその反対側から見た平面図である。(A) is the plane perspective view which shows an example of embodiment of the multiple pick-up wiring board of this invention, (b) is the top view seen from the other side. (a)および(b)は本発明の複数個取り配線基板の実施の形態の他の例について、その一部を拡大して示す平面図である。(A) And (b) is a top view which expands and shows the part about the other example of embodiment of the multiple pick-up wiring board of this invention. 本発明の複数個取り配線基板の実施の一例について、一つの配線基板領域を拡大して示す平面透視図である。It is a plane perspective view which expands and shows one wiring board area | region about an example of implementation of the multiple picking wiring board of this invention.

符号の説明Explanation of symbols

1・・・・母基板
2・・・・配線基板領域
3・・・・ダミー領域
4・・・・配線導体
5・・・・接続導体
6・・・・捨代領域
7・・・・補助導体
8・・・・枠状導体
10・・・・複数個取り配線基板
DESCRIPTION OF SYMBOLS 1 ... Mother board 2 ... Wiring board area 3 ... Dummy area 4 ... Wiring conductor 5 ... Connection conductor 6 ... Abandonment area 7 ... Auxiliary Conductor 8 ... Frame-shaped conductor
10 ... Multiple wiring board

Claims (2)

母基板の中央部に複数個の配線基板領域が縦横の並びに配列されるとともに、外周部に前記配線基板領域を取り囲む枠状のダミー領域が設けられ、前記配線基板領域に、露出表面にめっき層が被着される配線導体および該配線導体に接続するめっき用の接続導体が形成されてなる複数個取り配線基板であって、
前記配線基板領域で、前記接続導体は、該接続導体が接続された前記配線導体とは異なる前記配線導体と平面視で重ならないように形成されていることを特徴とする複数個取り配線基板。
A plurality of wiring board regions are arranged vertically and horizontally in the central portion of the mother board, and a frame-like dummy region surrounding the wiring board region is provided in the outer peripheral portion, and a plating layer is provided on the exposed surface in the wiring board region. A plurality of wiring boards formed by forming a wiring conductor to be deposited and a connecting conductor for plating connected to the wiring conductor,
In the wiring board region, the connection conductor is formed so as not to overlap the wiring conductor different from the wiring conductor to which the connection conductor is connected in plan view.
前記配線基板領域同士の境界および前記配線基板領域と前記ダミー領域との境界に沿って捨代領域が形成され、該捨代領域に、複数の前記接続導体を互いに接続する補助導体が形成されていることを特徴とする請求項1記載の複数個取り配線基板。 An ablation region is formed along a boundary between the wiring substrate regions and a boundary between the wiring substrate region and the dummy region, and an auxiliary conductor that connects the plurality of connection conductors to each other is formed in the ablation region. 2. The multiple wiring substrate according to claim 1, wherein:
JP2006200681A 2006-07-24 2006-07-24 Multiple-pattern wiring board Pending JP2008028234A (en)

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