JP2008021902A - Semiconductor device, and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To electrically bond a semiconductor chip over regions where heights in whole surfaces are different even if there are any height variations in the whole surfaces of a package, in a semiconductor device constituted by electrically bonding both electrodes of the semiconductor chip and a ceramic package in the state where sides having each electrode of the semiconductor chip and the ceramic package are made to be faced. <P>SOLUTION: Between a chip electrode 12 and a package electrode 22, there intervenes conductive adhesive 30 as a conductive bonding member which can be deformed at the time of loading a semiconductor chip 10 on a package 20. While the both electrodes 12, 22 are electrically connected by this conductive adhesive 30, heights variations T existing in whole surfaces 21 of the package 20 are absorbed by deforming the conductive adhesive 30. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor device in which a semiconductor chip and a ceramic package are electrically joined to each other with the surfaces having the respective electrodes facing each other.

  Conventionally, this type of semiconductor device includes a semiconductor chip having a plurality of chip electrodes on one side and a package having a plurality of package electrodes on one side obtained by firing ceramic, and packaging one side of the semiconductor chip. Proposed by mounting a semiconductor chip on a package with each chip electrode and package electrode aligned with each other and electrically connecting both electrodes on each side via bumps (For example, see Patent Documents 1 to 4).

According to this, as compared with the case where the semiconductor chip and the package which are generally performed conventionally are electrically connected by the bonding wire, the space for the bonding wire is eliminated and the size of the apparatus is reduced. be able to.
JP-A-8-307043 JP-A-9-181120 Japanese Patent Laid-Open No. 11-8270 JP 2000-208675 A

  However, in the case of the above-described conventional configuration, although one surface of the semiconductor chip is very flat, the package is formed of a ceramic fired body. It will be very big.

  Specifically, when the present inventor examined using a general surface shape measuring method, the height variation in one surface of a normal package is 15 μm as a difference between the highest portion and the lowest portion of the one surface. That was all.

  FIG. 9 is a view showing the height variation T of the package 20, and is a schematic cross-sectional view of a main part of a semiconductor device as a prototype manufactured by the present inventor based on the above-described conventional technology. A plurality of package electrodes 22 are provided on one surface 21 of the package 20, and a plurality of chip electrodes 12 are provided on one surface 11 of the semiconductor chip 10.

  The one surface 21 of the package 20 and the one surface 11 of the semiconductor chip 10 are arranged to face each other, and the package electrode 22 and the chip electrode 12 on each surface 11, 21 are aligned. The electrodes 12 and 22 are connected by a bump 31 made of gold or the like.

  However, as described above, when the height variation T of the one surface 21 of the package 20 is large, in the conventional method, as shown in FIG. 9, the package electrode 22b existing at a low position on the one surface 21 of the package 20 and this There is a possibility that contact between the chip electrode 12 and the chip electrode 12 facing each other via the bump 30 is not made and the electrodes 12 and 22 are not electrically joined.

  The present invention has been made in view of the above problems, and in a semiconductor device in which a semiconductor chip and a ceramic package are electrically joined to each other in a state where the surfaces having the respective electrodes are opposed to each other. It is an object of the present invention to make it possible to electrically bond semiconductor chips over different parts of the height of one surface even when the height varies on one surface of the package.

  In order to achieve the above object, in the present invention, a conductive bonding member (deformable when the semiconductor chip (10) is mounted on the package (20) between the chip electrode (12) and the package electrode (22) ( 30 and 31) are interposed, and both electrodes (12 and 22) are electrically connected by the joining members (30 and 31), and one surface (21) of the package (20) is deformed by deformation of the joining members (30 and 31). The first feature is that the height variation existing in () is absorbed.

  According to this, the joining members (30, 31) interposed between the chip electrode (12) and the package electrode (22) are deformed when the semiconductor chip (10) is mounted on the package (20), and the height is increased. In order to absorb the variation, even if the surface (21) of the package (20) has a height variation, the semiconductor chip (10) is electrically joined across the different portions of the surface (21). Can do.

  In the case of this configuration, the bonding member is a conductive adhesive (30), or a conductive bump (31) formed on at least one of the surface of the chip electrode (12) and the surface of the package electrode (22). Can be adopted.

  Further, in this configuration, a portion other than the portion where the chip electrode (12) and the package electrode (22) are located between the one surface (11) of the semiconductor chip (10) and the one surface (21) of the package (20). Further, a reinforcing adhesive (40) may be interposed, and the one surface (11) of the semiconductor chip (10) and the one surface (21) of the package (20) may be joined by the reinforcing adhesive (40).

  According to this, the bonding area between one surface (11, 21) of the semiconductor chip (10) and the package (20) is increased by the reinforcing adhesive (40), and the bonding strength between these two members (10, 20). Is reinforced.

  In the above-described configuration, the height variation existing on the one surface (21) of the package (20) is 15 μm or more as the difference between the highest portion and the lowest portion on the one surface (21). It is particularly effective.

  Further, according to the present invention, in the step of mounting the semiconductor chip (10) on the package (20), a conductive bonding member (30, 31) is interposed between the chip electrode (12) and the package electrode (22). Subsequently, the package electrode (22b) existing at the lowest position on the one surface (21) of the package (20) and the chip electrode (12) facing the package electrode (22) are brought into contact with each other through the joining members (30, 31). In this way, the semiconductor chip (10) and the package (20) are pressed against each other, and the joining members (30, 31) are deformed in a direction in which both the electrodes (12, 22) approach each other, whereby all the electrodes (12 , 22) are brought into contact with each other through the joining members (30, 31).

  In the present invention, the joining members (30, 31) are interposed between the chip electrode (12) and the package electrode (22), and are deformed. Accordingly, the chip electrode (12) is different from the package electrode (22b) at the lowest position among the plurality of package electrodes (22), that is, the package electrode (22b) having the longest distance from the chip electrode (12). Contact is made through the joining members (30, 31). In this way, even if there is a height variation on one surface (21) of the package (20), the semiconductor chip (10) is electrically bonded across the different portions of the one surface (21). Can do.

  Also in the manufacturing method having the second feature, the bonding member is formed on at least one of the conductive adhesive (30), the surface of the chip electrode (12), and the surface of the package electrode (22). Conductive bumps (31) can be employed.

  Here, when the conductive adhesive (30) is employed, the surface of each package electrode (22) is made before the one surface (11) of the semiconductor chip (10) is opposed to the one surface (21) of the package (20). In the package electrode (22a) which is formed at a relatively high position on the one surface (21) of the package (20), the package electrode (22b) which is present at a lower position is formed. Alternatively, the overall height of the conductive adhesive (30) may be lowered. According to this, it is preferable for preventing problems such as protrusion of the conductive adhesive (30).

  In the manufacturing method having the second feature, in the step of mounting the semiconductor chip (10) on the package (20), one surface (11) of the semiconductor chip (10) and one surface (21) of the package (20) A reinforcing adhesive (40) is interposed in a region other than the region where the chip electrode (12) and the package electrode (22) are located between the semiconductor chip (10) and the reinforcing adhesive (40). If one surface (11) and one surface (21) of the package (20) are brought into contact with each other, a semiconductor device having the effect of the reinforcing adhesive (40) can be appropriately manufactured.

  In addition, the code | symbol in the bracket | parenthesis of each means described in the claim and this column is an example which shows a corresponding relationship with the specific means as described in embodiment mentioned later.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, parts that are the same or equivalent to each other are given the same reference numerals in the drawings in order to simplify the description.

(First embodiment)
FIG. 1 is a diagram showing an overall schematic cross-sectional configuration of the semiconductor device S1 according to the first embodiment of the present invention, and FIG. 2 is a schematic top view of the semiconductor device S1 in FIG. The state which removed the lid | cover 26 is shown.

  The semiconductor device S1 is broadly configured such that the semiconductor chip 10 and the package 20 are electrically connected via a bonding member 30 and the semiconductor chip 10 is accommodated in the package 20.

  Here, the semiconductor chip 10 is a plate-shaped member made of a silicon semiconductor chip or the like formed by a normal semiconductor process. Specifically, the semiconductor chip 10 is configured as a circuit chip or a sensor chip for detecting acceleration, angular velocity, or the like. It has been done. A plurality of chip electrodes 12 made of aluminum (Al), gold (Au), or the like are provided on one surface 11 of the semiconductor chip 10.

  The joining member 30 is interposed between the plurality of chip electrodes 12 and the package electrode 22 facing the chip electrodes 12, and electrically connects the electrodes 12 and 22. Details of the package electrode 22 and the bonding member 30 will be described later. Here, in FIG. 2, the joining member 30 is indicated by a broken-line circle, and the electrodes 12 and 22 connected thereby are omitted, but the positions of the electrodes 12 and 22 in FIG. It corresponds to.

  The package 20 is formed by firing ceramic. Here, the package 20 is configured as a laminated substrate in which a plurality of ceramic layers such as alumina are laminated, and has an opening 25 serving as a space for housing the semiconductor chip 10. Such a laminated substrate is manufactured by forming a wiring pattern on a ceramic green sheet, and then laminating and firing these.

  As shown in FIGS. 1 and 2, the package 20 includes a bonding surface 21. The bonding surface 21 is a surface on which the semiconductor chip 10 is mounted, and is a surface that is electrically connected to the semiconductor chip 10. Here, a step is provided on the side surface of the opening 25 of the package 20, and the surface 21 of the step portion is configured as the bonding surface 21.

  A plurality of package electrodes 22 are provided on the bonding surface 21. The package electrode 22 is electrically connected to a back surface electrode 24 located on the back surface (lower surface in FIG. 1) side of the package 20 through an inner layer wiring 23 configured as a through hole located inside the package 20. Yes.

  The package electrode 22 and the back electrode 24 are surface layer electrodes in the package 20 and are made of gold or the like. The inner layer wiring 23 is made of, for example, tungsten plated with nickel gold. The electrodes and wirings 22 to 24 in the package 20 can be formed by a normal method in the manufacturing process of the laminated substrate.

  As shown in FIGS. 1 and 2, in this semiconductor device S1, one surface 11 of the semiconductor chip 10 and the bonding surface 21 of the package 20 face each other, and each chip electrode 12 and package electrode 22 Are aligned. In such a state, the semiconductor chip 10 is mounted in the opening 25 of the package 20.

  As described above, the bonding member 30 is interposed between the chip electrode 12 and the package electrode 22 facing each other, and the electrodes 12 and 22 are electrically connected to each other by the bonding member 30. Has been. In addition, the semiconductor chip 10 is fixed and supported on the bonding surface 21 by the bonding member 30.

  Here, FIG. 3 is an enlarged cross-sectional view of the joint portion between the chip electrode 12 and the package electrode 22 through the joint member 30. In the present embodiment, since the package 20 is formed by firing ceramic, shrinkage occurs compared to before firing. At this time, variation due to shrinkage occurs, particularly due to a difference in shrinkage caused by the presence of different materials such as the inner layer wiring 23.

  Therefore, also in the present embodiment, the height variation T exists on the bonding surface 21 of the package 20 as described above. In FIG. 3, the package electrode 22a at the highest position among the plurality of package electrodes 22 located on the bonding surface 21 and the package electrode 22b at the lowest position are shown.

  That is, in FIG. 3, the maximum height variation T in the joint surface 21 is shown as the difference between the highest portion and the lowest portion in the joint surface 21, and this maximum height variation T is usually 15 μm or more. become.

  The bonding member 30 of the present embodiment employs the conductive adhesive 30 as being capable of absorbing such height variation T. The conductive adhesive 30 is a conductive adhesive that can be deformed when the semiconductor chip 10 is mounted on the package 20. Then, the variation in height T existing on the bonding surface 21 of the package 20 is absorbed by the deformation of the conductive adhesive 30.

  In other words, in the present embodiment, all the package electrodes 22 including the package electrode 22a at the highest position and the package electrode 22b at the lowest position among the plurality of package electrodes 22 are respectively opposed to the chip electrodes 12 facing each other. Are electrically connected to each other via the conductive adhesive 30.

  Such a conductive adhesive 30 is obtained by mixing a conductive filler in a resin, and exhibits an electrical and mechanical bonding function by heating and curing. Here, examples of the resin include thermosetting resins and thermoplastic resins such as polyimide resins and epoxy resins, and examples of the filler include silver and copper.

  Note that the planar shape of the conductive adhesive 30 is circular as shown by the broken-line circle in FIG. 2, but may be rectangular or square. Moreover, as a filler of the conductive adhesive 30, it is preferable that it is the diameter in these shapes or a particle size of 1/5 or less of the minimum side. By using the filler having such a particle size, the conductivity due to the contact between the fillers can be appropriately exhibited within the size of the conductive adhesive 30.

  As shown in FIG. 1, a lid 26 is attached to the opening 25 of the package 20. The lid 26 is fixed to the package 20 via a joint portion 26a formed by welding or brazing. The lid 26 may be anything such as metal, resin, ceramic, and the inside of the package 20 is sealed by the lid 26, and the semiconductor chip 10 is protected from the outside.

  Next, a method for manufacturing the semiconductor device S1 of this embodiment will be described with reference to FIG. FIGS. 4A and 4B are process diagrams showing the manufacturing method in a cross section corresponding to FIG. That is, also in FIG. 4, the package electrode 22a at the highest position among the package electrodes 22 located on the bonding surface 21 of the package 20 and the package electrode 22b at the lowest position are shown, and the maximum height variation T is shown. Values are shown.

  First, in this manufacturing method, the semiconductor chip 10 having a plurality of chip electrodes 12 on one surface 11 as shown in FIGS. 1 and 2, and a plurality of package electrodes 22 on the bonding surface 21 by firing ceramic. And a package 20 having.

  Next, as shown in FIG. 4A, a conductive adhesive 30 as a bonding member is disposed on the surface of each package electrode 22 on the bonding surface 21 of the package 20. The conductive adhesive 30 can be disposed by a method such as a dispensing method, a printing method, potting, or attaching a conductive adhesive 30 formed into a sheet shape.

  Here, as shown in FIG. 4A, the overall height ta of the conductive adhesive 30 in the package electrode 22a existing at a higher position on the bonding surface 21 is set to the package electrode 22b existing at a lower position. The conductive adhesive 30 is formed so as to be lower than the overall height tb of the conductive adhesive 30 in FIG.

  In particular, here, as shown in FIG. 4A, the vertices of all the conductive adhesives 30 disposed on the plurality of package electrodes 22 are set to have substantially the same height. . With respect to each conductive adhesive 30 at the time of such arrangement, an example of specific dimensions is given. The maximum diameter d is about 50 μm to 200 μm, and the overall heights ta and tb are the bonding strength and The height at which the connection resistance can be secured is about 10 μm to 100 μm.

  However, in order to make the vertices of all the conductive adhesives 30 have the same height, the total height tb of the conductive adhesive 30 in the package electrode 22b existing at the lower position is the same as that of the package electrode 22a existing at the higher position. In addition to the overall height ta of the conductive adhesive 30, it is necessary to add the height variation T.

  After disposing the conductive adhesive 30 in this manner, the step of mounting the semiconductor chip 10 on the package 20 is performed next. That is, as shown in FIG. 4, the semiconductor chip 10 is mounted in a state where the one surface 11 of the semiconductor chip 10 is opposed to the bonding surface 21 of the package 20 and the individual chip electrodes 12 and the package electrodes 22 are aligned. It is mounted on the package 20.

  Thus, the conductive adhesive 30 is interposed between the individual chip electrodes 12 and the package electrodes 22. In this state, the semiconductor chip 10 and the package 20 are pressed against each other. Specifically, a load is applied to the semiconductor chip 10 and pressed against the package 20.

  Then, by this pressing, as shown in FIG. 4B, the package electrode 22b existing at the lowest position on the bonding surface 21 and the chip electrode 12 facing the package electrode 22b come into contact with each other through the conductive adhesive 30. In this way, each conductive adhesive 30 is deformed in a direction in which both electrodes 12 and 22 approach, that is, in a direction in which both surfaces 11 and 21 approach.

  At this time, specifically, the conductive adhesive 30 in the package electrode 22a existing at the highest position is first brought into contact with the chip electrode 12, and the conductive connecting member 30 is continuously deformed so as to be further crushed. As a result, the conductive adhesive 30 in the package electrode 22b present at the lowest position contacts the chip electrode 12.

  In particular, in this embodiment, the vertices of all the conductive adhesives 30 have the same height. Therefore, the deformation amount of the conductive adhesive 30 in the package electrode 22a existing at the highest position is the maximum value of the height variation T existing on the bonding surface 21, that is, the highest portion and the lowest portion on the bonding surface 21. More than the difference.

  In this way, as shown in FIG. 4B, all sets of the chip electrodes 12 and the package electrodes 22 are in contact with each other via the conductive adhesive 30. In this state, for example, heat treatment is performed at 150 ° C. within 5 hours to cure the conductive adhesive 30. Thus, both electrodes 12 and 22 are electrically connected via the conductive adhesive 30. Thereafter, the semiconductor device S1 is completed by attaching the lid 26 and the like.

  By the way, according to the present embodiment, the conductive adhesive 30 is interposed between the individual chip electrodes 12 and the package electrodes 22 and is deformed, whereby the lowest position among the plurality of package electrodes 22 is obtained. The chip electrode 12 is in contact with the package electrode 22b having the longest distance from the chip electrode 12 through the bonding member 30.

  As described above, when the semiconductor chip 10 is mounted on the package 20, the conductive adhesive 30 is largely deformed to absorb the height variation T. Therefore, the height variation T on the bonding surface 21 of the package 20. Even if there exists, the semiconductor chip 10 can be electrically joined over the site | part from which the height in the said joint surface 21 differs.

  In particular, as described above, in this type of package 20, the height variation T existing on the bonding surface 21 is usually 15 μm or more as the difference between the highest portion and the lowest portion on the bonding surface 21. As the height variation T becomes larger than 15 μm, the effectiveness of the present embodiment increases.

  Further, in the manufacturing method of the present embodiment, the conductive adhesive 30 is formed on the surface of each package electrode 22 before the one surface 11 of the semiconductor chip 10 and the package 20 are opposed to the bonding surface 21. In the step of forming the conductive adhesive 30, the overall height ta of the conductive adhesive 30 is higher in the package electrode 22a existing at a higher position on the bonding surface 21 than in the package electrode 22b existing at a lower position. tb is set to be low.

  In this case, not only the two conductive adhesives 30 shown in FIG. 4 but also the higher the position on the bonding surface 21 in the package electrode 22 where the conductive adhesive 30 is provided, the higher the conductive adhesion on the package electrode 22 is. This means that the overall height of the agent 30 is lowered. As can be seen from the above manufacturing method, the deformation of the conductive adhesive 30 increases as it is disposed on the package electrode 22 located at a higher position.

  Therefore, if the overall height of the conductive adhesive 30 is changed depending on the position on the joint surface 21 as described above, the amount of the conductive adhesive 30 present at a relatively high position and greatly deformed can be reduced to a relatively low position. It is possible to reduce the amount of the conductive adhesive 30 that is present and has little deformation. As a result, according to this embodiment, it is possible to prevent problems such as protrusion of the conductive adhesive 30 due to the deformation.

  In the present embodiment, when the conductive adhesive 30 is used as a joining member and the conductive adhesive 30 is interposed between the chip electrode 12 and the package electrode 22, the conductive adhesive 30 is provided on the package electrode 22 side. However, instead of this, the conductive adhesive 30 may be disposed on the surface of the chip electrode 12 by the same dispensing method as described above.

  Also in this case, the conductive adhesive 30 is applied to both the electrodes 12 so that the package electrode 22b existing at the lowest position on the bonding surface 21 and the chip electrode 12 facing the package electrode 22b contact each other through the conductive adhesive 30. , 22 can be deformed in the approaching direction, and electrical connection between the electrodes 12, 22 via the conductive adhesive 30 can be realized.

(Second Embodiment)
FIG. 5 is a process diagram showing the main part of the semiconductor device manufacturing method according to the second embodiment of the present invention. Here, FIG. 5B is an enlarged cross-sectional view showing a joint portion between the chip electrode 12 and the package electrode 22 in the semiconductor device manufactured by the manufacturing method. In the drawings shown in the following embodiments, the main part of the semiconductor device is shown, but the parts not shown in the figure are the same as those in FIGS.

  In the present embodiment, similarly to the first embodiment, the conductive adhesive 30 is used as a joining member, and the chip electrode 12 and the package electrode 22 are electrically connected. Here, the present embodiment is different from the first embodiment in that a bump 31 is bonded to the chip electrode 12, and the bump 31 and the package electrode 22 are connected via a conductive adhesive 30. It is.

  This is because the chip electrode 12 is made of aluminum or gold as described above, but in the case of aluminum, it is easy to oxidize. Therefore, the chip electrode 12 is oxidized more easily by bonding via the bumps 31 made of gold or the like. This is because it can be prevented. Such bumps 31 can be formed on the surface of the chip electrode 12 by a method using a wire bonding apparatus using a wire such as gold.

  Another difference of the present embodiment from the first embodiment is that the chip electrode 12 and the package electrode 22 are located between the one surface 11 of the semiconductor chip 10 and the bonding surface 21 of the package 20. This is the point that the reinforcing adhesive 40 is interposed in the part. The one surface 11 of the semiconductor chip 10 and the bonding surface 21 of the package 20 are bonded by the reinforcing adhesive 40.

  The manufacturing method of the present embodiment is obtained by adding the formation process of the bumps 31 and the reinforcing adhesive 40 to the manufacturing method shown in the first embodiment. That is, in the present embodiment, the package 20 is prepared, and the semiconductor chip 10 provided with the bumps 31 is prepared.

  As described above, the bump 31 is formed on the surface of the chip electrode 12 by wire bonding or the like. For example, the bump 31 has a maximum diameter of 150 μm or less with respect to the chip electrode 12 made of aluminum. Further, in order to make the height between the bumps 31 uniform, it is desirable to perform a flattening process for flattening the tip of each bump 31. This flattening is performed with a load of 1 to 10 N or less per bump using, for example, a substrate made of Si or the like having a surface roughness of 5 μm or less.

  As in the first embodiment, the conductive adhesive 30 is disposed on the package electrode 22. At this time, as shown in FIG. 5A, the reinforcing adhesive 40 is also disposed on the bonding surface 21 other than the package electrode 22. The reinforcing adhesive 40 is also shaped in consideration of the height variation T of the joint surface 21 as in the case of the conductive adhesive 30.

  Here, the reinforcing adhesive 40 may be conductive or non-conductive, but like the conductive adhesive 30, it is preferable to have an adhesive function by being deformed and cured when the semiconductor chip 10 is mounted. .

  As the conductive reinforcing adhesive 40, the same adhesive as the conductive adhesive 30 can be adopted. In this case, since both the adhesives 30 and 40 can be made the same, simplification of the process of arranging these adhesives can be expected, but the reinforcing adhesive 40 is replaced with the conductive adhesive 30 and each electrode 12 so as not to be short-circuited. , 22 in a state separated from 22.

  Examples of the non-conductive reinforcing adhesive 40 include those made of a polyamide-based resin or an epoxy-based resin. In the case of non-conductivity, the reinforcing adhesive 40 may contact the conductive adhesive 30 and the electrodes 12 and 22.

  However, it is preferable that the reinforcing adhesive 40 is prevented from protruding even if it is non-conductive. From such a point of view, the viscosity before curing is preferable in both cases of conductive and non-conductive. Is preferably 100 Pa · s or more.

  Thus, as shown in FIG. 5A, the conductive adhesive 30 and the reinforcing adhesive 40 are interposed between the semiconductor chip 10 and the package 20, and then the first embodiment. Similarly, the semiconductor chip 10 and the package 20 are pressed against each other.

  As a result, as shown in FIG. 5B, all sets of the chip electrodes 12 and the package electrodes 22 are in contact with each other through the conductive adhesive 30. Further, the one surface 11 of the semiconductor chip 10 and the bonding surface 21 of the package 20 come into contact with each other through the reinforcing adhesive 40.

  In this state, for example, heat treatment is performed at 150 ° C. within 5 hours to cure the conductive adhesive 30 and the reinforcing adhesive 40. In this way, both the electrodes 12 and 22 are electrically connected via the conductive adhesive 30, and the one surface 11 of the semiconductor chip 10 and the bonding surface 21 of the package 20 are bonded by the reinforcing adhesive 40. The semiconductor device of the form is completed.

  As described above, according to the present embodiment, the bonding area between the one surface 11 of the semiconductor chip 10 and the bonding surface 21 of the package 20 is increased by the reinforcing adhesive 40, and the mechanical bonding between the two members 10 and 20 is performed. Strength is reinforced.

  In FIG. 5, the reinforcing adhesive 40 is provided on the bonding surface 21 side of the package 20, but may be provided on the one surface 11 side of the semiconductor chip 10. Also in this case, by disposing the reinforcing adhesive 40 away from the chip electrode 12 and the bump 31, the chip electrode 12 and the package electrode 22 are provided between the one surface 11 of the semiconductor chip 10 and the bonding surface 21 of the package 20. What is necessary is just to interpose the reinforcement adhesive 40 in parts other than the part in which this is located.

  In the present embodiment, the reinforcing adhesive 40 may be disposed before the semiconductor chip 10 is mounted on the package 20 as described above. However, the semiconductor chip 10 and the package 20 are electrically conductive. The reinforcing adhesive 40 may be disposed after the connection through the adhesive 30, that is, after the conductive adhesive 30 is cured.

  In this case, like the underfill resin in the well-known semiconductor device, the reinforcing adhesive 40 is injected into the gap between the semiconductor chip 10 and the package 20 from the end of the semiconductor chip 10 after the connection. After the injection, the reinforcing adhesive 40 can be formed by curing it.

  In the present embodiment, the reinforcing adhesive 40 may be omitted. The reinforcing adhesive 40 can also be applied in the first embodiment.

(Third embodiment)
FIG. 6 is a process diagram showing the main part of the semiconductor device manufacturing method according to the third embodiment of the present invention. Here, FIG. 6B is an enlarged cross-sectional view showing a joint portion between the chip electrode 12 and the package electrode 22 in the semiconductor device manufactured by the manufacturing method.

  In each of the above embodiments, the overall height of the conductive adhesive 30 before mounting the semiconductor chip 10 is changed depending on the position on the bonding surface 21. However, in the present embodiment, the overall height of all the conductive adhesives 30 is high. The thickness and amount are substantially the same. According to this, since the supply amount of each conductive adhesive 30 does not need to be changed depending on the position on the bonding surface 21 and can be made the same, simplification of the supply is expected.

  In the example shown in FIG. 6, as in the second embodiment, the bump 31 and the package electrode 22 bonded to the chip electrode 12 are connected by the conductive adhesive 30 and the connection by the reinforcing adhesive 40 is performed. Is going.

  Here, as shown in FIG. 6A, the conductive adhesive 30 is disposed so that the overall height of the conductive adhesive 30 is substantially the same in each package electrode 22 on the bonding surface 21. Do. For this reason, the height of the apex of each conductive adhesive 30 is naturally different from that of the above embodiments, and substantially corresponds to the height variation T of the joint surface 21.

  Also in the present embodiment, after the conductive adhesive 30 and the reinforcing adhesive 40 are disposed, the semiconductor chip 10 and the package 20 are pressed against each other as in the first embodiment, and FIG. As shown in FIG. 2, the contact between the electrodes 12 and 22 through the conductive adhesive 30 and the contact between the semiconductor chip 10 and the package 20 through the reinforcing adhesive 40 are realized. Thereafter, in the same manner as described above, the conductive adhesive 30 and the reinforcing adhesive 40 are cured to complete the semiconductor device of this embodiment.

  In the present embodiment, the main part is that the entire height and amount of the conductive adhesive 30 before mounting the semiconductor chip 10 are substantially the same. For example, in FIG. In the configuration and manufacturing method shown, the reinforcing adhesive 40 may be omitted, or the bump 31 on the chip electrode 12 side may be omitted.

(Fourth embodiment)
FIG. 7 is a process diagram showing the main part of the semiconductor device manufacturing method according to the fourth embodiment of the present invention. Here, FIG. 7B is an enlarged cross-sectional view showing a joint portion between the chip electrode 12 and the package electrode 22 in the semiconductor device manufactured by the present manufacturing method.

  Unlike the above-described embodiments, the semiconductor device according to this embodiment uses a bump 31 as a bonding member to electrically connect the chip electrode 12 and the package electrode 22. As a manufacturing method in this case, first, as shown in FIG. 7A, the semiconductor chip in which the bump 31 is formed on the surface of the chip electrode 12, and the bump 31 is formed on the surface of the package electrode 22. A package 20 is prepared.

  The bumps 31 of this embodiment are the same as the conductive bumps 31 shown in the above embodiment, and are gold bumps formed by a wire bonding method or the like. The bump 31 has a maximum diameter of 150 μm or less on both the chip electrode 12 side and the package electrode 22 side.

  Further, in the present embodiment, as a preferable mode, the tip portion of the bump 31 on the chip electrode 12 side, the bump 31 on the package electrode 22 side, or both the bumps 31 is planarized.

  This is because the electrodes 12 and 22 are joined by deforming them by bringing the tip portions of the bumps 31 into contact with each other. However, if the tip portions of the bumps 31 are made flat, the position of the tip portions due to slippage is determined. This is because it becomes easy to suppress the deviation.

  However, if the load for flattening is large, the deformation of the bump 30 when the semiconductor chip 10 is mounted is reduced, and the height variation T may not be absorbed sufficiently. Therefore, attention should be paid to this point when performing planarization. Note that this flattening is performed in order to prevent the above-described misalignment or to make the bumps 31 have the same height, and may not be performed in some cases.

  In this manner, the semiconductor chip 10 is mounted using the semiconductor chip 10 and the package 20 provided with the bumps 31 as bonding members. At this time, in the example shown in FIG. 7A, the bumps 31 on the bonding surface 21 side of the package 20 have substantially the same overall height, but the conductive adhesive in the first embodiment described above. Similarly to the case of 30, the overall height of each bump 31 may be changed according to the height variation T. Further, the reinforcing adhesive 40 is disposed on the bonding surface 21 of the package 20.

  Then, from the state shown in FIG. 7A, the semiconductor chip 10 and the package 20 are pressed against each other. As a result, the front ends of the bumps 31 facing each other come into contact with each other, and the bumps 31 are crushed and deformed in a direction in which both the electrodes 12 and 22 approach.

  In this way, as shown in FIG. 7B, the contact between the electrodes 12 and 22 via the bump 31 and the contact between the semiconductor chip 10 and the package 20 via the reinforcing adhesive 40 are realized.

  Thereafter, ultrasonic bonding is performed between the bumps 31 that are in contact with each other to electrically and mechanically bond the bumps 31, and the reinforcing adhesive 40 is cured in the same manner as described above, via the bumps 31. The semiconductor device of this embodiment in which both electrodes 12 and 22 are electrically connected is completed.

  Here, in the case where a gold bump is used as the bump 31, an example of the ultrasonic bonding conditions is as follows: Peak load: 0.1 N to 5 N per bump, tool amplitude: 0.1 μm to 5 μm, time : 0.1 second to 2 seconds, semiconductor chip side temperature: 50 ° C to 200 ° C, package side temperature: 50 ° C to 200 ° C.

  In this embodiment, in the example shown in FIG. 7, the bump 31 is formed on the surface of the chip electrode 12 and the surface of the package electrode 22 before the one surface 11 of the semiconductor chip 10 faces the bonding surface 21 of the package 20. However, the bumps 31 may be formed only on one surface, that is, only on the surface of the chip electrode 12, or on the surface of the package electrode 22.

  FIG. 8 is a process diagram showing a manufacturing method in the case where the bump 31 is formed only on the chip electrode 12 side in the present embodiment using the bump 31 as the bonding member. In FIG. 8, the reinforcing adhesive 40 is omitted. However, as described above, the reinforcing adhesive 40 is responsible for reinforcing the bonding between the semiconductor chip 10 and the package 20, and this embodiment is shown in FIG. Also in the form, it may be omitted depending on the case.

  In the example shown in FIG. 8 as well, as in the example shown in FIG. 7, the package electrode 22b existing at the lowest position on the bonding surface 21 and the chip electrode 12 facing the package electrode 22b are in contact via the bumps 31. As described above, if the bump 31 is deformed in a direction in which both the electrodes 12 and 22 approach each other, electrical connection via the bump 31 of both the electrodes 12 and 22 can be realized.

(Other embodiments)
The package 20 may be any one as long as it has a plurality of package electrodes formed on one surface by firing ceramic, and is limited to the package 20 as a laminated substrate having the opening 25 (see FIG. 1) as described above. Is not to be done.

  For example, if a flat single-layer plate is used as a package and a package electrode is provided on one surface thereof, this one surface is configured as one surface on which the semiconductor chip 10 is mounted. In the package having the opening 25, a package electrode may be provided on the bottom surface of the opening 25, and the bottom surface may be a surface on which the semiconductor chip 10 is mounted.

1 is an overall schematic cross-sectional view of a semiconductor device according to a first embodiment of the present invention. FIG. 2 is a schematic top view of the semiconductor device in FIG. 1. It is an expanded sectional view of the junction part of a chip electrode and a package electrode. It is process drawing which shows the manufacturing method of the semiconductor device of 1st Embodiment. It is process drawing which shows the principal part of the manufacturing method of the semiconductor device which concerns on 2nd Embodiment of this invention. It is process drawing which shows the principal part of the manufacturing method of the semiconductor device which concerns on 3rd Embodiment of this invention. It is process drawing which shows the principal part of the manufacturing method of the semiconductor device which concerns on 4th Embodiment of this invention. It is process drawing which shows the principal part of the manufacturing method of another semiconductor device which concerns on 4th Embodiment. It is a principal part schematic sectional drawing of the semiconductor device as a prototype which this inventor made as a prototype.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Semiconductor chip, 11 ... One side of semiconductor chip, 12 ... Chip electrode,
20 ... Package, 21 ... Package interface, 22 ... Package electrode,
30: Conductive adhesive as a joining member, 31 ... Bump as a joining member,
40: Reinforcing adhesive.

Claims (11)

A semiconductor chip (10) having a plurality of chip electrodes (12) on one surface (11);
A package (20) having a plurality of package electrodes (22) on one side (21) formed by firing ceramic;
The one surface (11) of the semiconductor chip (10) is opposed to the one surface (21) of the package (20) and the positions of the individual chip electrodes (12) and the package electrodes (22) are aligned. In the semiconductor device in which the semiconductor chip (10) is mounted on the package (20) and the electrodes (12, 22) are electrically connected,
Between the chip electrode (12) and the package electrode (22), conductive joint members (30, 31) that can be deformed when the semiconductor chip (10) is mounted on the package (20) are interposed. The electrodes (12, 22) are electrically connected by the joining members (30, 31), and the one surface (of the package (20) is deformed by deformation of the joining members (30, 31)). 21) A semiconductor device characterized in that the height variation existing in 21) is absorbed. The semiconductor device according to claim 1, wherein the bonding member is a conductive adhesive (30). The semiconductor according to claim 1, wherein the bonding member is a conductive bump (31) formed on at least one of a surface of the chip electrode (12) and a surface of the package electrode (22). apparatus. Between the one surface (11) of the semiconductor chip (10) and the one surface (21) of the package (20), in a region other than the region where the chip electrode (12) and the package electrode (22) are located. , The reinforcing adhesive (40) is interposed,
The one surface (11) of the semiconductor chip (10) and the one surface (21) of the package (20) are joined to each other by the reinforcing adhesive (40). The semiconductor device according to any one of the above. The height variation existing on the one surface (21) of the package (20) is 15 μm or more as a difference between the highest portion and the lowest portion on the one surface (21). 5. The semiconductor device according to any one of 4 to 4. A semiconductor chip (10) having a plurality of chip electrodes (12) on one side (11) and a package (20) having a plurality of package electrodes (22) on one side (21) prepared by firing ceramics are prepared. And
The one surface (11) of the semiconductor chip (10) is opposed to the one surface (21) of the package (20) and the positions of the individual chip electrodes (12) and the package electrodes (22) are aligned. In the method of manufacturing a semiconductor device in which the semiconductor chip (10) is mounted on the package (20) and the electrodes (12, 22) are electrically connected.
In the step of mounting the semiconductor chip (10) on the package (20), a conductive bonding member (30, 31) is interposed between the chip electrode (12) and the package electrode (22),
Subsequently, the package electrode (22b) present at the lowest position on the one surface (21) of the package (20) and the chip electrode (12) facing the package electrode (22) are interposed via the joining members (30, 31). The semiconductor chip (10) and the package (20) are pressed against each other so as to contact each other, and the joining members (30, 31) are deformed in a direction in which the electrodes (12, 22) approach each other. All the said electrodes (12, 22) are contacted via the said joining member (30, 31), The manufacturing method of the semiconductor device characterized by the above-mentioned. The method of manufacturing a semiconductor device according to claim 6, wherein a conductive adhesive (30) is used as the joining member. The conductive adhesive (30) is formed on the surface of each package electrode (22) before the one surface (11) of the semiconductor chip (10) is opposed to the one surface (21) of the package (20). And forming on top
In the package electrode (22a) present at a relatively high position on the one surface (21) of the package (20), the conductive adhesive (30) is more effective than the package electrode (22b) present at a lower position. 8. The method of manufacturing a semiconductor device according to claim 7, wherein the overall height of the semiconductor device is reduced. As the bonding member, a conductive bump (31) is used,
Before the one surface (11) of the semiconductor chip (10) faces the one surface (21) of the package (20), the bump (31) is attached to the surface of the chip electrode (12) and the package electrode ( The method of manufacturing a semiconductor device according to claim 6, wherein the semiconductor device is formed on at least one of the surfaces of 22). In the step of mounting the semiconductor chip (10) on the package (20), the chip electrode is disposed between the one surface (11) of the semiconductor chip (10) and the one surface (21) of the package (20). (12) A reinforcing adhesive (40) is interposed in a part other than the part where the package electrode (22) is located, and the one surface of the semiconductor chip (10) is interposed through the reinforcing adhesive (40). 10. The method of manufacturing a semiconductor device according to claim 6, wherein the surface (21) of the package (20) is brought into contact with the surface (21). The height variation existing on the one surface (21) of the package (20) is 15 μm or more as a difference between the highest portion and the lowest portion on the one surface (21). 11. A method for manufacturing a semiconductor device according to any one of items 10 to 10.

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