JP2007525760A - 欠陥クロックを検出するための電子回路装置 - Google Patents
欠陥クロックを検出するための電子回路装置 Download PDFInfo
- Publication number
- JP2007525760A JP2007525760A JP2007500328A JP2007500328A JP2007525760A JP 2007525760 A JP2007525760 A JP 2007525760A JP 2007500328 A JP2007500328 A JP 2007500328A JP 2007500328 A JP2007500328 A JP 2007500328A JP 2007525760 A JP2007525760 A JP 2007525760A
- Authority
- JP
- Japan
- Prior art keywords
- electronic circuit
- circuit device
- clock
- processor
- error signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/24—Resetting means
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
- G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
- G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/267—Reconfiguring circuits for testing, e.g. LSSD, partitioning
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Computer Hardware Design (AREA)
- Debugging And Monitoring (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP04100789 | 2004-02-27 | ||
PCT/IB2005/050575 WO2005085978A2 (en) | 2004-02-27 | 2005-02-15 | Electronic circuit arrangement for detecting a failing clock |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2007525760A true JP2007525760A (ja) | 2007-09-06 |
Family
ID=34917201
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007500328A Withdrawn JP2007525760A (ja) | 2004-02-27 | 2005-02-15 | 欠陥クロックを検出するための電子回路装置 |
Country Status (6)
Country | Link |
---|---|
US (1) | US20080140890A1 (zh) |
EP (1) | EP1719055A2 (zh) |
JP (1) | JP2007525760A (zh) |
KR (1) | KR20070012351A (zh) |
CN (1) | CN1922579A (zh) |
WO (1) | WO2005085978A2 (zh) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8410954B2 (en) * | 2007-11-06 | 2013-04-02 | Honeywell International Inc. | Moving and stationary body system using telemetry |
US20090115629A1 (en) * | 2007-11-06 | 2009-05-07 | Honeywell International Inc. | moving and stationary body system interfacing with a communications medium |
JP6816345B2 (ja) * | 2015-04-24 | 2021-01-20 | 富士電機株式会社 | 駆動制御装置 |
EP3742295A1 (en) * | 2019-05-23 | 2020-11-25 | NXP USA, Inc. | Automatic firmware rollback |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4144448A (en) * | 1977-11-29 | 1979-03-13 | International Business Machines Corporation | Asynchronous validity checking system and method for monitoring clock signals on separate electrical conductors |
US4691126A (en) * | 1985-08-29 | 1987-09-01 | Sperry Corporation | Redundant synchronous clock system |
JPH06332755A (ja) * | 1993-05-19 | 1994-12-02 | Mitsubishi Electric Corp | ウォッチドッグタイマ回路 |
US5664636A (en) * | 1993-10-29 | 1997-09-09 | Yamaha Hatsudoki Kabushiki Kaisha | Vehicle with electric motor |
US5479648A (en) * | 1994-08-30 | 1995-12-26 | Stratus Computer, Inc. | Method and apparatus for switching clock signals in a fault-tolerant computer system |
DE69430372D1 (de) * | 1994-10-27 | 2002-05-16 | St Microelectronics Srl | Schaltung zum Nachweis eines Fehlerzustandes eines Taktsignals für elektronische Mikroprozessorschaltungen |
GB2318194B (en) * | 1996-10-08 | 2000-12-27 | Advanced Risc Mach Ltd | Asynchronous data processing apparatus |
US5828243A (en) * | 1996-10-28 | 1998-10-27 | Mti Technology Corporation | Method for detecting clock failure and switching to backup clock |
US6301655B1 (en) * | 1997-09-15 | 2001-10-09 | California Institute Of Technology | Exception processing in asynchronous processor |
US7350116B1 (en) * | 1999-06-08 | 2008-03-25 | Cisco Technology, Inc. | Clock synchronization and fault protection for a telecommunications device |
US6292045B1 (en) * | 1999-11-29 | 2001-09-18 | Zilog, Inc. | Circuit and method for detecting and selecting clock sources |
JP2002055830A (ja) * | 2000-05-29 | 2002-02-20 | Seiko Epson Corp | 割込信号生成装置及び割込信号の生成方法 |
US6959014B2 (en) * | 2001-02-01 | 2005-10-25 | Freescale Semiconductor, Inc. | Method and apparatus for operating a communication bus |
EP1433059B1 (en) * | 2001-08-03 | 2007-05-23 | Altera Corporation | Clock loss detection circuit and corresponding method |
JP3523225B2 (ja) * | 2001-09-18 | 2004-04-26 | Necマイクロシステム株式会社 | クロック監視装置及び監視方法 |
US7089462B2 (en) * | 2003-04-17 | 2006-08-08 | International Business Machines Corporation | Early clock fault detection method and circuit for detecting clock faults in a multiprocessing system |
US7296170B1 (en) * | 2004-01-23 | 2007-11-13 | Zilog, Inc. | Clock controller with clock source fail-safe logic |
US7362739B2 (en) * | 2004-06-22 | 2008-04-22 | Intel Corporation | Methods and apparatuses for detecting clock failure and establishing an alternate clock lane |
JP2006172202A (ja) * | 2004-12-16 | 2006-06-29 | Nec Electronics Corp | 半導体装置 |
-
2005
- 2005-02-15 KR KR1020067017184A patent/KR20070012351A/ko not_active Application Discontinuation
- 2005-02-15 CN CNA2005800057973A patent/CN1922579A/zh active Pending
- 2005-02-15 EP EP05702981A patent/EP1719055A2/en not_active Ceased
- 2005-02-15 WO PCT/IB2005/050575 patent/WO2005085978A2/en active Application Filing
- 2005-02-15 JP JP2007500328A patent/JP2007525760A/ja not_active Withdrawn
- 2005-02-15 US US10/590,405 patent/US20080140890A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
WO2005085978A2 (en) | 2005-09-15 |
WO2005085978A3 (en) | 2006-05-18 |
CN1922579A (zh) | 2007-02-28 |
US20080140890A1 (en) | 2008-06-12 |
EP1719055A2 (en) | 2006-11-08 |
KR20070012351A (ko) | 2007-01-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20080212 |
|
A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A711 Effective date: 20080424 |
|
A761 | Written withdrawal of application |
Free format text: JAPANESE INTERMEDIATE CODE: A761 Effective date: 20091002 |