JP2007335423A - Semiconductor device - Google Patents

Semiconductor device Download PDF

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JP2007335423A
JP2007335423A JP2006161732A JP2006161732A JP2007335423A JP 2007335423 A JP2007335423 A JP 2007335423A JP 2006161732 A JP2006161732 A JP 2006161732A JP 2006161732 A JP2006161732 A JP 2006161732A JP 2007335423 A JP2007335423 A JP 2007335423A
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lid
insulating base
side wall
solid
state imaging
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Shinya Marumo
伸也 丸茂
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Priority to JP2006161732A priority Critical patent/JP2007335423A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48095—Kinked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4905—Shape
    • H01L2224/4909—Loop shape arrangement
    • H01L2224/49095—Loop shape arrangement parallel in plane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/163—Connection portion, e.g. seal
    • H01L2924/16315—Shape

Abstract

<P>PROBLEM TO BE SOLVED: To assure bonding strength even when the sidewall of an insulating substrate for mounting a lid is made narrow. <P>SOLUTION: A recess such as a trench 10 is formed in at least one of the upper surface at the sidewall 7 of a concave insulating substrate 1 and the lower surface of a lid 9 opposing it. The height is made uniform excepting the recess. Bonding area of the sidewall 7 and the lid 9 is increased through existence of the trench 10, and thereby bonding strength is enhanced. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、ＣＣＤやＣＭＯＳ等の撮像素子を用いた固体撮像装置等の光学デバイスなど、絶縁基体に半導体素子を搭載して構成される半導体装置に関するものである。   The present invention relates to a semiconductor device configured by mounting a semiconductor element on an insulating base, such as an optical device such as a solid-state imaging device using an imaging element such as a CCD or CMOS.

近年、携帯端末をはじめとする電子機器の小型化に伴い、半導体装置の小型化が要求されている。半導体装置のなかで、ビデオカメラやスチルカメラ等に広く用いられている固体撮像装置は、ＣＣＤやＣＭＯＳ等の撮像素子を絶縁基体に搭載し、受光領域を透明窓で覆ったパッケージの形態で提供されている。   In recent years, along with miniaturization of electronic devices such as portable terminals, miniaturization of semiconductor devices is required. Among semiconductor devices, solid-state imaging devices widely used for video cameras, still cameras, etc. are provided in the form of a package in which an imaging element such as a CCD or CMOS is mounted on an insulating substrate and the light receiving area is covered with a transparent window. Has been.

従来の固体撮像装置の構成を図４に示す。図４（ａ）は同固体撮像装置の平面図、図４（ｂ）は同固体撮像装置の図４（ａ）におけるＣ-Ｃ'断面図である。
固体撮像装置は、凹状の絶縁基体１と、絶縁基体１の凹部内の底面の素子搭載部２の周囲から絶縁基体１の下面に導出された複数の導体部３と、素子搭載部２に接着剤４により固定された固体撮像素子５と、固体撮像素子５と導体部３とを電気的に接続している金属細線６と、絶縁基体１の側壁部７上に封止材８により接合された透光性の蓋体９とを有しており、絶縁基体１と蓋体９とにより構成される容器内に固体撮像素子５を気密封止した構造である。図４（ａ）では蓋体９を透視した状態で示している。 FIG. 4 shows the configuration of a conventional solid-state imaging device. 4A is a plan view of the solid-state imaging device, and FIG. 4B is a cross-sectional view taken along the line CC ′ in FIG. 4A of the solid-state imaging device.
The solid-state imaging device adheres to the concave insulating base 1, the plurality of conductor portions 3 led out from the periphery of the element mounting portion 2 on the bottom surface in the concave portion of the insulating base 1 to the lower surface of the insulating base 1, and the element mounting portion 2. The solid-state imaging device 5 fixed by the agent 4, the metal thin wire 6 that electrically connects the solid-state imaging device 5 and the conductor portion 3, and the sealing material 8 are joined to the side wall portion 7 of the insulating base 1. The solid-state imaging device 5 is hermetically sealed in a container constituted by the insulating base 1 and the lid 9. FIG. 4A shows the lid 9 in a transparent state.

かかる固体撮像装置を小型化するために従来、図示したように、絶縁基体１と蓋体９とに同じ外形かつ略同じ大きさ（占有面積）のものを用い、絶縁基体１の側壁部７の幅（シール幅）を最小限とし、その側壁部７のフラットな上面に封止材８を塗布して蓋体９を接着していた。特許文献１には、封止材８が蓋体９の裏面を内側へと広がることを防止するために、側壁部７の上面の外周部を蓋体９のための接着部とし、側壁部７の上面の内周部に突起部を設け、この突起部と前記接着部との間に溝を設けることが提案されている。
特許第３０７４７７３号公報 Conventionally, in order to reduce the size of such a solid-state imaging device, as shown in the figure, the insulating base 1 and the lid 9 have the same outer shape and the same size (occupied area), and the side wall 7 of the insulating base 1 is formed. The width | variety (seal width | variety) was made into the minimum, the sealing material 8 was apply | coated to the flat upper surface of the side wall part 7, and the cover body 9 was adhere | attached. In Patent Document 1, in order to prevent the sealing material 8 from spreading the back surface of the lid body 9 inward, the outer peripheral portion of the upper surface of the side wall portion 7 is used as an adhesive portion for the lid body 9. It has been proposed that a protrusion is provided on the inner peripheral portion of the upper surface of the substrate, and a groove is provided between the protrusion and the bonding portion.
Japanese Patent No. 3074773

しかしながら、上記のように装置の小型化のために絶縁基体１の側壁部７を狭幅化すると、蓋体９を搭載できる面積が減少し、絶縁基体１と蓋体９との接合強度が不足してしまう。側壁部７の上面の外周部を蓋体９のための接着部とした構造では、蓋体９の接着面積はさらに減少することになる。   However, if the side wall 7 of the insulating base 1 is narrowed to reduce the size of the apparatus as described above, the area on which the lid 9 can be mounted decreases, and the bonding strength between the insulating base 1 and the lid 9 is insufficient. Resulting in. In the structure in which the outer peripheral portion on the upper surface of the side wall portion 7 is the bonding portion for the lid body 9, the bonding area of the lid body 9 is further reduced.

本発明は、上記問題に鑑み、蓋体を搭載する絶縁基体の側壁部を狭幅化する場合も接合強度を確保できるようにすることを目的とする。   In view of the above problems, an object of the present invention is to ensure bonding strength even when the side wall portion of an insulating base on which a lid is mounted is narrowed.

上記課題を解決するために本発明は、凹状に形成され外部接続用の導体部が設けられた絶縁基体と、前記絶縁基体の凹部内に固定され前記凹部内で前記導体部に電気的に接続された半導体素子と、前記絶縁基体の側壁部上に封止材にて接合された蓋体とを有する半導体装置において、前記絶縁基体の側壁部の上面とそれに対向する前記蓋体の下面との内の少なくとも一方に凹部が形成されており、前記凹部以外は均一な高さの面とされていることを特徴とする。   In order to solve the above-mentioned problems, the present invention provides an insulating base formed in a concave shape and provided with a conductor portion for external connection, and is fixed in the concave portion of the insulating base and electrically connected to the conductor portion in the concave portion. In a semiconductor device having a semiconductor element formed and a lid bonded to the side wall portion of the insulating base member by a sealing material, an upper surface of the side wall portion of the insulating base body and a lower surface of the lid body opposed thereto A concave portion is formed in at least one of the inner surfaces, and the surface other than the concave portion has a uniform height.

凹部は粗面化処理により形成されていてよい。凹部は絶縁基体の側壁部あるいは蓋体の最外周端に形成されていてよい。また固体撮像素子と透光性蓋体とを用いた固体撮像装置であってよい。これらの半導体装置を実装した電子機器も本発明を構成する。   The concave portion may be formed by a roughening treatment. The recess may be formed on the side wall of the insulating base or the outermost peripheral end of the lid. Further, it may be a solid-state imaging device using a solid-state imaging element and a translucent lid. Electronic equipment in which these semiconductor devices are mounted also constitutes the present invention.

本発明の半導体装置は、凹部が存在することにより側壁部と蓋体との接合面積が増加し、接合強度を向上できる。よって、側壁部を狭幅化して装置を小型化する場合も接合強度を確保することができ、かかる半導体装置を実装した電子機器も従来品に比較して小型に設計することが可能となる。   In the semiconductor device of the present invention, the presence of the recesses increases the bonding area between the side wall and the lid, and can improve the bonding strength. Therefore, even when the side wall portion is narrowed to reduce the size of the device, the bonding strength can be ensured, and an electronic device in which such a semiconductor device is mounted can be designed to be smaller than a conventional product.

以下、本発明の実施の形態を図面を参照して説明する。ここでは半導体装置の一例として固体撮像装置について説明する。
図１（ａ）は本発明の実施形態１の固体撮像装置の平面図、図１（ｂ）は同固体撮像装置の図１（ａ）におけるＡ−Ａ'断面図である。 Hereinafter, embodiments of the present invention will be described with reference to the drawings. Here, a solid-state imaging device will be described as an example of a semiconductor device.
FIG. 1A is a plan view of a solid-state imaging device according to Embodiment 1 of the present invention, and FIG. 1B is a cross-sectional view taken along line AA ′ in FIG. 1A of the solid-state imaging device.

この固体撮像装置は、セラミック等により凹状に形成された絶縁基体１と、絶縁基体１の凹部内の素子搭載部２の周囲から絶縁基体１の下面に導出された複数の導体部３と、素子搭載部２に銀ペースト等の接着剤４により固定されたＣＣＤ等の固体撮像素子５と、固体撮像素子５の電極パッドと導体部３の内部端子とを電気的に接続しているＡｕワイヤー等の金属細線６と、絶縁基体１の側壁部７上にエポキシ樹脂等を主材とするＵＶ接着剤などの封止材８により接合されたガラスなどの透光性の蓋体９とを有しており、絶縁基体１と蓋体９とにより構成される容器内にベアチップの状態の固体撮像素子５を気密封止した構造である。なお図１（ａ）では蓋体９を透視した状態で示している。   This solid-state imaging device includes an insulating base 1 formed in a concave shape with ceramic or the like, a plurality of conductor portions 3 led out from the periphery of the element mounting portion 2 in the concave portion of the insulating base 1 to the lower surface of the insulating base 1, and an element A solid-state imaging device 5 such as a CCD fixed to the mounting portion 2 with an adhesive 4 such as a silver paste, and an Au wire that electrically connects the electrode pad of the solid-state imaging device 5 and the internal terminal of the conductor portion 3. And a translucent lid 9 made of glass or the like bonded to the side wall 7 of the insulating substrate 1 by a sealing material 8 such as a UV adhesive mainly composed of an epoxy resin or the like. The solid-state imaging device 5 in a bare chip state is hermetically sealed in a container constituted by the insulating base 1 and the lid 9. In FIG. 1A, the lid 9 is shown in a transparent state.

絶縁基体１はその側壁部７の内面に段部を形成しており、導体部３は側壁部７の段部上に内部端子が露出するようにメタライズ配線体などによって形成している。絶縁基体１と蓋体９とに同じ外形かつ略同じ大きさ（占有面積）のものを用いている。   The insulating substrate 1 has a stepped portion formed on the inner surface of the side wall portion 7, and the conductor portion 3 is formed of a metallized wiring body or the like so that the internal terminal is exposed on the stepped portion of the side wall portion 7. The insulating base 1 and the lid 9 have the same outer shape and substantially the same size (occupied area).

この固体撮像装置が先に図４を用いて説明した従来のものと相違するのは、絶縁基体１の側壁部７の上面に、断面がＶ字状の溝部１０を側壁部７の周方向に沿って延びて連続して形成している点である。溝部１０よりも内周側および外周側は高さの等しい平坦面１１である。側壁部７の上面に対向する蓋体９の接合領域、つまり下面周縁部も平坦面である。   This solid-state imaging device is different from the conventional one described with reference to FIG. 4 in that a groove portion 10 having a V-shaped cross section is provided in the circumferential direction of the side wall portion 7 on the upper surface of the side wall portion 7 of the insulating base 1. It is the point which extends along and is formed continuously. The inner peripheral side and the outer peripheral side of the groove portion 10 are flat surfaces 11 having the same height. The joining region of the lid body 9 that faces the upper surface of the side wall portion 7, that is, the peripheral surface of the lower surface is also a flat surface.

これによれば、絶縁基体１の側壁部７の上面がフラットであった従来構造に比べて、溝部１０が存在することで表面積が増加するため、側壁部７の上面に塗布されて溝部１０内にも充填され固着される封止材８による接合面積が増加し、絶縁基体１と蓋体９との接合強度が向上する。よって、側壁部７を狭幅化して装置を小型化する場合も接合強度を確保することができ、耐久性が向上する。   According to this, since the surface area is increased by the presence of the groove 10 as compared with the conventional structure in which the upper surface of the side wall 7 of the insulating substrate 1 is flat, the inner surface of the insulating base 1 is applied to the upper surface of the side wall 7. In addition, the bonding area by the sealing material 8 filled and fixed is increased, and the bonding strength between the insulating base 1 and the lid 9 is improved. Therefore, even when the side wall 7 is narrowed to reduce the size of the device, the bonding strength can be ensured and the durability is improved.

また溝部１０に塗布された封止材８は溝部１０上を流動することで、塗布量分布の偏りが抑制され、塗布厚みが均一化されるため、蓋体９を側壁部７の上面に平行に接合することが可能になり、接合品質が安定化する。   Further, since the sealing material 8 applied to the groove portion 10 flows on the groove portion 10, the uneven distribution of the application amount is suppressed and the application thickness is made uniform, so that the lid 9 is parallel to the upper surface of the side wall portion 7. It becomes possible to join to each other, and the joining quality is stabilized.

図２（ａ）は本発明の実施形態２の固体撮像装置の平面図、図２（ｂ）は同固体撮像装置の図２（ａ）におけるＢ−Ｂ'断面図である。
この固体撮像装置が上記の実施形態１のものと相違するのは、側壁部７の上面に対向する蓋体９の接合領域、つまり下面周縁部にも、断面がＶ字状の溝部１２を形成している点である。溝部１２の周囲は平坦面１３である。 2A is a plan view of the solid-state imaging device according to the second embodiment of the present invention, and FIG. 2B is a cross-sectional view taken along the line BB ′ in FIG. 2A of the solid-state imaging device.
This solid-state imaging device is different from that of the first embodiment described above in that a groove portion 12 having a V-shaped cross section is formed also in the joining region of the lid body 9 facing the upper surface of the side wall portion 7, that is, the peripheral surface of the lower surface. This is the point. The periphery of the groove 12 is a flat surface 13.

これによれば、蓋体９に溝部１２が存在することで表面積が増加し、側壁部７の上面に塗布された封止材８は溝部１０内だけでなく溝部１２内にも充填され固着されるため、封止材８による接合面積がより増加し、絶縁基体１と蓋体９との接合強度がさらに向上する。   According to this, the surface area is increased by the presence of the groove portion 12 in the lid body 9, and the sealing material 8 applied to the upper surface of the side wall portion 7 is filled and fixed not only in the groove portion 10 but also in the groove portion 12. Therefore, the bonding area by the sealing material 8 is further increased, and the bonding strength between the insulating base 1 and the lid body 9 is further improved.

このように溝部１２を形成した蓋体９を、溝部１０を持たない側壁部７の上面に接合しても、溝部１２の存在による接合強度の向上効果はある。したがって、側壁部７の上面がフラットな従来タイプの絶縁基体１を用いて、絶縁基体１と蓋体９との接合強度が高い固体撮像装置を構成することも可能である。   Even if the lid 9 having the groove 12 formed in this way is bonded to the upper surface of the side wall 7 without the groove 10, there is an effect of improving the bonding strength due to the presence of the groove 12. Therefore, it is also possible to configure a solid-state imaging device having a high bonding strength between the insulating base 1 and the lid 9 by using the conventional insulating base 1 having a flat top surface of the side wall portion 7.

溝部１０あるいは溝部１２は、上記したＶ字状に限定されず、図３（ａ）（ｂ）にそれぞれ示すような矩形、より広いＶ字状、あるいはＵ字形等であっても、Ｖ字状と同等の効果が得られる。溝部１０あるいは溝部１２は、図３（ｃ）（ｄ）に示すように、側壁部７の厚みに沿う方向に複数本並ぶように形成してもよく、その場合は封止材８が固着する表面積が更に増加するため接合強度が向上する。また溝部１０あるいは溝部１２は、側壁部７の周方向に沿って断続的に形成してもよいし、あるいは溝部１０、１２というほどに長くない非貫通穴（断面形状は同じなので図示を省略する）を適当間隔で形成してもよく、いずれも、アンカー効果による接合強度の向上が得られる。   The groove portion 10 or the groove portion 12 is not limited to the above-described V shape, and may be a rectangular shape, a wider V shape, a U shape, or the like as shown in FIGS. Equivalent effect is obtained. As shown in FIGS. 3C and 3D, a plurality of the groove portions 10 or 12 may be formed so as to be aligned in the direction along the thickness of the side wall portion 7, in which case the sealing material 8 is fixed. Since the surface area is further increased, the bonding strength is improved. Moreover, the groove part 10 or the groove part 12 may be formed intermittently along the circumferential direction of the side wall part 7, or a non-through hole that is not so long as the groove parts 10 and 12 (the cross-sectional shape is the same, so illustration is omitted) ) May be formed at appropriate intervals, and any of them can improve the bonding strength due to the anchor effect.

さらには蓋体９（あるいは側壁部７の上面）に、図３（ｅ）（ｆ）に示すように、表面粗化処理を施すことで微細な凹部を形成しても（図中の９ａの領域）、表面積が増加し接合強度が向上する。   Furthermore, as shown in FIGS. 3 (e) and 3 (f), the lid 9 (or the upper surface of the side wall portion 7) is subjected to a surface roughening process to form a fine recess (indicated by 9a in the figure). Area), the surface area is increased, and the bonding strength is improved.

蓋体９については、図３（ｇ）に示したように、最外周端を面取りしたような形状の凹部１４を形成してもよい。このように外周側を開放させておけば、封止材８が塗布された側壁部７の上面に蓋体９を上方から搭載する際に混入する気体を逃がすことができ、ボイドの発生を抑制することができる。上記の溝部１０、１２や表面粗化処理による微細な凹部と併せて形成してもよいことは言うまでもない。   As shown in FIG. 3G, the lid 9 may be formed with a concave portion 14 having a shape such that the outermost peripheral edge is chamfered. If the outer peripheral side is opened in this way, gas mixed when the lid body 9 is mounted on the upper surface of the side wall portion 7 coated with the sealing material 8 from above can be released, and generation of voids is suppressed. can do. Needless to say, it may be formed together with the groove portions 10 and 12 and the fine concave portions by the surface roughening treatment.

なお絶縁基体１は樹脂等により形成してもよい。また導体部３は、ここに図示したように、側壁部７の外面に沿って延びるように形成してもよく、そのためにリードフレームを用いることも可能である。図示を省略するが、導体部３の内部端子を素子搭載部２に配置しておき、固体撮像素子５をフリップチップ実装してもよい。   The insulating substrate 1 may be formed of resin or the like. The conductor portion 3 may be formed so as to extend along the outer surface of the side wall portion 7 as shown in the figure, and a lead frame can be used for this purpose. Although not shown, the internal terminal of the conductor part 3 may be disposed on the element mounting part 2 and the solid-state imaging element 5 may be flip-chip mounted.

以上の構造は、固体撮像装置以外の光デバイス、さらには光デバイスでない半導体装置にも適用することができ、加工も容易である。上述したように、側壁部７を狭幅化して装置を小型化する場合も接合強度を確保し耐久性を向上できることから、かかる半導体装置を実装する電子機器、たとえばビデオカメラやスチルカメラ等も、従来品に比較して小型に設計し、製造することが可能である。   The above structure can be applied to an optical device other than the solid-state imaging device, and also to a semiconductor device that is not an optical device, and is easy to process. As described above, even when the side wall portion 7 is narrowed to reduce the size of the device, since it is possible to ensure the bonding strength and improve the durability, an electronic device in which such a semiconductor device is mounted, such as a video camera or a still camera, It is possible to design and manufacture smaller than conventional products.

本発明の実施形態１としての固体撮像装置の平面図および断面図FIG. 1 is a plan view and a cross-sectional view of a solid-state imaging device as Embodiment 1 of the present invention. 本発明の実施形態２としての固体撮像装置の平面図および断面図The top view and sectional drawing of the solid-state imaging device as Embodiment 2 of this invention 図１または図２の固体撮像装置の変形例を示す断面図Sectional drawing which shows the modification of the solid-state imaging device of FIG. 1 or FIG. 従来の固体撮像装置の平面図および断面図Plan view and sectional view of a conventional solid-state imaging device

符号の説明Explanation of symbols

１・・・絶縁基体
２・・・素子搭載部
３・・・導体部
５・・・固体撮像素子
６・・・金属細線
７・・・側壁部
８・・・封止材
９・・・蓋体
10,12 ・溝部
11,13 ・平坦面 DESCRIPTION OF SYMBOLS 1 ... Insulation base | substrate 2 ... Element mounting part 3 ... Conductor part 5 ... Solid-state image sensor 6 ... Metal fine wire 7 ... Side wall part 8 ... Sealing material 9 ... Cover body
10,12 ・ Groove
11,13 ・ Flat surface

Claims (5)

凹状に形成され外部接続用の導体部が設けられた絶縁基体と、前記絶縁基体の凹部内に固定され前記凹部内で前記導体部に電気的に接続された半導体素子と、前記絶縁基体の側壁部上に封止材にて接合された蓋体とを有する半導体装置において、
前記絶縁基体の側壁部の上面とそれに対向する前記蓋体の下面との内の少なくとも一方に凹部が形成されており、前記凹部以外は均一な高さの面である半導体装置。 An insulating base formed in a concave shape and provided with a conductor portion for external connection; a semiconductor element fixed in the recess of the insulating base and electrically connected to the conductor in the recess; and a sidewall of the insulating base In a semiconductor device having a lid bonded on the part with a sealing material,
A semiconductor device, wherein a recess is formed in at least one of an upper surface of a side wall portion of the insulating base and a lower surface of the lid opposite to the upper surface, and a surface having a uniform height other than the recess. 凹部は粗面化処理により形成されている請求項１記載の半導体装置。   The semiconductor device according to claim 1, wherein the recess is formed by a roughening process. 凹部は絶縁基体の側壁部あるいは蓋体の最外周端に形成されている請求項１記載の半導体装置。   The semiconductor device according to claim 1, wherein the concave portion is formed in a side wall portion of the insulating base or an outermost peripheral end of the lid. 固体撮像素子と透光性蓋体とを用いた固体撮像装置である請求項１乃至請求項３のいずれかに記載の半導体装置。   The semiconductor device according to claim 1, wherein the semiconductor device is a solid-state imaging device using a solid-state imaging element and a translucent lid. 請求項１記載の半導体装置を実装した電子機器。   An electronic device in which the semiconductor device according to claim 1 is mounted.
JP2006161732A 2006-06-12 2006-06-12 Semiconductor device Pending JP2007335423A (en)

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