JP2007300029A - Semiconductor device, method of manufacturing the same, and circuit substrate device - Google Patents

Semiconductor device, method of manufacturing the same, and circuit substrate device Download PDF

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JP2007300029A
JP2007300029A JP2006128635A JP2006128635A JP2007300029A JP 2007300029 A JP2007300029 A JP 2007300029A JP 2006128635 A JP2006128635 A JP 2006128635A JP 2006128635 A JP2006128635 A JP 2006128635A JP 2007300029 A JP2007300029 A JP 2007300029A
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semiconductor chip
heat
heat pipe
resin layer
semiconductor device
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JP4978054B2 (en
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Satoru Wakiyama
悟 脇山
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Sony Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0655—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To achieve reduction of thickness while maintaining machine stiffness, and to dissipate heat generated from a semiconductor chip. <P>SOLUTION: The semiconductor device includes: a heat pipe 5 connected with heat radiator 15 through heat-dissipating resin layer 4 are connected on the backside of a semiconductor chip 3 mounted on interposer 2 by the flip chip packaging method, and a sealing resin layer 6 formed in which the semiconductor chip 3 and the heat pipe 5 are embedded. Generated heat from the semiconductor chip 3 is directly conducted to the heat pipe 5, thereby efficiently performing heat dissipation. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、比較的大量の熱が発生する半導体チップ或いはＣＰＵやＭＰＵ等の半導体ディバイス等（本明細書においては半導体チップと総称する。）をインタポーザ等の基板に実装するとともに、放熱構造を備える半導体装置及びその製造方法、並びに半導体装置をマザー基板に実装した回路基板装置に関する。   The present invention mounts a semiconductor chip that generates a relatively large amount of heat or a semiconductor device such as a CPU or MPU (generically referred to as a semiconductor chip in this specification) on a substrate such as an interposer and has a heat dissipation structure. The present invention relates to a semiconductor device, a manufacturing method thereof, and a circuit board device in which the semiconductor device is mounted on a mother substrate.

各種の電子機器等においては、小型・薄型化を保持しながら多機能化・高機能化が図られているが、高集積化やクロック周波数の高まり等により半導体チップからの発熱量もますます大きくなっている。電子機器等においては、半導体チップから発生した熱が内部に籠もって高温状態となることで、動作が不安定となったり様々な障害発生の原因となる。このため、電子機器等においては、半導体装置に半導体チップから発生した熱を効率よく放熱する適宜の放熱構造が備えられる。   In various electronic devices, etc., while being small and thin, they are becoming multifunctional and highly functional. However, due to higher integration and higher clock frequency, the amount of heat generated from semiconductor chips is increasing. It has become. In an electronic device or the like, heat generated from a semiconductor chip is trapped inside and becomes a high temperature state, which causes unstable operation and causes various failures. For this reason, in an electronic device or the like, an appropriate heat dissipation structure for efficiently radiating heat generated from a semiconductor chip is provided in a semiconductor device.

例えば、特許文献１には、半導体チップの裏面（電極形成面との対向面）にヒートスプレッダ等の放熱部材を放熱性接着剤や導電樹脂により接合して半導体チップから発生した熱を放熱するようにした半導体装置が開示されている。この半導体装置は、ヒートスプレッダ上にヒートシンクを組み合わせることによりさらに効率的な放熱が行われるように構成される。特許文献２には、冷却用冷媒液を流す導電パイプの外周上にリードフレームごと半導体チップを直接接合した半導体装置が開示されている。この半導体装置は、リードフレームを熱伝導路として、半導体チップから発生した熱が導電パイプにより効率よく放熱されるようにする。   For example, in Patent Document 1, a heat dissipating member such as a heat spreader is joined to the back surface of the semiconductor chip (the surface facing the electrode forming surface) with a heat dissipating adhesive or conductive resin so as to dissipate heat generated from the semiconductor chip. A semiconductor device is disclosed. This semiconductor device is configured to further efficiently dissipate heat by combining a heat sink on a heat spreader. Patent Document 2 discloses a semiconductor device in which a semiconductor chip is directly joined together with the lead frame on the outer periphery of a conductive pipe through which a cooling refrigerant liquid flows. This semiconductor device uses the lead frame as a heat conduction path so that heat generated from the semiconductor chip is efficiently radiated by the conductive pipe.

特開２０００−２００８７０号公報Japanese Patent Laid-Open No. 2000-200870 特開２００５−７２４１１号公報JP 2005-72411 A

半導体装置においては、上述したように電子機器等の小型・薄型化の要求に伴い、厚みが３００μｍ以下のごく薄厚の有機インタポーザやシリコンインタポーザが基板に用いられるとともに、この基板に対して機能を損なわない範囲で研磨処理等を施して３００μｍ以下まで薄型化された半導体チップを搭載したものも提供される。特許文献１に開示された半導体装置は、かかる仕様に対応する場合に全体の機械的強度が不足し、放熱部材を接合する際に負荷される圧着力で半導体チップや基板が破損してしまう虞がある。また、かかる半導体装置は、特に有機インタポーザを用いた場合に、半導体チップを形成するシリコンと線膨張係数を大きく異にするために応力集中により半導体チップが破損してしまう虞がある。半導体装置は、例えば封止樹脂により半導体チップを封装することにより機械的強度を向上する対応も図られるが、この封止樹脂層によって放熱効果が著しく低下してしまう。   In semiconductor devices, as described above, in response to demands for miniaturization and thinning of electronic devices and the like, extremely thin organic interposers and silicon interposers having a thickness of 300 μm or less are used for the substrate, and the function of the substrate is impaired. A semiconductor chip mounted with a semiconductor chip thinned to 300 μm or less by performing a polishing process or the like within a range is also provided. In the semiconductor device disclosed in Patent Document 1, the overall mechanical strength is insufficient when the specifications are met, and the semiconductor chip and the substrate may be damaged by the pressure applied when the heat radiating member is joined. There is. In addition, particularly in the case of using an organic interposer in such a semiconductor device, the semiconductor chip may be damaged due to stress concentration because the linear expansion coefficient is greatly different from that of silicon forming the semiconductor chip. The semiconductor device can cope with improving the mechanical strength by, for example, sealing a semiconductor chip with a sealing resin. However, the heat dissipation effect is significantly reduced by the sealing resin layer.

一方特許文献２においては、リードフレームと導電パイプとにより熱伝導路を構成することから、例えば高集積化等により基板に対してフリップチップ実装法により実装される数千個ものピン数を有する半導体チップが搭載されるような半導体装置への適用が困難である。また、かかる半導体装置は、例えば多数個の半導体チップを三次元的に積層して構成するような仕様のものに適用できず、各半導体チップを平面的に実装することによって大型化してしまうといった問題がある。   On the other hand, in Patent Document 2, since a heat conduction path is constituted by a lead frame and a conductive pipe, for example, a semiconductor having thousands of pins mounted on a substrate by a flip chip mounting method due to high integration or the like. It is difficult to apply to a semiconductor device on which a chip is mounted. In addition, such a semiconductor device cannot be applied to a specification in which a large number of semiconductor chips are stacked in a three-dimensional manner, for example, and the semiconductor device is increased in size by being mounted in a plane. There is.

したがって、本発明は、機械的剛性を保持して薄型化を図るととも半導体チップから発生した熱を効率的に放熱する半導体装置及びその製造方法並びに多数個の半導体装置を実装した回路基板装置を提供することを目的とする。   Accordingly, the present invention provides a semiconductor device that can reduce the thickness while maintaining mechanical rigidity and efficiently dissipate heat generated from a semiconductor chip, a manufacturing method thereof, and a circuit board device on which a large number of semiconductor devices are mounted. The purpose is to provide.

上述した目的を達成する本発明にかかる半導体装置は、電極形成面に多数個の電極を形成した半導体チップと、第１主面に上記各電極と相対して多数個の電極接続パッドが形成されるとともに第２主面側に実装用パッドが形成された基板とを備え、半導体チップが基板に対して、電極形成面側を実装面として相対する各電極を電極接続パッド上にバンプにより接続するとともに対向面間にアンダフィルを充填して固定するフリップチップ実装法により第１主面上に実装されてなる。半導体装置は、半導体チップよりも長軸でかつ外周部に絶縁膜が形成されるとともに内孔に冷却媒体を封入するヒートパイプが半導体チップの電極形成面と対向する裏面上に放熱樹脂層を介して接合され、基板の第１主面上に半導体チップとともにヒートパイプを端部を露出させた状態で埋設する封止樹脂層が絶縁樹脂材により形成される。半導体装置は、封止樹脂層から露出されたヒートパイプの端部にジョイント部材が取り付けられ、このジョイント部材を介してヒートパイプが放熱手段と接続されることにより、半導体チップから発生した熱が効率的に放熱される。   A semiconductor device according to the present invention that achieves the above-described object includes a semiconductor chip in which a large number of electrodes are formed on an electrode formation surface, and a large number of electrode connection pads that are opposed to the respective electrodes on a first main surface. And a substrate on which a mounting pad is formed on the second main surface side, and the semiconductor chip is connected to the substrate with each electrode facing the electrode forming surface side as a mounting surface by bumps on the electrode connection pad At the same time, it is mounted on the first main surface by a flip chip mounting method in which underfill is filled and fixed between the opposing surfaces. The semiconductor device has a longer axis than the semiconductor chip and an insulating film is formed on the outer peripheral portion, and a heat pipe that encloses a cooling medium in the inner hole is disposed on the back surface of the semiconductor chip facing the electrode forming surface with a heat dissipation resin layer interposed therebetween. An insulating resin material is formed on the first main surface of the substrate to embed the heat pipe together with the semiconductor chip with the end portion exposed. In the semiconductor device, a joint member is attached to the end of the heat pipe exposed from the sealing resin layer, and the heat pipe is connected to the heat radiating means through the joint member, so that the heat generated from the semiconductor chip is efficient. Heat is released.

また、上述した目的を達成する本発明にかかる半導体装置の製造方法は、電極形成面に多数個の電極を形成した半導体チップと、第１主面に上記各電極と相対して多数個の電極接続パッドが形成されるとともに第２主面側に実装用パッドが形成された基板とを備え、半導体チップが基板に対して、電極形成面側を実装面として相対する各電極を電極接続パッド上にバンプにより接続するとともに対向面間にアンダフィルを充填して固定するフリップチップ実装法により第１主面上に実装されてなる半導体装置を製造する。半導体装置の製造方法は、ヒートパイプ接合工程と、栓部材取付け工程と、封止樹脂層成形工程と、冷却媒体封入工程とを有する。半導体装置の製造方法は、ヒートパイプ接合工程において外周部に絶縁膜が形成されるとともに内孔に冷却媒体を封入するヒートパイプを、半導体チップの電極形成面と対向する裏面上に放熱樹脂層を介して接合する。半導体装置の製造方法は、栓部材取付け工程において、ヒートパイプの両端部に耐熱性の栓部材を取り付けて内孔を閉塞する。半導体装置の製造方法は、封止樹脂層成形工程において、成形金型により基板の第１主面上に、半導体チップとともに端部を露出させた状態でヒートパイプを埋設する絶縁樹脂材からなる封止樹脂層を形成する。半導体装置の製造方法は、ジョイント部材取付け工程において、封止樹脂層から露出されたヒートパイプの端部から栓部材を取り外すとともに、ジョイント部材を取り付ける。半導体装置の製造方法は、冷却媒体封入工程において、ヒートパイプの内孔から空気抜きを行うとともに冷却媒体を封入する。   In addition, a method of manufacturing a semiconductor device according to the present invention that achieves the above-described object includes a semiconductor chip in which a large number of electrodes are formed on an electrode formation surface, and a large number of electrodes on a first main surface relative to the electrodes. And a substrate having a mounting pad formed on the second main surface side and a semiconductor chip on the electrode connection pad, each electrode facing the substrate with the electrode forming surface side as a mounting surface A semiconductor device mounted on the first main surface is manufactured by a flip-chip mounting method in which the opposite surfaces are filled and fixed with bumps and fixed by bumps. The manufacturing method of a semiconductor device includes a heat pipe joining step, a plug member attaching step, a sealing resin layer forming step, and a cooling medium sealing step. In the method of manufacturing a semiconductor device, an insulating film is formed on the outer peripheral portion in a heat pipe joining step, and a heat pipe that encloses a cooling medium in an inner hole is provided, and a heat-dissipating resin layer is provided on the back surface facing the electrode forming surface of the semiconductor chip. Join through. In the method for manufacturing a semiconductor device, in the plug member attaching step, heat resistant plug members are attached to both ends of the heat pipe to close the inner hole. In the method of manufacturing a semiconductor device, in a sealing resin layer molding step, a sealing mold made of an insulating resin material is used that embeds a heat pipe on a first main surface of a substrate with a semiconductor chip so that an end portion is exposed with a molding die. A stop resin layer is formed. In the method of manufacturing a semiconductor device, in the joint member attaching step, the plug member is removed from the end portion of the heat pipe exposed from the sealing resin layer, and the joint member is attached. In the semiconductor device manufacturing method, in the cooling medium sealing step, air is vented from the inner hole of the heat pipe and the cooling medium is sealed.

さらに、上述した目的を達成する本発明にかかる回路基板装置は、電極形成面に多数個の電極を形成した半導体チップと、第１主面に各電極と相対して多数個の電極接続パッドが形成されるとともに第２主面側に実装用パッドが形成された基板とを備え、半導体チップが基板に対して、電極形成面側を実装面として相対する各電極を電極接続パッド上にバンプにより接続するとともに対向面間にアンダフィルを充填して固定するフリップチップ実装法により第１主面上に実装した少なくとも１個以上の半導体装置を、基板の第２主面に設けた実装用バンプを介してマザー基板に実装してなる。回路基板装置は、半導体装置が、半導体チップの電極形成面と対向する裏面上に放熱樹脂層を介して接合され半導体チップよりも長軸でかつ外周部に絶縁膜が形成されるとともに内孔に冷却媒体を封入するヒートパイプと、基板の第１主面上に絶縁樹脂材により形成されて半導体チップとともに端部を露出させた状態でヒートパイプを埋設する封止樹脂層と、ヒートパイプの封止樹脂層から露出された端部に取り付けたジョイント部材とを備える。回路基板装置は、各半導体装置が、マザー基板に実装した状態で、それぞれのヒートパイプをジョイント部材を介して接続するとともに連結ヒートパイプを介して放熱手段と接続される。回路基板装置は、各半導体装置の半導体チップからの発生熱が、ヒートパイプにより放熱手段に伝導されて効率よく放熱されるようにする。   Furthermore, the circuit board device according to the present invention that achieves the above-described object includes a semiconductor chip in which a large number of electrodes are formed on an electrode forming surface, and a large number of electrode connection pads on the first main surface facing each electrode. And a substrate on which a mounting pad is formed on the second main surface side, and a semiconductor chip is formed on the electrode connection pad by bumps on the electrode connection pad, with the electrode forming surface side facing the mounting surface. At least one or more semiconductor devices mounted on the first main surface by a flip chip mounting method that connects and fixes underfill between opposite surfaces are fixed to mounting bumps provided on the second main surface of the substrate. It is mounted on the mother board. In the circuit board device, the semiconductor device is bonded to the back surface of the semiconductor chip opposite to the electrode formation surface via a heat-dissipating resin layer, and has a longer axis than the semiconductor chip and an insulating film is formed on the outer peripheral portion. A heat pipe that encloses the cooling medium, a sealing resin layer that is formed of an insulating resin material on the first main surface of the substrate and that has an end portion exposed together with the semiconductor chip, and a sealing of the heat pipe And a joint member attached to the end exposed from the stop resin layer. In the circuit board device, each semiconductor device is connected to the heat radiating means through the joint heat pipe while the respective heat pipes are connected through the joint member in a state where each semiconductor device is mounted on the mother board. In the circuit board device, heat generated from the semiconductor chip of each semiconductor device is conducted to the heat radiating means by the heat pipe so that the heat is efficiently radiated.

本発明によれば、基板上にフリップチップ実装法により実装した半導体チップの裏面に放熱樹脂層を介して放熱手段と接続されるヒートパイプを接合するとともに半導体チップとヒートパイプを埋設する封止樹脂層を形成したことから、半導体チップからの発生熱がヒートパイプに直接伝導されて効率的な放熱を行うことが可能である。本発明によれば、薄厚の基板や薄型化された半導体チップを備えることにより全体を薄型化するが、封止樹脂層により機械的剛性が保持されることにより半導体チップの破損等の発生が防止されて信頼性が保持される。   According to the present invention, the sealing resin for joining the heat pipe connected to the heat radiation means via the heat radiation resin layer to the back surface of the semiconductor chip mounted on the substrate by the flip chip mounting method and embedding the semiconductor chip and the heat pipe. Since the layer is formed, the heat generated from the semiconductor chip is directly conducted to the heat pipe, and efficient heat dissipation can be performed. According to the present invention, the overall thickness is reduced by providing a thin substrate or a thinned semiconductor chip, but the mechanical rigidity is maintained by the sealing resin layer, thereby preventing the occurrence of breakage of the semiconductor chip. Reliability is maintained.

以下、本発明の実施の形態として示す半導体装置１について、図面を参照して詳細に説明する。半導体装置１は、図１に示すように、インタポーザ２の第１主面２Ａ上に半導体チップ３を実装するとともに、半導体チップ３の電極形成面３Ａと対向する裏面３Ｂ上に放熱樹脂層４によりヒートパイプ５を接合し、半導体チップ３とヒートパイプ５を埋め込むようにしてインタポーザ２の第１主面２Ａ上に封止樹脂層６が形成される。半導体装置１は、ヒートパイプ５が両端部５Ａ、５Ｂを封止樹脂層６から露出され、それぞれにジョイント部材７、７が取り付けられる。   Hereinafter, a semiconductor device 1 shown as an embodiment of the present invention will be described in detail with reference to the drawings. As shown in FIG. 1, the semiconductor device 1 has the semiconductor chip 3 mounted on the first main surface 2A of the interposer 2, and the heat radiating resin layer 4 on the back surface 3B facing the electrode forming surface 3A of the semiconductor chip 3. The sealing resin layer 6 is formed on the first main surface 2A of the interposer 2 so that the heat pipe 5 is joined and the semiconductor chip 3 and the heat pipe 5 are embedded. In the semiconductor device 1, the heat pipe 5 has both end portions 5 </ b> A and 5 </ b> B exposed from the sealing resin layer 6, and joint members 7 and 7 are attached to the heat pipe 5.

半導体装置１は、例えば一般的なプリント配線基板に用いられる有機基板等からなるインタポーザ２に、詳細を省略するが第１主面２Ａ上に適宜の配線パターンとともに半導体チップ３の電極形成面３Ａに形成した多数個の電極８と相対して多数個の電極接続パッド９が形成される。インタポーザ２には、図示を省略するが第１主面２Ａと第２主面２Ｂとを貫通して多数個のビアが形成されており、これらビアを介して第１主面２Ａ側の配線パターンと接続される適宜の配線パターンが第２主面２Ｂに形成される。インタポーザ２には、第２主面２Ｂに配線パターンとともに多数個の実装用パッド１０が形成されており、これら実装用パッド１０に半田ボール１１等が設けられる。   The semiconductor device 1 is, for example, an interposer 2 made of an organic substrate or the like used for a general printed wiring board, although the details are omitted, the electrode formation surface 3A of the semiconductor chip 3 is disposed on the first main surface 2A together with an appropriate wiring pattern. A large number of electrode connection pads 9 are formed opposite to the formed large number of electrodes 8. Although not shown, the interposer 2 has a plurality of vias formed through the first main surface 2A and the second main surface 2B, and a wiring pattern on the first main surface 2A side through these vias. An appropriate wiring pattern to be connected to is formed on the second main surface 2B. In the interposer 2, a large number of mounting pads 10 are formed on the second main surface 2 </ b> B together with the wiring pattern, and solder balls 11 and the like are provided on the mounting pads 10.

インタポーザ２は、厚み寸法ａが５０μｍ〜３００μｍの薄厚とされた有機基板或いはシリコン基板を素材にして形成される。インタポーザ２は、かかる厚み寸法の素材を用いることにより、半導体装置１の全体を薄厚化するとともに実装した半導体チップ３と後述するマザー基板１２との間における信号の高速授受が図られるようにする。インタポーザ２は、封止樹脂層６により機械的剛性が補完されることで、後述する製造工程において破断や撓み等の発生が抑制される。   The interposer 2 is formed using a thin organic substrate or silicon substrate having a thickness dimension a of 50 μm to 300 μm. The interposer 2 uses the material having such a thickness to reduce the thickness of the entire semiconductor device 1 and to perform high-speed signal transmission / reception between the mounted semiconductor chip 3 and a mother substrate 12 described later. Since the interposer 2 is supplemented with mechanical rigidity by the sealing resin layer 6, the occurrence of breakage, bending, or the like is suppressed in the manufacturing process described later.

半導体装置１は、半導体チップ３がインタポーザ２に対して、電極形成面３Ａ側を実装面として各電極８を相対する電極接続パッド９と位置合わせして組み合わされ、フリップチップ実装法により第１主面２Ａ上に実装される。すなわち、半導体チップ３は、インタポーザ２上に組み合わされた状態で加圧加熱処理を施されることにより、各電極８が各電極接続パッド９に設けたバンプ１３を介して接続される。半導体チップ３は、各バンプ１３が介在することにより構成された電極形成面３Ａと第１主面２Ａとの間隙にアンダフィル１４が充填されることにより、接続部位を保護されてインタポーザ２の第１主面２Ａ上に固定される。   In the semiconductor device 1, the semiconductor chip 3 is combined with the interposer 2 by aligning the electrodes 8 with the electrode connection pads 9 facing each other with the electrode formation surface 3A side as the mounting surface, and the first main chip is formed by flip chip mounting. Mounted on surface 2A. That is, the semiconductor chip 3 is subjected to pressure and heat treatment in a state of being combined on the interposer 2, whereby each electrode 8 is connected via the bump 13 provided on each electrode connection pad 9. In the semiconductor chip 3, the underfill 14 is filled in the gap between the electrode forming surface 3 </ b> A and the first main surface 2 </ b> A configured by the respective bumps 13, so that the connection site is protected and the second portion of the interposer 2 is protected. 1 fixed on the main surface 2A.

半導体チップ３は、上述したように比較的大量の熱が発生する半導体チップ或いはＣＰＵやＭＰＵ等の半導体ディバイスであり、全体の厚みを５０μｍ〜３００μｍと薄厚にしたものが用いられる。半導体チップ３は、例えば機能を損なわない範囲で、裏面３Ｂ側に研磨処理を施して薄型化するようにしてもよい。半導体チップ３は、かかる厚み寸法とすることにより、半導体装置１の全体を薄厚化する。   As described above, the semiconductor chip 3 is a semiconductor chip that generates a relatively large amount of heat, or a semiconductor device such as a CPU or MPU, and has a total thickness of 50 μm to 300 μm. For example, the semiconductor chip 3 may be thinned by subjecting the back surface 3B side to a polishing process within a range that does not impair the function. By setting the semiconductor chip 3 to such a thickness dimension, the entire semiconductor device 1 is thinned.

半導体装置１は、ヒートパイプ５が、図１に示すように半導体チップ３よりも長軸であり、上述したようにその両端部５Ａ、５Ｂを封止樹脂層６から露出されて放熱樹脂層４により半導体チップ３の裏面３Ｂ上に接合する。半導体装置１は、放熱樹脂層４として高熱伝導特性と非導電特性を有する例えばポリジメチルシロキ酸等のシリコン樹脂が用いられ、ヒートパイプ５を半導体チップ３に接合するとともに半導体チップ３からの発生熱をヒートパイプ５に伝導する。   In the semiconductor device 1, the heat pipe 5 has a longer axis than the semiconductor chip 3 as shown in FIG. 1, and as described above, both end portions 5 </ b> A and 5 </ b> B are exposed from the sealing resin layer 6 to dissipate the heat radiation resin layer 4. Is bonded onto the back surface 3B of the semiconductor chip 3. In the semiconductor device 1, for example, a silicon resin such as polydimethylsiloxy acid having high heat conduction characteristics and non-conductivity characteristics is used as the heat radiation resin layer 4, and the heat pipe 5 is joined to the semiconductor chip 3 and heat generated from the semiconductor chip 3 is used. Is conducted to the heat pipe 5.

ヒートパイプ５は、略真空状態とされた内孔５Ｃに水或いはメタノールやエタノール等の冷却媒体を封入して構成される。ヒートパイプ５は、周知のように低圧雰囲気下で封入した冷却媒体が低温度で気化して内孔５Ｃを流れる原理を利用して効率的な熱伝導を行う作用を奏し、冷却媒体が半導体チップ３からの発生熱により気化して低温側へと流れて液化することにより放熱する。ヒートパイプ５には、最大外径（又は最大高さ）が１ｍｍ以下のものが用いられることにより、半導体装置１の全体を薄厚化する。   The heat pipe 5 is configured by enclosing water or a cooling medium such as methanol or ethanol in an inner hole 5C which is in a substantially vacuum state. As is well known, the heat pipe 5 has an effect of efficiently conducting heat using the principle that the cooling medium sealed in a low-pressure atmosphere evaporates at a low temperature and flows through the inner hole 5C, and the cooling medium is a semiconductor chip. 3 is vaporized by the heat generated from 3 and flows to the low temperature side to be liquefied to dissipate heat. The heat pipe 5 having a maximum outer diameter (or maximum height) of 1 mm or less is used to thin the entire semiconductor device 1.

ヒートパイプ５は、線膨張係数（ｐｐｍ／ｋ）が上述した放熱樹脂層４に用いられるシリコン（７．６）や封止樹脂層６を形成する後述する樹脂材と差が小さな、例えばアルミ材（２３．５）、鉄材（１２．１）、銅材（１７．０）、ニッケル材（１３．３）或いはステンレス材（１８．７）等の金属材により形成される。ヒートパイプ５は、かかる金属素材を用いることにより、熱応力による放熱樹脂層４や封止樹脂層６との接合部分におけるクラックの発生や半導体チップ３へのダメージ発生が防止されるようにする。   The heat pipe 5 has a small difference in linear expansion coefficient (ppm / k) from the later-described resin material forming the silicon (7.6) and the sealing resin layer 6 used for the heat radiation resin layer 4 described above, for example, an aluminum material. (23.5), iron material (12.1), copper material (17.0), nickel material (13.3), or stainless steel material (18.7). By using such a metal material, the heat pipe 5 is configured to prevent generation of cracks and damage to the semiconductor chip 3 due to thermal stress at the joint portion with the heat radiation resin layer 4 and the sealing resin layer 6.

ヒートパイプ５は、上述したように半導体チップ３の長さ寸法よりも長軸とされるが、例えば図８に示すように半導体チップ３の横幅寸法とほぼ同幅の矩形断面を有するパイプ体に形成してもよい。ヒートパイプ５は、かかる形状により外周部位が放熱樹脂層４を介して半導体チップ３の裏面３Ｂに対して全域に亘って対向する。ヒートパイプ５は、半導体チップ３の裏面３Ｂから発生熱が効率よく伝導されるようになる。   The heat pipe 5 has a longer axis than the length of the semiconductor chip 3 as described above. For example, as shown in FIG. 8, the heat pipe 5 is a pipe body having a rectangular cross section having substantially the same width as the width of the semiconductor chip 3. It may be formed. With this shape, the outer peripheral portion of the heat pipe 5 is opposed to the back surface 3 </ b> B of the semiconductor chip 3 through the heat radiating resin layer 4. In the heat pipe 5, the generated heat is efficiently conducted from the back surface 3 </ b> B of the semiconductor chip 3.

また、ヒートパイプ５は、上述した金属素材により形成されるとともに後述する放熱装置１５まで引き回される。ヒートパイプ５には、外部との電気的絶縁を保持するために外周部に酸化膜１６が形成される。さらに、ヒートパイプ５は、酸化膜１６に対してプラズマ処理やサンドブラスト処理等を施して微細な凹凸を形成することにより、放熱樹脂層４との密着性の向上が図られる。   The heat pipe 5 is formed of the metal material described above and is routed to a heat radiating device 15 described later. An oxide film 16 is formed on the outer periphery of the heat pipe 5 in order to maintain electrical insulation from the outside. Furthermore, the heat pipe 5 is subjected to plasma treatment, sandblast treatment, or the like on the oxide film 16 to form fine irregularities, thereby improving the adhesion with the heat radiation resin layer 4.

半導体装置１は、封止樹脂層６が、上述したようにヒートパイプ５の両端部５Ａ、５Ｂを露出させた状態でインタポーザ２の第１主面２Ａ上に半導体チップ３を埋め込んで形成されることにより、半導体チップ３を保護するともに絶縁を保持する。封止樹脂層６は、薄厚化された半導体チップ３を実装した薄厚のインタポーザ２に形成されることにより半導体装置１の機械的剛性が高められるようにする。封止樹脂層６も、従来の一般的な半導体チップ製造工程に用いられているエポキシ系樹脂材やウレタン系樹脂材等の適宜の絶縁樹脂材によって形成される。   In the semiconductor device 1, the sealing resin layer 6 is formed by embedding the semiconductor chip 3 on the first main surface 2A of the interposer 2 with the both end portions 5A and 5B of the heat pipe 5 exposed as described above. As a result, the semiconductor chip 3 is protected and insulation is maintained. The sealing resin layer 6 is formed on the thin interposer 2 on which the thinned semiconductor chip 3 is mounted so that the mechanical rigidity of the semiconductor device 1 is increased. The sealing resin layer 6 is also formed of an appropriate insulating resin material such as an epoxy resin material or a urethane resin material used in a conventional general semiconductor chip manufacturing process.

封止樹脂層６は、インタポーザ２の第１主面２Ａ上に、例えばコンプレッションモールド法（圧縮成形法）により形成される。コンプレッションモールド法は、周知のように熱硬化型樹脂材を用いる成形法として一般に実施されており、絶縁樹脂材をキャビティ内で溶融状態とした成形金型に加工対象体をセットする。コンプレッションモールド成形法においては、所定圧力で型締めを行った後にわずかに型開きしてガス抜き行い、再び型締めを行って成形金型を加熱しながら所定圧力をかけて成形を行う。   The sealing resin layer 6 is formed on the first main surface 2A of the interposer 2 by, for example, a compression molding method (compression molding method). The compression molding method is generally carried out as a molding method using a thermosetting resin material as is well known, and a workpiece is set in a molding die in which an insulating resin material is melted in a cavity. In the compression mold molding method, after performing mold clamping at a predetermined pressure, the mold is slightly opened and degassed, and then mold clamping is performed again, and molding is performed while applying a predetermined pressure while heating the molding die.

半導体装置１は、封止樹脂層６から露出されたヒートパイプ５の両端部５Ａ、５Ｂにそれぞれジョイント部材７が取り付けられ、これらジョイント部材７を介してヒートパイプ５を相互に接続する。ジョイント部材７は、ヒートパイプ５内を半導体チップ３からの発生熱により加熱された冷却媒体が流れるこや、別部品をマザー基板１２等にリフロー半田処理により搭載する際の半田リフロー温度が２６０℃であることを考慮して、例えば３００℃程度の耐熱特性を有しかつ液密特性を保持して相互に接続を可能とする例えばシリコンラバー等を素材にして形成される。   In the semiconductor device 1, joint members 7 are attached to both end portions 5 </ b> A and 5 </ b> B of the heat pipe 5 exposed from the sealing resin layer 6, and the heat pipes 5 are connected to each other via the joint members 7. The joint member 7 has a solder reflow temperature of 260 ° C. when a cooling medium heated by heat generated from the semiconductor chip 3 flows in the heat pipe 5 or when another component is mounted on the mother substrate 12 or the like by reflow soldering. In view of this, for example, silicon rubber or the like that has a heat resistance property of about 300 ° C. and maintains a liquid-tight property and can be connected to each other is formed.

ジョイント部材７は、例えば図９に示すように、基部７Ａと、この基部７Ａの両側面にそれぞれ一体に連設された嵌合部７Ｂ、７Ｃとから構成され、全長に亘って冷却媒体の流路７Ｄが貫通して形成される。ジョイント部材７は、基部７Ａがヒートパイプ５の外径とほぼ同等若しくはやや大径に形成されるとともに、嵌合部７Ｂ、７Ｃがヒートパイプ５の内径とほぼ同径に形成される。   For example, as shown in FIG. 9, the joint member 7 includes a base portion 7A and fitting portions 7B and 7C integrally connected to both side surfaces of the base portion 7A. A path 7D is formed through. In the joint member 7, the base portion 7 </ b> A is formed to be approximately equal to or slightly larger than the outer diameter of the heat pipe 5, and the fitting portions 7 </ b> B and 7 </ b> C are formed to have substantially the same diameter as the inner diameter of the heat pipe 5.

ジョイント部材７は、嵌合部７Ｂ、７Ｃをそれぞれ相対するヒートパイプ５の先端からその内孔５Ｃに嵌合することにより、隣り合うヒートパイプ５間を接続する。ジョイント部材７は、ヒートパイプ５に対してその内孔５Ｃに嵌合部７Ｂ、７Ｃをやや縮径させた状態で、基部７Ａが先端部に突き当たるまで押し込まれる。ジョイント部材７は、嵌合部７Ｂ、７Ｃが上述した素材のシリコンラバーの特性により嵌合した状態で内孔５Ｃの内周壁に密着し、ヒートパイプ５間を液密状態に接続する。   The joint member 7 connects the adjacent heat pipes 5 by fitting the fitting portions 7B and 7C into the inner holes 5C from the tips of the opposed heat pipes 5, respectively. The joint member 7 is pushed into the heat pipe 5 with the fitting portions 7B and 7C having a slightly reduced diameter in the inner hole 5C until the base portion 7A hits the tip portion. The joint member 7 is in close contact with the inner peripheral wall of the inner hole 5C in a state in which the fitting portions 7B and 7C are fitted due to the characteristics of the above-described silicon rubber, and connects the heat pipes 5 in a liquid-tight state.

なお、ジョイント部材７は、基部７Ａをある程度の長さで形成することにより可撓性が生じて曲げることが可能となり、適宜に引き回すことが可能となるとともに高さ寸法の差異等が生じても調整が可能となる。また、ジョイント部材７は、例えば嵌合部７Ｂ、７Ｃとヒートパイプ５の内周壁とを適宜の接着剤により接合する構造や、シリコン樹脂で形成したシールド材を用いて接合するようにしてもよい。さらに、ジョイント部材７は、嵌合部７Ｂ、７Ｃの外周部に外周ねじを形成し、これら外周ねじをヒートパイプ５の開口部位に形成した内周ねじにねじ込むことにより結合する構造であってもよい。勿論、ジョイント部材７は、嵌合部７Ｂ、７Ｃをヒートパイプ５の外径よりも大径に形成し、ヒートパイプ５を嵌合して結合するようにしてもよく、この場合に嵌合部７Ｂ、７Ｃに内周ねじを形成するとともにヒートパイプ５の端部に外周ねじを形成するようにしてもよい。   Note that the joint member 7 can be bent by forming the base portion 7A with a certain length, and can be bent appropriately, and even if there is a difference in height, etc. Adjustment is possible. Further, the joint member 7 may be joined using, for example, a structure in which the fitting portions 7B and 7C and the inner peripheral wall of the heat pipe 5 are joined with an appropriate adhesive, or a shield material made of silicon resin. . Furthermore, even if the joint member 7 has a structure in which outer peripheral screws are formed on the outer peripheral portions of the fitting portions 7B and 7C and these outer peripheral screws are screwed into an inner peripheral screw formed at an opening portion of the heat pipe 5, Good. Of course, the joint member 7 may be configured such that the fitting portions 7B and 7C have a larger diameter than the outer diameter of the heat pipe 5, and the heat pipe 5 is fitted and coupled. 7B and 7C may be formed with an inner peripheral screw and an outer peripheral screw may be formed at the end of the heat pipe 5.

図２に第２の実施の形態として示した半導体装置２０は、基本的な構成を上述した半導体装置１と同様とすることから対応する部位に同一符号を付して説明を省略するが、大判のシリコン基板からなるインタポーザ２上に複数個の半導体チップ３、３が実装される。半導体装置２０は、長尺のヒートパイプ５が用いられて、半導体チップ３、３上に跨って放熱樹脂層４、４を介して接合される。半導体装置２０も、ヒートポンプ５の両端部５Ａ、５Ｂを露出させて、各半導体チップ３、３が封止樹脂層６によりインタポーザ２の第１主面２Ａ上に埋め込まれる。   The semiconductor device 20 shown as the second embodiment in FIG. 2 has the same basic configuration as that of the semiconductor device 1 described above. A plurality of semiconductor chips 3 and 3 are mounted on an interposer 2 made of a silicon substrate. The semiconductor device 20 is joined via the heat radiation resin layers 4 and 4 over the semiconductor chips 3 and 3 by using the long heat pipe 5. The semiconductor device 20 also exposes both end portions 5 </ b> A and 5 </ b> B of the heat pump 5, and the semiconductor chips 3 and 3 are embedded on the first main surface 2 </ b> A of the interposer 2 by the sealing resin layer 6.

上述した半導体装置１、２０は、例えばリフロー半田処理が施されることにより、半田ボール１１を介して実装用パッド１０を電子機器側に設けられる制御基板等のマザー基板１２に形成したパッド上にそれぞれ接合されて表面実装されることにより、図３に示すように回路基板装置２１を構成する。半導体装置１、２０は、インタポーザ２の第２主面２Ｂ側に形成した実装用パッド１０にそれぞれバンプ１３が接合される。半導体装置１、２０は、マザー基板１２の主面１２Ａ上に位置合わせするようにして並べて載置され、リフロー半田処理により溶融硬化するバンプ１３を介してそれぞれ対応する各パッドに接続されて回路基板装置２１を構成する。   The semiconductor devices 1 and 20 described above are subjected to, for example, a reflow solder process so that the mounting pads 10 are formed on the pads formed on the mother substrate 12 such as a control substrate provided on the electronic device side via the solder balls 11. By being joined and surface-mounted, the circuit board device 21 is configured as shown in FIG. In the semiconductor devices 1 and 20, the bumps 13 are bonded to the mounting pads 10 formed on the second main surface 2 </ b> B side of the interposer 2. The semiconductor devices 1 and 20 are placed side by side so as to be aligned on the main surface 12A of the mother substrate 12, and are connected to the corresponding pads via the bumps 13 that are melted and hardened by reflow soldering. The apparatus 21 is configured.

回路基板装置２１は、図３に示すようにマザー基板１２上に隣り合って実装された半導体装置１と半導体装置２０とが、対向された半導体装置１側のヒートパイプ５・１と半導体装置２０側のヒートパイプ５・２０にそれぞれ取り付けたジョイント部材７・１Ａとジョイント部材７・２０Ｂにより結合される。回路基板装置２１は、例えば半導体装置１側のジョイント部材７・１Ｂに第１連結ヒートパイプ２２Ａが接続され、この第１連結ヒートパイプ２２Ａを介してヒートシンクや冷却ファン或いはこれらを組み合わせた詳細を省略する放熱装置１５と接続される。   As shown in FIG. 3, the circuit board device 21 includes the semiconductor device 1 and the semiconductor device 20 mounted adjacent to each other on the mother substrate 12, and the heat pipe 5. The joint members 7 and 1A and the joint members 7 and 20B are attached to the heat pipes 5 and 20 on the side. In the circuit board device 21, for example, the first connection heat pipe 22A is connected to the joint members 7 and 1B on the semiconductor device 1 side, and details of a heat sink, a cooling fan, or a combination thereof are omitted through the first connection heat pipe 22A. Connected to the heat dissipation device 15.

回路基板装置２１は、放熱装置１５から引き出された第２連結ヒートパイプ２２Ｂが半導体装置２０側のヒートパイプ５・２０に取り付けたジョイント部材７・２０Ａと接続される。回路基板装置２１は、かかる構造により、半導体装置２０−半導体装置１−第１連結ヒートパイプ２２Ａ−放熱装置１５−第２連結ヒートパイプ２２Ｂ−半導体装置２０により構成された放熱ループが備えられる。回路基板装置２１においては、この放熱ループを介して半導体装置１や半導体装置２０に搭載した半導体チップ３からの発生熱が放熱装置１５に伝達され、効率的に放熱が行われる。   In the circuit board device 21, the second connection heat pipe 22 </ b> B drawn from the heat dissipation device 15 is connected to the joint members 7 </ b> A attached to the heat pipes 5 and 20 on the semiconductor device 20 side. With this structure, the circuit board device 21 includes a heat dissipation loop formed by the semiconductor device 20 -the semiconductor device 1 -the first connection heat pipe 22A-the heat dissipation device 15 -the second connection heat pipe 22B -the semiconductor device 20. In the circuit board device 21, heat generated from the semiconductor chip 3 mounted on the semiconductor device 1 or the semiconductor device 20 is transmitted to the heat radiating device 15 through the heat radiating loop, so that heat is radiated efficiently.

以上のように構成された半導体装置１、２０の製造工程について以下説明する。なお、半導体装置１、２０は、上述したようにインタポーザ２として有機配線基板又はシリコン基板を用いること、インタポーザ２上に半導体チップ３を１個又は複数個（２個）実装することにおいて構成を異にするが、基本的な構成と製造工程とを同等とすることから以下半導体装置１の製造工程について図４乃至図７を参照して代表して説明する。   A manufacturing process of the semiconductor devices 1 and 20 configured as described above will be described below. The semiconductor devices 1 and 20 have different configurations in that an organic wiring substrate or a silicon substrate is used as the interposer 2 as described above, and one or a plurality of (two) semiconductor chips 3 are mounted on the interposer 2. However, since the basic configuration and the manufacturing process are the same, the manufacturing process of the semiconductor device 1 will be described below with reference to FIGS.

半導体装置１の製造工程は、図４に示すようにインタポーザ２の第１主面２Ａ上に半導体チップ３をフリップチップ実装法により実装する半導体チップ実装工程と、図５に示すように半導体チップ３の裏面３Ｂ上にヒートパイプ５を放熱樹脂層４により接合するヒートパイプ接合工程を有する。半導体装置１の製造工程は、ヒートパイプ５の両端部５Ａ、５Ｂにそれぞれ栓部材２３、２３を取り付ける栓部材取付け工程と、図６に示すように成形金型２４を用いたコンプレッションモールド法により封止樹脂層６を形成する封止樹脂層形成工程を有する。半導体装置１の製造工程は、成形金型から取り出した中間体２５から栓部材２３、２３を取り外すとともに、図７に示すようにジョイント部材７、７を取り付けるジョイント部材取付け工程を有して半導体装置１を製造する。   The manufacturing process of the semiconductor device 1 includes a semiconductor chip mounting process for mounting the semiconductor chip 3 on the first main surface 2A of the interposer 2 by a flip chip mounting method as shown in FIG. 4, and a semiconductor chip 3 as shown in FIG. The heat pipe joining process which joins the heat pipe 5 with the thermal radiation resin layer 4 on the back surface 3B of this. The manufacturing process of the semiconductor device 1 is sealed by a plug member attaching step for attaching the plug members 23 and 23 to both ends 5A and 5B of the heat pipe 5 and a compression molding method using a molding die 24 as shown in FIG. A sealing resin layer forming step of forming the stopping resin layer 6; The manufacturing process of the semiconductor device 1 includes a joint member attaching step of removing the plug members 23, 23 from the intermediate body 25 taken out from the molding die and attaching the joint members 7, 7 as shown in FIG. 1 is manufactured.

半導体チップ実装工程においては、上述したように半導体チップ３を、電極形成面３Ａ側を実装面としてインタポーザ２の第１主面２Ａ上に実装する。半導体チップ実装工程においては、半導体チップ３を、各電極８を相対する電極接続パッド９と位置合わせして載置した状態で、加熱しながら第１主面２Ａ上に押し付ける。半導体チップ実装工程においては、各電極８と各電極接続パッド９とをバンプ１３を介して接続した後に、電極形成面３Ａと第１主面２Ａとの間隙にアンダフィル１４を充填する。半導体チップ実装工程においては、アンダフィル１４が硬化することにより、図４に示すように各電極８と各電極接続パッド９との接続部位を被覆して電気的かつ機械的に保護するとともに半導体チップ３をインタポーザ２の第１主面２Ａ上に固定する。   In the semiconductor chip mounting step, as described above, the semiconductor chip 3 is mounted on the first main surface 2A of the interposer 2 with the electrode forming surface 3A side as the mounting surface. In the semiconductor chip mounting step, the semiconductor chip 3 is pressed onto the first main surface 2A while being heated while the electrodes 8 are placed in alignment with the electrode connection pads 9 facing each other. In the semiconductor chip mounting process, after the electrodes 8 and the electrode connection pads 9 are connected via the bumps 13, the underfill 14 is filled in the gap between the electrode formation surface 3A and the first main surface 2A. In the semiconductor chip mounting step, the underfill 14 is hardened, so that the connection portion between each electrode 8 and each electrode connection pad 9 is covered and electrically and mechanically protected as shown in FIG. 3 is fixed on the first main surface 2A of the interposer 2.

ヒートパイプ接合工程においては、上述したように半導体チップ３の裏面３Ｂ上に、放熱樹脂層４を形成する例えば半溶融状態のシリコン樹脂を塗布するとともに、半導体チップ３よりも長軸のヒートパイプ５をその両端部５Ａ、５Ｂが半導体チップ３から突出するようにして取り付ける。ヒートパイプ接合工程は、シリコン樹脂を硬化させて放熱樹脂層４を形成し、ヒートパイプ５を半導体チップ３の裏面３Ｂ上に固定して図５に示す積層中間体２６を形成する。   In the heat pipe joining step, as described above, for example, a semi-molten silicon resin for forming the heat radiation resin layer 4 is applied on the back surface 3B of the semiconductor chip 3, and the heat pipe 5 having a longer axis than the semiconductor chip 3 is applied. Are attached so that both end portions 5A, 5B protrude from the semiconductor chip 3. In the heat pipe joining step, the silicon resin is cured to form the heat radiation resin layer 4, and the heat pipe 5 is fixed on the back surface 3B of the semiconductor chip 3 to form the laminated intermediate 26 shown in FIG.

栓部材取付け工程は、封止樹脂層形成工程の前工程として、半導体チップ３から突出されたヒートパイプ５の両端部５Ａ、５Ｂに栓部材２３、２３を嵌め込むことにより封止樹脂材が内孔５Ｃに浸入しないようにする。栓部材取付け工程は、各栓部材２３が例えば１５０℃以上の耐熱特性を有するシリコンラバーを素材として、詳細を省略するがヒートパイプ５の内孔５Ｃとほぼ等しい外径の嵌合部と、この嵌合部の一端側に周回りに一体に形成されたフランジ部とから形成される。各栓部材２３は、図５に示すように嵌合部を内孔５Ｃに嵌め込むことによりヒートパイプ５を閉管する。   In the plug member attaching step, as a pre-step of the sealing resin layer forming step, the plug resin members 23 and 23 are fitted into both end portions 5A and 5B of the heat pipe 5 protruding from the semiconductor chip 3 so that the sealing resin material is contained inside. Do not enter the hole 5C. The plug member mounting step is performed by using a silicon rubber having a heat resistance of, for example, 150 ° C. or more for each plug member 23 as a raw material, and a fitting portion having an outer diameter substantially equal to the inner hole 5C of the heat pipe 5; It is formed from a flange portion integrally formed around one end side of the fitting portion. Each plug member 23 closes the heat pipe 5 by fitting the fitting portion into the inner hole 5C as shown in FIG.

封止樹脂層形成工程は、例えば積層中間体２６を装填するに足る大きさのキャビティを有する略ポット型の固定金型２４Ａと、この固定金型２４Ａに対して接離動作される可動金型２４Ｂとにより構成される成形金型２４が用いられて封止樹脂層６を形成する。封止樹脂層形成工程は、固定金型２４Ａのキャビティ内において上述した封止樹脂層６を形成する樹脂素材が予め溶融状態とされて充填されており、可動金型２４Ｂを型開きした状態で積層中間体２６をヒートパイプ５の接合部位側から装填する。封止樹脂層形成工程においては、この場合に図６に示すようにインタポーザ２の第２主面２Ｂ側が溶融樹脂に浸らないようにして成形金型２４内に装填する。   The sealing resin layer forming step includes, for example, a substantially pot-shaped fixed mold 24A having a cavity large enough to load the laminated intermediate body 26, and a movable mold that is moved toward and away from the fixed mold 24A. The sealing resin layer 6 is formed by using a molding die 24 composed of 24B. In the sealing resin layer forming step, the resin material for forming the sealing resin layer 6 is filled in advance in the cavity of the fixed mold 24A, and the movable mold 24B is opened. The laminated intermediate body 26 is loaded from the joining site side of the heat pipe 5. In the sealing resin layer forming step, in this case, as shown in FIG. 6, the second main surface 2B side of the interposer 2 is loaded into the molding die 24 so as not to be immersed in the molten resin.

封止樹脂層形成工程は、成形金型２４が、キャビティ内に積層中間体２６を装填した状態で固定金型２４Ａに対して可動金型２４Ｂを移動させて型締めが行われるとともに、所定圧力までに圧縮動作が行われる。封止樹脂層形成工程は、可動金型２４Ｂをわずかに開いてキャビティ内に溜まったガスを抜き、再び型締めを行った状態で所定の圧力をかけながら加熱成形を行う。封止樹脂層形成工程は、この状態で所定の時間を保持して樹脂素材を硬化させた後に成形金型２４を型開きしてインタポーザ２の第１主面２Ａ上に半導体チップ３と両端部５Ａ、５Ｂを露出させて埋め込む封止樹脂層６を形成した中間体２５を取り出す。   In the sealing resin layer forming step, the mold 24 is clamped by moving the movable mold 24B relative to the fixed mold 24A in a state where the laminated intermediate body 26 is loaded in the cavity, and at a predetermined pressure. The compression operation is performed until this time. In the sealing resin layer forming step, the movable mold 24B is slightly opened to remove the gas accumulated in the cavity, and heat molding is performed while applying a predetermined pressure in a state where the mold is clamped again. In the sealing resin layer forming step, the resin material is cured while maintaining a predetermined time in this state, and then the molding die 24 is opened to form the semiconductor chip 3 and both end portions on the first main surface 2A of the interposer 2. The intermediate body 25 in which the sealing resin layer 6 is formed by exposing 5A and 5B to be taken out is taken out.

ジョイント部材取付け工程は、中間体２５に対して封止樹脂層６から露出されたヒートパイプ５の両端部５Ａ、５Ｂに嵌め込んだ栓部材２３、２３を取り外すとともに、ジョイント部材７、７をそれぞれ取り付けて図７に示した中間体２５を製作する。なお、ジョイント部材取付け工程は、必要に応じてヒートパイプ５の両端部５Ａ、５Ｂを切断して所定の長さに切りそろえた後に行うようにしてもよい。半導体装置１の製造工程においては、中間体２５に対してインタポーザ２の第２主面２Ｂ側に設けられた実装用パッド１０にそれぞれ半田ボール１１を取り付ける半田ボール取付工程が施され、図１に示した半導体装置１を完成する。   In the joint member attaching step, the plug members 23 and 23 fitted into the both ends 5A and 5B of the heat pipe 5 exposed from the sealing resin layer 6 with respect to the intermediate body 25 are removed, and the joint members 7 and 7 are respectively attached. The intermediate body 25 shown in FIG. In addition, you may make it perform a joint member attachment process, after cut | disconnecting both ends 5A and 5B of the heat pipe 5, and cutting them to predetermined length as needed. In the manufacturing process of the semiconductor device 1, a solder ball mounting process for mounting the solder balls 11 to the mounting pads 10 provided on the second main surface 2B side of the interposer 2 with respect to the intermediate body 25 is performed. The semiconductor device 1 shown is completed.

以上の工程を経て製造された各半導体装置１、２０は、図３に示すようにマザー基板１２にそれぞれ実装される。各半導体装置１、２０は、適宜の実装機等が用いられて、上述したようにマザー基板１２に対してそれぞれのインタポーザ２の第２主面２Ｂ側に形成した実装用パッド１０とマザー基板１２側の相対するパッドとを位置合わせして並べて載置される。各半導体装置１、２０は、この状態でそれぞれに搭載されたヒートパイプ５・１、５・２０が相対する端部を突き合わされ、ジョイント部材７・１Ａ、７・２０Ｂが接続される。各半導体装置１、２０は、ジョイント部材７・１Ｂに第１連結ヒートパイプ２２Ａが接続されるとともに、ジョイント部材７・２０Ａに第２連結ヒートパイプ２２Ｂが接続される。   The semiconductor devices 1 and 20 manufactured through the above steps are mounted on the mother substrate 12 as shown in FIG. For each semiconductor device 1, 20, an appropriate mounting machine or the like is used, and the mounting pad 10 and the mother substrate 12 formed on the second main surface 2 </ b> B side of each interposer 2 with respect to the mother substrate 12 as described above. The opposite pads on the side are aligned and placed side by side. In each of the semiconductor devices 1 and 20, the opposite ends of the heat pipes 5, 1, 5, and 20 mounted in this state are abutted to each other, and the joint members 7, 1 A, 7, and 20 B are connected. In each of the semiconductor devices 1 and 20, the first connection heat pipe 22A is connected to the joint members 7 and 1B, and the second connection heat pipe 22B is connected to the joint members 7 and 20A.

各半導体装置１、２０は、この状態で例えばリフロー半田槽に供給されてリフロー半田処理が施されることによりバンプ１３が溶融硬化してそれぞれ対応する各パッドに接続されてマザー基板１２上に実装されて回路基板装置２１を製造する。回路基板装置２１は、第１連結ヒートパイプ２２Ａと第２連結ヒートパイプ２２Ｂが他端側を放熱装置１５と接続される。   In this state, the semiconductor devices 1 and 20 are supplied to, for example, a reflow solder bath and subjected to a reflow soldering process, whereby the bumps 13 are melted and hardened and connected to the corresponding pads and mounted on the mother substrate 12. Thus, the circuit board device 21 is manufactured. In the circuit board device 21, the first connection heat pipe 22 </ b> A and the second connection heat pipe 22 </ b> B are connected to the heat dissipation device 15 at the other end side.

回路基板装置２１においては、冷却媒体封入工程により、ヒートパイプ５の内孔５Ｃから空気抜きを行うとともに冷却媒体が封入される。回路基板装置２１は、上述したように各半導体装置１、２０において半導体チップ３にほぼ直接接触されるようにして裏面３Ｂ上にヒートパイプ５を接合するとともに、このヒートパイプ５を放熱装置１５と接続して循環型のヒートパイプ構造を構成する。したがって、回路基板装置２１においては、各半導体チップ３からの発生熱がヒートパイプ５を介して放熱装置１５に伝導されて効率よく放熱を行うことが可能となる。回路基板装置２１においては、各半導体装置１、２０が薄型化されており、全体として薄型化が保持される。   In the circuit board device 21, air is vented from the inner hole 5 </ b> C of the heat pipe 5 and the cooling medium is sealed in the cooling medium sealing step. As described above, the circuit board device 21 joins the heat pipe 5 on the back surface 3B so as to be in direct contact with the semiconductor chip 3 in each of the semiconductor devices 1 and 20, and the heat pipe 5 is connected to the heat dissipation device 15. Connected to form a circulating heat pipe structure. Therefore, in the circuit board device 21, heat generated from each semiconductor chip 3 is conducted to the heat radiating device 15 through the heat pipe 5, so that heat can be efficiently radiated. In the circuit board device 21, the semiconductor devices 1 and 20 are thinned, and the thinning is maintained as a whole.

なお、回路基板装置２１においては、リフロー半田工程の前工程おいてヒートパイプ接続工程を行うようにしたが、かかる工程順に限定されないことは勿論である。回路基板装置２１は、例えばヒートパイプ５に栓部材２３を取り付けた状態のまま半導体装置１、２０をマザー基板１２に実装し、実装状態で栓部材２３を取り外すとともにジョイント部材７を取り付けながらヒートパイプ５間を接続するようにしてもよい。   In the circuit board device 21, the heat pipe connection process is performed before the reflow soldering process, but it is needless to say that the order is not limited. For example, the circuit board device 21 mounts the semiconductor devices 1 and 20 on the mother board 12 with the plug member 23 attached to the heat pipe 5, removes the plug member 23 in the mounted state, and attaches the joint member 7 to the heat pipe. You may make it connect between five.

上述した実施の形態においては、半導体チップ３をインタポーザ２に実装し、このインタポーザ２を介してマザー基板１２に実装して回路基板装置２１を構成するようにしたが、本発明はかかる実施の形態に限定されるものでは無い。本発明は、例えば図１０に示すようにシリコンウェハー３０上で多数個の半導体チップ３１を形成する半導体プロセスにおいて、いわゆるウェハー状態の各半導体チップ３１上に跨って放熱樹脂層３２を介してヒートパイプ３２を接合するようにしてもよい。   In the above-described embodiment, the semiconductor chip 3 is mounted on the interposer 2 and mounted on the mother board 12 via the interposer 2 to configure the circuit board device 21. However, the present invention is not limited to this embodiment. It is not limited to. In the semiconductor process of forming a large number of semiconductor chips 31 on a silicon wafer 30 as shown in FIG. 10, for example, the present invention extends over each semiconductor chip 31 in a so-called wafer state via a heat radiating resin layer 32. 32 may be joined.

半導体プロセスにおいては、ヒートパイプ３２を接合した状態で、従来と同様にシリコンウェハー３０上にコンプレッションモールド法により封止樹脂層が形成される。半導体プロセスにおいては、ダイシング工程により切り分けを行うことにより、ヒートパイプ３２を一体化した半導体チップ３１が形成される。   In the semiconductor process, the sealing resin layer is formed on the silicon wafer 30 by the compression molding method in the state where the heat pipe 32 is joined. In the semiconductor process, the semiconductor chip 31 in which the heat pipes 32 are integrated is formed by performing a dicing process.

実施の形態として示す半導体装置の要部断面図である。It is principal part sectional drawing of the semiconductor device shown as embodiment. 他の実施の形態として示す半導体装置の要部断面図である。It is principal part sectional drawing of the semiconductor device shown as other embodiment. 複数の半導体装置と放熱装置をマザー基板に実装した回路基板装置の要部断面図である。It is principal part sectional drawing of the circuit board apparatus which mounted the some semiconductor device and the heat radiating device in the mother board | substrate. 半導体装置の製造工程説明図であり、インタポーザに半導体チップをフリップチップ実装法により実装した図である。FIG. 4 is a diagram for explaining a manufacturing process of a semiconductor device, and is a diagram in which a semiconductor chip is mounted on an interposer by a flip chip mounting method. 同半導体チップ上にヒートパイプを接合した積層中間体の要部断面図である。It is principal part sectional drawing of the lamination | stacking intermediate body which joined the heat pipe on the semiconductor chip. 同コンプレッションモールド法により封止樹脂層を形成する要部断面図である。It is principal part sectional drawing which forms the sealing resin layer by the compression molding method. 同ジョイント部材取付工程を経た中間体の要部断面図である。It is principal part sectional drawing of the intermediate body which passed through the joint member attachment process. ヒートパイプの断面図である。It is sectional drawing of a heat pipe. ジョイント部材を介してヒートパイプを接続した状態の断面図である。It is sectional drawing of the state which connected the heat pipe via the joint member. ウェハー状態で各半導体チップに跨ってヒートパイプを接合した状態を示す平面図である。It is a top view which shows the state which joined the heat pipe straddling each semiconductor chip in a wafer state.

符号の説明Explanation of symbols

１ 半導体装置、２ インタポーザ、３ 半導体チップ、４ 放熱樹脂層、５ ヒートパイプ、６ 封止樹脂層、７ ジョイント部材、８ 電極、９ 電極接続パッド、１０ 実装用パッド、１１ 半田ボール、１２ マザー基板、１３ バンプ、１４ アンダフィル、１５ 放熱装置、１６ 酸化膜、２０ 半導体装置、２１ 回路基板装置、２２ 連結ヒートパイプ、２３ 栓部材、２４ 成形金型、２５ 中間体、２６ 積層中間体、３０ シリコンウェハー、３１ 半導体チップ、３２ ヒートパイプ   DESCRIPTION OF SYMBOLS 1 Semiconductor device, 2 interposer, 3 semiconductor chip, 4 heat radiation resin layer, 5 heat pipe, 6 sealing resin layer, 7 joint member, 8 electrode, 9 electrode connection pad, 10 mounting pad, 11 solder ball, 12 mother board , 13 Bump, 14 Underfill, 15 Heat dissipation device, 16 Oxide film, 20 Semiconductor device, 21 Circuit board device, 22 Connection heat pipe, 23 Plug member, 24 Mold, 25 Intermediate, 26 Laminated intermediate, 30 Silicon Wafer, 31 semiconductor chip, 32 heat pipe

Claims (5)

電極形成面に多数個の電極を形成した半導体チップと、第１主面に上記各電極と相対して多数個の電極接続パッドが形成されるとともに第２主面側に実装用パッドが形成された基板とを備え、上記半導体チップが上記基板に対して、上記電極形成面側を実装面として相対する上記各電極を上記電極接続パッド上にバンプにより接続するとともに対向面間にアンダフィルを充填して固定するフリップチップ実装法により第１主面上に実装されてなる半導体装置において、
上記半導体チップの上記電極形成面と対向する裏面上に放熱樹脂層を介して接合され、上記半導体チップよりも長軸でかつ外周部に絶縁膜が形成されるとともに内孔に冷却媒体を封入するヒートパイプと、
上記基板の第１主面上に絶縁樹脂材により形成され、上記半導体チップとともに端部を露出させた状態で上記ヒートパイプを埋設する封止樹脂層と、
上記ヒートパイプの上記封止樹脂層から露出された端部に取り付けられ、ヒートパイプや連結ヒートパイプを接続するジョイント部材とを備え、
上記半導体チップからの発生熱を上記ヒートパイプを介して放熱手段に伝達して放熱することを特徴とする半導体装置。 A semiconductor chip in which a large number of electrodes are formed on the electrode formation surface, a large number of electrode connection pads are formed on the first main surface opposite to the electrodes, and a mounting pad is formed on the second main surface side. The semiconductor chip is connected to the substrate with bumps on the electrode connection pads with the electrodes facing the electrode forming surface as a mounting surface, and underfill is filled between the opposing surfaces. In the semiconductor device mounted on the first main surface by the flip chip mounting method to be fixed
The semiconductor chip is bonded to the back surface of the semiconductor chip opposite to the electrode formation surface via a heat-dissipating resin layer, and an insulating film is formed on the outer periphery of the long axis of the semiconductor chip and a cooling medium is sealed in the inner hole. Heat pipes,
A sealing resin layer that is formed of an insulating resin material on the first main surface of the substrate and embeds the heat pipe in a state in which an end portion is exposed together with the semiconductor chip;
It is attached to the end exposed from the sealing resin layer of the heat pipe, and includes a joint member that connects the heat pipe and the connection heat pipe,
A semiconductor device characterized in that heat generated from the semiconductor chip is transferred to the heat radiating means via the heat pipe to radiate heat. 上記基板の第１主面上に、複数個の上記半導体チップが並べられて実装されるとともに上記ヒートパイプが上記各半導体チップの上記裏面上に這わされて配置され、上記封止樹脂層が上記各半導体チップとともに端部を露出させた状態で上記ヒートパイプを埋設して形成されることを特徴とする請求項１に記載の半導体装置。   A plurality of the semiconductor chips are arranged and mounted on the first main surface of the substrate, and the heat pipe is disposed on the back surface of each of the semiconductor chips. The semiconductor device according to claim 1, wherein the heat pipe is embedded and the end portion is exposed together with each semiconductor chip. 上記ヒートパイプが、少なくとも上記半導体チップの上記裏面と対向する部位を平坦形状とされるとともに表面が粗面に形成されることを特徴とする請求項１に記載の半導体装置。   2. The semiconductor device according to claim 1, wherein at least a portion of the heat pipe facing the back surface of the semiconductor chip has a flat shape and a surface is formed to be a rough surface. 電極形成面に多数個の電極を形成した半導体チップと、第１主面に上記各電極と相対して多数個の電極接続パッドが形成されるとともに第２主面側に実装用パッドが形成された基板とを備え、上記半導体チップが上記基板に対して、上記電極形成面側を実装面として相対する上記各電極を上記電極接続パッド上にバンプにより接続するとともに対向面間にアンダフィルを充填して固定するフリップチップ実装法により第１主面上に実装されてなる半導体装置の製造方法において、
外周部に絶縁膜が形成されるとともに内孔に冷却媒体を封入するヒートパイプを、上記半導体チップの上記電極形成面との対向面上に放熱樹脂層を介して接合するヒートパイプ接合工程と、
上記ヒートパイプの両端部に耐熱性の栓部材を取り付けて内孔を閉塞する栓部材取付け工程と、
成形金型により上記基板の第１主面上に、上記半導体チップとともに端部を露出させた状態で上記ヒートパイプを埋設する絶縁樹脂材からなる封止樹脂層を形成する封止樹脂層成形工程と、
上記封止樹脂層から露出された上記ヒートパイプの端部から上記栓部材を取り外すとともに、ジョイント部材を取り付けるジョイント部材取付け工程と、
上記ヒートパイプの内孔から空気抜きを行うとともに上記冷却媒体を封入する冷却媒体封入工程とを有し、
上記ヒートパイプを放熱手段に接続して上記半導体チップからの発生熱が放熱される半導体装置を製造することを特徴とする半導体装置の製造方法。 A semiconductor chip in which a large number of electrodes are formed on the electrode formation surface, a large number of electrode connection pads are formed on the first main surface opposite to the electrodes, and a mounting pad is formed on the second main surface side. The semiconductor chip is connected to the substrate with bumps on the electrode connection pads with the electrodes facing the electrode forming surface as a mounting surface, and underfill is filled between the opposing surfaces. In the manufacturing method of the semiconductor device mounted on the first main surface by the flip chip mounting method to be fixed,
A heat pipe joining step in which an insulating film is formed on the outer peripheral portion and a heat pipe that encloses a cooling medium in an inner hole is joined to a surface facing the electrode forming surface of the semiconductor chip via a heat dissipation resin layer;
A plug member attaching step of attaching a heat-resistant plug member to both ends of the heat pipe to close the inner hole,
A sealing resin layer molding step of forming a sealing resin layer made of an insulating resin material in which the heat pipe is embedded with the semiconductor chip being exposed on the first main surface of the substrate by a molding die When,
Removing the plug member from the end of the heat pipe exposed from the sealing resin layer, and a joint member attaching step of attaching a joint member;
A cooling medium enclosing step of performing air venting from the inner hole of the heat pipe and enclosing the cooling medium,
A method of manufacturing a semiconductor device, wherein the heat pipe is connected to a heat radiating means to manufacture a semiconductor device from which heat generated from the semiconductor chip is radiated. 電極形成面に多数個の電極を形成した半導体チップと、第１主面に上記各電極と相対して多数個の電極接続パッドが形成されるとともに第２主面側に実装用パッドが形成された基板とを備え、上記半導体チップが上記基板に対して、上記電極形成面側を実装面として相対する上記各電極を上記電極接続パッド上にバンプにより接続するとともに対向面間にアンダフィルを充填して固定するフリップチップ実装法により第１主面上に実装されてなる少なくとも１個以上の半導体装置を、上記基板の第２主面に設けた実装用バンプを介してマザー基板に実装してなる回路基板装置において、
上記半導体装置が、上記半導体チップの上記電極形成面と対向する裏面上に放熱樹脂層を介して接合され上記半導体チップよりも長軸でかつ外周部に絶縁膜が形成されるとともに内孔に冷却媒体を封入するヒートパイプと、上記基板の第１主面上に絶縁樹脂材により形成されて上記半導体チップとともに端部を露出させた状態で上記ヒートパイプを埋設する封止樹脂層と、上記ヒートパイプの上記封止樹脂層から露出された端部に取り付けたジョイント部材とを備え、
上記マザー基板に実装した状態で、上記ヒートパイプが上記ジョイント部材を介して隣り合って実装された半導体装置の上記ヒートパイプ或いは連結ヒートパイプを介して放熱手段と接続されることにより、上記半導体チップからの発生熱が放熱されることを特徴とする回路基板装置。 A semiconductor chip in which a large number of electrodes are formed on the electrode formation surface, a large number of electrode connection pads are formed on the first main surface opposite to the electrodes, and a mounting pad is formed on the second main surface side. The semiconductor chip is connected to the substrate with bumps on the electrode connection pads with the electrodes facing the electrode forming surface as a mounting surface, and underfill is filled between the opposing surfaces. Mounting at least one semiconductor device mounted on the first main surface by a flip chip mounting method to be fixed to the mother substrate via mounting bumps provided on the second main surface of the substrate. In the circuit board device
The semiconductor device is bonded to the back surface of the semiconductor chip opposite to the electrode forming surface via a heat-dissipating resin layer, has an axis longer than the semiconductor chip and an insulating film is formed on the outer peripheral portion, and is cooled in the inner hole. A heat pipe that encloses the medium; a sealing resin layer that is formed of an insulating resin material on the first main surface of the substrate and has the end portion exposed together with the semiconductor chip; and the heat resin A joint member attached to the end exposed from the sealing resin layer of the pipe,
In the state mounted on the mother substrate, the heat pipe is connected to the heat radiation means via the heat pipe or the connected heat pipe of the semiconductor device mounted adjacently via the joint member, whereby the semiconductor chip A circuit board device characterized in that heat generated from the heat is radiated.
JP2006128635A 2006-05-02 2006-05-02 Semiconductor device, manufacturing method thereof, and circuit board device Expired - Fee Related JP4978054B2 (en)

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WO2009143682A1 (en) * 2008-05-27 2009-12-03 华为技术有限公司 A heat dissipating device for a circuit board with embedded components and a fabrication method thereof
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CN104022088A (en) * 2013-02-28 2014-09-03 阿尔特拉公司 Heat pipe in overmolded flip chip package
JP5554444B1 (en) * 2013-09-02 2014-07-23 株式会社フジクラ Compound package cooling structure
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