JPH11112173A - Mounting structure member of electronic apparatus - Google Patents

Mounting structure member of electronic apparatus

Info

Publication number
JPH11112173A
JPH11112173A JP26557997A JP26557997A JPH11112173A JP H11112173 A JPH11112173 A JP H11112173A JP 26557997 A JP26557997 A JP 26557997A JP 26557997 A JP26557997 A JP 26557997A JP H11112173 A JPH11112173 A JP H11112173A
Authority
JP
Japan
Prior art keywords
printed wiring
wiring board
mounting structure
electronic device
motherboard
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP26557997A
Other languages
Japanese (ja)
Other versions
JP2988453B2 (en
Inventor
Kazuyuki Mitsukubo
和幸 三窪
Sakae Hojo
栄 北城
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP26557997A priority Critical patent/JP2988453B2/en
Publication of JPH11112173A publication Critical patent/JPH11112173A/en
Application granted granted Critical
Publication of JP2988453B2 publication Critical patent/JP2988453B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Abstract

PROBLEM TO BE SOLVED: To realize a mounting structure member and a connecting method of an electronic apparatus of high reliability in which thermal and mechanical stress of a semiconductor package is relieved, and heat is effectively dissipated with thermal conduction system. SOLUTION: A mother board 10A is arranged above a cabinet of an electronic apparatus to be mounted and connected with an inner circuit of a printed wiring board 1A by using lead wires 8. The printed wiring board 1A is so wholly turned over that flip chips 3 are positioned below the printed wiring board 1A. The flip chips 3 are directly bonded to a heat dissipating plate 12 of high thermal conductivity which is collectively built in an integrity with a metal plate 14 below the cabinet, interposing thermally conductive sheets 11 stuck on the backside of the flip chips 3.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は電子機器の実装構造
体に関し、特にフリップチップ型半導体パッケージに格
納した半導体集積回路を用いるサブノートパソコン等の
携帯用電子機器などの電子機器の実装構造体に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mounting structure of an electronic device, and more particularly to a mounting structure of an electronic device such as a portable electronic device such as a sub-notebook personal computer using a semiconductor integrated circuit stored in a flip-chip type semiconductor package. .

【0002】 〔発明の詳細な説明〕[Detailed description of the invention]

【従来の技術】最近の電子機器の技術動向において、特
にサブノートパソコンで代表される携帯用電子機器で
は、超小型・薄型サイズの筐体に高速かつ高機能のマイ
クロプロセッサを搭載する動きが活発化し、しかもコス
ト的に優位な実装構造が望まれている。
2. Description of the Related Art In recent technical trends of electronic devices, particularly in portable electronic devices represented by sub-notebook personal computers, there is an active movement to mount a high-speed and high-performance microprocessor in an ultra-small and thin size casing. There is a demand for a mounting structure that is more cost effective.

【0003】これらの要求に対し、プリント配線板表面
に低誘電率の絶縁体と導体からなる微細な薄膜多層配線
層を有し、この薄膜多層配線層上にはマイクロプロセッ
サを含む複数のフリップチップ型半導体パッケージに格
納した半導体集積回路(以下フリップチップ)を搭載す
る半導体パッケージ技術が開発されている。
To meet these demands, a printed wiring board surface has a fine thin-film multilayer wiring layer made of an insulator and a conductor having a low dielectric constant, and a plurality of flip chips including a microprocessor are provided on the thin-film multilayer wiring layer. 2. Description of the Related Art A semiconductor package technology for mounting a semiconductor integrated circuit (hereinafter, flip chip) stored in a semiconductor package has been developed.

【0004】この種の従来の電子機器の実装構造体を断
面図で示す図6を参照すると、この従来の電子機器の実
装構造体は、裏面に配線パッドを有し表面に薄膜多層配
線層2を形成したプリント配線板1と、薄膜多層配線層
2上に金属バンプ4を介して接合することにより搭載し
た複数のフリップチップ3と、表面及び裏面に配線パッ
ドを有するマザーボード10と、プリント配線板1の裏
面側の配線パッドとマザーボード10の表面側の配線パ
ッドとを接合する金属バンプ20と、フリップチップ3
裏面側に貼り付けた熱伝導性シート11と、筐体上部の
アルミ板21と、アルミ板21と接合されさらに熱伝導
性シート11の上部に貼り付けられた高熱伝導性の放熱
板12とを備える。
Referring to FIG. 6, which is a cross-sectional view of a mounting structure of a conventional electronic device of this type, the mounting structure of the conventional electronic device has a wiring pad on a back surface and a thin-film multilayer wiring layer 2 on a front surface. A plurality of flip chips 3 mounted on the thin-film multilayer wiring layer 2 via metal bumps 4, a mother board 10 having wiring pads on the front and back surfaces, and a printed wiring board 1. A metal bump 20 for joining a wiring pad on the back surface side of the motherboard 10 to a wiring pad on the front surface side of the motherboard 10;
The heat conductive sheet 11 stuck on the back side, the aluminum plate 21 in the upper part of the housing, and the high heat conductive heat radiating plate 12 bonded to the aluminum plate 21 and stuck on the top of the heat conductive sheet 11 Prepare.

【0005】次に、図6を参照して、従来の電子機器の
実装構造体の動作について説明すると、まず、半導体パ
ッケージをマザーボード10へ接続する方法として、プ
リント配線板1の裏面側の配線パッドと、マザーボード
10の表面側の配線パッドとを金属バンプ20を介し接
合する公知のBGA(Ball Grid Arra
y)方式を採用している。
Next, the operation of a conventional mounting structure for electronic equipment will be described with reference to FIG. 6. First, as a method of connecting a semiconductor package to a motherboard 10, wiring pads on the back side of the printed wiring board 1 are used. And a wiring pad on the front side of the motherboard 10 via a metal bump 20 to join a well-known BGA (Ball Grid Array).
y) method is adopted.

【0006】また、複数個のフリップチップ3を高密度
に搭載する最近の実装技術においては、単位面積当たり
の発熱密度の上昇による熱の問題があるため、この従来
の実装構造の放熱構造は、図に示すように、フリップチ
ップ3の裏面側に熱伝導性シート11を貼り付け、さら
にこの熱伝導性シート11上に筐体上部のアルミ板21
と接合された高熱伝導性の放熱板12を搭載した構造を
とっている。
Further, in a recent mounting technique in which a plurality of flip chips 3 are mounted at a high density, there is a problem of heat due to an increase in heat generation density per unit area. As shown in the figure, a heat conductive sheet 11 is stuck on the back side of the flip chip 3, and an aluminum plate 21 at the top of the housing is further placed on the heat conductive sheet 11.
And a heat-dissipating plate 12 having a high thermal conductivity joined to the heat-dissipating plate.

【0007】さらに、図示していないが、放熱構造とし
ては、図示した放熱板12の他にもフリップチップ裏面
に直接接合した放熱フィンやマイクロファンあるいはヒ
ートパイプなどを搭載する例が報告されている。
Further, although not shown, examples of mounting a radiating fin, a microfan, a heat pipe, or the like directly bonded to the flip chip back surface in addition to the illustrated radiating plate 12 have been reported as the radiating structure. .

【0008】上述した従来の電子機器の実装構造体で
は、薄膜多層配線層2とフリップチップ3とを接合する
金属バンプ4に対し応力が集中する構造上の問題があ
る。
The above-mentioned conventional electronic device mounting structure has a structural problem that stress concentrates on the metal bumps 4 joining the thin-film multilayer wiring layer 2 and the flip chip 3.

【0009】上述のように、フリップチップ3の素子面
側の電極パッドが金属バンプ4で薄膜多層配線層2の配
線パッドとリジッドに接合され、さらにプリント配線板
1の下面の接続パッドが金属バンプ20によりマザーボ
ード10の接続パッドとリジッドに接合されている。
As described above, the electrode pads on the element surface side of the flip chip 3 are rigidly connected to the wiring pads of the thin-film multilayer wiring layer 2 by the metal bumps 4, and the connection pads on the lower surface of the printed wiring board 1 are connected to the metal bumps. The connection pad 20 is rigidly connected to the connection pads of the motherboard 10.

【0010】一方、フリップチップ3の裏面側は放熱板
12がリジッドに接合されていることから、この構造で
は金属バンプ4の接合部に対して、熱的・機械的応力が
集中し過剰なストレスがかかり易い。
On the other hand, since the heat radiating plate 12 is rigidly joined to the back surface of the flip chip 3, in this structure, thermal and mechanical stress concentrates on the joint of the metal bump 4, and excessive stress is applied. Is easily applied.

【0011】また、筐体上部のアルミ板21に熱拡散す
る構造となっているので、図に示す筐体上部アルミ板上
にはキーボード15が備えられていることからキーボー
ド表面温度が上昇する。
Further, since the structure is such that heat is diffused to the aluminum plate 21 at the upper part of the housing, the keyboard surface temperature rises because the keyboard 15 is provided on the aluminum plate at the upper part of the housing as shown in the figure.

【0012】[0012]

【発明が解決しようとする課題】上述した従来の電子機
器の実装構造体は、フリップチップの素子面側の電極パ
ッドが金属バンプで薄膜多層配線層の配線パッドとリジ
ッドに接合され、さらにプリント配線板の下面の接続パ
ッドが金属バンプによりマザーボードの接続パッドとリ
ジッドに接合され、さらに、フリップチップの裏面側に
放熱板がリジッドに接合されていることから、上記薄膜
多層配線層とフリップチップとを接合する金属バンプに
対し応力が集中し、信頼性低下の要因となるという欠点
があった。
In the above-mentioned conventional electronic device mounting structure, the electrode pads on the element surface side of the flip chip are rigidly joined to the wiring pads of the thin-film multilayer wiring layer by metal bumps, and the printed wiring is further provided. The connection pads on the lower surface of the board are bonded to the connection pads of the motherboard and rigid by metal bumps, and the heat sink is rigidly bonded to the back side of the flip chip. There is a drawback that stress concentrates on the metal bump to be joined, which causes a reduction in reliability.

【0013】また、筐体上部のアルミ板に熱拡散する構
造となっているので、このアルミ板上に設けたキーボー
ドの表面温度が上昇するという欠点があった。
In addition, since the structure is such that heat is diffused to the aluminum plate on the upper part of the housing, there is a disadvantage that the surface temperature of the keyboard provided on the aluminum plate rises.

【0014】本発明の目的は、上記欠点を解決し、携帯
用電子機器などの超薄型サイズにも適用可能で、特定の
接合箇所への応力集中を防止するとともに優れた放熱性
能により信頼性低下の要因を除去した電子機器の実装構
造体を提供することにある。
An object of the present invention is to solve the above-mentioned drawbacks and to be applicable to an ultra-thin size such as a portable electronic device. An object of the present invention is to provide a mounting structure of an electronic device in which a cause of deterioration is eliminated.

【0015】[0015]

【課題を解決するための手段】本発明の電子機器の実装
構造体は、内部回路として表面に形成した低誘電率の絶
縁体と導体からなる薄膜多層配線層上に金属バンプを介
して接合することにより複数のリップチップ型半導体パ
ッケージに格納した半導体集積回路(以下フリップチッ
プ)を搭載したプリント配線板と、前記プリント配線板
の前記内部回路と外部回路とのインタフエース用のマザ
ーボードと、前記内部回路の発生熱を放熱する放熱板と
備える電子機器の実装構造体において、前記マザーボー
ドを実装対象電子機器の筐体上部に配置して前記プリン
ト配線板の前記内部回路と機械的に柔軟な状態で電気的
に接続し、前記フリップチップが前記プリント配線板の
下側になるよう前記プリント配線板ごと倒置し、前記フ
リップチップをこのフリップチップ裏面側に貼り付けた
熱伝導性シートを介して前記筐体下部の金属板と一体化
された高熱伝導性の前記放熱板に直接接合することを特
徴とするものである。
A mounting structure for an electronic device according to the present invention is bonded via a metal bump to a thin-film multilayer wiring layer composed of an insulator and a conductor having a low dielectric constant formed on the surface as an internal circuit. A printed wiring board mounted with a semiconductor integrated circuit (hereinafter, flip chip) stored in a plurality of lip-chip type semiconductor packages; a motherboard for interfacing the internal circuit and the external circuit of the printed wiring board; In a mounting structure of an electronic device provided with a radiator plate for radiating heat generated by a circuit, the motherboard is disposed above a housing of the electronic device to be mounted, and the internal circuit of the printed wiring board is mechanically flexible. Electrically connected, flip the flip-chip together with the printed circuit board so that the flip chip is below the printed circuit board. It is characterized in that directly joined to the heat radiating plate of the integrated high thermal conductivity and the housing bottom of the metal plate via the pasted thermally conductive sheet in a flip-chip backside.

【0016】[0016]

【発明の実施の形態】次に、本発明の実施の形態を図6
と共通の構成要素には共通の参照文字/数字を付して同
様に断面図で示す図1を参照すると、この図に示す本実
施の形態の電子機器の実装構造体は、従来と共通である
が倒立して配置され薄膜多層配線層2上に金属バンプ4
を介して接合することにより搭載した複数のフリップチ
ップ3と、フリップチップ3の裏面側に貼り付けた熱伝
導性シート11と熱伝導性シート11の下部に貼り付け
られた高熱伝導性の放熱板12とに加えて、従来に対し
倒立して配置され配線接続用の複数の外部入出力ピン5
を挿入するスルーホール16を有し表面に従来と共通の
薄膜多層配線層2を形成したプリント配線板1Aと、リ
ード線8を備え入出力ピン5の各々に嵌合し電気的/機
械的接続を行うU字型接続金具6と、U字型接続金具6
のリード線8とマザーボード10Aとの電気的接続を行
う接続端子9を備えるソケット7と、筐体最上部に配置
され接続端子9が嵌合する配線用のスルーホールを有す
るマザーボード10Aと、上面に放熱板12を接合した
筐体下部のアルミ板14とを備える。
Next, an embodiment of the present invention will be described with reference to FIG.
Referring to FIG. 1 also shown in a cross-sectional view with common reference characters / numerals attached to the same components as those of FIG. 1, the mounting structure of the electronic apparatus of the present embodiment shown in FIG. There is a metal bump 4 on the thin-film multilayer wiring layer 2
, A plurality of flip chips 3 mounted by bonding via a heat conductive sheet 11, a heat conductive sheet 11 bonded to the back side of the flip chip 3, and a heat conductive plate bonded to a lower portion of the heat conductive sheet 11 12 and a plurality of external input / output pins 5 for wiring connection,
A printed wiring board 1A having a through-hole 16 into which a thin film multilayer wiring layer 2 common to the conventional one is formed, and a lead wire 8 fitted to each of the input / output pins 5 for electrical / mechanical connection U-shaped connection fitting 6 for performing
A socket 7 having a connection terminal 9 for making an electrical connection between the lead wire 8 and the motherboard 10A, a motherboard 10A having a wiring through hole arranged at the top of the housing and having the connection terminal 9 fitted therein, And an aluminum plate 14 at the lower part of the housing to which the heat sink 12 is joined.

【0017】次に、図1を参照して本実施の形態の機能
動作について説明すると、まず、フリップチップ3から
発生する熱を効率よく放熱するため放熱板12をベース
として最下部に配置した実装構造を採用した。図示のよ
うに、フリップチップ3の裏面側が下側となるよう半導
体パッケージを上下反転し、さらに半導体パッケージの
外部入出力ピン5側を後述する応力緩和の接続手段をと
ることで、フリップチップ3の裏面側に伝熱面積が大き
く、しかも高熱伝導率でコスト的に安価な銅板からなる
大型の放熱板12を接合することができるので、以下に
述べるように、放熱比率80%以上もの熱を放熱するた
めの実装構造が実現可能となる。
Next, the functional operation of the present embodiment will be described with reference to FIG. 1. First, in order to efficiently radiate the heat generated from the flip chip 3, there is provided a mounting plate disposed at the lowermost position with the heat radiating plate 12 as a base. Adopted structure. As shown in the figure, the semiconductor package is turned upside down so that the back side of the flip chip 3 is on the lower side, and the external input / output pins 5 of the semiconductor package are connected by means of stress relaxation, which will be described later. Since a large heat radiating plate 12 made of a copper plate having a large heat transfer area, a high thermal conductivity, and a low cost can be joined to the rear surface side, a heat radiating ratio of 80% or more is radiated as described below. This makes it possible to realize a mounting structure for performing the operation.

【0018】この放熱構造の決定に関し、上述の従来の
実装構造において、フリップチップ3の裏面側にアルミ
ニウムや銅等の材質や伝熱面積に関係するサイズなどを
変えた数種類の放熱板を接合して比較した結果、総発熱
量のうち放熱比率約40%〜最大80%以上もの熱が放
熱板を通過することが明らかになった。他の放熱経路で
は、金属バンプ4からプリント配線板1への放熱比率は
15%程度、フリップチップ3のサイドから周辺空気中
への放熱比率は5%程度であった。したがって、フリッ
プチップ3の裏面から放熱する実装構造を最適化すれば
圧倒的な放熱効果を得ることがわかった。
Regarding the determination of the heat radiating structure, in the above-described conventional mounting structure, several types of heat radiating plates having different materials such as aluminum and copper and sizes related to the heat transfer area are joined to the back surface of the flip chip 3. As a result, it became clear that, of the total heat generation, heat having a heat radiation ratio of about 40% to 80% or more passed through the heat radiating plate. In the other heat dissipation paths, the heat dissipation rate from the metal bumps 4 to the printed wiring board 1 was about 15%, and the heat dissipation rate from the side of the flip chip 3 to the surrounding air was about 5%. Therefore, it has been found that an overwhelming heat radiation effect can be obtained by optimizing the mounting structure that radiates heat from the back surface of the flip chip 3.

【0019】さらに、従来の実装構造のように、マザー
ボード10がベースとなる実装構造では、本実施の形態
のような大型かつ必然的に大重量の放熱板12を搭載す
るとフリップチップ3の金属バンプ4の接合部に対し重
力による負荷がかかり、信頼性低下要因となる。しあた
がって、本実施の形態のように放熱板12を最下部に配
置することによりかかる信頼性低下要因は除去される。
Further, in the mounting structure based on the motherboard 10 as in the conventional mounting structure, when the large and inevitably heavy heat sink 12 is mounted as in the present embodiment, the metal bumps of the flip chip 3 are mounted. A load due to gravity is applied to the joint of No. 4, which causes a reduction in reliability. Therefore, by disposing the heat radiating plate 12 at the lowermost portion as in the present embodiment, such a factor of reducing reliability is eliminated.

【0020】また、筐体下部のアルミ板に放熱する構造
のためキーボード表面温度上昇を抑えることができる。
In addition, the structure in which heat is dissipated to the aluminum plate at the bottom of the housing can suppress a rise in keyboard surface temperature.

【0021】次に、熱・機械応力緩和のため、半導体パ
ッケージ(フリップチップ3)を上下反転した実装方
法、及びリード線を用いたプリント配線板1とマザーボ
ード10A間の電気的接続方法を採用した。
Next, in order to alleviate thermal and mechanical stress, a method of mounting the semiconductor package (flip chip 3) upside down and an electrical connection method between the printed wiring board 1 and the motherboard 10A using lead wires are employed. .

【0022】まず、前者の半導体パッケージの上下反転
実装方法では、フリップチップ3を上下反転して下側の
放熱板と接続するので、従来のような放熱板の重力によ
るフリップチップ3の接合部などへの負荷を全く受ける
ことはない。
First, in the former method of mounting the semiconductor package upside down, the flip chip 3 is turned upside down and connected to the lower heat sink, so that the junction of the flip chip 3 due to the gravity of the heat sink as in the prior art is used. There is no load on the system.

【0023】次に、後者のリード線を用いた接続方法
は、従来の金属バンプ20を用いたBGA方式と異な
り、極細なリード線8を用い機械的な自由度をもたせて
接続する方法としたことにより、金属バンプ4に対する
過剰なストレスが緩和され、従来構造に比べ数段信頼性
が向上する。
Next, the latter connection method using a lead wire is different from the conventional BGA method using a metal bump 20 in that a connection method is provided with a mechanical degree of freedom using an extremely thin lead wire 8. As a result, excessive stress on the metal bumps 4 is reduced, and the reliability is improved by several steps as compared with the conventional structure.

【0024】次に、プリント配線板1下面に接続される
外部入出力ピン5の構成とその接続方法を外部入出力ピ
ン5がプリント配線板1から分離した状態と接合した状
態をそれぞれ模式的に断面図で示す図2(A),(B)
を参照すると、外部入出力ピン5は、先端の球状部50
と、プリント配線板1内に設けられた外部入出力用のス
ルーホール16に電気的に接続するための挿入部52
と、挿入位置を調整するためのストッパー51とを備え
る。
Next, the structure of the external input / output pins 5 connected to the lower surface of the printed wiring board 1 and the connection method thereof are schematically illustrated in a state where the external input / output pins 5 are separated from the printed wiring board 1 and a state where the external input / output pins 5 are joined. 2A and 2B shown in cross-sectional views
Referring to FIG. 3, the external input / output pin 5 is
And an insertion portion 52 for electrically connecting to an external input / output through hole 16 provided in the printed wiring board 1.
And a stopper 51 for adjusting the insertion position.

【0025】本実施の形態の例では、プリント配線板1
のサイズが50×50mm、外部入出力ピン数が約30
0ピン、外部入出力ピン配列が2.54mm格子のエリ
ア配列になっている。最近、この様なパッケージ仕様で
は従来の技術で説明したBGA方式による接続が良く用
いられているが、本実施の形態のピン挿入方式は、プリ
ント配線基板1内のスルーホール16のメッキ仕上がり
寸法を外部入出力ピン挿入部52の外径より50ミクロ
ンほど大きく仕上げ、図に示すように機械的押圧により
全てのピンを一括接合すると同時にストッパー51によ
り位置調整する。その後、スルーホール16の平坦性や
薄膜多層配線層2との接続信頼性を高めるために導電性
樹脂53を充填しておく。
In the example of this embodiment, the printed wiring board 1
Size is 50 × 50mm, number of external input / output pins is about 30
The pin 0 and the external input / output pin arrangement are 2.54 mm grid area arrangement. Recently, in such a package specification, connection by the BGA method described in the related art is often used. However, in the pin insertion method of the present embodiment, the plating finish dimension of the through hole 16 in the printed wiring board 1 is reduced. The external input / output pin insertion part 52 is finished to be larger than the outer diameter by about 50 microns, and all the pins are collectively joined by mechanical pressing as shown in the figure, and at the same time, the position is adjusted by the stopper 51. Thereafter, a conductive resin 53 is filled in order to improve the flatness of the through hole 16 and the reliability of connection with the thin-film multilayer wiring layer 2.

【0026】以上のことから、従来のBGA方式のよう
な金属バンプ形成や接続関連装置が不要となることや、
簡単に一括接合できるので短時間の組立が可能となるな
どコスト的に非常に優位な実装方式といえる。
From the above, it is not necessary to use metal bump formation and connection-related devices as in the conventional BGA method.
It can be said that it is a very superior mounting method in terms of cost, for example, because it is possible to easily perform the batch joining, so that it can be assembled in a short time.

【0027】次に、上下反転された半導体パッケージ
(フリップチップ3)がマザーボード10Aと接続され
た状態を拡大して模式的に断面図で示す図3を参照し
て、まず、図の最上部に示すマザーボード10A内のス
ルーホール40に接続端子9を介して接続されたソケッ
ト7の構成について説明すると、このソケット7は、接
続端子9と、U字型接続金具6と、接続端子とU字型接
続金具を電気的に接続するためのリード線8と、プラス
チック製のケース71とから構成される。
Next, referring to FIG. 3 which is an enlarged cross-sectional view schematically showing a state in which the inverted semiconductor package (flip chip 3) is connected to the motherboard 10A, first, at the top of the figure. The configuration of the socket 7 connected to the through hole 40 in the motherboard 10A through the connection terminal 9 will be described. The socket 7 includes a connection terminal 9, a U-shaped connection fitting 6, a connection terminal and a U-shaped connection. It is composed of a lead wire 8 for electrically connecting a connection fitting, and a plastic case 71.

【0028】ケース71は、接続端子を固着するための
溝72と、リード線8を一時的に収納するための溝73
と、U字型接続金具6を一時的に収納するための溝74
とを設ける。
The case 71 has a groove 72 for fixing the connection terminal and a groove 73 for temporarily storing the lead wire 8.
And a groove 74 for temporarily storing the U-shaped connection fitting 6.
Are provided.

【0029】接続端子9は、前述したように配列ピッチ
2.54mmと比較的広く一般的な挿入タイプの金属合
金製のピンを用いている。また、ケースの溝72に固着
するためのソケット固着部91を有する。なお、マザー
ボード10の実装密度を大きくする場合には、表面実装
タイプの接続端子を用いることが効果的となる。
As described above, the connection terminal 9 uses a relatively wide and general insertion type metal alloy pin having an arrangement pitch of 2.54 mm. In addition, it has a socket fixing portion 91 for fixing to the groove 72 of the case. In order to increase the mounting density of the motherboard 10, it is effective to use surface-mount type connection terminals.

【0030】次に、U字型接続金具6の構造を示す図4
(A)参照すると、このU字型接続金具6は、薄板をL
字型に曲げ加工し、L字板先端部60を外部入出力ピン
5先端の球状部50の外径より大きくなるように逆曲げ
加工しておき、割溝61ができるように4枚のL字型の
薄板をベース板62に組み込むことで、バネ効果を利用
して外部入出力ピン5の球状部50を電気的に確実に接
続するように包み込むことが可能となる。
Next, FIG. 4 shows the structure of the U-shaped connection fitting 6.
Referring to (A), this U-shaped connection fitting 6 has a thin plate L
The L-shaped plate end portion 60 is reversely bent so as to be larger than the outer diameter of the spherical portion 50 at the end of the external input / output pin 5, and four L-shaped plates are formed so as to form a split groove 61. By incorporating the letter-shaped thin plate into the base plate 62, the spherical portion 50 of the external input / output pin 5 can be wrapped so as to be surely electrically connected using the spring effect.

【0031】次に、接続端子9とU字型接続金具6とを
電気的に接続しているリード線8の接続方法及び組立方
法を示す図4(B)を参照すると、リード線8は可能な
限り短く線径は極細ほど望ましい。リード線8の接続方
法は、接続端子9のリード線接続部92をかしめ固定
し、一方のU字型接続金具6のリード線接続部63もか
しめ固定して組み立てたのち、接続端子9をソケット7
の溝72に挿入して固着するととともにリード線8を溝
73に収納し、最後にU字型接続金具6がフリッップチ
ップ3の上下反転時に落下しないよう収納しておく。
Next, referring to FIG. 4B, which shows a method of connecting and assembling a lead wire 8 for electrically connecting the connection terminal 9 and the U-shaped fitting 6, the lead wire 8 can be used. It is desirable that the wire diameter is as short as possible and the wire diameter is extremely thin. The lead wire 8 is connected by caulking and fixing the lead wire connection portion 92 of the connection terminal 9 and also caulking and fixing the lead wire connection portion 63 of one U-shaped connection fitting 6, and then connecting the connection terminal 9 to the socket. 7
The lead wire 8 is housed in the groove 73, and the U-shaped connection metal fitting 6 is housed so that the U-shaped connection metal fitting 6 does not fall when the flip chip 3 is turned upside down.

【0032】マザーボード10Aへのフリップチップ3
の接続は、フリップチップ3の裏面側が下側になるよう
上下反転したのち、U字型接続金具6に対し、外部入出
力ピン5の先端の球状部30を位置合わせして機械的押
圧で一括接合して組み立てる。
Flip chip 3 to motherboard 10A
After the flip chip 3 is turned upside down so that the back side of the flip chip 3 is on the lower side, the spherical portion 30 at the tip of the external input / output pin 5 is aligned with the U-shaped connection metal fitting 6 and is collectively pressed by mechanical pressing. Join and assemble.

【0033】次に、マザーボード10Aと接続された半
導体パッケージ(フリップチップ3)と放熱板12との
最終的な接続状態を拡大して模式的に断面図で示す図5
を参照すると、まず、前述した図3に示す状態では既に
フリップチップ3裏面側に粘着性の熱伝導性シート11
が貼り付けられており、この状態から図に示すように半
導体パッケージ全体を下方向に移動させると同時にU字
型接続金具6がソケット7から離脱する。さらに、一時
的に収納されていたリード線8も任意の長さ分だけ下方
向に伸び、フリップチップ3裏面側が放熱板12表面と
接触するところで接合する。なお、この接続した状態で
のリード線8は図に示すように機械的自由度をもたせて
おくことが応力緩和に対して非常に重要となる。
Next, the final connection state between the semiconductor package (flip chip 3) connected to the motherboard 10A and the heat radiating plate 12 is enlarged and schematically shown in a sectional view in FIG.
Referring to FIG. 3, first, in the state shown in FIG.
The U-shaped connection fitting 6 is detached from the socket 7 at the same time as the entire semiconductor package is moved downward from this state as shown in the figure. Further, the temporarily accommodated lead wire 8 also extends downward by an arbitrary length, and is joined where the back surface of the flip chip 3 comes into contact with the surface of the heat sink 12. It should be noted that it is very important for the lead wires 8 in this connected state to have a mechanical degree of freedom as shown in FIG.

【0034】[0034]

【発明の効果】以上説明したように、本発明の電子機器
の実装構造体は、マザーボードを実装対象電子機器の筐
体上部に配置してプリント配線板の内部回路と機械的に
柔軟な状態で電気的に接続し、フリップチップが上記プ
リント配線板の下側になるよう上記プリント配線板ごと
倒置し、フリップチップを筐体下部の金属板と一体化さ
れた高熱伝導性の放熱板に直接接合するので、サブノー
トパソコンなど携帯機器の超薄型・小型化の要求に対応
するために、熱やストレスの問題を解決し低コストで信
頼性の高い極めて優れた効果が期待できる。
As described above, in the electronic device mounting structure of the present invention, the motherboard is arranged on the upper part of the housing of the electronic device to be mounted so that the internal circuit of the printed wiring board is mechanically flexible. Electrically connected, flip the flip-chip together with the printed circuit board so that the flip chip is below the printed circuit board, and directly connect the flip chip to a high heat conductive heat sink integrated with the metal plate at the bottom of the housing Therefore, in order to meet the demand for ultra-thin and small-sized portable devices such as sub-notebook personal computers, it is possible to solve the problem of heat and stress, and to expect low cost, highly reliable and excellent effects.

【0035】まず、半導体パッケージを上下反転してフ
リップチップ裏面側を直接高熱伝導性の放熱体に接合し
ているので、多量の発熱を熱伝導で効率的に放熱できる
という効果がある。
First, since the semiconductor package is turned upside down and the flip chip back side is directly joined to a heat radiator having high thermal conductivity, a large amount of heat can be efficiently radiated by heat conduction.

【0036】また、筐体下部のアルミ板から筐体全体に
効率よく熱を逃がすので、キーボード表面などの温度上
昇を抑えることができるという効果がある。
Also, since heat is efficiently released from the aluminum plate at the bottom of the housing to the entire housing, there is an effect that a rise in temperature of the keyboard surface or the like can be suppressed.

【0037】また、半導体パッケージとマザーボード間
をリード線によって電気的に機械的自由度をもたせて接
続することにより、フリップチップ接合部の金属バンプ
に対するストレスを緩和し、歪みや破断の問題を解決す
るという効果がある。
Further, by electrically connecting the semiconductor package and the mother board with a lead wire with a mechanical degree of freedom, the stress on the metal bump at the flip-chip junction is reduced, and the problems of distortion and breakage are solved. This has the effect.

【0038】さらに、BGA方式のような金属バンプ形
成や接続関連装置が不要となることや押し圧による一括
接合方式であり組立時間の短縮など低コスト化が可能で
あるという効果がある。
Further, there is an effect that a metal bump forming and connection-related device such as a BGA method is not required, and a batch joining method using a pressing force can reduce costs such as shortening an assembling time.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の電子機器の実装構造体の第1の実施の
形態を示す断面図である。
FIG. 1 is a sectional view showing a first embodiment of a mounting structure of an electronic device of the present invention.

【図2】図1の外部入出力ピンの構成と接続方法を示す
断面図である。
FIG. 2 is a cross-sectional view showing a configuration and a connection method of external input / output pins of FIG.

【図3】本実施の形態の電子機器の接続方法の詳細を示
す断面図である。
FIG. 3 is a cross-sectional view illustrating details of a method of connecting the electronic device of the present embodiment.

【図4】図3のU字型接続金具の構成と接続方法を示す
断面図である。
FIG. 4 is a cross-sectional view showing a configuration and a connection method of the U-shaped connection fitting of FIG. 3;

【図5】本実施の形態の電子機器の接続方法の最終的な
接続状態を示す断面図である。
FIG. 5 is a cross-sectional view illustrating a final connection state of the electronic device connection method according to the present embodiment.

【図6】従来の電子機器の実装構造体の一例を示す断面
図である。ブロック図である。
FIG. 6 is a cross-sectional view illustrating an example of a mounting structure of a conventional electronic device. It is a block diagram.

【符号の説明】[Explanation of symbols]

1,1A プリント配線板 2 薄膜多層配線層 3 フリップチップ 4,20 金属バンプ 5 外部入出力ピン 6 U字型接続金具 7 ソケット 8 リード線 9 接続端子 10,10A マザーボード 11 熱伝導性シート 12 放熱板 14,21 アルミ板 15 キーボード 16,40 スルーホール 50 球状部 51 ストッパー 52 挿入部 53 導電性樹脂 60 L字型先端 61 割り溝 62 ベース板 63,92 リード線接続部 71 ケース 72,73,74 溝 91 ソケット固着部 DESCRIPTION OF SYMBOLS 1, 1A Printed wiring board 2 Thin-film multilayer wiring layer 3 Flip chip 4, 20 Metal bump 5 External input / output pin 6 U-shaped connection metal fitting 7 Socket 8 Lead wire 9 Connection terminal 10, 10A Motherboard 11 Thermal conductive sheet 12 Heat sink 14, 21 Aluminum plate 15 Keyboard 16, 40 Through hole 50 Spherical part 51 Stopper 52 Insertion part 53 Conductive resin 60 L-shaped tip 61 Split groove 62 Base plate 63, 92 Lead wire connection part 71 Case 72, 73, 74 Groove 91 Socket fixing part

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 内部回路として表面に形成した低誘電率
の絶縁体と導体からなる薄膜多層配線層上に金属バンプ
を介して接合することにより複数のリップチップ型半導
体パッケージに格納した半導体集積回路(以下フリップ
チップ)を搭載したプリント配線板と、前記プリント配
線板の前記内部回路と外部回路とのインタフエース用の
マザーボードと、前記内部回路の発生熱を放熱する放熱
板と備える電子機器の実装構造体において、 前記マザーボードを実装対象電子機器の筐体上部に配置
して前記プリント配線板の前記内部回路と機械的に柔軟
な状態で電気的に接続し、 前記フリップチップが前記プリント配線板の下側になる
よう前記プリント配線板ごと倒置し、前記フリップチッ
プをこのフリップチップ裏面側に貼り付けた熱伝導性シ
ートを介して前記筐体下部の金属板と一体化された高熱
伝導性の前記放熱板に直接接合することを特徴とする電
子機器の実装構造体。
1. A semiconductor integrated circuit housed in a plurality of lip-chip type semiconductor packages by bonding via a metal bump onto a thin-film multilayer wiring layer made of an insulator and a conductor having a low dielectric constant formed on the surface as an internal circuit. (Hereinafter referred to as a flip chip) mounted electronic device including a printed wiring board, a motherboard for interfacing the internal circuit and the external circuit of the printed wiring board, and a heat radiating plate for radiating heat generated in the internal circuit. In the structure, the motherboard is arranged on an upper part of a housing of the electronic device to be mounted, and electrically connected to the internal circuit of the printed wiring board in a mechanically flexible state, wherein the flip chip is provided on the printed wiring board. The printed circuit board is turned over so as to be on the lower side, and the flip chip is attached to the back side of the flip chip. Mounting structure of an electronic device, characterized in that the bonded directly to the housing bottom of the metal plate high thermal conductivity the heat radiating plate integrated with via.
【請求項2】 前記プリント配線板が、前記内部回路の
接続用の入出力ピンを備え、 前記マザーボードが前記インタフエース用の配線に接続
するスルーホールを有し、このスルーホールに嵌合する
接続端子とこの接続端子とリード線で接続し前記入出力
ピンに嵌合する接続用金具とを有するソケットを前記マ
ザーボードの下面に接合することを特徴とする請求項1
記載の電子機器の実装構造体。
2. The printed wiring board has input / output pins for connection of the internal circuit, and the motherboard has a through-hole connected to the interface wiring, and a connection fitted into the through-hole. 2. A socket having a terminal and a connection fitting connected to the connection terminal by a lead wire and fitted to the input / output pin is joined to a lower surface of the motherboard.
The mounting structure of the electronic device described in the above.
【請求項3】 前記入出力ピンの一端を球状形に形成
し、他端を前記プリント配線板に設けたスルーホールに
機械的押圧して一括して挿入して接合するように棒状に
形成し前記球状形部との境界部に前記プリント配線板の
予め定めた位置で固定するようにストッパーを設けたこ
とを特徴とする請求項1記載の電子機器の実装構造体。
3. The input / output pin has one end formed in a spherical shape, and the other end formed into a rod shape so as to be mechanically pressed into a through hole provided in the printed wiring board, inserted at once, and joined. 2. The mounting structure for an electronic device according to claim 1, wherein a stopper is provided at a boundary between the spherical portion and the printed wiring board at a predetermined position.
【請求項4】 前記接続端子が、一端に前記マザーボー
ドの前記スルーホールに嵌合するよう尖端を有し他端に
前記リード線を接続した棒状のピンであることを特徴と
する請求項2記載の電子機器の実装構造体。
4. The connection terminal according to claim 2, wherein the connection terminal is a rod-shaped pin having a sharp end at one end so as to fit into the through hole of the motherboard, and having the other end connected to the lead wire. Electronic device mounting structure.
【請求項5】 前記接続用金具が、薄板をL字型に曲げ
加工した4枚のL字板先端部を前記入出力ピンの前記球
状部の外径より大きくなるように逆曲げ加工し割溝がで
きるようにベース板に接合して成ることを特徴とする請
求項2記載の電子機器の実装構造体。
5. The connecting metal fitting is formed by reverse bending a tip of four L-shaped plates obtained by bending a thin plate into an L shape so as to be larger than an outer diameter of the spherical portion of the input / output pin. 3. The mounting structure for an electronic device according to claim 2, wherein the mounting structure is joined to the base plate so as to form a groove.
JP26557997A 1997-09-30 1997-09-30 Electronic device mounting structure Expired - Fee Related JP2988453B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26557997A JP2988453B2 (en) 1997-09-30 1997-09-30 Electronic device mounting structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26557997A JP2988453B2 (en) 1997-09-30 1997-09-30 Electronic device mounting structure

Publications (2)

Publication Number Publication Date
JPH11112173A true JPH11112173A (en) 1999-04-23
JP2988453B2 JP2988453B2 (en) 1999-12-13

Family

ID=17419091

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26557997A Expired - Fee Related JP2988453B2 (en) 1997-09-30 1997-09-30 Electronic device mounting structure

Country Status (1)

Country Link
JP (1) JP2988453B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007300029A (en) * 2006-05-02 2007-11-15 Sony Corp Semiconductor device, method of manufacturing the same, and circuit substrate device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007300029A (en) * 2006-05-02 2007-11-15 Sony Corp Semiconductor device, method of manufacturing the same, and circuit substrate device

Also Published As

Publication number Publication date
JP2988453B2 (en) 1999-12-13

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