JP2007281051A - Processing method of chip of semiconductor wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that an ultra-thin wafer (having a wafer thickness of 10-200 μm) after cutting the rear surface of a semiconductor wafer is easily broken and deformed due to weak strength, and processes thereafter can be automated with great difficulty. <P>SOLUTION: After a rear surface is cut, a wafer is vacuum-adsorbed on a processing tray with a wafer surface protective film adhering, and is fixed. The processing tray has a vacuum adsorber, and vacuum adsorbing holes are provided on its wafer placing surface. After the protective film is peeled, wafer cutting and chip transfer are executed. Since the wafer is fixed on the processing tray and its planar state can be maintained, processes after wafer adsorption can be automated. Since the wafer can be prevented from being damaged and various inspections can be executed, process with less cost can be built. Further, distortion on a rear surface due to processing can be removed using the etching tray. Since the tray can be repeatedly used, burden on the environment can be reduced. Single wafer control can be executed by attaching an information display means on the tray and product reliability such as traceability can be improved. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method of chip-processing a semiconductor wafer after back grinding. In particular, the present invention relates to a chip processing method for an extremely thinned wafer.

  Generally, after forming elements such as a transistor, an impurity diffusion layer, and a conductor layer on one surface (hereinafter referred to as a front surface) of a semiconductor wafer, the back surface of the wafer is ground and the wafer thickness is processed to a desired thickness. Has been done. After this processing, dicing into a desired shape (size) and semiconductor chip processing are performed. This chip is mounted on a semiconductor package, a circuit board, or the like. There has been a demand for extremely thin semiconductor packages and circuit boards. In that case, it is necessary to make the final wafer thickness extremely thin. The initial wafer thickness when forming the semiconductor element is 300 to 1000 μm, but the final wafer thickness (chip thickness) may be 10 to 200 μm. When such a thin wafer is used, a single wafer without any support may be severely curved (so-called warpage increases) due to the difference in stress between the front and back surfaces of the wafer, and the strength of the wafer decreases, causing damage to the wafer. And is more likely to induce defects. Alternatively, even when the final wafer thickness is not as thin as described above (for example, 200 to 400 μm), even when the diameter of the wafer is increased (for example, 200 mm or more), the wafer is severely bent or scratched. And is more likely to induce defects. In order to prevent this, the wafer surface protection film used in the wafer back surface grinding process is attached, and after the wafer back surface grinding process, a dicing tape is bonded to the wafer back surface, and then the wafer surface protection film is attached. Peeling and dicing have been proposed (for example, JP 2002-246345 A and JP 2004-186296 A).

  Furthermore, the final electrical characteristics inspection of a wafer that is extremely thin or / and has a large diameter has been performed due to the risk of damage to the wafer due to insufficient strength or difficulty in inter-process transfer due to deformation of the wafer. Because this is not possible, the final electrical characteristics are inspected before grinding the backside of the wafer, and the chips are selected as good products based on the data. In addition, since the inspection is performed before grinding the back surface of the wafer, a defective chip on the wafer cannot be marked with a mark (bad mark) that can be recognized by an appearance inspection such as ink or scratch, and the non-defective chip in the wafer is transferred to the computer. A method is used in which the position in the wafer is determined when the chip is picked up.

  In addition, even if a wafer surface protective film or a dicing tape is attached to the wafer after grinding the wafer back surface, the wafer cannot be kept flat even if it is supported, so inter-process transfer and in-process transfer are performed automatically. I can't, and most are done manually. For example, visual inspection before and after wafer cutting is also manually carried one by one.

JP 2002-246345 JP JP 2004-186296 A

  When the wafer thickness becomes extremely thin after grinding the wafer back surface, and / or when the wafer has a large diameter, if the wafer surface protective film is peeled after grinding the wafer back surface, the wafer is likely to be warped or damaged. is there. Further, in order to prevent the warpage and breakage of the wafer, an expensive film called a dicing tape must be used in the method of attaching the wafer surface protection film to the dicing tape in a state of being attached to the wafer. In addition, since this dicing tape is a consumable item, it is difficult to recycle and reuse, resulting in a large environmental load. Furthermore, since the adhesive layer of the dicing tape remains on the back surface of the chip (so-called adhesive residue), it may cause a decrease in yield. Furthermore, in order to prevent the adhesive residue on the back of the chip and to make it easier to pick up the chip, UV irradiation may be performed after dicing, which is an expensive process using a UV irradiation machine. Yes.

  In addition, when the wafer thickness becomes extremely thin after grinding the wafer back surface, and / or when the wafer has a large diameter, even if the wafer surface protective film is adhered or the dicing tape is adhered, Has flexibility, and it is difficult to maintain a flat state by itself. For this reason, there is a problem that the process after grinding of the wafer back surface cannot be automatically conveyed or processed, and there is a high risk of manual intervention or damage to the wafer. This makes it an extremely expensive process.

  Furthermore, since the electrical property inspection for determining good products is performed before wafer back-grinding, changes in electrical properties that have changed after wafer back-grinding cannot be detected, or defective chips are mounted on products as good products. There is. One way to prevent this is to perform a strict inspection to some extent in the inspection before wafer back-grinding to cope with changes in electrical characteristics that fluctuate after wafer back-grinding, but this can reduce yield and increase costs. It is a factor. A wafer that has been damaged or damaged after grinding of the wafer back surface must be subjected to an electrical property inspection before the wafer back surface inspection, although it is not necessary to perform an electrical property inspection at all. ), Which also increases costs.

  In the first invention, after the wafer back surface grinding, the wafer back surface, which is the wafer grinding surface, is adsorbed to the processing tray with the wafer surface protective film attached. The processing tray has a vacuum suction section so that the wafer back surface can be vacuum-sucked. Thereafter, the wafer is conveyed while being adsorbed to the processing tray, a wafer cutting process is performed, the chip is picked up, and the chip is mounted on a predetermined place such as a lead frame or a circuit board.

  In the second invention, after the wafer back surface grinding, the wafer surface protective film side is adsorbed to the etching tray with the wafer surface protective film attached. After removing the processing distortion on the wafer back surface adsorbed on the etching tray, the wafer is transferred from the etching tray to the processing tray with the wafer surface protective film attached, and the wafer back surface, which is the wafer grinding surface, is adsorbed on the processing tray. . The subsequent steps are the same as in the first invention.

  Since the wafer surface protective film is adsorbed and mounted on the processing tray, even if the wafer is extremely thin (for example, a wafer thickness of 10 to 200 μm) or a large diameter (wafer thickness is 200 to 400 μm, Even if the wafer diameter is 200 mm or more, the wafer will not be warped or damaged. Even when the wafer surface protective film is peeled off after being attracted to the processing tray, the wafer is not warped or damaged since the processing tray already securely supports the wafer. Further, since the processing tray has strength and protects the wafer, the wafer is not warped or damaged.

  Since an expensive consumable such as a dicing tape is not used, it is inexpensive and has a low environmental impact. Furthermore, since the problem of adhesive residue does not occur, the problem of yield reduction and reliability deterioration due to adhesive residue is eliminated. Further, it is not necessary to use an expensive device such as a dicing tape attaching device or a UV (ultraviolet) irradiation device, and the process is eliminated, so that an inexpensive process can be constructed. Since the processing tray can be used repeatedly as many times as possible, there is an advantage that there is no environmental load due to the processing tray and the cost increase is very small.

  After the wafer is attracted to the processing tray, the wafer can be maintained in a flat state, so that the electrical property inspection can be performed after the wafer back surface grinding step or the back surface processing strain removing step. Therefore, it is possible to easily detect a chip that has become defective due to a change in electrical characteristics generated in the previous process or a scratch. Furthermore, if the present invention is used, the inspection in the wafer state is possible even after dicing, and the electrical property inspection after dicing, which has been impossible until now, is also possible. Although it is most desirable to perform the electrical characteristic inspection of the wafer immediately before the chip is mounted on the product, this can be achieved by using the present invention. As a result, a defective chip is not mounted on the product, a process with a very high yield can be constructed, and the cost of the product can be reduced. In addition, since various electrical property inspections can be performed after the wafer back grinding process, the back surface processing strain removing process, or the dicing process, there is an advantage that a highly reliable chip can be obtained.

  In the conventional wafer electrical property test, bad mac etc. could not be attached to the wafer because it was performed before the wafer back surface grinding. However, in the present invention, the wafer electrical property inspection can be performed after the wafer back surface grinding, etc. A mark or the like can be attached to the wafer. Accordingly, an appearance inspection (automatic or manual) can be performed at the time of chip pickup, and an error in discriminating between a good product and a defective product is eliminated. In addition, since a good product and a defective product can be discriminated with the naked eye or a microscope, the failure analysis can be performed quickly, the result can be fed back to the process, and a large number of defective products can be prevented.

  Furthermore, after the wafer is attracted to the processing tray, the wafer can be maintained in a flat state, so that transfer within the process and between processes can be automated. As a result, the risk of damaging the wafer can be reduced, and a process with a high yield can be constructed.

  Conventionally, inspection can be performed only by manual conveyance before and after the wafer dicing step. However, since the processing tray is used in the present invention, automatic conveyance is possible, and appearance inspection can be easily performed. This appearance inspection is most preferably performed immediately before the chip is mounted on the product (defects in the immediately preceding wafer or chip can be detected), but this can be easily performed by using the present invention.

  In the second invention, since the etching tray supports and protects the wafer, the wafer is not warped or damaged as in the case of the processing tray. Therefore, the process for removing the wafer back surface processing distortion generated by the wafer back surface grinding process can be performed without worrying about the warping or breakage of the wafer, and the wafer back surface processing strain removing process can be automated without any problem.

In addition to the above, the present invention has the following effects.
Even if the tray on which the wafer is adsorbed stays in the process, it can be stocked cleanly and safely between processes, so that the processing efficiency can be improved and the process design becomes easy. That is, the wafer can be stored in a wafer (tray) case so that the surface of the wafer does not come into contact with other objects, and the confidentiality of the case can be ensured. Alternatively, by using trays that do not overlap the wafers, it is possible to store the trays on top of each other. As a result, since wafers (tray) and wafer (tray) cases can be stocked between processes, apparatus efficiency and processing efficiency can be increased, and process design can be made flexibly.

  Information display means such as a barcode or a wireless tag such as an RF tag can be easily attached to a processing tray or the like, wafer management can be performed, and accurate and accurate processing can be performed on the wafer. In addition, the traceability of the wafer can be improved.

  In addition, although it is repeated, since transfer between processes and in-process and processing can be automated, wafer (tray) inspection and processing can be performed safely without damaging the wafer, and the processing yield can be improved. .

  The processing tray can be used repeatedly by washing, and there is an advantage that the number of consumables is reduced as much as possible, and it is environmentally friendly and inexpensive.

  In the present invention, a wafer mainly refers to a semiconductor wafer. For example, semiconductor wafer materials include single element semiconductor materials such as silicon (Si) and germanium (Ge), compound semiconductor materials such as silicon germanium (SiGe), gallium arsenide (GaAs), and indium phosphide (InP), It is a ternary or higher semiconductor material such as GaAlAs. However, regardless of these, a semiconductor device formed on an insulator is also included. For example, a thin film device is formed on glass, quartz, plastic, or the like, and a semiconductor material is bonded on glass, quartz, plastic, or the like. Furthermore, the thing which bonded the insulator and the semiconductor material on the metal is also contained. Furthermore, polymer materials such as plastics are also included.

  The present invention mainly relates to a chip processing process from formation of a semiconductor device on a wafer to formation of the chip on various devices. An active element such as a transistor, a passive element such as a resistor / capacitor / inductance, a wiring / insulating layer, or the like is formed on the surface of the wafer to manufacture a semiconductor device. The semiconductor device applied to the present invention includes a memory, a CPU, a system IC, an analog IC, a digital IC, and the like, but includes a single active element and passive element in a broad sense. That is, it represents one including at least one active element or passive element. In general, a large number of these semiconductor devices are formed on a semiconductor wafer, and after being cut into individual pieces (so-called chips), they are mounted on various products depending on applications. For example, in the case of a semiconductor package, it is mounted on a lead frame. It may also be mounted on a circuit board and used in various devices such as mobile phones, IC cards, and PCs. Furthermore, display elements such as liquid crystal and organic EL (electroluminescence) are also included.

  A chip processing step according to one embodiment (first invention) of the present invention will be described in detail with reference to FIG. That is, as shown in FIG. 1, the first invention is a wafer back grinding step 101, a wafer back surface processing distortion removal step 102 generated by back surface grinding, a wafer processing tray adsorption step 103, and a wafer cutting step. 104 and a chip transfer process 105.

  The back grinding process 101 is a process for grinding the wafer back surface opposite to the wafer surface on which the semiconductor device is formed to make the wafer thin, so that the wafer has a desired thickness. In this step, in order to protect the semiconductor device formed on the wafer surface, a protective film is bonded to the wafer surface. As this protective film, for example, there are Lintec E-series and Mitsui Chemicals' cross tape. The wafer bonded with the protective film is placed in a back grinding device (so-called back grinding device), and the back surface of the wafer is ground with a grindstone while adding water containing abrasive grains. When the desired wafer thickness is obtained, the back surface grinding is finished. Back surface grinding generally consists of rough grinding and finish grinding. Rough grinding is a method of quickly cutting the back surface of a wafer using coarse abrasive grains. Therefore, large distortion and stress remain on the back surface of the wafer after rough polishing. The finish grinding is performed after the rough grinding, and the strain and stress are alleviated by using finer abrasive grains. However, since the strain and stress cannot be completely removed, the next back surface processing strain may be removed.

  After the back surface grinding step 101, the back surface processing strain is removed. The strain and stress described above do not only have a mechanical adverse effect on the wafer to warp or damage the wafer, but also adversely affect the electrical characteristics and reliability of the device. The purpose is to minimize those adverse effects. In this back surface processing strain removing step 102, the process is performed with the wafer surface protective film attached. When the wafer thickness is reduced to 200 μm or less and / or the wafer has a large diameter of 200 mm or more, the wafer surface warping is increased or the wafer strength is increased by removing the wafer surface protective film. Damage to the wafer due to the shortage is likely to occur, making it difficult to perform the back surface processing strain removal step 102. Also, a wafer surface protective film is necessary to reduce the influence on the wafer by the back surface processing strain removing process as much as possible.

There are a dry method and a wet method as a method for removing back surface processing distortion.
The wet method is a method in which the back surface of the wafer is exposed to an etching solution, the back surface of the wafer is slightly removed by etching, and a processing strain layer is formed on the back surface of the wafer. In the case where the wafer is silicon (Si) or a compound semiconductor such as gallium arsenide (GaAs), these etching solutions include, for example, a hydrofluoric acid-based etching solution and an alkaline aqueous solution such as KOH. Even when the wafer is completely immersed in the etching solution, the wafer surface is not etched because the wafer surface protective film used in the back surface grinding exists on the wafer surface. However, if the adhesion between the wafer surface protective film and the wafer surface is deteriorated in the back grinding process, or if the wafer surface protective film may be altered by the etchant, the wafer is completely immersed in the etchant. In some cases, the etchant may etch the wafer surface. In these cases, there is a method in which the etching solution is immersed only in the exposed back surface of the wafer without being completely immersed in the etching solution. For example, there are a method of spraying the wafer back surface by a spray method and a method of applying an etching solution vapor only to the wafer back surface.

  The dry method is a method that does not use the etching solution as described above. For example, there is a method of performing plasma etching or photoetching on the back surface of the wafer. In this case as well, when the entire wafer is exposed to a dry etching atmosphere, the wafer surface is not etched because the wafer surface protective film used in the back surface grinding is present on the wafer surface. However, if the adhesion between the wafer surface protection film and the wafer surface is deteriorated in the back grinding process or if the wafer surface protection film may be altered by the etching solution, the entire wafer is exposed to a dry etching atmosphere. There is a possibility of etching the wafer surface. In these cases, there is a method in which only the exposed back surface of the wafer is exposed to the dry etching atmosphere without exposing the entire wafer to the dry etching atmosphere. For example, in the case of plasma etching, there is a method in which only the back surface of the wafer is exposed to the plasma atmosphere by mounting the wafer surface with a wafer surface protective film attached on one electrode. In the case of photoetching, there is also a method of irradiating only the back surface of the wafer.

  Next, the process tray adsorption | suction process 103 is performed. The wafer surface protective film is placed on the processing tray while being attached. The processing tray has a vacuum suction portion, and the wafer is placed on the vacuum suction portion and sucked in vacuum. The back surface of the wafer becomes a vacuum suction surface. Until the wafer is placed on the processing tray, the wafer is supported by a wafer surface protective film. However, since the wafer surface protective film is soft, the wafer is extremely thin (for example, a wafer having a thickness of 10 to 200 μm). When the wafer has a large diameter (for example, the wafer thickness is 200 μm to 400 μm and the wafer diameter is 200 mm or more), the wafer with the wafer surface protective film attached is in a flexible state and flat. Can't keep up. Therefore, automatic transfer is difficult until wafers are placed on the processing tray, and manual transfer is desirable. Needless to say, automatic transfer may be automatic as long as automatic transfer is considered to the same extent as manual transfer. After being placed on the processing tray, the wafer is attracted to the processing tray, so that the wafer does not warp and can be kept flat. An example of the processing tray is shown in FIG. As shown in FIG. 2, the processing tray 21 includes a decompression chamber 22, a suction hole 23, a suction surface 24, a suction hole 25, and a suction port 26. The decompression chamber 22, the suction hole 23, the suction surface 24, the suction hole 25 and the suction port 26 can be considered as a vacuum suction part of the processing tray 21. FIG. 2A is a view showing a processing tray before the wafer is sucked. A method for placing a wafer with a wafer for surface grinding on the back grinding on the processing tray will be described with reference to FIGS. As shown in FIG. 2B, the back surface of the wafer 27 is placed on the suction surface 24 with the wafer surface protection film 28 still attached. The suction port 26 is connected to an external vacuuming device. When the wafer 27 is placed, the decompression chamber 22 is evacuated through the suction hole 25, the wafer 27 is sucked through the suction hole 23, and the wafer back surface is attracted to the suction surface 24. 29 is adsorbed. As shown in FIG. 2D, the suction surface 24 of the processing tray 21 has a large number of suction holes 23 so that the wafer 27 can be reliably suctioned. The adsorbing holes in FIG. 2 (d) are shown as small circles, but other shapes such as quadrangles, ellipses, triangles, and similar shapes may be used. Alternatively, a combination thereof may be used. Alternatively, other shapes that can attract the wafer 67 may be used.

  The number, shape, and size of the suction holes can be selected to such an extent that the wafer 27 can be maintained flat and can be reliably fixed. The suction hole needs to be within the range of the wafer mounting position. This is because even if the wafer is vacuum-sucked, there are suction holes that do not suck the wafer, and the degree of vacuum is not stable. Note that vacuuming may be performed before the wafer 27 is placed. After adsorbing the wafer 27 to the processing tray, the wafer surface protective film is peeled off as shown in FIG. Before peeling, UV (ultraviolet) irradiation may be performed to reduce the adhesion between the film and the wafer surface or to prevent the adhesive (so-called adhesive residue) from the protective film from remaining on the wafer surface. good. The film can be peeled off using a protective tape peeling machine or manually (by hand). Even when the protective film is peeled off, the wafer is warped even if the wafer becomes extremely thin or / and the wafer becomes a large diameter because the wafer is firmly adsorbed and fixed to the processing tray. There is no problem, and a flat state can be maintained. Therefore, if the processing tray of the present invention is used, it is possible to automate the protection tape peeling machine.

  After the wafer 27 is firmly adsorbed, the suction port 26 is closed to ensure the air tightness (vacuum degree) of the vacuum adsorbing portion. As a method for ensuring the airtightness, there are a method of sealing the suction port 26 with a lid or a stopper, and a method of providing a switching valve or a check valve in the suction port 26 and closing it with the valve. By doing in this way, a process tray can be cut off from a vacuum drawing apparatus and a subsequent process can be performed. Of course, if the initial vacuuming device can be continuously connected to the processing tray in the subsequent processes, it is obvious that the vacuum degree of the vacuum suction part can be secured without using the above-described method for ensuring airtightness. is there.

  In addition, when a subsequent process can be performed without peeling off the wafer surface protective film, it is not necessary to peel off the protective film. For example, in the case of a wafer level package or a wafer level CSP, since the final product has already been completed, the subsequent process may be performed without removing the protective film. In the case where the protective film is not peeled off, the wafer is cut while the protective film is attached also in the wafer cutting process, which is a subsequent process. In order to cut into a desired shape, it is desirable that the protective film is a material transparent to the cutting apparatus that can recognize the pattern of the wafer, particularly a scribe line that is a cutting portion. Or if it is a wafer cutting device which can memorize | store the pattern state of a wafer surface beforehand and can cut a wafer with the information, it can cut a wafer with a protective film adhered.

  FIG. 3 is another embodiment of a processing tray. FIG. 3A is a transverse sectional view, and FIG. 3B is a plan view. The difference from the case shown in FIG. 2 is that the place (wafer placing portion or wafer attracting surface 34) where the wafer is placed is dented compared to the periphery. As shown in FIG. 3B, the wafer mounting portion 34 has a large number of suction holes 33 so that the wafer 37 can be reliably sucked. Although the adsorption holes in FIG. 2 (b) are shown as small circles, other shapes such as quadrangles, ellipses, triangles, and similar shapes may be used. The number, shape, and size of the suction holes can be selected to such an extent that the wafer 27 can be maintained flat and can be reliably fixed. The suction hole needs to be within the range of the wafer mounting position, as in the processing tray shown in FIG.

  The inclination from the peripheral edge portion of the processing tray shown in FIG. 3 to the placement portion is tapered as indicated by a tapered portion 38 in FIG. Even when the wafer with the protective film is placed on the mounting portion of the processing tray and is slightly displaced and the end of the wafer hits the tapered portion 38, the wafer slides from the tapered portion and is set on the mounting portion. That is, there is an advantage that the wafer mounting location is stabilized as compared with the processing tray in the case of FIG. The peripheral edge 39 of the processing tray 31 is flat to some extent. By making the height of the peripheral portion 39 higher than the height of the wafer surface when the wafer is attracted to the mounting portion 34, there is no advantage that there is no contact with the wafer even if the processing trays are stacked and stacked. There is also. The area of the flat part of the peripheral part 39 needs to ensure an area that is stable even when stacked. Therefore, in this case, it is not necessary to use a special wafer (processing tray) case. Others are the same as the processing tray shown in FIG.

  The whole or part of the processing tray can be made of iron, titanium, aluminum, copper, nickel, cobalt, chromium, zinc, molybdenum, tungsten, or a metal containing other elements. Alternatively, an alloy mainly composed of these elements may be used. When the processing tray needs a certain amount of weight, it is desirable to use a metal or alloy containing a heavy metal element. For example, stainless steel, nickel steel, chrome steel, and the like. When it is necessary to lighten the processing tray, it is desirable to use a metal or alloy containing a light metal element such as aluminum or titanium. Since metals and alloys generally have higher temperature resistance and strength than the following organic materials, it is desirable to use them when it is necessary to process them at high temperatures.

  Alternatively, the whole or a part of the processing tray may be a fluororesin such as PTFE (polytetrafluoroethylene) or PFA (perfluoroethylene propene copolymer) or other organic material. Compared to the above-mentioned metal processing tray, there are advantages that it is light and has resistance to wet etching solution.

  As shown in FIG. 4, a thin sheet 48 may be sandwiched between the processing tray and the wafer. In particular, the sheet 48 can have a role of not damaging the processing tray at the time of wafer cutting such as dicing. (Details will be described later) If it is possible to achieve this sheet without damaging the processing tray, it is desirable that the sheet is thin in terms of thinning the tray and material cost. Further, a small hole may be formed in the sheet so that the wafer is adsorbed by the vacuum adsorption portion of the processing tray. Alternatively, if the sheet itself is porous (having many gaps), the wafer can be vacuum-sucked without particularly making a small hole in the sheet. Alternatively, a mesh sheet can be used. In this mesh-like sheet, the mesh portion serves as a vacuum seal, so that the vacuum tightness can be maintained.

  One processing tray corresponds to each wafer. If care is taken not to contact the wafers, it is possible to carry and process each processing tray. Automation can be automated because it is only necessary to design such automation. Alternatively, the processing tray can be moved and transported by placing it in a plurality of processing tray cases or the like. This is also easy because automation can be designed as such.

  In FIG. 2 and FIG. 3, the intake holes are drawn so as to enter from the lower side of the decompression chamber, but they may enter straight from the side. In this case, since the thickness of the processing tray positioned below the decompression chamber can be reduced, the entire processing tray can be reduced. Further, the processing tray may have a structure capable of adsorbing a wafer, and may not have the shape shown in FIGS. For example, the processing tray may have a rectangular plan view and a rectangular parallelepiped shape, or a square plan view and a rectangular parallelepiped shape. In the case of the latter shape, stacking is easy, and storage in the processing tray case is also easy. Any structure that has some strength and can be used repeatedly may be used.

  In the present invention, a wafer cutting step 115 is performed after the processing tray suction step 114 (see FIG. 1). As a wafer cutting method, there is a method using a dicing apparatus (so-called dicer) using a dicing blade. This is a method of cutting a wafer placed on a processing tray into a desired size with a dicing blade. Generally, cutting is performed along a scribe line patterned on the wafer. Wafer cutting (dicing) is performed by changing dicing conditions according to the thickness of the wafer, the material of the wafer, the thin film formed on the wafer, and the like. Further, there are methods such as full cut, semi-full cut and half cut depending on the amount of wafer to be diced.

  Full cut is a method of completely cutting a wafer. Accordingly, the cut enters the processing tray side. The semi-full cut is a method of cutting about the thickness of the wafer. The wafer is cut almost completely, but the cut is not made as much as possible on the processing tray side. In these full cuts and semi-full cuts, dicing cuts are made on the processing tray side and scratches are made, so that it is often difficult to use the processing tray repeatedly. Since the processing tray is also relatively expensive, it is desirable to prevent the processing tray from being damaged during dicing and to repeatedly use the processing tray. One method is to sandwich a thin sheet between the processing tray and the wafer as described above. A thin sheet cannot be used many times if dicing is performed under such a condition that a thin sheet can be cut but not into the processing tray, but a relatively expensive processing tray can be used repeatedly. For example, since the cutting thickness control of dicing can be about 10 μm at a minimum, when the cutting amount of full cut is set to wafer thickness + 50 μm, if the thickness of the thin sheet is set to about 100 μm, the cutting at the time of dicing is a thin sheet Stays inside and never enters the processing tray. When it is desired to further reduce the thickness of a thin sheet, a dicing apparatus with excellent thickness control can be used, or the cutting amount of the full cut amount can be further reduced. In the case of a full cut, it is not necessary to use a wafer full cutting method using a roll or the like, which will be described later. However, in the case of a semi-full cut, there may be chips that are not completely cut. It may be necessary to use a complete wafer cutting method using a roll or the like. In any case, by sandwiching a thin sheet, the wafer is completely cut, and the processing tray does not receive any damage such as a cut, so that the processing tray can be used repeatedly.

  There is a method using a dicing tape as another method which does not damage the processing tray while completely cutting the wafer using the full cut. This is a method in which a dicing tape is attached to the back surface of the wafer to which the wafer surface protective film is attached before the processing tray is sucked, and then placed on the processing tray and sucked. This is shown in FIG. The dicing tape 58 is adsorbed on the adsorption surface 54 of the processing tray 51. Although the wafer surface protective film is not shown in FIG. 5, the wafer surface protective film may be left as described above as long as it is a product that does not cause a problem even if this film is left. Generally, the wafer surface protective film can be peeled off after adsorbing to the processing tray. Alternatively, after the dicing tape 58 is attached, the wafer surface protective film may be peeled off before entering the processing tray adsorption step. As described in FIG. 2, UV irradiation may be performed before the protective film is peeled off. Even when the wafer surface protective film is peeled off, the wafer is not warped even if the wafer is extremely thin or / and the wafer has a large diameter because the processing tray or dicing tape supports the wafer. The wafer can be processed in a flat state. FIG. 5B is a schematic view showing a state in the case of dicing the wafer with the dicing tape of FIG. The dicing blade 50 cuts a desired position of the wafer to form a cut portion 59. In the case of full cut, the cutting part 59 completely separates the wafer, and the cutting part 60 enters the dicing tape 58. However, the processing tray 51 is not cut and the processing tray is not damaged, so that the processing tray 51 can be used repeatedly.

  Next, half cut will be described. Half-cut is a cutting method in which a cut is held in a wafer without being completely cut. In this case, since no cut is made on the processing tray side, the processing tray is not damaged and the processing tray can be used repeatedly. Thin sheets and dicing tape are not necessary. However, since the wafer is not completely cut, it is necessary to apply a little pressure on the wafer after dicing to cut the wafer. For example, it can be cut by lightly tracing the wafer with a roll or the like. When the wafer is a silicon wafer, it is well known that the (111) plane is broken. Even in the case of half cut, a thin sheet may be sandwiched as a buffer material. Alternatively, the dicing tape can be bonded to the back surface of the wafer and adsorbed to the processing tray.

  In the above blade-type dicing apparatus, since water is used, the processing tray and the sheet get wet with water, but moisture can be removed by dehydration and drying after dicing. Since the material of the processing tray is as described above, moisture is not adsorbed inside. Also for the sheet, moisture is not adsorbed inside by using a material that does not absorb moisture or absorb moisture. Further, even if the sheet adsorbs a little moisture, the moisture can be removed by warming up slightly during drying. Alternatively, even if moisture cannot be completely removed, there may be no particular problem if moisture is removed at the time of chip transfer or after chip transfer.

  As another method related to wafer cutting, there is a laser cutting method (laser dicing). In this case as well, the above-described full cut, semi-full cut and half cut can be used, and the same problem as in the dicing method can be said as a problem at the time of cutting. However, in the case of cutting with a laser, selectivity by material can be used. For example, it is possible to set a laser beam condition that can completely cut the wafer but does not damage the processing tray or the sheet. Moreover, since it can cut | disconnect in a dry state, without using water etc., the problem regarding water, such as a water | moisture content, does not generate | occur | produce.

As another method for wafer cutting, there is a cutting method using high-pressure water. In this case as well, the above-described full cut, semi-full cut and half cut can be used, and the same problem as in the dicing method can be said as a problem at the time of cutting. However, even in the case of cutting with high-pressure water, the selectivity by the material can be used. For example, it is possible to set conditions for high-pressure water that can cut the wafer but do not damage the processing tray or sheet.
After the wafer cutting step 104, the chip transfer step 105 is entered. (See Figure 1)
After the wafer is cut into chips of a desired size, the chips are picked up and transferred to a predetermined location. The predetermined location differs depending on the subsequent usage of the chip. For example, in the case of an IC package, it is mounted on a lead frame or a COB substrate. Sometimes transferred to the chip tray. In some cases, it may be transferred onto a circuit board.
The chip is picked up by, for example, applying a collet to the chip and vacuuming the chip.

  Before picking up the chips, it may be preferable to break the vacuum on the processing tray side or slightly reduce the degree of vacuum. Generally, vacuum pick-up is performed from the wafer surface at the time of picking up. If the degree of vacuum on the pick-up side is stronger than the degree of vacuum on the processing tray, chips can be picked up. However, if the degree of vacuum on the pickup side is too strong, a force due to the pressure difference between the atmospheric pressure and the degree of vacuum is applied to the chip after the pickup, so that a chip may be damaged. In such a case (when the chip thickness is thin or the chip size is large, etc.), it is preferable to break the vacuum or slightly reduce the vacuum before picking up the chip.

  In addition, when there is an adsorption hole under the chip, the vacuum may be broken after the chip is picked up. Therefore, it may be necessary to draw the vacuum portion of the processing tray at the time of picking up. By pulling the vacuum part of the processing tray to a vacuum in this way, even after picking up some chips, the chips are pulled to the processing tray side, so there is no problem of chip misalignment due to breaking of the vacuum. . When the position correction is provided on the pickup device side, the transfer side, etc., there are few problems caused by breaking the vacuum. Moreover, even when the wafer is adsorbed using the above-mentioned dicing tape, even if the full-cut method is used, the dicing tape is not completely cut in the depth direction. The problem of tearing does not occur.

  As described above, since the processing tray is also used for chip transfer, the chip transfer process can be automated, and the wafer cutting process can be automated and the connection between the wafer cutting and the chip transfer process can be automatically performed. (For example, automatic transfer) becomes possible.

  In order to reduce the adhesion between the dicing tape and the chip, UV irradiation may be performed before the chip is transferred. UV irradiation is effective as a measure against adhesive residue on dicing tape.

  As described above, it may be effective to use the dicing tape in the present invention. At this time, the dicing tape consumables described in the effect of the present invention are eliminated, the dicing tape attaching process is eliminated, or the dicing tape is removed. The benefits of not using it are lost. However, there are also advantages over it, so it is necessary to design the process while comprehensively considering the overall advantages.

  1st invention processes the wafer with a protective film in the process distortion process 102 independently after back surface grinding. However, the wafer is already thin, and even if the wafer surface protective film is attached, there is a problem that the strength is weak and it is weak against impact. Moreover, it may be difficult to maintain a flat state. Accordingly, it is an object of the second invention to solve the problems of the first invention.

  An embodiment of the second invention will be described with reference to FIG. The second invention is characterized in that an etching tray adsorption step 112 is performed after the wafer back surface grinding step 111 and before the wafer back surface processing strain removing step 113. Thereafter, a processing tray suction step 114 is performed following the wafer back surface processing strain removing step 113. The processing tray adsorption step 114 and subsequent steps are the same as in the first invention. The differences from the first invention will be described in detail.

  The etching tray adsorption step 112 in the second invention will be described in detail. After the wafer back grinding step 111, as shown in FIG. 7, the wafer 77 is placed on the etching tray 71 with the wafer surface protective film 78 attached. The basic structure of the etching tray is the same as that of the processing tray in the first invention, and there is a vacuum suction portion. The vacuum suction part includes a decompression chamber 72, a suction hole 73, a suction surface 74, a suction hole 75, and a suction port 76. A wafer 77 with a wafer surface protection film 78 is placed on the suction surface 74 of the etching tray 71. At this time, as shown in FIG. 7, the wafer surface protective film 78 side contacts the suction surface 74. The back surface 79 of the wafer 77 is exposed on the top surface of the etching tray 71. As a method of transferring from the wafer back grinding process 111 to the etching tray 71, there are an automatic method and a manual method. The suction port 76 is connected to an external vacuuming device, and when the wafer 77 is placed, the decompression chamber 72 is evacuated through the suction hole 75, and the wafer 77 is sucked through the suction hole 73, and the wafer surface is attracted to the suction surface 74. The protective film 78 is adsorbed. In the case of an ultra-thin wafer and / or a large-diameter wafer, it is in a relatively flexible state before being attracted, but after the attracting, the wafer is firmly fixed and can remain flat. .

  As the shape of the etching tray, a tray having a tapered portion at the periphery can be used as in the first invention (see FIG. 3). An etching tray having a square or rectangular shape can also be used.

  After the etching tray suction step, a back surface processing strain removal step 113 is performed using the etching tray on which the wafer is sucked. As the back surface processing strain removal method, as described in the first invention, there are a dry etching method and a wet etching method.

Examples of dry etching methods include plasma etching and photoetching. When the back surface processing distortion of the wafer is removed by dry etching, it is desirable that the etching tray be a metal tray such as stainless steel. As an etching gas used for dry etching, when the wafer material is a compound semiconductor such as silicon (Si) or gallium arsenide, an etching gas such as CF ₄ , C ₂ F ₆ , SF ₆ , CCl _3, or CHF _{3 is used.} However, in the etching tray mainly composed of Teflon (registered trademark) material, the etching tray may react and be damaged, and it becomes difficult to use the etching tray many times. There is a case. Therefore, in the case of dry etching, the material of the etching tray is desirably a metal material that does not react with the dry etching gas or is difficult to react. In particular, in the case of stainless steel, nickel steel, or chromium steel, the resistance to dry etching gas is large, which is more desirable, and the etching tray can be used repeatedly.

  When removing backside processing distortion by wet etching, the processing tray should be made of a fluorine resin material such as PTFE (polytetrafluoroethylene) or PFA (perfluoroethylene propenecopolymer) or other organic materials. Is desirable. As an etching solution for a wafer in the wet etching process, there are an alkaline aqueous solution and a hydrofluoric acid aqueous solution. These aqueous solutions may slightly attack the metal-based material, and it may be difficult to use the treatment tray many times. Therefore, in the case of wet etching, the above-mentioned fluorine-based resin material that is a material that does not react or hardly reacts with the wet etching solution is desirable.

  Conventionally, when the wafer is an extremely thin wafer thickness and / or a large-diameter wafer, it has been difficult to maintain the flat state of the wafer, and thus there are many manual wafer transports in the wafer back surface processing distortion removal process. However, if the etching tray of the present invention is used, wafer transfer can be easily automated in both dry etching and wet etching, and automation between processes and within processes becomes possible. As a result, the cost can be significantly reduced.

Subsequent to the wafer back surface processing distortion removal step 113, a processing tray suction step 114 is performed. The processing tray adsorption step 114 is the same as that of the first invention, but it is necessary to transfer the wafer having the wafer surface protective film on which the back surface processing distortion is removed from the etching tray to the processing tray. In FIG. 7, since the wafer is vacuum-sucked on the suction surface 74 of the etching tray 71, air or the like is introduced from the suction port to break the vacuum of the vacuum suction part. Thereafter, the wafer 77 is transferred to the processing tray adsorption step 114. Wafer transfer can be performed manually or automatically.
Subsequent processing tray adsorption steps are the same as in the first invention.

  In some cases, the back surface processing strain removing step 113 can be eliminated. What is necessary is just to grind with a small damage to the back surface at the time of back surface grinding. For example, the final back-grinding can be done with a smaller size than the finish grinding, or the final back-grinding can be done only with a wet etchant, or a dry-etching mechanism can be attached to the back-grinding device, This is the case when dry etching is performed. Alternatively, some devices do not have any problem in device performance and reliability without removing the back surface processing strain. In such a device, the back surface processing strain removing step 113 is not necessary. Even if there is no wafer back surface processing strain removal step 113, in the present invention, when the wafer is in the wafer state, the wafer surface protection film is attached or adsorbed on the processing tray. Don't be. Further, since the chip is smaller than the wafer at the time of chip pickup, the influence of warping on the chip by not removing the back surface processing strain is not particularly problematic as compared to the case of removing the back surface processing strain. When it is not necessary to use the back surface processing strain removing step 102 (first invention, see FIG. 1) or 113 (second invention, see FIG. 6), in the first invention, from the back surface grinding step 101 to the processing tray. The adsorption process 103 is entered. In the second invention, the etching tray adsorbing step 112 is not necessary, so that it becomes the same as the first invention.

  The final electrical property inspection of the device formed on the wafer surface is preferably performed before the wafer is cut. More preferably, it is more desirable to carry out after wafer cutting and before chip transfer. This is because the electrical characteristics of the wafer are affected by the previous process. However, if the wafer has a thickness of 200 μm or less after grinding of the wafer back surface, or if the wafer diameter becomes 200 mm or more (for example, 200 to 1000 mm) and a large diameter even if the wafer thickness is 200 μm to 400 μm, the wafer Conventionally, it has been difficult to inspect the electrical characteristics of the wafer after grinding the back surface of the wafer, because the warpage of the wafer may increase or the wafer may be damaged due to insufficient strength. However, by using the present invention, it is possible to perform an electrical property inspection before wafer cutting. That is, the electrical characteristic inspection can be performed in a state where the wafer is attracted to the processing tray. It can also handle automation. For example, if a plurality of processing trays are set in a processing tray case, or if a stackable processing tray is used, a plurality of processing trays can be stacked and set in a tester. (Tester etc.) can be processed automatically.

  Furthermore, if the present invention is used, the electrical property inspection can be performed even after the wafer is cut. In other words, even after the wafer is cut, it can be adsorbed as a chip on the processing tray, so that an electrical characteristic inspection can be performed. For example, the suction holes may be arranged according to the chip arrangement of the wafer. A processing tray matching the chip arrangement of the wafer may be prepared for each device. Alternatively, it is possible to prepare a suction plate according to the chip arrangement of the wafer and change the suction plate for each device. As a result, even if the wafer is completely cut along the cutting place (so-called scribe line), the chip position is changed even after cutting because the chip is sucked by the suction holes arranged for each chip. There is no. In addition, if the wafer adhering to the dicing tape is adsorbed to the processing tray and the cut portion is kept inside the dicing tape, the dicing tape is adsorbed to the processing tray even if the wafer is cut, and the vacuum of the processing tray Since the chip is not torn, the chip after cutting is fixed, and it is possible to inspect the electrical characteristics of the chip. If the half-cut method is used, the vacuum of the processing tray is not broken even after the wafer is cut, so that it is possible to inspect the electrical characteristics of the wafer (chip). Even if there is a dicing tape or half-cut method, if there is a suction hole that matches the chip arrangement of the wafer, the position of the chip may be small even after wafer cutting, which means that safety is high. I can say.

  FIG. 8 shows another embodiment of the processing tray. The processing tray 81 is configured such that a suction plate 89 having a suction surface 84 can be removed. A large number of suction holes 83 exist on the suction surface 84. Since the suction holes 83 are arranged so as to correspond to the individual chips on the wafer, as described above, even if the wafer is completely cut for each chip, the chips are individually attracted to the suction surface. The suction plate 89 is connected to the processing tray 81 by a holding unit 88. If the device changes and the chip position in the wafer is different, the suction plate can be changed to match the chip position. If information display means is attached to the suction plate 89 and the processing tray 81, the management of the device, suction plate and processing tray becomes easy. By using such a processing tray, it is possible to perform an electrical property inspection, an appearance inspection, and the like after wafer cutting for various devices.

  An information display means such as a barcode or an RF tag such as an RF tag can be attached to the etching tray or the processing tray. For example, it can be attached to the side or bottom of these trays (hereinafter simply referred to as trays). In addition, the tray having a high peripheral portion as shown in FIG. 3 can be attached to a flat place where the peripheral wafer is not placed, or can be attached to a tapered portion. Further, even a tray having a flat upper surface as shown in FIG. 2 can be attached to the periphery of the wafer or a place where the wafer is not placed, such as an outer portion of the wafer facet. Since the recent information display means is very small, it can be installed if there is a little space. By attaching these display means, various process information can be written and read. It is also possible to change the process conditions according to the information. Since an information display means can be attached to each tray, wafer single wafer management is also possible. Therefore, it is possible to flow by mixing various devices. For example, in the dicing process according to the present invention, the dicing conditions can be changed for each sheet. Also in the electrical property inspection, different devices can be inspected for each sheet. Further, the inspection conditions can be changed for each chip in one wafer. Even if a wafer stays between processes due to different processing capabilities, the information can be grasped without error for each wafer. In addition, since information can be easily stored, wafers that have undergone tray processing have high traceability, and a highly reliable product can be created.

  The tray can be stored in a tray case or stored in a clean box. In addition, in the case of trays that can be stacked, simple stacking is also possible, so that space can be minimized. Therefore, it can be stocked cleanly and safely within the process and between processes, and / or in large quantities, and process design is facilitated.

  Furthermore, in order to prevent the problem that ultrathin wafers and large-diameter wafers are easily damaged during transfer between processes, consumable interlayer paper is inserted between the wafers when stacking wafers. In the invention, since the tray is used, such an interlayer paper is not necessary, which also has an advantage of reducing the cost.

  As described above in each process, since the processing tray can be automatically transferred after the wafer is sucked to the processing tray, the chip transfer is further performed in the wafer cutting process following the processing tray suction process. Inter-process transfer to the process is automatically possible. Therefore, these consistent lines can be constructed. Furthermore, even if a wafer electrical property inspection step and a wafer appearance inspection step are included between these steps, a consistent automated line can be constructed in the same manner, and a production line with a very low cost can be made. Further, since the information display means can be easily attached to the processing tray, the wafer can be managed and a production line with a high degree of freedom can be made.

  The present invention can be used in a chip processing process after a wafer back grinding step in a semiconductor process. In particular, it can be used in the semiconductor industry using ultra-thin wafers, ultra-thin chips, and large-diameter wafers.

FIG. 1 is a process flow chart showing a preferred embodiment (first invention) of the present invention. FIG. 2A is a diagram showing an embodiment of the processing tray of the present invention. FIG. 2B is a diagram showing an embodiment of the processing tray of the present invention. FIG. 2 (c) is a diagram showing an embodiment of the processing tray of the present invention. FIG. 2 (d) is a diagram showing an embodiment of the processing tray of the present invention. FIG. 3 (a) is a view showing another embodiment of the processing tray of the present invention. FIG. 3B is a view showing another embodiment of the processing tray of the present invention. FIG. 4 is a view showing an embodiment in which a thin sheet is used for the processing tray of the present invention. FIG. 5 (a) is a diagram showing an embodiment in which a wafer with dicing tape is used for the processing tray of the present invention. FIG. 5B is a view showing an embodiment in which a wafer with dicing tape is used for the processing tray of the present invention. FIG. 6 is a process flow chart showing a preferred embodiment (second invention) of the present invention. FIG. 7 is a view showing an embodiment using the etching tray of the present invention. FIG. 8 is a diagram showing another embodiment of the processing tray of the present invention.

Explanation of symbols

21 ... processing tray, 22 ... decompression chamber, 23 ... suction hole, 24 ... suction surface,
25 ... Air intake holes, 26..Suction port, 27..Wafer, 28..Surface protection film,
29 ... Wafer back surface, 31 ... Processing tray, 32 ... Decompression chamber, 33 ... Suction hole,
34 ... suction surface, 35 ... suction hole, 36 ... suction port, 37 ... wafer,
38 ... Tapered part, 39 ... Peripheral part, 41 ... Processing tray, 42 ... Decompression chamber,
43 ... suction hole, 44 ... suction surface, 45 ... suction hole, 46 ... suction port,
47 ... wafer, 48 ... thin sheet, 50 ... dicing blade,
51 ... processing tray, 52 ... decompression chamber, 53 ... suction hole, 54 ... suction surface,
55 ... Intake hole, 56 ... Suction port, 57 ... Wafer, 58 ... Dicing tape,
59 ... cutting part, 60 ... cutting part (to dicing tape), 71 ... processing tray,
72 ... decompression chamber, 73 ... suction hole, 74 ... suction surface, 75 ... suction hole,
76 ... Suction port, 77 ... Wafer, 78 ... Wafer surface protective film,
79 ... Wafer back surface, 81 ... Processing tray, 82 ... Decompression chamber, 83 ... Suction hole,
84 ... suction surface, 85 ... suction hole, 86 ... suction port, 88 ... holding part,
89 ... Adsorption plate

Claims (23)

Bonding the surface protective film to the wafer surface forming the element of the semiconductor element forming wafer;
Processing the wafer back surface facing the wafer surface to a predetermined wafer thickness;
Adsorbing the wafer backside and mounting the wafer on a processing tray;
Dicing the wafer mounted on a processing tray into a desired chip shape;
And a step of transferring the chip to a predetermined place.   2. The method of forming a semiconductor chip according to claim 1, further comprising a step of removing a processing strain layer on the back surface of the wafer before the step of adsorbing and mounting the back surface of the wafer on the processing tray. Bonding the surface protective film to the wafer surface forming the element of the semiconductor element forming wafer;
Grinding the wafer back surface of the wafer surface to a predetermined wafer thickness;
Adsorbing the wafer-attached surface protecting film side having a predetermined wafer thickness and mounting the wafer on an etching tray; and
Removing the processing strain layer on the back surface of the wafer;
Adsorbing the wafer backside and mounting the wafer on a processing tray;
Dicing the wafer mounted on a processing tray into a desired chip shape;
And a step of mounting the chip at a predetermined location.   The semiconductor chip formation according to any one of claims 1 to 3, further comprising a step of peeling the surface protective film attached to the wafer surface after the step of mounting the wafer on the processing tray. Method.   The semiconductor chip formation according to claim 1, further comprising a step of bonding a dicing tape to the wafer back surface after the step of grinding the wafer back surface to obtain a predetermined wafer thickness. Method.   6. The method of forming a semiconductor chip according to claim 1, further comprising an inspection step of inspecting the wafer surface before the step of dicing the wafer into a desired chip shape.   The method of forming a semiconductor chip according to claim 1, further comprising an inspection step of inspecting the wafer surface after the step of dicing the wafer into a desired chip shape.   8. The method of forming a semiconductor chip according to claim 1, further comprising a wafer electrical property inspection step of a device formed on the wafer surface after the step of mounting the wafer on the processing tray.   9. The semiconductor chip formation according to claim 1, further comprising a wafer electrical property inspection step of a device formed on the wafer surface after the step of dicing the wafer into a desired chip shape. Method.   The method for forming a semiconductor chip according to claim 2, wherein the processing strain layer removal method on the back surface of the wafer is performed by dry etching or wet etching.   In the step of removing processing strain on the back surface of the wafer, when the processing strain removing method is dry etching, a part or all of the etching tray is formed of stainless steel. The method for forming a semiconductor chip according to any one of the above items.   In the step of removing the processing strain on the back surface of the wafer, when the processing strain removing method is wet etching, a part or all of the etching tray is formed of a fluorine-based resin such as polytetrafluoroethylene or perfluoroethylene propene copolymer. The method for forming a semiconductor chip according to claim 3, wherein the semiconductor chip is formed.   The method for forming a semiconductor chip according to claim 1, wherein the processing tray is equipped with a vacuum suction unit, and the wafer is vacuum-sucked.   14. The semiconductor according to claim 1, wherein a suction hole on the suction surface of the processing tray exists for each chip position of the wafer and does not exist on the scribe line of the wafer. Chip formation method.   The processing tray is a flat portion in which the wafer suction portion is recessed, the periphery of the wafer suction portion is inclined in a tapered shape, and the peripheral portion of the processing tray has a higher flat portion than the wafer suction portion. The method of forming a semiconductor chip according to claim 1.   15. The method of forming a semiconductor chip according to claim 1, wherein the processing tray has a flat wafer suction surface and its periphery.   The etching tray is a flat part in which the wafer adsorption part is depressed, the periphery of the wafer adsorption part is inclined in a tapered shape, and the peripheral part of the processing tray has a higher flat part than the wafer adsorption part. A method for forming a semiconductor chip according to any one of claims 3 to 16. The method of forming a semiconductor chip according to claim 3, wherein the etching tray has a flat wafer suction surface and its periphery.   19. The method of forming a semiconductor chip according to claim 1, wherein an information display means is attached to the processing tray.   20. The method for forming a semiconductor chip according to claim 1, wherein information display means is attached to the etching tray.   21. The method of forming a semiconductor chip according to claim 1, wherein the shape of the processing tray and the etching tray is a square, a rectangle, a circle, or a shape similar thereto.   The method for forming a semiconductor chip according to any one of claims 1 to 21, wherein a process after the wafer is adsorbed on the processing tray is a fully automatic process. The method for forming a semiconductor chip according to any one of claims 3 to 21, wherein a process after the wafer is adsorbed on the etching tray is a fully automatic process.

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