JP2007273649A - Semiconductor device, substrate for manufacturing same, and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To suppress an electric current flowing via a p-type diffusion region which is formed close to an interface with the GaN semiconductor layer on an Si substrate. <P>SOLUTION: A semiconductor device includes: the Si substrate (10) obtained by elementary ionic implantation; a semiconductor layer (20) arranged on the Si substrate (10), and having at least GaN, AlN, or InN; and electrodes (22, 24, 26), arranged on the semiconductor layer (20). A substrate for manufacturing the semiconductor device and its manufacturing method are provided. <P>COPYRIGHT: (C)2008,JPO&amp;INPIT

Description

  The present invention relates to a semiconductor device, a substrate for manufacturing a semiconductor device, and a method for manufacturing the same, and more particularly to a semiconductor device provided with a semiconductor layer on a Si substrate, a substrate for manufacturing a semiconductor device, and a method for manufacturing the same.

  A semiconductor device using a GaN-based semiconductor, particularly gallium nitride (GaN), is used as a power element that operates at a high frequency and a high output, a light emitting diode or a laser diode that emits light at a short wavelength. Among these semiconductor devices, FETs such as high electron mobility transistors (HEMTs), and vertical resonance as light emitting devices are suitable for performing amplification in high frequency bands such as microwaves, quasi-millimeter waves, and millimeter waves. Development of a laser such as a surface emitting laser (VCSEL) is underway. Note that a GaN-based semiconductor is a semiconductor that originally contains Ga and N, but here is a semiconductor that contains at least one of GaN, AlN, and InN. For example, GaN, AlN, InN, and a mixture of GaN and AlN. AlGaN that is a crystal, InGaN that is a mixed crystal of GaN and InN, and the like.

  In a semiconductor device using a GaN-based semiconductor, a GaN-based semiconductor layer is grown on a substrate such as a Si substrate or a GaN substrate using an MOCVD (organometallic CVD) method. Non-Patent Document 1 discloses that when a GaN-based semiconductor layer is formed, Ga or Al diffuses in the substrate and the vicinity of the GaN-based semiconductor layer of the substrate becomes P-type.

Patent Document 1 discloses a technique for ion-implanting impurities under an element isolation oxide film.
JP 2003-68738 A Pradeep Rajagopal et al., “MOCVD AlGaN / GaN HFETs on Si: Challenges and Issues”, Materials Research Society Symposium Proceeding, 2003 Issue, 798 (Vol. 798), P61-P66

  FIG. 1 is a diagram for explaining a problem in a semiconductor device using a GaN-based semiconductor, taking a conventional HEMT (GaN-based HEMT) using a GaN-based semiconductor as an example. An AlN buffer layer 12, a GaN electron transit layer 14, and an AlGaN electron supply layer 16 are formed as a GaN-based semiconductor layer 20 on a Si (silicon) substrate 10 by MOCVD. A source electrode 22, a drain electrode 24 and a gate electrode 26 are formed on the GaN-based semiconductor layer 20. When the GaN-based semiconductor layer 20 is grown by the MOCVD method, Ga, Al, etc. are peeled off from the inner wall in the chamber of the MOCVD apparatus and diffused into the Si substrate 10. As a result, the P-type diffusion region 30 is formed near the interface between the Si substrate 10 and the GaN-based semiconductor layer 20. As indicated by the arrows in FIG. 1, current flows between the source electrode 22 and the drain electrode 24 via the P-type diffusion region 30.

  The present invention has been made in view of the above problems, and is capable of suppressing a current flowing through a P-type diffusion region formed in the vicinity of an interface between a substrate and a GaN-based semiconductor layer, and for manufacturing a semiconductor device. An object is to provide a substrate and a method for manufacturing the same.

  The present invention comprises a Si substrate into which an element is ion-implanted, a semiconductor layer including at least one of GaN, AlN, and InN provided on the Si substrate, and an electrode provided on the semiconductor layer. This is a semiconductor device. According to the present invention, the current flowing through the P-type diffusion region formed near the interface with the semiconductor layer of the Si substrate can be suppressed.

  In the above configuration, the semiconductor layer may be configured by at least one of GaN, AlGaN, AlN, AlInN, AlInGaN, InGaN, and InN. According to this configuration, since Ga, Al, or In forms a P-type diffusion region, it is particularly effective to provide an ion implantation region.

  In the above structure, the element may be at least one of O, Fe, Zn, Si, Ar, and Be. According to this configuration, an ion implantation region can be easily formed because of light ions.

  In the above structure, the semiconductor device may be a lateral FET or a laser.

  The present invention includes a step of ion-implanting an element into a Si substrate, a step of growing a semiconductor layer containing at least one of GaN, AlN, and InN on the Si substrate using MOCVD, and an electrode on the semiconductor layer. Forming the semiconductor device. According to the present invention, the current flowing through the P-type diffusion region formed near the interface with the semiconductor layer of the Si substrate can be suppressed.

  In the above structure, the element may be at least one of O, Fe, Zn, Si, Ar, and Be. According to this configuration, an ion implantation region can be easily formed because of light ions.

  In the above configuration, the Si substrate may be heat treated before the step of growing the semiconductor layer. According to this configuration, it is possible to recover the crystallinity deteriorated when the ion implantation region is formed.

  In the above structure, the step of performing the heat treatment and the step of growing the semiconductor layer can be performed continuously in an MOCVD apparatus. According to this structure, it can suppress that the surface of a board | substrate after heat processing oxidizes.

  The present invention includes a substrate for manufacturing a semiconductor device, comprising: a Si substrate into which an element is ion-implanted; and a semiconductor layer including at least one of GaN, AlN, and InN provided on the Si substrate. It is. By manufacturing a semiconductor device using the substrate for manufacturing a semiconductor device according to the present invention, the current flowing through the P-type diffusion region formed in the vicinity of the interface of the Si substrate with the semiconductor layer can be suppressed.

  In the above configuration, the semiconductor layer may be configured by at least one of GaN, AlGaN, AlN, AlInN, AlInGaN, InGaN, and InN. According to this configuration, since Ga, Al, or In forms a P-type diffusion region, it is particularly effective to provide an ion implantation region.

  In the above structure, the element may be at least one of O, Fe, Zn, Si, Ar, and Be. According to this configuration, an ion implantation region can be easily formed because of light ions.

  In the above structure, the semiconductor layer may be provided in contact with the Si substrate. According to this configuration, the upper part of the P-type diffusion region can be compensated by the ion implantation region.

  The present invention is for manufacturing a semiconductor device comprising: a step of ion-implanting an element into a Si substrate; and a step of growing a semiconductor layer containing at least one of GaN, AlN and InN on the Si substrate using MOCVD. A method for manufacturing a substrate. By suppressing the current flowing through the P-type diffusion region formed in the vicinity of the interface with the semiconductor layer of the Si substrate by manufacturing the semiconductor device using the semiconductor device manufacturing substrate manufactured by the manufacturing method according to the present invention. Can do.

  In the above structure, the element may be at least one of O, Fe, Zn, Si, Ar, and Be. According to this configuration, an ion implantation region can be easily formed because of light ions.

  In the above configuration, the Si substrate may be heat treated before the step of growing the semiconductor layer. According to this configuration, it is possible to recover the crystallinity deteriorated when the ion implantation region is formed.

  In the above structure, the step of performing the heat treatment and the step of growing the semiconductor layer can be performed continuously in an MOCVD apparatus. According to this structure, it can suppress that the surface of a board | substrate after heat processing oxidizes.

  According to the present invention, there are provided a semiconductor device, a substrate for manufacturing a semiconductor device, and a method for manufacturing the same that can suppress a current flowing through a P-type diffusion region formed in the vicinity of the interface of the substrate with the GaN-based semiconductor layer. be able to.

  Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a diagram illustrating the method of manufacturing the semiconductor device according to the first embodiment. Referring to FIG. 2A, oxygen (O) is ion-implanted as an impurity into an Si substrate 10 having a (111) plane as a main surface by using an ion implantation method. For example, the ion implantation is performed under the conditions of an ion implantation energy of 100 keV and a dose of 8 × 10 ¹⁴ cm ⁻² . As a result, an ion implantation region 32 in which O is ion-implanted as an impurity is formed on the surface of the substrate 10 on which the GaN-based semiconductor layer is to be formed. At this time, since the ion implantation energy is increased, the oxygen concentration on the surface of the Si substrate 10 is lowered, and it is considered that no oxide film is formed on the substrate surface.

  Referring to FIG. 2B, in order to clean the surface of the Si substrate 10 into which O ions are implanted, for example, the substrate 10 is immersed in a buffered hydrofluoric acid solution for 1 minute and washed with water for 5 minutes. Installed in MOCVD equipment. For example, the substrate is maintained at a substrate temperature of 1000 ° C. for 10 minutes in a hydrogen atmosphere to recover crystallinity deteriorated by ion implantation. Thereafter, the substrate temperature is continuously set to 1150 ° C. in the MOCVD apparatus, and the AlN buffer layer 12 is grown in the [0001] direction of the substrate 10 by 300 nm. Thereafter, the substrate temperature is set to 1050 ° C., and the GaN electron transit layer 14 is grown to 1000 nm. The substrate temperature is set to 1050 ° C., and the AlGaN electron supply layer 16 (AlN composition ratio is 0.3) is grown to 30 nm. As described above, the GaN-based semiconductor layer 20 including the AlN buffer layer 12, the GaN electron transit layer 14, and the AlGaN electron supply layer 16 is formed on the ion implantation region 32 of the substrate 10. Thus, a semiconductor manufacturing substrate is completed.

  Referring to FIG. 2C, a silicon nitride film 28 is formed to a thickness of about 200 nm on the GaN-based semiconductor layer 20 using the semiconductor manufacturing substrate of FIG. A predetermined region of the silicon nitride film 28 is removed, and a source electrode 22 and a drain electrode 24 made of a Ti / Au film or a Ti / Al film are formed using a vapor deposition method and a lift-off method. Further, a gate electrode 26 made of a Ni / Au film or a Ni / Al film is formed on the GaN-based semiconductor layer 20 by using an evaporation method and a lift-off method. Thus, the GaN-based HEMT according to Example 1 is completed.

In the semiconductor device according to the first embodiment, the acceptor of the P-type diffusion region 30 introduced into the substrate 10 when the ion-implanted region 32 into which impurities are ion-implanted forms the GaN-based semiconductor layer 20 using the MOCVD method. To compensate. FIG. 3 is a schematic view showing the acceptor concentration diffused in the P-type diffusion region 30 and the ion-implanted impurity concentration with respect to the depth direction from the substrate surface. As shown in FIG. 3, by setting the impurity concentration of the ion implantation region 32 so as to compensate at least a part of the acceptor of the P-type diffusion region 30, the source electrode 22 to the drain electrode 24 caused by the P-type diffusion region 30 are set. Leakage current can be reduced. The ion implantation energy and dose amount during the ion implantation can be selected as appropriate, but in order to compensate for the acceptor of the P-type diffusion region 30, the impurity concentration is preferably about 1 × 10 ¹⁷ cm ⁻³ . For this reason, it is preferable that a dose amount shall be 5 * 10 ^{< 13} > cm ^<-2 > or more. Further, in order to form the ion implantation region 32 to a depth of 2 μm, which is about the same as the depth of the P-type diffusion region 30, the ion implantation energy is preferably about 100 keV. When ions other than O are implanted, the ion implantation energy and the dose can be selected so that the impurity concentration and depth are the same as those of O.

  FIG. 4 is a schematic diagram showing the source-drain breakdown voltage with respect to the source-drain distance. In a conventional HEMT in which the ion implantation region 32 is not formed, the source-drain breakdown voltage is constant regardless of the source-drain distance. On the other hand, in Example 1 in which the ion implantation region 32 is provided, the source / drain breakdown voltage is improved as the source / drain distance is increased. In the conventional example, since the source / drain breakdown voltage is determined by the leakage current caused by the P-type diffusion region 30, the source / drain breakdown voltage is constant regardless of the source-drain distance. In Example 1 in which the leak current is suppressed, the source-drain breakdown voltage can be improved by increasing the source-drain distance. In a HEMT having a source-drain distance of 10 μm, the source-drain breakdown voltage was about 250 V in the conventional example, but could be about 500 V in the example. Further, the conventional HEMT has a large parasitic capacitance because the P-type diffusion region 30 is conductive. According to the first embodiment, since the P-type diffusion region 30 can be inactivated, parasitic capacitance can be reduced. In the conventional example, the parasitic capacitance was about 5 pF per 1 mm of the gate width, but in Example 1, it could be about 1 pF.

  In FIG. 2A, an element that is ion-implanted as an impurity into the substrate 10 may be an impurity that forms a deep level that compensates for the acceptor of the P-type diffusion region 30 in addition to O. For example, there are Fe, W, Sn, K, Cu, Ge, Sr, Hg, Mo, Ni, V, Co, Au, Zn, Pt, Cd, Ag, Mn, S, Ba, Cs, or Be. Since impurities are ion-implanted deeply, the impurities are preferably light elements. Therefore, it is preferable to use Fe, Zn, or Be in addition to O.

  In addition, if Si or Ar is excessively ion-implanted into the Si substrate 10, the generation and travel of P-type carriers are hindered, so that Si or Ar can be ion-implanted as an impurity. This is because when Si is ion-implanted into the Si substrate 10, the implanted Si tries to bond with the original Si in the Si crystal, but since the original Si in the Si crystal is already bonded, it is injected. Si cannot bond. Therefore, when a large amount of Si is injected into the Si substrate, the crystallinity of the Si substrate 10 is not completely recovered even if heat treatment is performed. Thereby, it is thought that the level which inhibits carrier travel can be formed. The same is considered when Ar is implanted into the Si substrate 10.

  As shown in FIG. 2B, it is preferable to heat-treat the substrate 10 before the step of growing the GaN-based semiconductor layer 20. Thereby, the crystallinity of the surface of the substrate 10 deteriorated by the formation of the ion implantation region 32 can be recovered. Therefore, a GaN-based semiconductor layer with good crystallinity can be formed. In addition, the temperature and time of heat processing can be selected suitably.

  Further, it is preferable that the step of performing the heat treatment and the step of growing the GaN-based semiconductor layer are continuously performed in the MOCVD apparatus. Thereby, it can suppress that the substrate surface after heat processing is oxidized.

  A semiconductor layer containing GaN, AlN, or InN, which is the GaN-based semiconductor layer 20, forms a P-type diffusion region 30 by diffusing group III elements in the substrate 10 during growth using the MOCVD method. Therefore, it is effective to form the ion implantation region 32. In particular, when the GaN-based semiconductor layer is made of at least one of GaN, AlGaN, AlN, AlInN, AlInGaN, InGaN, and InN, Ga, Al, or In forms a P-type diffusion layer on the substrate 10. Therefore, it is particularly effective to form the ion implantation region 32.

  Further, the GaN-based semiconductor layer 20 is provided in contact with the ion implantation region 32 of the Si substrate 10. Thereby, the upper part of the P-type diffusion region 30 can be compensated by the ion implantation region 32.

  The substrate 10 on which the GaN-based semiconductor layer 20 is formed can be used as a semiconductor manufacturing substrate. By manufacturing a GaN-based HEMT using this semiconductor manufacturing substrate, the current flowing through the P-type diffusion region 30 formed in the vicinity of the interface between the substrate 10 and the GaN-based semiconductor layer 20 can be suppressed.

  Example 2 is an example of a GaN-based VCSEL (vertical cavity surface emitting laser). In FIG. 5, the ion implantation region 79 is formed by ion implantation of O into the Si substrate 78 as in the first embodiment. Thereafter, as a GaN-based semiconductor layer using MOCVD, a GaN thick film layer 80, a GaN-based buffer layer 81, an n-type GaN layer 82 (grad layer), a quantum well structure InGaN layer 83 (GaN-based active layer), current An AlGaN layer 84 (grad layer) and a p-type GaN contact layer 85, which are control layers, are formed. The n-type GaN layer 82 is removed for element isolation. A silicon nitride film 87 and a p-type ohmic electrode 86a are formed on the GaN-based semiconductor layer. The polyimide film 88 and the wiring layer 89 are formed. An n-type ohmic electrode 86b is formed on the surface of the substrate 78 opposite to the GaN-based semiconductor layer. In this way, the GaN-based VCSEL according to Example 2 is completed.

  According to the second embodiment, when a voltage is applied to the p-type ohmic electrode 86a and the n-type ohmic electrode 86b and carriers are injected from the p-type ohmic electrode 86a, the carriers are the p-type GaN contact layer 85, the AlGaN layer. 84, drift in the InGaN layer 83 and the n-type GaN layer 82 and flow into the n-type ohmic electrode 86 b formed on the back surface of the substrate 78. At this time, light is emitted from the InGaN layer 83 having a quantum well structure by recombination of electron-hole pairs based on the quantum effect, and this light is extracted from above. That is, light is output in a direction perpendicular to the substrate surface.

  By providing the ion implantation region 79 in the VCSEL as in the second embodiment, the leakage current caused by the P-type diffusion region 30 formed at the interface of the GaN thick film layer 80 of the substrate 78 can be suppressed. As described above, the semiconductor device formed of the GaN-based semiconductor layer is not limited to the lateral FET, and may be a laser such as a VCSEL. Further, the semiconductor device is not limited to a lateral FET or a laser, and may be another semiconductor device. In that case, the electrodes formed on the GaN-based semiconductor layer are not limited to the source electrode, the drain electrode, and the like, but may be other electrodes. Also in this case, the leakage current between the electrodes can be suppressed. A lateral FET is an FET in which a source electrode, a drain electrode, and a gate electrode are formed on the surface side of a substrate.

  Example 1 and Example 2 are examples of the Si substrate, but the same effect is exhibited when the material of the substrate is a group IV single element or a group IV-IV compound. When the growing semiconductor layer is a group III-V semiconductor layer, the group III element often remains in the growth apparatus (for example, MOCVD). This is because the group III element becomes a P-type acceptor in the group IV single element and group IV-IV compounds.

The preferred embodiments of the present invention have been described in detail above. However, the present invention is not limited to the specific embodiments, and various modifications and changes can be made within the scope of the gist of the present invention described in the claims. It can be changed.

FIG. 1 is a schematic diagram for explaining a problem of a semiconductor device according to a conventional example. FIG. 2A and FIG. 2C are cross-sectional views illustrating a method for manufacturing a GaN-based HEMT according to the first embodiment. FIG. 3 is a diagram showing the impurity concentration in the substrate of the GaN-based HEMT according to Example 1. FIG. 4 is a diagram showing the source / drain breakdown voltage of the GaN-based HEMT according to the first embodiment. FIG. 5 is a cross-sectional view of a GaN-based VCSEL according to the second embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Substrate 12 AlN buffer layer 14 GaN electron transit layer 16 AlGaN electron supply layer 20 GaN-based semiconductor layer 22 Source electrode 24 Drain electrode 26 Gate electrode 30 P-type diffusion region 32 Ion implantation region 78 Substrate 79 Ion implantation region 80 GaN thick film layer 81 GaN-based buffer layer 82 n-type GaN layer 83 InGaN layer with quantum well structure 84 AlGaN layer as current control layer 85 p-type GaN contact layer 86a p-type ohmic electrode 86b n-type ohmic electrode 88 polyimide film 89 wiring layer

Claims (16)

A Si substrate into which elements are ion-implanted;
A semiconductor layer including at least one of GaN, AlN and InN provided on the Si substrate;
And an electrode provided on the semiconductor layer.   2. The semiconductor device according to claim 1, wherein the semiconductor layer is made of at least one of GaN, AlGaN, AlN, AlInN, AlInGaN, InGaN, and InN.   The semiconductor device according to claim 1, wherein the element is at least one of O, Fe, Zn, Si, Ar, and Be.   2. The semiconductor device according to claim 1, wherein the semiconductor device is a lateral FET or a laser. A step of ion-implanting elements into the Si substrate;
Growing a semiconductor layer containing at least one of GaN, AlN and InN on the Si substrate using MOCVD;
And a step of forming an electrode on the semiconductor layer.   6. The method of manufacturing a semiconductor device according to claim 5, wherein the element is at least one of O, Fe, Zn, Si, Ar, and Be.   6. The method of manufacturing a semiconductor device according to claim 5, further comprising a step of heat-treating the Si substrate before the step of growing the semiconductor layer.   8. The method for manufacturing a semiconductor device according to claim 7, wherein the step of performing the heat treatment and the step of growing the semiconductor layer are performed continuously in an MOCVD apparatus. A Si substrate into which elements are ion-implanted;
And a semiconductor layer including at least one of GaN, AlN, and InN provided on the Si substrate.   10. The semiconductor device manufacturing substrate according to claim 9, wherein the semiconductor layer is made of at least one of GaN, AlGaN, AlN, AlInN, AlInGaN, InGaN, and InN.   10. The semiconductor device manufacturing substrate according to claim 9, wherein the element is at least one of O, Fe, Zn, Si, Ar, and Be.   The semiconductor device manufacturing substrate according to claim 9, wherein the semiconductor layer is provided in contact with the Si substrate. A step of ion-implanting elements into the Si substrate;
And a step of growing a semiconductor layer containing at least one of GaN, AlN and InN on the Si substrate using MOCVD, and a method for manufacturing a substrate for manufacturing a semiconductor device.   14. The method for manufacturing a substrate for manufacturing a semiconductor device according to claim 13, wherein the element is at least one of O, Fe, Zn, Si, Ar, and Be.   14. The method for manufacturing a substrate for manufacturing a semiconductor device according to claim 13, further comprising a step of heat-treating the Si substrate before the step of growing the semiconductor layer. 14. The method for manufacturing a substrate for manufacturing a semiconductor device according to claim 13, wherein the step of performing the heat treatment and the step of growing the semiconductor layer are continuously performed in an MOCVD apparatus.

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