JP2007258829A - Gain switching amplifier - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve an input/output characteristic in a high gain operation while decreasing the number of components. <P>SOLUTION: The gain switching amplifier S is provided with a bypass circuit 101 in addition to a high frequency amplifier 3, and the bypass circuit 101 is provided with series connection of a first switch circuit 4, a first impedance element 6, and a second switch circuit 5 in the order from its input side, and a second impedance element 5 is connected between ground and a mutual connection point between the first switch circuit 4 and the first impedance element 6, and a third impedance element 8 is connected in series between ground and a mutual connection point between the second switch circuit 5 and the first impedance element 6 so that the input output characteristic in the high gain operating state is improved by decreasing the number of switch circuits more than that of prior arts. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a gain switching amplifier used for a receiving circuit or the like in a mobile communication device or a high-frequency device, and more particularly to a device for improving characteristics during high gain operation.

Conventionally, as this type of amplifier, for example, an amplification circuit is bypassed with respect to an input signal, and a bypass for performing a gain attenuating operation at the time of inputting a large signal required in a receiving unit of a cellular phone device using a WCDMA system or the like. Various gain switching amplifiers in which a circuit is provided between input and output have been proposed (see, for example, Patent Document 1).
FIG. 3 shows an example of the configuration of such a conventional gain switching amplifier. Hereinafter, the conventional circuit will be described with reference to FIG.

In this gain switching amplifier, a high-frequency amplifier LNA in which a low-noise amplifier circuit using an active element such as a transistor is integrated is provided between a high-frequency input terminal 31 and a high-frequency output terminal 32. Thus, a circuit for diverting the received signal (input signal) to the high frequency output terminal 32 side is configured and provided as described below.
That is, the impedance element Z1, the switch circuit SW1, and the impedance element Z2 are provided in series between the high frequency input terminal 31 and the high frequency output terminal 32.

  Further, in order to match the input / output impedance when the high frequency amplifier LNA is in a non-operating state, an impedance element Z3 and a switch circuit SW2 are provided in series between the high frequency input terminal 31 and the ground potential, An impedance element Z4 and a switch circuit SW3 are connected in series between the output terminal 32 and the ground potential.

  Since the gain switching amplifier having such a configuration matches the input / output impedance with the characteristic impedance of the external transmission line, the input matching circuit 33 is externally connected to the high frequency input terminal 31, and the output matching circuit 34 is connected to the high frequency output terminal 32. They are connected to each other, and high-frequency signals are input and output via these.

  Next, the operation of the gain switching amplifier will be described. First, when power is supplied to the high frequency amplifier LNA, a low noise amplification operation is performed on the high frequency signal. In this state, since it is a high gain operation, the switch circuit SW1 is set to an off state, and the detour path from the high frequency input terminal 31 to the high frequency output terminal 32 does not function.

Furthermore, since the impedance elements Z3 and Z4 act only when the high frequency signal is diverted from the high frequency input terminal 31 to the high frequency output terminal 32, the impedance elements Z3 and Z4 are turned off during the low noise amplification operation. For this reason, the impedance elements Z3 and Z4 are not connected to the ground potential and are in a floating state.
The input matching circuit 33 and the output matching circuit 34 connected to the outside of the gain switching amplifier are normally configured by reactance elements such as capacitors and inductors, and perform a low noise amplification operation as described above. In the state, the adjustment is made so that the standing wave ratio is low so that an appropriate amplification gain can be obtained. Therefore, in the low noise amplification operation state, a so-called matching state is obtained.

  On the other hand, in a state where the amplification gain is lowered, the high-frequency signal is passed through a bypass circuit from the high-frequency input terminal 31 to the high-frequency output terminal 32, and the high-frequency amplifier LNA is cut off to be inactive. That is, the input high-frequency signal is diverted to the high-frequency output terminal 32 via the impedance element Z1, the on-state switch circuit SW1 and the impedance element Z2, and the gain switching amplifier functions as an attenuation circuit without gain. .

  In such a state, since the operating current of the high frequency amplifier LNA is cut off, the input impedance and the output impedance show values different from those when the power is turned on. In this case, if the specific configuration of the high-frequency amplifier LNA is configured based on, for example, a source-grounded FET low-noise amplifier circuit as shown in FIG. 4, for obtaining an appropriate gain, In the state where the drain current is supplied and the state where the drain current is cut off, the impedance of the gate where the signal is input and the impedance of the drain where the signal is output are greatly different in each state. .

In addition, since the input / output matching circuits 33 and 34 are matched in a state where power is supplied to the high frequency amplifier LNA, the matching circuit 33 is in a state where the power supply to the high frequency amplifier LNA is cut off. , 34 cannot be matched to an appropriate standing wave ratio.
In such a state in which the high-frequency signal is allowed to pass to the detour circuit, the mismatch described above occurs, so that it is necessary to correct the impedance of the input matching circuit 33 and the output matching circuit 34. Therefore, the switch circuits SW2 and SW3 are turned on, and the impedance correction by the impedance elements Z3 and Z4 functions. The impedance elements Z3 and Z4 function to form a matching circuit including the impedances Z1 and Z2. Therefore, even when the high-frequency signal is allowed to pass through the detour circuit, proper input / output matching is achieved. The state is secured, and the high-frequency signal can be diverted from the high-frequency input terminal 31 to the high-frequency output terminal 32 with an appropriate amount of attenuation.

JP 2004-194105 A (page 4-7, FIG. 1)

  However, in the conventional circuit described above, three switch circuits are required to bypass the high-frequency signal and attenuate the amplification gain. As such a switch circuit, for example, as shown in FIG. 5, a circuit configured by using an FET may be used as a preferable circuit example, but one FET 1 is turned on / off. In order to ensure the above, three resistance elements R1, R2, and R3 for applying a bias voltage and two DC block capacitors C1 and C2 for blocking a DC current are required. Therefore, when a plurality of switch circuits are required, the above-described components are required by the number of the switch circuits, which increases the number of components of the gain switching amplifier.

  For example, a configuration in which a gain switching amplifier is provided corresponding to a plurality of frequency bands may be employed. In this case, a circuit as shown in FIG. 5 is provided for each frequency band. There is a problem in that the number of elements (number of parts) required for the configuration increases remarkably, and the cost of the entire apparatus increases.

  Further, in the conventional gain switching amplifier described above, one switch circuit SW1 is used to open and close the bypass circuit. When the high-frequency amplifier LNA is operated, the switch circuit SW1 is turned off. Since there is only one, the isolation from the output side to the input side of the high-frequency amplifier LNA is insufficient, and the reverse gain of the high-frequency amplifier LNA increases, so the forward direction from the input side to the output side of the high-frequency amplifier LNA The gain will be reduced.

The present invention has been made in view of the above circumstances, and while ensuring a stable amplification gain at the time of high gain operation while reducing the number of components, it is intended to improve input / output characteristics and improve operational stability. A gain switching amplifier is provided.
Another object of the present invention is to improve the isolation characteristic from the high frequency output side to the high frequency input side during the amplification operation.

In order to achieve the above object of the present invention, a gain switching amplifier according to the present invention comprises:
A high frequency signal is input through an external input matching circuit, and an amplified signal is output through an external output matching circuit. A gain switching amplifier provided with a detour circuit that diverts to the output matching circuit side in response,
The bypass circuit is provided with a first switch circuit, a first impedance element, and a second switch circuit connected in series from the input side between the input side and the output side,
Between a connection point between the first switch circuit and the first impedance element and the ground, or between a connection point between the second switch circuit and the first impedance element and the ground. At least one of the second impedance element and the third impedance element is connected in series.
The gain switching amplifier according to the present invention is configured to receive a high-frequency signal via an external input matching circuit and output an amplified signal via an external output matching circuit. And a gain switching amplifier provided with a bypass circuit for bypassing the input high-frequency signal to the output matching circuit side as desired,
The bypass circuit includes a first switch circuit and a second switch circuit connected in series from the input side between the input side and the output side, and the first switch circuit and the input side. Or at least one of the second switch circuit and the output side is provided with a first impedance element or a second impedance element connected in series,
It is also preferable that a third impedance element is connected in series between the connection point of the first and second switch circuits and the ground.
Furthermore, in the above configuration, it is also preferable that the impedance element is constituted by a reactance element.

  According to the present invention, the number of parts of the circuit as a whole can be reduced because the switch circuit can be reduced as compared with the prior art, and a stable and high amplification gain can be secured during high gain operation. As a result, the cost can be reduced, and more stable operation can be ensured as compared with the prior art.

Hereinafter, embodiments of the present invention will be described with reference to FIGS. 1 and 2.
The members and arrangements described below do not limit the present invention and can be variously modified within the scope of the gist of the present invention.
First, a first configuration example of the gain switching amplifier S according to the embodiment of the present invention will be described with reference to FIG.
The gain switching amplifier S is suitable for use in, for example, a receiving unit of a cellular phone device such as a WCDMA system, and an active element such as a transistor is used between the high frequency input terminal 1 and the high frequency output terminal 2. A high-frequency amplifier (indicated as “LNA” in FIG. 1) 3 in which the low-noise amplifier circuit is integrated is provided, and the received signal (input signal) is diverted to the high-frequency output terminal 2 side as necessary. For this reason, a detour circuit 101 is provided.

  In order to match the input / output impedance with the characteristic impedance of the external transmission line, the gain switching amplifier S has an external input matching circuit 11 at the high frequency input terminal 1 and an output matching circuit 12 at the high frequency output terminal 2. By being connected, high-frequency signals are input and output via these.

  Next, the configuration of the detour path 101 will be described more specifically. In the embodiment of the present invention, the connection point between the high frequency input terminal 1 and the input stage of the high frequency amplifier 3, the high frequency output terminal 2 and the high frequency Between the connection point of the amplifier 3 and the output stage, the first switch circuit (indicated as “SW1” in FIG. 1) 4 and the first impedance element (in FIG. And a second switch circuit (indicated as “SW2” in FIG. 1) 5 are connected in series.

A second impedance element (indicated as “Z2” in FIG. 1) 7 is provided between the connection point between the first switch circuit 4 and the first impedance element 6 and the ground. Yes.
Further, a third impedance element (indicated as “Z3” in FIG. 1) 8 is provided between the connection point between the second switch circuit 5 and the first impedance element 6 and the ground. Yes.

Next, the operation in this configuration will be described.
First, in order to set the gain switching amplifier S in the embodiment of the present invention to a high gain amplifying operation state, while supplying power to the high frequency amplifier 3, the first and second switch circuits 4, 5 of the detour circuit 101 are supplied. Is turned off, a normal low noise amplification operation state by the high frequency amplifier 3 can be obtained.

On the other hand, when the bypass circuit 101 is in the operating state, the power supply to the high-frequency amplifier 3 is shut off and the first and second switch circuits 4 and 5 are turned on.
As a result, a high-frequency signal input to the high-frequency input terminal 1, for example, a reception signal is attenuated to the high-frequency output terminal 2 through the first switch circuit 4, the first impedance element 6, and the second switch circuit 5. Will be reached.

  In such an operating state, as is well known, the impedance at the high-frequency input terminal 1 is different from that when the high-frequency amplifier 3 is in the operating state, so that the first, second, and third impedance elements 6 to 8 are connected. By setting the optimum value, even when the high-frequency amplifier 3 is in the non-operating state, the impedance approximates the impedance of the high-frequency input terminal 1 in the operating state.

  This is because the resistance components in the ON state of the first and second switch circuits 4 and 5 are set sufficiently lower than the impedance values of the first to third impedance elements 6 to 8 at the applied frequency. The first impedance element 6 is equivalent to the combined impedance of the impedance elements Z1 and Z2 in the conventional circuit shown in FIG. 3, and the second impedance element 7 is also the impedance element Z3 in the conventional circuit of FIG. This is because the third impedance element 8 is also equivalent to the impedance element Z4 in the conventional circuit of FIG.

  Therefore, the matching between the input matching circuit 11 connected to the outside and the high frequency input terminal 1 and the matching between the output matching circuit 12 connected to the outside and the high frequency output terminal 2 are low standing wave ratios as in the conventional circuit. It will be realized in the state.

  Further, by providing the first and second switch circuits 4 and 5 and the first to third impedance elements 6 to 8, the high frequency input terminal 1 and the high frequency when the high frequency amplifier 3 is in an operating state with a high gain are provided. High isolation characteristics between the output terminals 2 can be obtained. That is, between the high-frequency input terminal 1 and the high-frequency output terminal 2, the first and second switch circuits 4 and 5 in the off state and the first impedance element 6 are connected in series. Compared to the case where there is only one switch circuit Z1 in the off state as in the conventional circuit shown in FIG. 3, higher isolation characteristics are surely ensured.

  In addition, the second and third impedance elements 7 and 8 acting as a parallel element with respect to the ground potential, that is, the ground potential, are connected between the first switch circuit 4 and the second switch circuit 5 in the off state. Since the connection is made, the impedance at the connection point between the first switch circuit 4 and the second switch circuit 5 is kept low, and the isolation characteristic between the high-frequency input terminal 1 and the high-frequency output terminal 2 is reliably improved as compared with the conventional case. Will be.

Increasing the isolation characteristic between the high-frequency input terminal 1 and the high-frequency output terminal 2 in this way suppresses the reverse gain from the output side to the input side during the operation of the high-frequency amplifier 3. That is, the desired forward gain is improved, and as a result, the stability of the high frequency amplifier 3 against parasitic oscillation and the like is improved.
Depending on the setting of the attenuation amount in the detour path 101, either one of the second and third impedance elements 7 and 8 may be provided. Even in this case, the same action as described above, The effect can be realized.

Next, a second configuration example will be described with reference to FIG. The same components as those in the configuration example shown in FIG. 1 are denoted by the same reference numerals, and detailed description thereof will be omitted. Hereinafter, different points will be mainly described.
This second configuration example is different in connection of the detour path 101A as described below, and the other components are the same as the configuration example shown in FIG.
More specifically, in the detour circuit 101A of the second configuration example, the connection point between the high frequency input terminal 1 and the input stage of the high frequency amplifier 3, the high frequency output terminal 2 and the output stage of the high frequency amplifier 3 are described below. The first impedance element 6, the first and second switch circuits 4 and 5, and the second impedance element 7 are connected in series from the high frequency input terminal 1 side. Further, a third impedance element 8 is provided between the connection point between the first and second switch circuits 4 and 5 and the ground.

  In the second configuration example, the first and second impedance elements 6 and 7 as series impedance elements and the third impedance element 8 as parallel elements, the input matching circuit 11 during the operation of the detour path 101A, Matching with the output matching circuit 12 is performed, and a function equivalent to the first configuration example shown in FIG. 1 is realized.

  In particular, as a specific configuration of the first and second switch circuits 4 and 5, for example, a circuit in which an ON / OFF operation between the drain and source of the field effect transistor as shown in FIG. 4 is used is used. In this case, by using a capacitor as the first and second impedance elements 6 and 7, it can be used as a DC capacitor, so that it is not necessary to provide a DC capacitor separately, and the number of components is reduced. .

  Depending on the setting of the attenuation amount in the detour path 101A, either one of the first and second impedance elements 6 and 7 may be provided. Even in this case, the same action as described above, The effect can be realized.

It is a block diagram which shows the 1st structural example of the gain switching amplifier in embodiment of this invention. It is a block diagram which shows the 2nd structural example of the gain switching amplifier in embodiment of this invention. It is a block diagram which shows the structural example of a conventional circuit. FIG. 5 is a circuit diagram showing a specific circuit configuration example of a high-frequency amplifier in the conventional circuit shown in FIG. 4. FIG. 5 is a circuit diagram showing a specific circuit configuration example of a switch circuit in the conventional circuit shown in FIG. 4.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... High frequency input terminal 2 ... High frequency output terminal 3 ... High frequency amplifier 4 ... 1st switch circuit 5 ... 2nd switch circuit 6 ... 1st impedance element 7 ... 2nd impedance element 8 ... 3rd impedance element 11 ... Input matching circuit 12 ... Output matching circuit 101 ... Detour circuit (first configuration example)
101A ... detour circuit (second configuration example)

Claims (3)

A high frequency signal is input through an external input matching circuit, and an amplified signal is output through an external output matching circuit. A gain switching amplifier provided with a detour circuit that diverts to the output matching circuit side in response,
The bypass circuit is provided with a first switch circuit, a first impedance element, and a second switch circuit connected in series from the input side between the input side and the output side,
Between a connection point between the first switch circuit and the first impedance element and the ground, or between a connection point between the second switch circuit and the first impedance element and the ground. A gain switching amplifier comprising a second impedance element or a third impedance element connected in series to at least one of them. A high frequency signal is input through an external input matching circuit, and an amplified signal is output through an external output matching circuit. A gain switching amplifier provided with a detour circuit that diverts to the output matching circuit side in response,
The bypass circuit includes a first switch circuit and a second switch circuit connected in series from the input side between the input side and the output side, and the first switch circuit and the input side. Or at least one of the second switch circuit and the output side is provided with a first impedance element or a second impedance element connected in series,
A gain-switching amplifier comprising a third impedance element connected in series between a connection point between the first and second switch circuits and the ground.   3. The gain switching amplifier according to claim 1, wherein the impedance element is constituted by a reactance element.

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