JP2007258410A - Wiring board connecting structure and its manufacturing method - Google Patents

Wiring board connecting structure and its manufacturing method Download PDF

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JP2007258410A
JP2007258410A JP2006080265A JP2006080265A JP2007258410A JP 2007258410 A JP2007258410 A JP 2007258410A JP 2006080265 A JP2006080265 A JP 2006080265A JP 2006080265 A JP2006080265 A JP 2006080265A JP 2007258410 A JP2007258410 A JP 2007258410A
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layer
terminal
wiring board
wiring
layers
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Toshiaki Kasai
敏明 葛西
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Fujikura Ltd
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Fujikura Ltd
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<P>PROBLEM TO BE SOLVED: To provide a wiring board connecting structure which enables sure thermocompression bonding between wiring boards, can suppress the sticking out of a conductive connection layer to the side between interconnection layers, and can also prevent short circuits between the interconnection layers; and also to provide its manufacturing method. <P>SOLUTION: The wiring board connecting structure comprises first and second wiring boards 10 and 11 having first and second interconnection layers 10 and 11, respectively; a first terminal layer J1a having one planar pattern shape which is continuously formed with the first interconnection layer J1 in a partial region of the first wiring board 10; a second terminal layer J2a which is formed continuously with the second interconnection layer J2 in a partial region of the second wiring board 11, and is so arranged as to face the first terminal layer in the thickness direction within a range of the one planar pattern shape; and conductive adhesive layers F1a and F2a for thermocompression bonding which are interposed between the first and second terminal layers. The second terminal layer J2a has such a pattern shape as to have spaces G1 which face the first terminal layer J1a. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、配線基板接続構造体及びその製造方法に係り、特に配線ピッチの微細化が進むFPCとFPCとの熱圧着による基板間接続に好適な配線基板接続構造体及びその製造方法に関する。   The present invention relates to a wiring board connection structure and a manufacturing method thereof, and more particularly, to a wiring board connection structure suitable for inter-board connection by thermocompression bonding of an FPC and an FPC in which the wiring pitch is becoming finer and a manufacturing method thereof.

近年、各種電子機器の分野等ではその小形化、薄形化及び軽量化が要求され、この要求に応えて、薄肉で柔軟性に富んだFPC(フレキシブル プリンテッド サーキット)が電子機器に組込まれることが多く、更にはこのようなFPCと他のFPCとの組合わせによる基板間接続の要望や要求が益々高まってきている。   In recent years, there has been a demand for miniaturization, thickness reduction, and weight reduction in the field of various electronic devices, and in response to this requirement, a thin and flexible FPC (Flexible Printed Circuit) has been incorporated into electronic devices. In addition, there is an increasing demand and demand for inter-board connection by combining such FPCs with other FPCs.

そこで、前記各FPCの各接続端子部相互の一般的な半田熱圧着接続方法について、図3及び図4を参照して説明する。   Therefore, a general solder thermocompression bonding method between the connection terminal portions of the FPCs will be described with reference to FIGS.

第1及び第2配線基板FPC1、FPC2は、互いに同様な材料および構造とされている。具体例を示すと、前記各配線基板FPC1(FPC2)は、ポリイミド(略称PI)樹脂基板A1(A2)の一表面上に熱硬化性のPI接着層B1(B2)を介して銅箔製の配線層C1(C2)を積層し、その表面上に熱硬化性のPI接着層D1(D2)を介してPIフィルム製のカバーレイヤーE1(E2)を接着して構成されている。前記配線層C1(C2)は、図4(b)に示すように、複数本の並列パターンとされている。   The first and second wiring boards FPC1 and FPC2 have the same material and structure as each other. Specifically, each of the wiring boards FPC1 (FPC2) is made of a copper foil via a thermosetting PI adhesive layer B1 (B2) on one surface of a polyimide (abbreviated PI) resin board A1 (A2). The wiring layer C1 (C2) is laminated, and a PI film cover layer E1 (E2) is adhered to the surface of the wiring layer C1 (C2) via a thermosetting PI adhesive layer D1 (D2). As shown in FIG. 4B, the wiring layer C1 (C2) has a plurality of parallel patterns.

前記各配線層C1(C2)の一端部は、前記接着層D1(D2)及びカバーレイヤーE1(E2)で覆われないようにして部分的に露出されている。前記各配線層C1(C2)の各露出部分が、前記各配線基板FPC1(FPC2)の各一端部領域における第1及び第2端子層1、2として構成され、前記第1、第2端子層1、2の露出面には半田メッキ層F1、F2がそれぞれ被着されている。   One end of each wiring layer C1 (C2) is partially exposed so as not to be covered with the adhesive layer D1 (D2) and the cover layer E1 (E2). Each exposed portion of each wiring layer C1 (C2) is configured as first and second terminal layers 1 and 2 in each end region of each wiring board FPC1 (FPC2), and the first and second terminal layers Solder plating layers F1 and F2 are deposited on the exposed surfaces 1 and 2, respectively.

前記第1、第2端子層1と2とを接続するに当たって、まず、前記第1、第2配線基板FPC1、FPC2は、前記半田メッキ層F1とF2とが対面するように、加工台3上に重ねて配置される(図3参照)。そこで、前記第1配線基板FPC1の端子層1の上方に配置されたヒータ付の加圧子4により、前記第1、第2端子層1、2を、加工台3方向に加圧して、前記半田メッキ層F1とF2とを熱圧着する。このとき、ヒータ温度、加圧力(押圧力)及び圧着時間などの条件が適宜定められる。   In connecting the first and second terminal layers 1 and 2, first, the first and second wiring boards FPC1 and FPC2 are placed on the processing table 3 so that the solder plating layers F1 and F2 face each other. (See FIG. 3). Therefore, the first and second terminal layers 1 and 2 are pressed in the direction of the work table 3 by the pressurizer 4 with a heater disposed above the terminal layer 1 of the first wiring board FPC1, and the solder The plated layers F1 and F2 are thermocompression bonded. At this time, conditions such as heater temperature, pressure (pressing force), and pressure bonding time are appropriately determined.

ところで、量産工程において、前記加圧子4の押し量が一定せず、その加圧力が不充分となったり、過剰となったりすることがある。加圧力が不充分な場合は、図示しないが、前記各半田メッキ層F1、F2が接触しなかったり、接触しても相互融着が斑になったりして、第1、第2端子層1、2相互間ひいては各配線層C1、C2相互間の接続不良が生じるという問題がある。   By the way, in the mass production process, the pressing amount of the pressurizer 4 is not constant, and the pressing force may be insufficient or excessive. When the pressure is insufficient, although not shown, the solder plating layers F1 and F2 do not come into contact with each other, or even if they come into contact, the mutual fusion becomes uneven, and the first and second terminal layers 1 There is a problem that poor connection between the wiring layers C1 and C2 occurs.

一方、前記加圧力が過剰な場合は(図4(a)断面図、その平面図を表す図4(b)参照)、重なる前記半田メッキ層F1、F2が過剰に押し潰され、図4(b)に示すように、各配線層C1、C2の各端子層1、2の側部に多数の半田はみ出し部5が形成されることがある。これらの半田はみ出し部5が隣り合う各配線層C1(C2)相互間に亘って進展し、半田ブリッジを形成するに至り、隣り合う配線層間に電気的ショートを惹き起こすという問題がある。この問題は、FPCに多数の配線層が組込まれたり、配線層ピッチが微細化されるほど大きな問題となっている。   On the other hand, when the applied pressure is excessive (see FIG. 4A, a sectional view, and FIG. 4B showing the plan view), the overlapping solder plating layers F1, F2 are excessively crushed, and FIG. As shown in b), a large number of solder protrusions 5 may be formed on the side portions of the terminal layers 1 and 2 of the wiring layers C1 and C2. There is a problem that these solder protrusions 5 extend between adjacent wiring layers C1 (C2) to form a solder bridge, causing an electrical short between adjacent wiring layers. This problem becomes more serious as a large number of wiring layers are incorporated into the FPC or the wiring layer pitch is reduced.

なお、2つの配線基板の端子部相互を半田ペーストを用いて熱圧着法により接続する方法及び配線層相互間の半田ブリッジ発生に関する従来技術の一例が下記特許文献1にみられる。
特開平6−120656号特許公開公報
An example of a conventional technique relating to a method of connecting terminal portions of two wiring boards to each other by a thermocompression bonding method using a solder paste and generation of a solder bridge between wiring layers can be found in Patent Document 1 below.
Japanese Patent Application Laid-Open No. 6-120656

本発明は、前記従来技術のような問題を解決するためになされたものであり、配線基板間の熱圧着による確実な接続、配線層相互間に介在する導電接続層材(例えば半田)の側方はみ出しの抑制及び配線層相互間ショート防止を可能とした配線基板接続構造体及びその製造方法を提供することを目的とする。   The present invention has been made to solve the problems as in the prior art described above, and is a reliable connection by thermocompression bonding between wiring boards, a side of a conductive connection layer material (for example, solder) interposed between wiring layers. An object of the present invention is to provide a wiring board connecting structure and a method for manufacturing the same, which can suppress protrusion and prevent a short circuit between wiring layers.

請求項1に記載の本発明の配線基板接続構造体は、第1配線層及び第2配線層をそれぞれ有する第1配線基板及び第2配線基板と、前記第1配線基板の一部領域に第1配線層に連続して形成された一平面パターン形状の第1端子層と、前記第2配線基板の一部領域に第2配線層に連続して形成され前記第1端子層に対して前記一平面パターン形状の範囲で層厚方向に対向配置された第2端子層と、前記第1及び第2端子層相互間に介在された熱圧着用の導電接着層とを備え、前記第2端子層は前記第1端子層に対向する空隙部を有するパターン形状とされていることを特徴とする。   According to a first aspect of the present invention, there is provided a wiring board connection structure according to the first aspect of the present invention, in which a first wiring board and a second wiring board having a first wiring layer and a second wiring layer, respectively, and in a partial region of the first wiring board. A first terminal layer having a one-plane pattern shape continuously formed on one wiring layer and a second wiring layer formed continuously in a partial region of the second wiring substrate A second terminal layer disposed oppositely in the layer thickness direction within a plane pattern shape; and a conductive adhesive layer for thermocompression bonding interposed between the first and second terminal layers, the second terminal The layer is characterized in that it has a pattern shape having a gap facing the first terminal layer.

請求項2に記載の本発明は、請求項1に記載の配線基板接続構造体において、前記第2端子層を分岐パターン形状とすることによって、前記分岐間に空隙部が形成されていることを特徴とする。   According to a second aspect of the present invention, in the wiring board connection structure according to the first aspect, the second terminal layer has a branch pattern shape, whereby a gap is formed between the branches. Features.

請求項3に記載の本発明は、請求項1に記載の配線基板接続構造体において、前記第2端子層を前記第1端子層よりも小さな層幅の細条パターン形状とすることによって、前記第2端子層の側方に空隙が形成されていることを特徴とする。   According to a third aspect of the present invention, in the wiring board connection structure according to the first aspect, the second terminal layer has a strip pattern shape having a smaller layer width than the first terminal layer. An air gap is formed on the side of the second terminal layer.

請求項4に記載の本発明は、第1配線基板に形成された第1端子層と第2配線基板に形成された第2端子層とを層厚方向に対向させ、第1及び第2端子層間を導電接着層によって接続した配線基板接続構造体の製造方法であって、前記第1配線基板の一部領域に第1配線層に連続する一平面パターン形状の第1端子層を形成する工程と、前記第2配線基板の一部領域に第2配線層に連続して形成され前記第1端子層の前記一平面パターン形状の範囲に対向させるための空隙部を有するパターン形状の第2端子層を形成する工程と、前記第1及び第2端子層の少なくとも一方の表面に導電接着層を形成する工程と、前記導電接着層を介して前記第1、第2端子層を熱圧着することによって前記導電接着層の一部を前記空隙部に流入させ第1、第2端子層相互を接続することを特徴とする。   According to a fourth aspect of the present invention, the first terminal layer and the second terminal layer formed on the first wiring board and the second terminal layer formed on the second wiring board are opposed to each other in the layer thickness direction. A method of manufacturing a wiring board connection structure in which layers are connected by a conductive adhesive layer, wherein a first terminal layer having a one-plane pattern shape continuous to the first wiring layer is formed in a partial region of the first wiring board. And a second terminal having a pattern shape, which is formed continuously in a part of the second wiring board in a second wiring layer and has a gap for facing the range of the one-plane pattern shape of the first terminal layer. Forming a layer; forming a conductive adhesive layer on at least one surface of the first and second terminal layers; and thermocompression bonding the first and second terminal layers through the conductive adhesive layer. To cause a part of the conductive adhesive layer to flow into the gap portion. Characterized by connecting the terminal layer mutually.

本発明の配線基板接続構造体及びその製造方法によれば、前記第2端子層は、前記第1端子層の一平面パターン形状の範囲内に対向する空隙部を有するパターン形状とされているために、熱圧着される前記導電接続層は、並列配置された配線層間方向、即ち層側方へのはみ出し量が抑制され配線層相互間ショートが防止される。また、前記第2端子層のパターン形成に当たり、前記空隙部の容積を、熱圧着時の加圧力や前記導電接続層の容積や前記導電接続層の対温度特性などの環境条件に応じて調整しておくことも可能であり、そうした場合は、前記はみ出し抑制や配線層相互間ショート防止がより一層確実に得られるという効果を奏する。   According to the wiring board connection structure and the method for manufacturing the same according to the present invention, the second terminal layer has a pattern shape having a gap portion facing within the range of the one-plane pattern shape of the first terminal layer. In addition, the conductive connection layer to be thermocompression bonded is prevented from protruding in the direction between the wiring layers arranged in parallel, that is, in the side of the layer, thereby preventing a short circuit between the wiring layers. Further, when forming the pattern of the second terminal layer, the volume of the gap is adjusted according to the environmental conditions such as the applied pressure during thermocompression bonding, the volume of the conductive connection layer, and the temperature characteristics of the conductive connection layer. In such a case, it is possible to obtain the effects of suppressing the protrusion and preventing the short circuit between the wiring layers more reliably.

以下に、本発明による配線基板接続構造体の実施形態である実施例1及び実施例2について図1及び図2を参照して説明する。   Below, Example 1 and Example 2 which are embodiment of the wiring board connection structure by this invention are demonstrated with reference to FIG.1 and FIG.2.

(実施例1):
図1は、本発明の第1の実施例の配線基板接続構造体を説明するための図であり、図1(a)は配線基板接続構造体に用いる2つの配線基板を分離して示す分解平面図、図1(b)は2つの配線基板の対向配置状態を示す断面図、図1(c)は基板間接続後の配線基板接続構造体の断面を図1(b)のA−A線に沿って示した断面図である。
(Example 1):
FIG. 1 is a diagram for explaining a wiring board connection structure according to a first embodiment of the present invention. FIG. 1A is an exploded view showing two wiring boards used in the wiring board connection structure separately. 1B is a cross-sectional view showing a state in which two wiring boards are opposed to each other, and FIG. 1C is a cross-sectional view of the wiring board connection structure after inter-board connection, taken along line AA in FIG. It is sectional drawing shown along the line.

まず、平面形状がいずれもリボン状の第1配線基板10及び第2配線基板11は、いずれも配線ピッチの微細化や柔軟性に優れたFPCを用いて構成されていて、相互に同様な使用材料及び構造とされている。具体例を示すと、図1(b)、(c)から分かるように、前記第1配線基板10は、ポリイミド樹脂(略称PI)製の第1絶縁基板H1の一表面上に熱硬化性のPI製の接着層I1を介して銅箔製の第1配線層J1を積層し、その表面上に熱硬化性のPI製の接着層K1を介してPIフィルム製の第1カバーレイヤーL1を接着して構成されている。   First, the first wiring board 10 and the second wiring board 11 both of which have a ribbon shape in the planar shape are configured using FPCs that are excellent in miniaturization of wiring pitch and flexibility, and are used in the same manner. Material and structure. Specifically, as can be seen from FIGS. 1B and 1C, the first wiring board 10 is thermosetting on one surface of a first insulating board H1 made of polyimide resin (abbreviated PI). A first wiring layer J1 made of copper foil is laminated via an adhesive layer I1 made of PI, and a first cover layer L1 made of PI film is bonded to the surface thereof via a thermosetting PI adhesive layer K1. Configured.

また、前記第2配線基板11は、第1配線基板10と同様に、PI製の第2絶縁基板H2上に熱硬化性PI製接着層I2、銅箔製第2配線層J2、熱硬化性PI製接着層K2及びPIフィルム製の第2カバーレイヤーL2をこの記載順序で積層した構成とされている。   Similarly to the first wiring board 10, the second wiring board 11 has a thermosetting PI adhesive layer I 2, a copper foil second wiring layer J 2, and a thermosetting material on the second insulating board H 2 made of PI. The adhesive layer K2 made of PI and the second cover layer L2 made of PI film are laminated in this order.

前記第1及び第2配線層J1、J2は、図1(a)から分かるように、いずれも前記各配線基板の長尺方向に平行するように所定のピッチで並列配置された複数本(例えば各4本)のストリップライン状にパターニングされている。そして、前記リボン状の第1配線基板10の一部領域である一端部には、前記複数本の各第1配線層J1にそれぞれ連続する複数の第1端子層J1aが形成されている。   As can be seen from FIG. 1 (a), the first and second wiring layers J1 and J2 are each a plurality of (for example, a plurality of) arranged in parallel at a predetermined pitch so as to be parallel to the longitudinal direction of the wiring boards. (4 each) are patterned into strip lines. A plurality of first terminal layers J1a that are respectively continuous with the plurality of first wiring layers J1 are formed at one end, which is a partial region of the ribbon-shaped first wiring substrate 10.

前記各第1端子層J1aは、素材としての銅箔に、前記第1配線層J1の一端部を構成するようにパターニングを施して、前記第1配線層J1のストリップラインに一体的に含まれるように形成されている。また、前記第1カバレイヤーL1及びその下層の接着層K1は、前記各第1端子層J1aを露出させるように加工されている。従って、前記第1端子層J1aは、一平面パターン形状として、第1配線層J1と同等の線幅と、前記レイヤーL1及び接着層K1からの長手方向の露出長とを有する矩形状パターンとされている。勿論、この第1端子層J1aの幅及び長さは必要に応じて適宜設定してよい。   Each first terminal layer J1a is subjected to patterning so as to constitute one end of the first wiring layer J1 on a copper foil as a material, and is integrally included in the strip line of the first wiring layer J1. It is formed as follows. Further, the first cover layer L1 and the adhesive layer K1 below the first cover layer L1 are processed so as to expose the first terminal layers J1a. Accordingly, the first terminal layer J1a is a rectangular pattern having a line width equivalent to that of the first wiring layer J1 and an exposed length in the longitudinal direction from the layer L1 and the adhesive layer K1 as a one-plane pattern shape. ing. Of course, the width and length of the first terminal layer J1a may be appropriately set as necessary.

前記リボン状の第2配線基板11の一部領域である一端部には、前記複数本の各第2配線層J2にそれぞれ連続する複数の第2端子層J2aが形成されている。前記各第2端子層J2aは、前記第1端子層J1aの場合と同様に、前記第2配線層J2のストリップラインに一体的に含まれるようにパターニングされ、前記第2カバレイヤーL2及び接着層K2は前記各第2端子層J2aを露出させるように加工されている。   A plurality of second terminal layers J2a that are respectively continuous with the plurality of second wiring layers J2 are formed at one end, which is a partial region of the ribbon-shaped second wiring substrate 11. Each of the second terminal layers J2a is patterned so as to be integrally included in the strip line of the second wiring layer J2, as in the case of the first terminal layer J1a, and the second cover layer L2 and the adhesive layer K2 is processed so as to expose the second terminal layers J2a.

前記各第2端子層J2aは、前記パターニングの際に、例えば2又の分岐パターン形状とされ、全体的輪郭が前記第1端子層J1aの一平面パターン形状としての矩形状パターンの線幅及び露出長と同等な寸法の矩形パターンとなるように形成されている。第1端子層J1aの中央部すなわち2又分岐間には長手方向に平行する細条パターン状の空隙部或いはギャップG1が端子層の側方に位置して形成されている。   Each of the second terminal layers J2a is formed into, for example, a bifurcated pattern shape at the time of the patterning, and the overall outline is a line width and exposure of a rectangular pattern as a one-plane pattern shape of the first terminal layer J1a. It is formed to be a rectangular pattern having the same dimensions as the length. Between the central portion of the first terminal layer J1a, that is, between the two branches, a strip-shaped void portion or gap G1 parallel to the longitudinal direction is formed on the side of the terminal layer.

前記第1端子層J1a及び第2端子層J2aの各表面上には、第1導電接続層F1a及び第2導電接続層F2aがそれぞれ被着されていて、これら接続層F1a、F2aにはいずれも例えば半田メッキ層が使用されている。   A first conductive connection layer F1a and a second conductive connection layer F2a are respectively deposited on the surfaces of the first terminal layer J1a and the second terminal layer J2a, and both of these connection layers F1a and F2a are attached. For example, a solder plating layer is used.

そこで、前述のように、前記第1配線基板10の一端部に第1配線層J1に連続する第1端子層J1aを形成する工程、前記第2配線基板11の一端部に第2配線層に連続し前記空隙部G1を有する第2端子層を形成する工程及び前記導電接続層F1a、F2aを形成する工程の後に、前記第1配線基板10及び第2配線基板11の基板間接続を行う。   Therefore, as described above, the step of forming the first terminal layer J1a continuous with the first wiring layer J1 at one end of the first wiring substrate 10, the second wiring layer at the one end of the second wiring substrate 11 is formed. After the step of continuously forming the second terminal layer having the gap G1 and the step of forming the conductive connection layers F1a and F2a, the first wiring substrate 10 and the second wiring substrate 11 are connected to each other.

前記基板間接続に際しては、図1(b)に示すように、前記第1配線基板10は図1(a)の状態から裏返して前記第2配線基板11に対向配置される。この際に、前記各第1端子層J1a及び前記各第2端子層J2aは、前記第1端子層J1aの前記一平面パターン形状の範囲において、各端子層J1a、J2aの各矩形状パターンが丁度重なり合うように層厚方向に対向される。   When connecting the substrates, as shown in FIG. 1B, the first wiring substrate 10 is turned over from the state of FIG. At this time, each of the first terminal layers J1a and each of the second terminal layers J2a is exactly the same as the rectangular pattern of each of the terminal layers J1a and J2a in the range of the one-plane pattern shape of the first terminal layer J1a. It is opposed in the layer thickness direction so as to overlap.

即ち、前記第2端子層J2aの矩形状パターン輪郭(外形)は、前記第1端子層J1aの一平面パターン形状である矩形状パターンの投影像とほぼ一致する。また、前記第2端子層J2a中の空隙部G1が前記第1端子層J1aの前記一平面パターン形状の範囲内に対向しているために、前記第2端子層J2aは、前記第1端子層J1aよりも前記空隙G1の面積分だけ小面積となっている。   That is, the rectangular pattern outline (outer shape) of the second terminal layer J2a substantially coincides with the projected image of the rectangular pattern which is a one-plane pattern shape of the first terminal layer J1a. Further, since the gap G1 in the second terminal layer J2a is opposed to the range of the one-plane pattern shape of the first terminal layer J1a, the second terminal layer J2a is the first terminal layer. The area is smaller by the area of the gap G1 than J1a.

そこで、図1(b)のように対向配置された状態の前記第1、第2配線基板10、11は、図3のような熱圧着装置の加工台3上に重ねて配置される。そして、前記第1配線基板10の第1端子層J1aの上方に配置されるヒータ付の加圧子4によって前記第1及び第2端子層J1a、J2aを加工台3方向に加熱及び加圧し、前記第1及び第2端子層相互を前記導電接続層F1a、F2aを介して熱圧着する(図1(c)参照)。このとき、ヒータ温度、加圧力(押圧力)及び圧着時間などの条件が適宜調整及び管理される。   Therefore, the first and second wiring boards 10 and 11 facing each other as shown in FIG. 1B are arranged on the processing table 3 of the thermocompression bonding apparatus as shown in FIG. Then, the first and second terminal layers J1a and J2a are heated and pressed in the direction of the work table 3 by the pressurizer 4 with a heater disposed above the first terminal layer J1a of the first wiring board 10, and The first and second terminal layers are thermocompression bonded via the conductive connection layers F1a and F2a (see FIG. 1C). At this time, conditions such as heater temperature, pressure (pressing force), and pressure bonding time are appropriately adjusted and managed.

この熱圧着工程において、図1(c)に示されているように、前記半田メッキ層F1a、F2aは前記第1、第2端子層J1a、J2aの各表面間及び前記空隙部G1内部にも流入して充填される。従って、従来よりも幾分強めの加圧力(押圧力)をかけても、前記半田メッキ層F1a、F2aは、各端子層J1a、J2aの外側方への流動(流出)量が前記空隙部G1への流入により軽減され、前記端子層の外側方へのはみ出しが軽減或いは抑制される。   In this thermocompression bonding step, as shown in FIG. 1C, the solder plating layers F1a and F2a are also provided between the surfaces of the first and second terminal layers J1a and J2a and inside the gap G1. Inflow and fill. Therefore, even if a slightly higher pressing force (pressing force) than before is applied, the solder plating layers F1a and F2a have a flow (outflow) amount of the terminal layers J1a and J2a to the outside of the gap G1. And the protrusion of the terminal layer to the outside is reduced or suppressed.

そのために、従来、問題となっていた図4(b)に示したような隣り合う各配線層間の半田ブリッジの発生並びに配線層間の電気的ショートが防止される。また、従来よりも強めに加圧力(押圧力)をかけることができるために、前記第1、第2端子層J1a、J2a相互の熱圧着及び端子相互間接続が従来よりも一層確実に行える。   Therefore, it is possible to prevent the occurrence of a solder bridge between adjacent wiring layers and an electrical short between wiring layers as shown in FIG. Further, since the pressure (pressing force) can be applied more strongly than in the past, the thermocompression bonding between the first and second terminal layers J1a and J2a and the connection between the terminals can be performed more reliably than in the past.

また、前記第2端子層J2aのパタ−ニングにおいて、前記空隙部G1の容積を調整することによって、例えば配線層ピッチが異なる種々の配線基板間接続に応じた半田ブリッジのはみ出し抑制を行うことが可能である。ヒータ温度、加圧力(押圧力)及び圧着時間などの条件調整及び管理の厳密度が緩和され、プロセスコストや製品コストを低減することも可能である。   Further, in the patterning of the second terminal layer J2a, by adjusting the volume of the gap G1, for example, it is possible to suppress the protrusion of the solder bridge according to various connections between wiring boards having different wiring layer pitches. Is possible. The strictness of condition adjustment and management such as heater temperature, pressure (pressing force) and pressure bonding time is alleviated, and it is possible to reduce process costs and product costs.

なお、前記空隙部G1は、第2端子層J2aを貫通する形状に限らず、第2端子層J2aの厚さ内で窪ませた有底の凹形状としてもよく、その場合は、半田メッキ層と第2端子層表面との接触面積が前記貫通空隙部の場合よりも増して接触抵抗を低減できる。   The gap G1 is not limited to the shape penetrating the second terminal layer J2a, but may be a bottomed concave shape recessed within the thickness of the second terminal layer J2a. In that case, the solder plating layer The contact area between the surface of the second terminal layer and the surface of the second terminal layer can be increased as compared with the case of the through gap, thereby reducing the contact resistance.

更に、前記熱圧着工程前において、前記第1、第2導電接続層F1a、F2aは、いずれか一方のみを使用して、前記第1、第2端子層J1a、J2aの一方のみに被着しておいてもよく、導電接続層は、その厚さや充填量を調整して前記第1、第2端子層J1a、J2aの少なくとも一方の表面上に被着しておいてよい。   Furthermore, before the thermocompression bonding step, only one of the first and second conductive connection layers F1a and F2a is used and is attached to only one of the first and second terminal layers J1a and J2a. The conductive connection layer may be deposited on at least one surface of the first and second terminal layers J1a and J2a by adjusting the thickness and filling amount.

(実施例2):
図2は、本発明の第2の実施例の配線基板接続構造体を説明するための図であり、図2(a)は配線基板接続構造体に用いる2の配線基板を分離して示す分解平面図、図2(b)は基板間接続後の配線基板接続構造体の断面を実施例1に係る図1(c)と同一方向の切断面として示した断面図である。前記実施例1の配線基板接続構造体と同一部分には同一符号を付して、その説明を省略する。
(Example 2):
FIG. 2 is a diagram for explaining a wiring board connection structure according to a second embodiment of the present invention. FIG. 2A is an exploded view showing two wiring boards used in the wiring board connection structure. FIG. 2B is a plan view showing a cross section of the wiring board connection structure after inter-board connection as a cut surface in the same direction as FIG. 1C according to the first embodiment. The same parts as those in the wiring board connection structure of the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.

この実施例2においては、一方の配線基板として、前記実施例1における第1配線基板10と同一のものが使用され、他方の配線基板として、実施例1の第2配線層11に代えて第2配線基板11aが使用される。リボン状の前記第2配線基板11aは、実施例1と同様に並列配置されたストリップライン状の複数本の第2配線層J2を有する。   In the second embodiment, the same wiring board as the first wiring board 10 in the first embodiment is used as one wiring board, and the second wiring board is replaced with the second wiring layer 11 in the first embodiment. A two-wiring board 11a is used. The ribbon-like second wiring board 11a has a plurality of strip-line-like second wiring layers J2 arranged in parallel as in the first embodiment.

リボン状の前記第2配線基板11aの一部領域である一端部には、前記複数本の各第2配線層J2にそれぞれ連続する複数の第2端子層J2bが形成されている。前記各第2端子層J2bは、前記第2配線層J2のストリップラインに一体的に含まれるようにパターニングされ、前記第2カバーレイヤーL2及び接着層K2は前記各第2端子層J2bを露出させるように加工されている。   A plurality of second terminal layers J2b that are respectively continuous with the plurality of second wiring layers J2 are formed at one end, which is a partial region of the ribbon-shaped second wiring substrate 11a. The second terminal layers J2b are patterned so as to be integrally included in the strip lines of the second wiring layer J2, and the second cover layer L2 and the adhesive layer K2 expose the second terminal layers J2b. It is processed as follows.

前記各第2端子層J2bは、前記第2配線層J2よりも層幅の小さい細条パターン形状とされ、前記第2配線層J2の一端中央部に長尺方向に連続するように直線状にパターンニングされている。また、前記各第2端子層J2bは、第1配線基板10の第1端子層J1aに対向させた際に、前記第1端子層J1aの一平面パターン形状である矩形状パターンの投影像範囲S(図2(a)中の第2配線基板11a参照)の中央部に位置する。そして、前記第2端子層J2bの両側方には、前記第1端子層J1aの平面像の投影像範囲Sの両側縁との間に長手方向に平行する細条の空隙部G2及びG3が形成されている。   Each of the second terminal layers J2b has a strip pattern shape having a smaller layer width than the second wiring layer J2, and is linearly formed so as to be continuous in the longitudinal direction at the center of one end of the second wiring layer J2. Patterned. Further, when each of the second terminal layers J2b is opposed to the first terminal layer J1a of the first wiring substrate 10, a projected image range S of a rectangular pattern which is a one-plane pattern shape of the first terminal layer J1a. It is located in the center of (refer to the second wiring board 11a in FIG. 2A). Then, on both sides of the second terminal layer J2b, narrow gaps G2 and G3 parallel to the longitudinal direction are formed between both side edges of the projected image range S of the planar image of the first terminal layer J1a. Has been.

前記第1端子層J1a及び第2端子層J2bの各表面上には、第1導電接続層F1a及び第2導電接続層F2aがそれぞれ被着されていて、これら接続層F1a、F2aにはいずれも例えば半田メッキ層が使用されている。   A first conductive connection layer F1a and a second conductive connection layer F2a are respectively deposited on the surfaces of the first terminal layer J1a and the second terminal layer J2b, and both of these connection layers F1a and F2a are attached. For example, a solder plating layer is used.

そこで、実施例1同様に、第1端子層J1aの形成工程、前記第2配線基板11aの前記空隙部G2、G3を有する第2端子層J2bの形成工程及び前記導電接続層F1a、F2aの形成工程後、前記第1配線基板10及び第2配線基板11aの基板間接続を行う。   Therefore, as in Example 1, the formation process of the first terminal layer J1a, the formation process of the second terminal layer J2b having the gaps G2 and G3 of the second wiring board 11a, and the formation of the conductive connection layers F1a and F2a. After the process, inter-substrate connection of the first wiring substrate 10 and the second wiring substrate 11a is performed.

前記基板間接続に際しては、図2(a)に示すように、前記第1配線基板10を前記第2配線基板11aに板厚或いは層厚方向に対向配置させ、このとき前記第1端子層J1aの矩形状パターンは、前記第2端子層J2bを囲む前記第1端子層J1aの投影像範囲Sと丁度重なり合うように対向させる。   In connection between the substrates, as shown in FIG. 2A, the first wiring substrate 10 is disposed opposite to the second wiring substrate 11a in the plate thickness or layer thickness direction, and at this time, the first terminal layer J1a is arranged. The rectangular pattern is opposed to the projection image range S of the first terminal layer J1a surrounding the second terminal layer J2b so as to be exactly overlapped.

このような対向配置状態で前記第1、第2配線基板10、11aは、図3のような熱圧着装置の加工台3上に配置してヒータ付の加圧子4によって加熱/加圧し、前記第1、第2端子層相互を前記導電接続層F1a、F2aを介して熱圧着する(図2(b)参照)。   In such an opposed arrangement, the first and second wiring boards 10 and 11a are arranged on a processing table 3 of a thermocompression bonding apparatus as shown in FIG. 3 and heated / pressurized by a presser 4 with a heater, The first and second terminal layers are thermocompression bonded via the conductive connection layers F1a and F2a (see FIG. 2B).

この熱圧着工程において、図2(b)のように、前記半田メッキ層F1a、F2aは前記第1、第2端子層J1a、J2bの各表面間及び前記空隙部G2、G3内にも流入して充填される。従って、従来よりも幾分強めの加圧力(押圧力)をかけても、前記半田メッキ層は、第1端子層J1aの外側方への流動(流出)量が前記空隙部G2、G3への流入により軽減され、前記端子層の外側方へのはみ出しが軽減或いは抑制される。このようにして、配線層間の半田ブリッジの発生や電気的ショートが防止されるなど、実施例1の場合と同様な効果が得られる。   In this thermocompression bonding process, as shown in FIG. 2B, the solder plating layers F1a and F2a also flow into the gaps G2 and G3 between the surfaces of the first and second terminal layers J1a and J2b. Filled. Therefore, even if a slightly higher pressing force (pressing force) than before is applied, the solder plating layer has a flow (outflow) amount to the outside of the first terminal layer J1a to the gaps G2 and G3. It is reduced by the inflow, and the protrusion of the terminal layer to the outside is reduced or suppressed. In this way, the same effects as those of the first embodiment can be obtained, such as generation of solder bridges between wiring layers and electrical short-circuiting.

ところで、前記実施例1、2のいずれにおいても、前記第1配線基板10の第1端子層J1aの一平面パターン形状は、矩形状パターンに限らず楕円状或いは長円形状パターンなどの形状とするも自由である。   By the way, in any of the first and second embodiments, the one-plane pattern shape of the first terminal layer J1a of the first wiring board 10 is not limited to the rectangular pattern, but is an elliptical or oval pattern. Is also free.

また、細条パターンで示された実施例1の空隙部G1や実施例2の第2端子部J2bは、直線状に限らず、ジグザグ状、リニア波形状或いは矩形パルス波形状のような蛇行パターン形状としておいてもよい。そして、実施例1に示すような空隙部G1は、第2端子部に限らず前記第1端子層J1aにも、そのバルク抵抗や接触抵抗の適切な設計値を保って、適宜形成してもよく、そうすると、空隙部の総容積を増加でき前記端子層の外側方への半田はみ出しをより一層軽減或いは抑制させることができる。   Further, the gap portion G1 of the first embodiment and the second terminal portion J2b of the second embodiment shown by the strip pattern are not limited to a linear shape, but meander patterns such as a zigzag shape, a linear wave shape, or a rectangular pulse wave shape. It may be a shape. The gap portion G1 as shown in the first embodiment is not limited to the second terminal portion, and may be appropriately formed in the first terminal layer J1a while maintaining appropriate design values of the bulk resistance and contact resistance. If it does so, the total volume of a space | gap part can be increased and the solder protrusion to the outer side of the said terminal layer can be further reduced or suppressed.

なお、前記導電接続層F1a、F2aとしては、半田メッキ層に限らず、半田ペースト層などの導電接着材料を用いてもよく、これらの材料はメッキ、印刷或いはコーティング法などにより被着される。更に、前記第1、第2配線基板は、FPCとRPC(リジッド プリンテッド サーキット)との組み合わせで構成することも可能である。   The conductive connection layers F1a and F2a are not limited to solder plating layers, and conductive adhesive materials such as solder paste layers may be used, and these materials are applied by plating, printing, coating methods, or the like. Further, the first and second wiring boards can be configured by a combination of FPC and RPC (Rigid Printed Circuit).

本発明の実施例1に係る配線基板接続構造体を説明するための図であり、図1(a)は配線基板接続構造体の部品を分解して示す分解平面図、図1(b)は2つの配線基板の対向配置状態を示す断面図、図1(c)は基板間接続後の配線基板接続構造体の断面を図1(b)のA−A線に沿って示した断面図である。BRIEF DESCRIPTION OF THE DRAWINGS It is a figure for demonstrating the wiring board connection structure which concerns on Example 1 of this invention, FIG.1 (a) is an exploded top view which decomposes | disassembles and shows the components of a wiring board connection structure, FIG.1 (b) is FIG. FIG. 1C is a cross-sectional view showing a cross-sectional view of the wiring board connection structure after inter-board connection along the line AA in FIG. 1B. is there. 本発明の実施例2に係る配線基板接続構造体を説明するための図であり、図2(a)は配線基板接続構造体の部品を分解して示す分解平面図、図2(b)は基板間接続後の配線基板接続構造体の断面図である。It is a figure for demonstrating the wiring board connection structure which concerns on Example 2 of this invention, FIG.2 (a) is a disassembled top view which decomposes | disassembles and shows the components of a wiring board connection structure, FIG.2 (b) is FIG. It is sectional drawing of the wiring board connection structure after board-to-board connection. 配線基板間接続方法を説明するための断面図である。It is sectional drawing for demonstrating the connection method between wiring boards. 従来技術に係る配線基板接続構造体を説明するための図であり、図4(a)は配線基板接続構造体の断面図、図4(b)はその平面図である。It is a figure for demonstrating the wiring board connection structure based on a prior art, Fig.4 (a) is sectional drawing of a wiring board connection structure, FIG.4 (b) is the top view.

符号の説明Explanation of symbols

10 第1配線基板
11、11a 第2配線基板
J1 第1配線層
J2 第2配線層
J1a 第1端子層
J2a、J2b 第2端子層
F1、F2 導電接続層
G1、G2、G3 空隙部
10 1st wiring board 11, 11a 2nd wiring board J1 1st wiring layer J2 2nd wiring layer J1a 1st terminal layer J2a, J2b 2nd terminal layer F1, F2 Conductive connection layer G1, G2, G3 Gap

Claims (4)

第1配線層及び第2配線層をそれぞれ有する第1配線基板及び第2配線基板と、前記第1配線基板の一部領域に第1配線層に連続して形成された一平面パターン形状の第1端子層と、前記第2配線基板の一部領域に第2配線層に連続して形成され前記第1端子層に対して前記一平面パターン形状の範囲で層厚方向に対向配置された第2端子層と、前記第1及び第2端子層相互間に介在された熱圧着用の導電接着層とを備え、前記第2端子層は前記第1端子層に対向する空隙部を有するパターン形状とされていることを特徴とする配線基板接続構造体。   A first wiring board and a second wiring board each having a first wiring layer and a second wiring layer, and a one-plane pattern-shaped first formed continuously in the first wiring layer in a partial region of the first wiring board. A first terminal layer and a second wiring layer formed in a partial region of the second wiring board and continuously disposed in a layer thickness direction within the range of the one-plane pattern shape with respect to the first terminal layer; A pattern shape comprising a two-terminal layer and a thermocompression-bonding conductive adhesive layer interposed between the first and second terminal layers, the second terminal layer having a gap facing the first terminal layer A wiring board connection structure characterized by the above. 前記第2端子層を分岐パターン形状とすることによって、前記分岐間に空隙部が形成されていることを特徴とする請求項1に記載の配線基板接続構造体。   2. The wiring board connection structure according to claim 1, wherein the second terminal layer has a branch pattern shape so that a gap is formed between the branches. 前記第2端子層を前記第1端子層よりも小さな層幅の細条パターン形状とすることによって、前記第2端子層の側方に空隙部が形成されていることを特徴とする請求項1に記載の配線基板接続構造体。   The void portion is formed on the side of the second terminal layer by forming the second terminal layer into a strip pattern shape having a layer width smaller than that of the first terminal layer. Wiring board connection structure described in 1. 第1配線基板に形成された第1端子層と第2配線基板に形成された第2端子層とを層厚方向に対向させ、第1及び第2端子層間を導電接着層によって接続した配線基板接続構造体の製造方法であって、前記第1配線基板の一部領域に第1配線層に連続する一平面パターン形状の第1端子層を形成する工程と、前記第2配線基板の一部領域に第2配線層に連続して形成され前記第1端子層の前記一平面パターン形状の範囲に対向させるための空隙部を有するパターン形状の第2端子層を形成する工程と、前記第1及び第2端子層の少なくとも一方の表面に導電接着層を形成する工程と、前記導電接着層を介して前記第1、第2端子層を熱圧着することによって前記導電接着層の一部を前記空隙部に流入させ第1、第2端子層相互を接続することを特徴とする配線基板接続構造体の製造方法。   A wiring board in which a first terminal layer formed on a first wiring board and a second terminal layer formed on a second wiring board are opposed to each other in a layer thickness direction, and the first and second terminal layers are connected by a conductive adhesive layer. A method for manufacturing a connection structure, comprising: forming a first terminal layer having a one-plane pattern continuous to a first wiring layer in a partial region of the first wiring board; and part of the second wiring board Forming a pattern-shaped second terminal layer formed in a region continuously with the second wiring layer and having a gap for facing the range of the one-plane pattern shape of the first terminal layer; And forming a conductive adhesive layer on at least one surface of the second terminal layer, and thermocompression bonding the first and second terminal layers through the conductive adhesive layer, and a part of the conductive adhesive layer is The first and second terminal layers are connected to each other by flowing into the gap. A method for manufacturing a wiring board connecting structure according to claim.
JP2006080265A 2006-03-23 2006-03-23 Wiring board connecting structure and its manufacturing method Pending JP2007258410A (en)

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WO2011065361A1 (en) * 2009-11-24 2011-06-03 日本発條株式会社 Connecting member
CN101765294B (en) * 2008-12-25 2012-08-01 比亚迪股份有限公司 Connecting structure of flexile printed circuit board and method for manufacturing same
JP2013236106A (en) * 2013-08-12 2013-11-21 Dainippon Printing Co Ltd Wiring circuit board, suspension, suspension with head, hard disk drive, and manufacturing method of wiring circuit board
JP2014069430A (en) * 2012-09-28 2014-04-21 Brother Ind Ltd Liquid discharge device and wiring connection structure
WO2016072338A1 (en) * 2014-11-04 2016-05-12 株式会社村田製作所 Transmission line cable
JP2016162473A (en) * 2015-03-03 2016-09-05 日東電工株式会社 Wiring circuit board
JP2019129244A (en) * 2018-01-25 2019-08-01 アルプスアルパイン株式会社 Terminal connection structure, flexible substrate, and rotation connector

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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101765294B (en) * 2008-12-25 2012-08-01 比亚迪股份有限公司 Connecting structure of flexile printed circuit board and method for manufacturing same
WO2011065361A1 (en) * 2009-11-24 2011-06-03 日本発條株式会社 Connecting member
JP2014069430A (en) * 2012-09-28 2014-04-21 Brother Ind Ltd Liquid discharge device and wiring connection structure
JP2013236106A (en) * 2013-08-12 2013-11-21 Dainippon Printing Co Ltd Wiring circuit board, suspension, suspension with head, hard disk drive, and manufacturing method of wiring circuit board
WO2016072338A1 (en) * 2014-11-04 2016-05-12 株式会社村田製作所 Transmission line cable
US10153534B2 (en) 2014-11-04 2018-12-11 Murata Manufacturing Co., Ltd. Transmission line cable
JP2016162473A (en) * 2015-03-03 2016-09-05 日東電工株式会社 Wiring circuit board
JP2019129244A (en) * 2018-01-25 2019-08-01 アルプスアルパイン株式会社 Terminal connection structure, flexible substrate, and rotation connector

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