JPH04137590A - Multilayer circuit board - Google Patents
Multilayer circuit boardInfo
- Publication number
- JPH04137590A JPH04137590A JP25837790A JP25837790A JPH04137590A JP H04137590 A JPH04137590 A JP H04137590A JP 25837790 A JP25837790 A JP 25837790A JP 25837790 A JP25837790 A JP 25837790A JP H04137590 A JPH04137590 A JP H04137590A
- Authority
- JP
- Japan
- Prior art keywords
- conductive pattern
- circuit board
- multilayer circuit
- conductive
- section
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims abstract description 26
- 229920005992 thermoplastic resin Polymers 0.000 claims description 7
- 239000011230 binding agent Substances 0.000 claims description 3
- 238000005452 bending Methods 0.000 abstract description 12
- 229920005989 resin Polymers 0.000 abstract description 4
- 239000011347 resin Substances 0.000 abstract description 4
- 238000007650 screen-printing Methods 0.000 abstract description 2
- 238000000034 method Methods 0.000 description 3
- 238000007747 plating Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000010410 layer Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229920002492 poly(sulfone) Polymers 0.000 description 1
- 229920001230 polyarylate Polymers 0.000 description 1
- 229920000515 polycarbonate Polymers 0.000 description 1
- 239000004417 polycarbonate Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structure Of Printed Boards (AREA)
Abstract
Description
【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) 本発明は多層回路基板に係り、 を有する多層回路基板に関する。[Detailed description of the invention] [Purpose of the invention] (Industrial application field) The present invention relates to a multilayer circuit board, The present invention relates to a multilayer circuit board having a multilayer circuit board.
特に、
折り曲部
(従来の技術)
最近では、例えば電子機器の小形、軽量、薄形化により
、この電子機器に使用される制御回路装置等も小形、軽
量でかつ薄形のものか要求されている。この制御回路装
置は導電性パターンを有する基板に半導体等の電子部品
等を実装したものであるから、この小形、軽量、薄形化
には半導体等の制御部品と基板等を小形等する必要があ
る。In particular, bending parts (prior art) Recently, as electronic devices have become smaller, lighter, and thinner, control circuit devices used in these electronic devices are also required to be smaller, lighter, and thinner. ing. Since this control circuit device has electronic components such as semiconductors mounted on a substrate having a conductive pattern, it is necessary to downsize the control components such as semiconductors and the substrate in order to make the device smaller, lighter, and thinner. be.
この種の制御回路装置等に使用される基板としては、ガ
ラスにエポキシ樹脂を混合し表面に導電性パターンの金
属メツキを施したガラエポ基板や、ポリエステル、ポリ
イミド等の樹脂に導電性ペーストからなる導電層あるい
は銅箔を付着させたフレキシブルプリント(F P C
)板がよく用いられている。Substrates used in this type of control circuit devices include glass-epoxy substrates made of glass mixed with epoxy resin and plated with conductive patterns on the surface, and conductive substrates made of polyester, polyimide, and other resins with conductive paste. Flexible printing (FPC) with attached layers or copper foil
) boards are often used.
しかし、ガラエボ基板は、複雑なメツキ工程が必要とな
り、また、従来のFPC基板は、単層であるため高密度
配線が困難である等の問題がある。However, the Gala Evo board requires a complicated plating process, and since the conventional FPC board is a single layer, there are problems such as high-density wiring is difficult.
これらの問題を解決するためにフィルム状の樹脂の基板
に導電性パターンを形成し、これら基板を複数枚重ねた
高密度実装型の多層回路基板か開発されるようになって
きた。In order to solve these problems, high-density mounting multilayer circuit boards have been developed in which conductive patterns are formed on film-like resin substrates and a plurality of these substrates are stacked on top of each other.
この多層回路基板は、一般に、第3図に示すものであり
例えば以下のような方法で製造される。This multilayer circuit board is generally shown in FIG. 3 and is manufactured, for example, by the following method.
まず、ポリカーボネート、ポリスルホン、ボリアリレー
ト等の熱可塑性樹脂からなる熱変形性のフィルム基板1
0を備え、このフィルム基板10には適所にスルーホー
ル]1を形成するともにその表面には例えば20μm程
度の厚さの導電性ベーストからなる導電性パターン12
を形成する。First, a heat deformable film substrate 1 made of thermoplastic resin such as polycarbonate, polysulfone, polyarylate, etc.
This film substrate 10 is provided with through holes] 1 at appropriate locations, and a conductive pattern 12 made of a conductive base with a thickness of about 20 μm, for example, is formed on the surface of the film substrate 10.
form.
そして、このフィルム基板10を複数枚重ねて、スルー
ホール11、導電性パターン12の位置調整した後、熱
プレスの定板13.13の間に挿入し、これらフィルム
基板10を、定板13.13により導電性パターン12
等とともに一体的に熱圧着することにより、第4図に示
すような多層回路基板Aか成型される。After stacking a plurality of film substrates 10 and adjusting the positions of the through holes 11 and conductive patterns 12, the film substrates 10 are inserted between the fixed plates 13.13 of a heat press. Conductive pattern 12 by 13
By thermocompression bonding together with the above components, a multilayer circuit board A as shown in FIG. 4 is formed.
この多層回路基板Aは、導電性パターンかフィルム基板
に一体的に圧着接着されるので、従来のメツキ工程等が
なくなり、複数の導電性パターンか立体的に実装され、
基板の高密度化か実現される。Since this multilayer circuit board A is integrally bonded to the conductive pattern or the film substrate, the conventional plating process etc. is eliminated, and multiple conductive patterns are mounted three-dimensionally.
High-density substrates will be realized.
なお、14.14は、基板の表裏面に形成された電極で
ある。Note that 14 and 14 are electrodes formed on the front and back surfaces of the substrate.
(発明が解決しなければならない課題)ところで、この
多層回路基板Aは平板のまま用いられることもあるか、
電子機器(図示せず)等の構造によっては第2図に示す
ように直角に曲げた多層回路基板Bとして使用しなけれ
ばならないことかある。(Problem to be solved by the invention) By the way, is it possible for this multilayer circuit board A to be used as a flat board?
Depending on the structure of electronic equipment (not shown), etc., it may be necessary to use the multilayer circuit board B bent at right angles as shown in FIG.
この角形の多層回路基板Bは、平板の多層回路基板Aを
折曲して成形されるものであるから、熱変形性のフィル
ム基板10は勿論のこと導電性パターン12も折り曲げ
変形させられる。この変形によりフィルム基板10およ
び導電性パターン12に大きな曲げ応力が加わり、折り
曲げ部の導電性パターン12にクラックを生じたり、最
悪の場合には断線させてしまうことがある。Since this rectangular multilayer circuit board B is formed by bending the flat multilayer circuit board A, not only the heat-deformable film substrate 10 but also the conductive pattern 12 can be bent and deformed. This deformation applies a large bending stress to the film substrate 10 and the conductive pattern 12, which may cause cracks in the conductive pattern 12 at the bent portion or, in the worst case, break the wire.
本発明は上記曲げ部を有する多層回路基板においてクラ
ックや断線等が生じないようにした多層回路基板を得る
ことを目的とする。An object of the present invention is to obtain a multilayer circuit board having the above-mentioned bent portions in which cracks, wire breaks, etc. do not occur.
(課題を解決するための手段)
本発明は、熱可塑性樹脂からなる絶縁フィルム上に、熱
可塑性樹脂をバインダーとした導電ベーストにより導電
性パターンが形成されたフィルム基板を積層して熱圧着
によって一体化した多層回路基板であって、前記多層回
路基板には、前記導電性パターンと斜めに交差する折曲
部が形成させたものである。(Means for Solving the Problems) The present invention consists of laminating a film substrate on which a conductive pattern is formed using a conductive base using a thermoplastic resin as a binder on an insulating film made of a thermoplastic resin, and integrally bonding the film with a conductive pattern by thermocompression bonding. The multilayer circuit board is provided with a bent portion that obliquely intersects with the conductive pattern.
(作 用)
折り曲線部に位置する導電性パターンの折曲断面が増大
され、フィルム基板の折り曲げ部の導電性パターンの断
線が生じるにくい。(Function) The folded cross section of the conductive pattern located at the folded curved portion is increased, and the conductive pattern at the folded portion of the film substrate is less likely to be disconnected.
(実施例)
以下本発明回路基板の一実施例を第1図により説明する
。(Example) An example of the circuit board of the present invention will be described below with reference to FIG.
第1図に示した本発明多層回路基板口Eの製造方法は第
2図、第3図に示した従来の多層回路基板口Bとほぼ同
様であるので詳細な説明は省略する。The manufacturing method of the multilayer circuit board opening E of the present invention shown in FIG. 1 is almost the same as that of the conventional multilayer circuit board opening B shown in FIGS. 2 and 3, so a detailed explanation will be omitted.
この多層回路基板口Eは、熱変形性樹脂からなるフィル
ム基板上の適所にスルーホールか設けられ、このフィル
ム基板の折曲部以外の箇所である平板部20a、20b
の表面には例えば20μm程度の厚さに導電性ベースト
がスクリーン印刷され導電性パターン21が形成されて
いる。また、この導電性パターン23は折り曲げ部22
の折り曲げ線に対して斜めに交差するように形成されて
いる。This multilayer circuit board opening E is provided with a through hole at an appropriate location on a film board made of a thermodeformable resin, and flat plate portions 20a and 20b are provided at locations other than the bent portions of the film board.
A conductive pattern 21 is formed on the surface of the substrate by screen printing a conductive base to a thickness of, for example, about 20 μm. Further, this conductive pattern 23
It is formed to intersect diagonally with the bending line.
ここてこの傾斜を折り曲げ線に対して30°にすると、
第1図(b)に示すようにこの折り曲げ線と交差する導
電性パターン21の幅Wが約15%増加し、したがって
その折曲断面が増大する。If we make the slope of the lever 30 degrees to the bending line,
As shown in FIG. 1(b), the width W of the conductive pattern 21 that intersects with this bending line increases by about 15%, and therefore the bending cross section thereof increases.
このようなパターンの印刷をしたフィルム基板を複数枚
重ね、スルーホール、導電性パターン等の位置調整を行
った後、熱プレスの定板間に挿入し、熱圧着する。この
圧着した基板は、例えば折り曲げ機により折曲され多層
回路基板口Eが成型される。A plurality of film substrates printed with such patterns are stacked one on top of the other, and after adjusting the positions of through holes, conductive patterns, etc., they are inserted between the fixed plates of a heat press and bonded by thermocompression. This crimped board is bent using, for example, a bending machine to form a multilayer circuit board opening E.
このように導電性パターンを傾斜させた基板は、傾斜部
を通過する導電性パターンの折曲断面を大きくできるか
ら、その増加分たけクラックに起因する断線の支障か低
減できる。In a substrate having a conductive pattern inclined in this manner, the bending cross section of the conductive pattern passing through the inclined portion can be increased, so that the problem of wire breakage due to cracks can be reduced by the increased amount.
本発明多層回路基板は、熱可塑性樹脂からなる絶縁フィ
ルム上に、熱可塑性樹脂をバインダーとした導電ペース
トにより導電性パターンが形成されたフィルム基板を積
層して熱圧着によって一体化した多層回路基板であって
、前記多層回路基板には、前記導電性パターンと斜めに
交差する折曲部が形成したから、傾斜部を通過する導電
性パターンの折曲断面を大きくでき、したかって、折曲
部のクラックに起因する断線の支障が大幅に低減できる
。The multilayer circuit board of the present invention is a multilayer circuit board in which a film board on which a conductive pattern is formed using a conductive paste using a thermoplastic resin as a binder is laminated on an insulating film made of a thermoplastic resin and integrated by thermocompression bonding. Since the multilayer circuit board is formed with a bent portion diagonally intersecting the conductive pattern, the bent cross section of the conductive pattern passing through the inclined portion can be enlarged, and therefore the bent portion of the bent portion can be enlarged. The trouble of wire breakage caused by cracks can be significantly reduced.
第1図(a)は本発明回路基板の斜視図、第1図(b)
は第1図(a)の傾斜導電性パターンを拡大して示す斜
視図、第2図は従来の回路基板の斜視図、第3図は回路
基板の製造工程を示す熱プレスの断面図、第4図は回路
基板の側面図である。
10・・・フィルム基板、1]・・・スルーホール、]
2.21・・・導電性パターン、13 熱プレスの定板
、14・・・電極、20a、20b・・・平板部、22
・・・曲げ部、23・・・傾斜導電性パターン。FIG. 1(a) is a perspective view of the circuit board of the present invention, FIG. 1(b)
1(a) is an enlarged perspective view showing the inclined conductive pattern in FIG. 1(a), FIG. 2 is a perspective view of a conventional circuit board, FIG. FIG. 4 is a side view of the circuit board. 10...Film substrate, 1]...Through hole,]
2.21... Conductive pattern, 13 Heat press fixed plate, 14... Electrode, 20a, 20b... Flat plate part, 22
. . . bent portion, 23 . . . inclined conductive pattern.
Claims (1)
脂をバインダーとした導電ペーストにより導電性パター
ンが形成されたフィルム基板を積層して熱圧着によって
一体化した多層回路基板であって、前記多層回路基板に
は、前記導電性パターンと斜めに交差する折曲部が形成
されていることを特徴とする多層回路基板。A multilayer circuit board in which a film substrate on which a conductive pattern is formed using a conductive paste using a thermoplastic resin as a binder is laminated on an insulating film made of a thermoplastic resin and integrated by thermocompression bonding, the multilayer circuit board A multilayer circuit board characterized in that a bent portion is formed to obliquely intersect with the conductive pattern.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25837790A JPH04137590A (en) | 1990-09-27 | 1990-09-27 | Multilayer circuit board |
EP19910116579 EP0477981A3 (en) | 1990-09-27 | 1991-09-27 | Multi-layer circuit substrate having a non-planar shape, and a method for the manufacture thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25837790A JPH04137590A (en) | 1990-09-27 | 1990-09-27 | Multilayer circuit board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04137590A true JPH04137590A (en) | 1992-05-12 |
Family
ID=17319400
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP25837790A Pending JPH04137590A (en) | 1990-09-27 | 1990-09-27 | Multilayer circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04137590A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2020068230A (en) * | 2018-10-22 | 2020-04-30 | 株式会社Lixil | Three-dimensional wiring structure and manufacturing method of three-dimensional wiring structure |
-
1990
- 1990-09-27 JP JP25837790A patent/JPH04137590A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2020068230A (en) * | 2018-10-22 | 2020-04-30 | 株式会社Lixil | Three-dimensional wiring structure and manufacturing method of three-dimensional wiring structure |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5719749A (en) | Printed circuit assembly with fine pitch flexible printed circuit overlay mounted to printed circuit board | |
US7829265B2 (en) | Printed wiring board, method for forming the printed wiring board, and board interconnection structure | |
US7286370B2 (en) | Wired circuit board and connection structure of wired circuit board | |
KR20230025686A (en) | Flexible Substrate | |
JPS63211692A (en) | Double-sided interconnection board | |
US11723153B2 (en) | Printed circuit board and method of fabricating the same | |
US10477704B2 (en) | Multilayer board and electronic device | |
US20040070959A1 (en) | Multi-layer board, its production method, and mobile device using multi-layer board | |
JP2007258410A (en) | Wiring board connecting structure and its manufacturing method | |
EP0477981A2 (en) | Multi-layer circuit substrate having a non-planar shape, and a method for the manufacture thereof | |
JP5075568B2 (en) | Shielded circuit wiring board and method for manufacturing the same | |
CN1171516C (en) | Printed circuit board structure | |
KR20220064117A (en) | Flexible printed circuit board and electronic device including the same | |
JP2001036246A (en) | Wiring board and multilayer wiring board using the same | |
JPH05327211A (en) | Multilayer flexible printed board and manufacture thereof | |
JPH04137590A (en) | Multilayer circuit board | |
JPH08116147A (en) | Connection structure of rigid substrate | |
JPH04137591A (en) | Multilayer circuit board | |
JP3425058B2 (en) | Semiconductor package | |
JPH04137592A (en) | Multilayer circuit board | |
JPH07162120A (en) | Circuit connection method for flexible printed wiring board and flexible printed wiring board | |
JP3250390B2 (en) | Multilayer printed wiring board | |
CN112566390B (en) | Multilayer flexible circuit board and preparation method thereof | |
JPH04139792A (en) | Multilayer resin board | |
JP2003188486A (en) | Wiring board, semiconductor device, and their manufacturing methods |