JP2007251017A - Wiring substrate, multipartite wiring substrate, and manufacturing method thereof - Google Patents

Wiring substrate, multipartite wiring substrate, and manufacturing method thereof Download PDF

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JP2007251017A
JP2007251017A JP2006074905A JP2006074905A JP2007251017A JP 2007251017 A JP2007251017 A JP 2007251017A JP 2006074905 A JP2006074905 A JP 2006074905A JP 2006074905 A JP2006074905 A JP 2006074905A JP 2007251017 A JP2007251017 A JP 2007251017A
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conductor
layer
wiring board
notch
green sheet
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Makoto Nagai
誠 永井
Masahito Morita
雅仁 森田
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Niterra Co Ltd
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NGK Spark Plug Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15172Fan-out arrangement of the internal vias
    • H01L2924/15174Fan-out arrangement of the internal vias in different layers of the multilayer substrate

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  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring substrate having a notch-portion conductor on each side surface of its substrate body whereon a metal plating layer having an sufficient thickness is formed, and provide a multipartite wiring substrate for obtaining the many wiring substrates, and further, provide a manufacturing method of the multipartite wiring substrate. <P>SOLUTION: The wiring substrate p1 is so constituted as to laminate upper-layer-side ceramic layers c2, c3 and a lower-layer-side ceramic layer c1, and includes a substrate body 1 having front and rear surfaces 2, 3, a notch 5 formed on each side surface 4 of the lower-layer-side ceramic layer c1 of the substrate body 1, a notch-portion conductor 6 formed in the notch 5, and an insulating portion 10 so formed as to cover at least the upper end 6c of a notch conductor 6 which has a curved surface 11. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、基板本体の裏面側の切欠部に切欠部導体を有する配線基板、およびベース基板の裏面に開口する非貫通孔に内壁導体を有する多数個取り配線基板、ならびに当該多数個取り配線基板の製造方法に関する。   The present invention relates to a wiring board having a notch conductor in a notch on the back side of the substrate body, a multi-piece wiring board having an inner wall conductor in a non-through hole opened in the back side of the base board, and the multi-piece wiring board It relates to the manufacturing method.

例えば、直方体で且つ帯状の基体の上面に貫通孔を有する枠体を積層し、前記基体における4つの角部のそれぞれに上記枠体の下方に位置して切り欠かれた平面視で円弧状の切欠き部を有し、かかる切欠き部の内周面に側面導体を形成した発光素子収納用パッケージが提案されている(例えば、特許文献1参照)。
上記発光素子収納用パッケージは、上記基体における4つの角部のそれぞれに円弧形状の側面導体が大きな表面積で形成されているため、基体の下面に形成した電極パッドを外部電気回路基板の配線導体に接続する際に、大きな半田のメニスカスが形成されて、接合強度を大きくできる、という効果を奏する。
For example, a frame having a rectangular parallelepiped and having a through hole on the upper surface of a belt-like substrate is laminated, and each of the four corners of the substrate is positioned below the frame and cut out in a plan view. There has been proposed a light emitting element storage package having a notch and having a side conductor formed on the inner peripheral surface of the notch (see, for example, Patent Document 1).
In the light emitting element storage package, since the arc-shaped side conductors are formed on each of the four corners of the base with a large surface area, the electrode pads formed on the bottom surface of the base are used as the wiring conductors of the external electric circuit board. At the time of connection, a large solder meniscus is formed, so that the bonding strength can be increased.

特開2004−253711号公報(第1〜12頁、図1,2)Japanese Unexamined Patent Publication No. 2004-253711 (pages 1 to 12, FIGS. 1 and 2)

しかしながら、前記発光素子収納用パッケージを多数個取りで製造する場合、大版サイズの絶縁基板の裏面に開口する非貫通孔の内周面に形成され、追って前記複数の円弧形状の側面導体に分割される円筒形状の内壁導体には、メッキ液が容易に環流しないため、十分な厚みのメッキ層を形成できない。このため、上記多数個取り基板を複数のパッケージに分割して、得られた各パッケージにおける4個の前記側面導体には、例えば、Auからなるメッキ層などが十分な厚みで被覆されていない。この結果、かかる側面導体を前記外部電気回路基板の配線導体に接続するに際し、ハンダの濡れ広がり性が低いため、かかるハンダ付けの接合強度が不十分になる、という問題があった。   However, when a large number of the light emitting element storage packages are manufactured, they are formed on the inner peripheral surface of a non-through hole that opens on the back surface of a large-size insulating substrate, and then divided into the plurality of arc-shaped side conductors. Since the plating solution does not easily circulate on the cylindrical inner wall conductor, a sufficiently thick plating layer cannot be formed. For this reason, the multi-sided substrate is divided into a plurality of packages, and the four side conductors in each of the obtained packages are not covered with, for example, a plating layer made of Au with a sufficient thickness. As a result, when connecting the side conductors to the wiring conductors of the external electric circuit board, there is a problem that the soldering wettability is low, so that the bonding strength of the soldering becomes insufficient.

本発明は、背景技術において説明した問題点を解決し、基板本体の側面に十分な厚みの金属メッキ層を形成した切欠部導体を有する配線基板、およびかかる配線基板を得るための多数個取り用配線基板、ならびにかかる多数個取り用配線基板の製造方法を提供する、ことを課題とする。   The present invention solves the problems described in the background art, and has a wiring board having a notched conductor in which a metal plating layer having a sufficient thickness is formed on the side surface of the board body, and a large number of pieces for obtaining such a wiring board. It is an object of the present invention to provide a wiring board and a method for manufacturing such a multi-cavity wiring board.

課題を解決するための手段および発明の効果Means for Solving the Problems and Effects of the Invention

本発明は、前記課題を解決するため、追って配線基板の切欠部導体となる多数個取り配線基板の内壁導体に対し、メッキ液が容易に環流し易くして、十分な厚みのメッキ層を形成する、ことに着想して成されたものである。
即ち、本発明の配線基板(請求項1)は、上層側のセラミック層と下層側のセラミック層とを積層して構成され、表面および裏面を有する基板本体と、かかる基板本体における下層側のセラミック層の側面に形成された切欠部およびかかる切欠部内に形成された切欠部導体と、かかる切欠部導体の少なくとも上端部を覆うように形成された絶縁部と、を含む、ことを特徴とする。
In order to solve the above-mentioned problems, the present invention makes it possible to easily circulate the plating solution to the inner wall conductor of the multi-piece wiring board that will be the cutout conductor of the wiring board, and to form a sufficiently thick plating layer. It was designed with the idea in mind.
That is, the wiring board of the present invention (Claim 1) is configured by laminating an upper ceramic layer and a lower ceramic layer, and has a substrate body having a front surface and a back surface, and a lower ceramic layer in the substrate body. It includes a notch formed on a side surface of the layer, a notch conductor formed in the notch, and an insulating part formed to cover at least the upper end of the notch conductor.

これによれば、前記切欠部導体は、その上端部を覆う絶縁部により、当該配線基板を得るための多数個取り配線基板において、メッキ液の環流が悪い部分は、上記絶縁部に覆われているので、金属メッキ層が形成されず、これ以外の部分には金属メッキ層が容易に形成される。このため、絶縁部に覆われている上端部を除いた上記切欠部導体の表面に全体に、例えば、Auからなり所要の厚みを有する金属メッキ層が形成されている。この結果、多数個取り配線基板を切断して分割した当該配線基板をマザーボードに搭載する際に、かかるマザーボードの外部端子と上記切欠部導体との間を、濡れ広がり性の高いハンダによって、強固に接合することができる。従って、上記配線基板の内部配線などとマザーボードとの導通を安定して得ることが可能となる。上記ハンダは、低融点の金属または合金を指す。   According to this, in the multi-piece wiring board for obtaining the wiring board, the part where the plating solution is poorly circulated is covered with the insulating part by the insulating part covering the upper end part of the notched conductor. Therefore, the metal plating layer is not formed, and the metal plating layer is easily formed in other portions. For this reason, a metal plating layer made of, for example, Au and having a required thickness is formed on the entire surface of the notch conductor except the upper end covered with the insulating portion. As a result, when mounting the wiring board obtained by cutting and dividing the multi-piece wiring board on the motherboard, between the external terminal of the motherboard and the notch conductor is firmly made by solder having high wettability. Can be joined. Therefore, it is possible to stably obtain conduction between the internal wiring of the wiring board and the mother board. The solder refers to a low melting point metal or alloy.

尚、前記基板本体を形成する各セラミック層は、例えばアルミナを主成分とするセラミックや、低温焼成の一種である例えばガラス−セラミックからなる。
また、上層側および下層側のセラミック層は、それぞれ単層のほか、複数のセラミック層を積層した形態も含まれる。
更に、前記基板本体の表面には、上層側のセラミック層に設けた貫通孔を側面とするキャビティが開口する形態としても良く、かかるキャビティの底面に、電子部品や発光素子などが搭載される。
また、前記切欠部および切欠部導体は、下層側のセラミック層における側面の中間位置のほか、隣接する側面同士間のコーナ部に形成しても良い。
更に、切欠部導体は、配線基板の内部配線と導通すると共に、かかる内部配線を介して、基板本体の表面またはかかる表面に開口するキャビティに搭載される電子部品や発光素子との間でも導通可能とされている。
Each ceramic layer forming the substrate body is made of, for example, a ceramic mainly composed of alumina, or a glass-ceramic that is a kind of low-temperature firing.
Moreover, the upper layer side and lower layer side ceramic layers include not only a single layer but also a form in which a plurality of ceramic layers are laminated.
Further, a cavity having a through hole provided in the upper ceramic layer as a side surface may be opened on the surface of the substrate body, and an electronic component, a light emitting element, or the like is mounted on the bottom surface of the cavity.
Further, the notch and the notch conductor may be formed at a corner portion between adjacent side surfaces in addition to an intermediate position between the side surfaces of the lower ceramic layer.
Furthermore, the notch conductor is electrically connected to the internal wiring of the wiring board, and can also be connected to an electronic component or a light emitting element mounted on the surface of the board body or a cavity opened on the surface via the internal wiring. It is said that.

また、本発明には、前記絶縁部は、前記切欠部導体と接する湾曲面またはテーパ面を有している、配線基板(請求項2)も含まれる。尚、上記テーパ面は、1つの傾斜面からなる他、複数の傾斜面の組み合わせからなる形態も含む。
更に、本発明には、前記絶縁部は、前記切欠部導体との間で鈍角を成している、配線基板(請求項3)も含まれる。尚、上記鈍角の範囲は、90度超から150度までである。150度超の範囲は、平面に近付くので、除いている。また、前記湾曲面を有する絶縁部の場合、基板本体の表面と直交する垂直断面における湾曲面の中央付近に接する接線と切欠部導体の表面との間が、上記鈍角となる。
これらによれば、切欠部導体の上端部を覆う上記絶縁部が、かかる切欠部導体と接する湾曲面またはテーパ面を有しているか、あるいは、切欠部導体との間で鈍角を成している。この結果、当該配線基板を得るための多数個取り配線基板において、メッキ液の環流が悪い部分には、前記絶縁部に覆われることで、金属メッキ層が形成されない反面、絶縁部に覆われていない部分には、金属メッキ層が容易に形成される。このため、絶縁部に覆われる上端部を除いた上記切欠部導体の表面に全体に、例えば、Auからなり所要の厚みを有する金属メッキ層が形成されている。従って、上記配線基板をマザーボードに搭載する際に、かかるマザーボードの外部端子と上記切欠部導体との間を、濡れ広がり性の高いハンダにより強固に接合することができる。
The present invention also includes a wiring board (Claim 2) in which the insulating portion has a curved surface or a tapered surface in contact with the notch conductor. In addition, the said taper surface includes the form which consists of a combination of a some inclined surface other than consisting of one inclined surface.
Furthermore, the present invention includes a wiring board (Claim 3) in which the insulating portion forms an obtuse angle with the notch conductor. The range of the obtuse angle is from over 90 degrees to 150 degrees. The range over 150 degrees is excluded because it approaches the plane. In the case of the insulating part having the curved surface, the obtuse angle is formed between the tangent line that is in the vicinity of the center of the curved surface and the surface of the notch conductor in a vertical cross section perpendicular to the surface of the substrate body.
According to these, the said insulation part which covers the upper end part of a notch part conductor has the curved surface or taper surface which touches this notch part conductor, or has made an obtuse angle between notch part conductors. . As a result, in the multi-piece wiring board for obtaining the wiring board, the portion where the plating solution is poorly circulated is covered with the insulating portion, so that the metal plating layer is not formed, but is covered with the insulating portion. A metal plating layer is easily formed in a portion where there is no. For this reason, a metal plating layer made of, for example, Au and having a required thickness is formed on the entire surface of the cutout conductor excluding the upper end covered with the insulating portion. Therefore, when the wiring board is mounted on the mother board, the external terminal of the mother board and the notch conductor can be firmly joined by solder having high wettability.

一方、本発明の多数個取り配線基板(請求項4)は、上層側のセラミック層と下層側のセラミック層とを積層して構成され、平面視で複数の製品が縦横に配置される製品領域とかかる製品領域を囲む耳部とを有するベース基板と、かかるベース基板のうち、下層側のセラミック層における製品領域内の製品同士の境界および製品領域と耳部との境界である切断予定面と交差し且つ当該下層側のセラミック層を貫通する貫通孔と、かかる貫通孔の内壁に形成された内壁導体と、かかる内壁導体の少なくとも上端部を覆うように形成された絶縁部と、を含む、ことを特徴とする。   On the other hand, the multi-piece wiring board of the present invention (Claim 4) is configured by laminating an upper ceramic layer and a lower ceramic layer, and a product region in which a plurality of products are arranged vertically and horizontally in a plan view. And a base substrate having an ear portion surrounding the product region, and a cutting plane that is a boundary between products in the product region in the lower ceramic layer and a boundary between the product region and the ear portion of the base substrate. A through hole that intersects and penetrates the ceramic layer on the lower layer side, an inner wall conductor formed on the inner wall of the through hole, and an insulating part formed to cover at least the upper end of the inner wall conductor, It is characterized by that.

これによれば、前記内壁導体は、その上端部を覆う絶縁部によって、当該多数個取り配線基板をメッキ液に浸漬した際に、かかるメッキ液の環流が悪い部分は、前記絶縁部に覆われているため、金属メッキ層が形成されない反面、かかる絶縁部以外の部分では、メッキ液の環流がスムースに行われる。この結果、絶縁部に覆われる上端部を除いた上記内壁導体の表面に全体に、例えば、Auからなり所要の厚みを有する金属メッキ層が形成されている。このため、かかる多数個取り配線基板を切断・分割して得られる複数の配線基板ごとの前記切欠部導体も、その上端部を除いて上記金属メッキ層が形成されている。従って、分割後の上記配線基板をマザーボードに搭載する際に、かかるマザーボードの外部端子と上記切欠部導体との間を、ハンダを介して強固に接合することができる。
尚、前記貫通孔の内壁に沿って形成される内壁導体は、かかる貫通孔の内壁とほぼ相似形のほぼ円筒形を呈する。
According to this, when the multi-layered wiring board is immersed in the plating solution by the insulating portion covering the upper end portion of the inner wall conductor, the portion where the circulation of the plating solution is bad is covered with the insulating portion. Therefore, while the metal plating layer is not formed, the plating solution is smoothly circulated in portions other than the insulating portion. As a result, a metal plating layer made of, for example, Au and having a required thickness is formed on the entire surface of the inner wall conductor excluding the upper end covered with the insulating portion. For this reason, the notched conductor for each of the plurality of wiring boards obtained by cutting and dividing the multi-cavity wiring board is also formed with the metal plating layer except for its upper end. Therefore, when the divided wiring board is mounted on the mother board, the external terminals of the mother board and the notch conductor can be firmly bonded via the solder.
The inner wall conductor formed along the inner wall of the through hole has a substantially cylindrical shape that is substantially similar to the inner wall of the through hole.

また、本発明には、前記絶縁部は、前記内壁導体と接する湾曲面またはテーパ面を有している、多数個取り配線基板(請求項5)も含まれる。
更に、本発明には、前記絶縁部は、前記内壁導体との間で鈍角を成している、多数個取り配線基板(請求項6)も含まれる。
尚、上記鈍角は、90度超から150度までの範囲である。
これらによれば、上記内壁導体の上端部を覆う絶縁部が、かかる内壁導体と接する湾曲面またはテーパ面を有しているか、あるいは、内壁導体との間で鈍角を成している。このため、当該多数個取り配線基板をメッキ液に浸漬した際に、当該メッキ液の環流の悪い部分は、前記絶縁部に覆われるので、金属メッキ層が形成されない反面、絶縁部に覆われていない部分には、メッキ液が良好に環流する。この結果、上端部を除いた内壁導体の表面に全体に、例えば、Auからなり所要の厚みを有する金属メッキ層が形成されている。従って、上記多数個取り配線基板を切断・分割して得られる複数の配線基板ごとの前記切欠部導体と、マザーボードの外部端子とを、ハンダを介して強固に接合することが可能となる。
The present invention also includes a multi-piece wiring board (Claim 5) in which the insulating portion has a curved surface or a tapered surface in contact with the inner wall conductor.
Furthermore, the present invention includes a multi-piece wiring board (Claim 6) in which the insulating portion forms an obtuse angle with the inner wall conductor.
The obtuse angle is in the range from over 90 degrees to 150 degrees.
According to these, the insulating portion covering the upper end portion of the inner wall conductor has a curved surface or a tapered surface in contact with the inner wall conductor, or forms an obtuse angle with the inner wall conductor. For this reason, when the multi-piece wiring board is immersed in a plating solution, the poorly circulated portion of the plating solution is covered with the insulating portion, so that the metal plating layer is not formed but is covered with the insulating portion. The plating solution circulates well in the parts that are not present. As a result, a metal plating layer made of, for example, Au and having a required thickness is formed on the entire surface of the inner wall conductor excluding the upper end. Therefore, the cutout conductors for each of the plurality of wiring boards obtained by cutting and dividing the multi-piece wiring board and the external terminals of the mother board can be firmly bonded via the solder.

また、本発明による多数個取り配線基板の製造方法(請求項7)は、上層側のグリーンシートの裏面に溶剤を塗布する工程と、下層側のグリーンシートの製品領域内で縦横に配置される複数の製品間の境界および製品領域とこれを囲む耳部との境界である切断予定面と交差し、且つ当該下層側のグリーンシートを貫通する複数組のスルーホールおよび当該スルーホールの内壁に沿った内壁導体を形成する工程と、上記上層側のグリーンシートと下層側のグリーンシートとを積層して圧着する工程と、を含む、ことを特徴とする。   Further, the method for manufacturing a multi-piece wiring board according to the present invention (Claim 7) is arranged vertically and horizontally in the step of applying a solvent to the back surface of the upper green sheet and the product area of the lower green sheet. A plurality of sets of through-holes that intersect the planned cutting plane that is a boundary between a plurality of products and a boundary between a product region and an ear part surrounding the product region, and that penetrate through the green sheet on the lower layer side, along the inner wall of the through-hole A step of forming an inner wall conductor, and a step of laminating and pressing the upper green sheet and the lower green sheet.

これによれば、上層側のグリーンシートと下層側のグリーンシートとを積層して圧着することで、製品領域とこれを囲む耳部とを有するベース基板が形成されると共に、上記切断予定面と交差する位置に、下層側のグリーンシートを貫通する複数組の貫通孔および内壁導体が形成される。しかも、かかる内壁導体の少なくとも上端部は、上層側のグリーンシートにおける前記溶剤が浸透したその裏面側の一部が当該内壁導体の内側に延び出た絶縁部に覆われる。従って、追って上記内壁導体に対し、例えばNiおよびAuメッキ層を形成する際に、メッキ液の環流の悪い部分は、前記絶縁部に覆われているので、金属メッキ層が形成されない反面、これ以外の内壁導体の表面全体には、メッキ液が容易に環流するので、所要の厚みの金属メッキ層を形成することができる。
尚、前記溶剤の種類や圧着方法を調整することで、絶縁部に湾曲面またはテーパ面を形成することが可能である。
According to this, a base substrate having a product region and an ear portion surrounding the product region is formed by laminating and pressing the upper-layer side green sheet and the lower-layer side green sheet, and A plurality of sets of through-holes and inner wall conductors that penetrate the lower-layer side green sheet are formed at the intersecting positions. In addition, at least the upper end portion of the inner wall conductor is covered with an insulating portion in which a part of the back surface side in which the solvent has permeated in the upper layer side green sheet extends to the inside of the inner wall conductor. Accordingly, when forming a Ni and Au plating layer, for example, on the inner wall conductor later, the portion with poor circulation of the plating solution is covered with the insulating portion, so that the metal plating layer is not formed. Since the plating solution easily circulates over the entire surface of the inner wall conductor, a metal plating layer having a required thickness can be formed.
In addition, it is possible to form a curved surface or a tapered surface in the insulating part by adjusting the kind of the solvent and the pressure bonding method.

付言すれば、本発明には、前記多数個取り配線基板を焼成する工程、焼成された多数個取り配線基板の内壁導体に金属メッキ層を形成する工程と、その後に、多数個取り配線基板を製品領域内で縦横に配置される複数の製品間の境界および製品領域とこれを囲む耳部との境界である切断予定面に沿って切断する工程と、を含む、配線基板の製造方法も含まれ得る。これによる場合、複数の前記配線基板を効率良く確実に製造することが可能となる。   In other words, the present invention includes a step of firing the multi-cavity wiring board, a step of forming a metal plating layer on the inner wall conductor of the fired multi-cavity wiring board, and then a multi-cavity wiring board. Including a step of cutting along a planned cutting plane that is a boundary between a plurality of products arranged vertically and horizontally in the product region and a boundary between the product region and an ear portion surrounding the product region. Can be. In this case, a plurality of the wiring boards can be efficiently and reliably manufactured.

以下において、本発明を実施するための最良の形態について説明する。
図1は、本発明における一形態の配線基板p1を示す垂直断面図である。
配線基板p1は、図1に示すように、平面視がほぼ正方形で表面2および裏面3を有する基板本体1と、かかる基板本体1の表面2に開口するキャビティ14と、基板本体1の裏面3と側面4にまたがって形成された複数の切欠部5と、かかる切欠部5内ごとに形成された複数の切欠部導体6と、を備えている。
基板本体1は、図1に示すように、主にアルミナからなる上層側のセラミック層c2,c3と下層側のセラミック層c1とを一体に積層したものである。上層側のセラミック層c3には、キャビティ14の側面16が、基板本体1の表面2側に広がるように傾斜しつつほぼ円錐形状に貫通しており、かかる側面16の底部に上層側のセラミック層c2の表面であるキャビティ14の底面15が、平面視を円形にして露出している。
In the following, the best mode for carrying out the present invention will be described.
FIG. 1 is a vertical sectional view showing a wiring board p1 according to one embodiment of the present invention.
As shown in FIG. 1, the wiring board p <b> 1 is substantially square in plan view and has a substrate body 1 having a front surface 2 and a back surface 3, a cavity 14 opened in the front surface 2 of the substrate body 1, and a back surface 3 of the substrate body 1. And a plurality of cutout portions 5 formed over the side surface 4 and a plurality of cutout conductors 6 formed in each cutout portion 5.
As shown in FIG. 1, the substrate body 1 is formed by integrally laminating upper ceramic layers c2 and c3 mainly made of alumina and a lower ceramic layer c1. In the upper ceramic layer c3, the side surface 16 of the cavity 14 is inclined so as to spread toward the surface 2 side of the substrate body 1, and penetrates in a substantially conical shape. The bottom surface 15 of the cavity 14 that is the surface of c2 is exposed in a circular plan view.

キャビティ14の側面16には、WまたはMoからなる金属層17が形成され、その表面には、例えば下地のNiメッキ層を介して、光反射用のAgメッキ層(何れも図示せず)が表層に形成されている。キャビティ14の底面15には、Wなどからなる一対のパッド18が形成され、これらの間に、図1中の一点鎖線で示す発光ダイオード(発光素子)Cが搭載可能とされている。かかる発光ダイオードCは、図示しないボンディングワイヤを介して、一対のパッド18と接続され、当該発光ダイオードCから発光された光は、金属層17の表層を覆うAgメッキ層に反射して、配線基板p1の外部に放射される。   A metal layer 17 made of W or Mo is formed on the side surface 16 of the cavity 14, and an Ag plating layer for light reflection (none of which is shown) is formed on the surface of the metal layer 17 through, for example, an underlying Ni plating layer. It is formed on the surface layer. A pair of pads 18 made of W or the like is formed on the bottom surface 15 of the cavity 14, and a light emitting diode (light emitting element) C indicated by a one-dot chain line in FIG. The light-emitting diode C is connected to a pair of pads 18 via a bonding wire (not shown), and light emitted from the light-emitting diode C is reflected on an Ag plating layer that covers the surface layer of the metal layer 17 to form a wiring board. Radiated outside p1.

図1に示すように、基板本体1を形成する下・上層側のセラミック層c1,c2間には、Wなどからなり所定パターンを有する内部配線20が形成されている。また、基板本体1の裏面3には、Wなどからなる複数の外部端子19が形成されている。上記パッド18と内部配線20との間は、Wなどからなるビア導体21によって接続され、内部配線20と外部端子19との間は、上記同様のビア導体22によって接続されている。
尚、上記内部配線20と切欠部導体6との間も接続されている。また、図示しないビア導体21は、上記金属層17と内部配線20との間を接続している。
As shown in FIG. 1, an internal wiring 20 made of W or the like and having a predetermined pattern is formed between lower and upper ceramic layers c1 and c2 forming the substrate body 1. A plurality of external terminals 19 made of W or the like are formed on the back surface 3 of the substrate body 1. The pad 18 and the internal wiring 20 are connected by a via conductor 21 made of W or the like, and the internal wiring 20 and the external terminal 19 are connected by a via conductor 22 similar to the above.
The internal wiring 20 and the cutout conductor 6 are also connected. A via conductor 21 (not shown) connects the metal layer 17 and the internal wiring 20.

図1,図2に示すように、基板本体1における下層側のセラミック層c1の側面4には、平面視がほぼ半円形の切欠部5が形成され、かかる切欠部5の内周面に平面視の断面がほぼ半円形の切欠部導体6が形成されている。
図2の部分拡大断面図および同図中のX−X線の矢視に沿った部分水平断面図に示すように、切欠部導体6は、セラミック層c1,c2間に延びる半リング状の水平片6aと基板本体1の裏面3上に延びる半リング状の水平片6bとを、上・下端に有する。かかる切欠部導体6は、その上端部6cが上層側のセラミック層c2の一部が基板本体1の裏面3側の延び出た絶縁部10に覆われている。
As shown in FIGS. 1 and 2, a cutout portion 5 having a substantially semicircular shape in plan view is formed on the side surface 4 of the lower ceramic layer c <b> 1 in the substrate body 1, and a flat surface is formed on the inner peripheral surface of the cutout portion 5. A cutout conductor 6 having a substantially semicircular cross section as viewed is formed.
As shown in the partial enlarged cross-sectional view of FIG. 2 and the partial horizontal cross-sectional view taken along the line XX in FIG. 2, the notch conductor 6 is a semi-ring-shaped horizontal extending between the ceramic layers c1 and c2. A piece 6a and a semi-ring-shaped horizontal piece 6b extending on the back surface 3 of the substrate body 1 are provided at the upper and lower ends. The cutout conductor 6 has an upper end portion 6c covered with an insulating portion 10 in which a part of the upper ceramic layer c2 extends on the back surface 3 side of the substrate body 1.

かかる絶縁部10は、図2に示すように、窪んだ形状の湾曲面11を有している。基板本体1の表面2と直交する垂直断面において、上記湾曲面11の中央付近に接する接線sと切欠部導体6の表面との間の角度は、約130度の鈍角θである。
図1,図2に示すように、上記絶縁部10に覆われた上端部6cおよび水平片6aを除いた切欠部導体6の表面全体には、下地で厚みが約1〜15μmのNiメッキ層と表層で厚みが約0.1〜5.0μmのAuメッキ層とからなる金属メッキ層8が形成されている。
As shown in FIG. 2, the insulating portion 10 has a curved surface 11 having a recessed shape. In a vertical cross section perpendicular to the surface 2 of the substrate body 1, the angle between the tangent line s in contact with the vicinity of the center of the curved surface 11 and the surface of the notch conductor 6 is an obtuse angle θ of about 130 degrees.
As shown in FIGS. 1 and 2, the entire surface of the notch conductor 6 except for the upper end 6c and the horizontal piece 6a covered with the insulating part 10 is a Ni plating layer having a thickness of about 1 to 15 μm as a base. And a metal plating layer 8 composed of an Au plating layer having a thickness of about 0.1 to 5.0 μm on the surface layer.

図3は、異なる形態の配線基板p2を示す垂直断面図、図4は、かかる図3中の部分拡大断面図、図5は、図4中のY−Y線の矢視に沿った部分断面図である。
図3に示すように、配線基板p2も、下層側のセラミック層c1および上層側のセラミック層c2,c3からなる前記同様の基板本体1、底面15および側面16からなるキャビティ14、金属層17、パッド18、外部端子19、内部配線20、ビア導体21,22、基板本体1の裏面3と側面4にまたがって形成された切欠部5、および切欠部5内に形成された切欠部導体6、を備えている。
図4,図5に示すように、基板本体1における下層側のセラミック層c1の側面4には、平面視がほぼ半円形の切欠部5が形成され、かかる切欠部5の内周面に平面視の断面がほぼ半円形の切欠部導体6が形成されている。
3 is a vertical sectional view showing a wiring board p2 of a different form, FIG. 4 is a partial enlarged sectional view in FIG. 3, and FIG. 5 is a partial sectional view taken along the line YY in FIG. FIG.
As shown in FIG. 3, the wiring board p2 also includes the same substrate body 1 composed of the lower ceramic layer c1 and the upper ceramic layers c2 and c3, the cavity 14 composed of the bottom surface 15 and the side surface 16, the metal layer 17, A pad 18, an external terminal 19, an internal wiring 20, via conductors 21 and 22, a notch 5 formed across the back surface 3 and the side surface 4 of the substrate body 1, and a notch conductor 6 formed in the notch 5; It has.
As shown in FIG. 4 and FIG. 5, the side surface 4 of the lower layer ceramic layer c <b> 1 in the substrate body 1 is formed with a substantially semicircular cutout portion 5 in plan view, and a flat surface is formed on the inner peripheral surface of the cutout portion 5. A cutout conductor 6 having a substantially semicircular cross section as viewed is formed.

上記切欠部導体6は、その上・下端に半リング状の水平片6a,6bを有すると共に、その上端部6cが上層側のセラミック層c2の一部が基板本体1の裏面3側に延び出た絶縁部12に覆われている。
かかる絶縁部12は、図4に示すように、当該絶縁部12における基板本体1の表面2側から裏面3側に向かって、広がるように傾斜したテーパ面13を有している。基板本体1の表面2と直交する垂直断面において、上記テーパ面13と切欠部導体6の表面との間の角度は、約130度の鈍角θである。
図4に示すように、上記絶縁部12に覆われた上端部6cおよび水平片6aを除いた切欠部導体6の表面全体には、下地のNiメッキ層および表層のAuメッキ層からなる金属メッキ層8が前記同様の厚みで形成されている。
The notch conductor 6 has semi-ring-shaped horizontal pieces 6a and 6b at the upper and lower ends thereof, and the upper end portion 6c of the upper ceramic layer c2 extends partially toward the back surface 3 of the substrate body 1. Covered with the insulating part 12.
As shown in FIG. 4, the insulating portion 12 has a tapered surface 13 that is inclined so as to spread from the front surface 2 side to the back surface 3 side of the substrate body 1 in the insulating portion 12. In a vertical cross section perpendicular to the surface 2 of the substrate body 1, the angle between the tapered surface 13 and the surface of the notch conductor 6 is an obtuse angle θ of about 130 degrees.
As shown in FIG. 4, the entire surface of the notch conductor 6 except for the upper end 6c and the horizontal piece 6a covered with the insulating portion 12 is plated with a metal plating composed of a base Ni plating layer and a surface Au plating layer. The layer 8 is formed with the same thickness as described above.

以上のような配線基板p1,p2によれば、基板本体1における下層側のセラミック層c1の側面4に形成された前記切欠部導体6は、その上端部6cを覆う絶縁部10,12によって、当該配線基板p1,p2を得るための多数個取り配線基板において、メッキ液の環流が悪い部分は、絶縁部10,12に覆われているので、金属メッキ層8が形成されない。これに対し、絶縁部10,12に覆われず且つメッキ液が容易に環流し易くなっている上端部6cを除いた切欠部導体6の表面に全体には、表層に所要の厚みのAuメッキ層を有する金属メッキ層8が形成されている。従って、上記多数個取り配線基板を切断・分割した当該配線基板p1,p2をマザーボードに搭載する際に、金属メッキ層8の下地であるNiメッキ層が拡散しにくく且つハンダが容易に濡れ広がるため、マザーボードの外部端子と上記切欠部導体6との間を、ハンダを介して強固に接合することができる。   According to the wiring boards p1 and p2 as described above, the notched conductor 6 formed on the side surface 4 of the ceramic layer c1 on the lower layer side of the substrate body 1 is formed by the insulating parts 10 and 12 covering the upper end part 6c. In the multi-piece wiring board for obtaining the wiring boards p1 and p2, the portions where the plating solution is poorly circulated are covered with the insulating portions 10 and 12, so that the metal plating layer 8 is not formed. On the other hand, the entire surface of the notch conductor 6 except for the upper end portion 6c that is not covered with the insulating portions 10 and 12 and in which the plating solution easily circulates, is plated with Au having a required thickness on the surface layer. A metal plating layer 8 having a layer is formed. Therefore, when the wiring boards p1 and p2 obtained by cutting and dividing the multi-piece wiring board are mounted on the mother board, the Ni plating layer as the base of the metal plating layer 8 is difficult to diffuse and the solder easily wets and spreads. The external terminal of the mother board and the notch conductor 6 can be firmly joined via solder.

更に、複数の切欠部導体6を、電気的に独立した複数(例えば2つ)の回路に接続することで、一方の回路を介して、前記パッド18,外部端子19の表面に対し、下地のNiメッキ層と表層のAuメッキ層とを形成すると共に、他方の回路を介して、前記キャビティ14の側面16に形成した金属層17に対し、下地のNiメッキ層と表層の光反射用のAgメッキ層とを形成することもできる。
尚、切欠部5および切欠部導体6は、基板本体1の下層側のセラミック層c1において、互いに隣接する側面4,4間の各コーナ部に形成しても良い。かかるコーナ部では、切欠部5および切欠部導体6は、平面視でほぼ円形の4分の1である円弧形の形状または断面となる。
Further, by connecting the plurality of notch conductors 6 to a plurality of (for example, two) circuits that are electrically independent, the surface of the pad 18 and the external terminal 19 is connected to the surface of the pad 18 and the external terminal 19 via one circuit. The Ni plating layer and the surface Au plating layer are formed, and the underlying Ni plating layer and the light reflecting Ag are applied to the metal layer 17 formed on the side surface 16 of the cavity 14 via the other circuit. A plating layer can also be formed.
The notch 5 and the notch conductor 6 may be formed at each corner between the side surfaces 4 and 4 adjacent to each other in the ceramic layer c1 on the lower layer side of the substrate body 1. In such a corner portion, the notch portion 5 and the notch portion conductor 6 have an arc shape or a cross section that is a substantially circular quarter in plan view.

図6は、複数個の前記配線基板p1を得るための多数個取り配線基板K1を示す平面図、図7は、かかる多数個取り配線基板K1の底面図、図8は、図6,図7中のZ−Z線の矢視に沿った垂直断面図である。
多数個取り配線基板K1は、図6〜図8に示すように、主にアルミナからなる上層側のセラミック層c2,c3と下層側のセラミック層c1とを積層して構成され、平面視で9個(複数)の配線基板(製品)p1が縦横に配置される製品領域Pと、かかる製品領域Pを囲む四角枠形の耳部mとを有するベース基板31を、備えている。尚、図6,図7において、互いに隣接する配線基板p1,p1間および配線基板p1,製品領域P間の境界を示す破線は、仮想面の切断予定面fである。また、表面32および裏面33は、ベース基板31、製品領域P、配線基板p1、耳部mに共通して用いる。更に、上記セラミック層c1〜c3は、大版サイズのものである。
上記ベース基板31を構成する下層側のセラミック層c1には、上記切断予定線fと交差し、且つ当該セラミック層c1を貫通する複数の貫通孔25が、各配線基板p1の各側面(4)となる位置ごとに形成され、かかる貫通孔25ごとの内壁に沿って、Wなどからなるほぼ円筒形の内壁導体26が形成されている。
FIG. 6 is a plan view showing a multi-piece wiring board K1 for obtaining a plurality of wiring boards p1, FIG. 7 is a bottom view of the multi-piece wiring board K1, and FIG. It is a vertical sectional view along the arrow of the ZZ line in the inside.
As shown in FIGS. 6 to 8, the multi-cavity wiring board K1 is formed by laminating upper ceramic layers c2 and c3 mainly made of alumina and a lower ceramic layer c1. A base substrate 31 having a product region P in which individual (plural) wiring substrates (products) p1 are arranged vertically and horizontally and a square frame-shaped ear portion m surrounding the product region P is provided. 6 and 7, broken lines indicating boundaries between the wiring boards p1 and p1 adjacent to each other and between the wiring boards p1 and the product region P are virtual cutting planes f. The front surface 32 and the back surface 33 are used in common for the base substrate 31, the product region P, the wiring substrate p1, and the ear portion m. Furthermore, the ceramic layers c1 to c3 are of a large plate size.
In the lower ceramic layer c1 constituting the base substrate 31, a plurality of through holes 25 intersecting the planned cutting line f and penetrating the ceramic layer c1 are provided on each side surface (4) of each wiring board p1. A substantially cylindrical inner wall conductor 26 made of W or the like is formed along the inner wall of each through hole 25.

図6〜図8に示すように、製品領域P内に位置する個々の配線基板p1には、前記同様の底面15および側面16からなるキャビティ14、かかる側面16の金属層17、キャビティ14の底面15における一対のパッド18、ベース基板31の裏面33に位置する複数の外部端子19、セラミック層c1,c2間に位置する内部配線20、セラミック層c1,c2を貫通するビア導体21,22がそれぞれ形成されている。
尚、ベース基板31は、平面視でほぼ正方形の外形を有し、個々の配線基板p1も平面視で正方形の外形であり、ベース基板31の表面32に開口する各キャビティ14の底面15は、平面視が円形であり、キャビティ14の側面16は、底面15側から表面32に向かって広がるほぼ円錐形を呈する。
As shown in FIGS. 6 to 8, each wiring board p <b> 1 located in the product region P includes a cavity 14 having the same bottom surface 15 and side surface 16, a metal layer 17 on the side surface 16, and a bottom surface of the cavity 14. 15, a plurality of external terminals 19 positioned on the back surface 33 of the base substrate 31, internal wiring 20 positioned between the ceramic layers c1 and c2, and via conductors 21 and 22 penetrating the ceramic layers c1 and c2, respectively. Is formed.
The base substrate 31 has a substantially square outer shape in plan view, and each wiring substrate p1 also has a square outer shape in plan view. The bottom surface 15 of each cavity 14 opened to the surface 32 of the base substrate 31 has The side view 16 of the cavity 14 has a substantially conical shape extending from the bottom surface 15 toward the surface 32.

図9の拡大断面図で示すように、ベース基板31を構成する下層側のセラミック層c1を貫通する断面ほぼ円形の貫通孔25には、その内壁に沿ってほぼ円筒形を呈する内壁導体26が形成されている。かかる内壁導体26は、セラミック層c1,c2間に延びるリング状の水平片26aとベース基板31の裏面33上に延びるリング状の水平片26bとを、上・下端に有する。かかる内壁導体26は、その上端部26cが上層側のセラミック層c2を形成するセラミック材料の一部がベース基板31の裏面33側の延び出た絶縁部40に覆われている。
かかる絶縁部40は、ベース基板31の裏面33側に窪み且つ内壁導体26に接するほぼ半球形の湾曲面41を有する。前記ベース基板31の表面32と直交する垂直断面である図9において、絶縁部40の上記湾曲面41の中央付近に接する接線sと内壁導体26の表面との間の角度は、約140度の鈍角θである。
As shown in the enlarged sectional view of FIG. 9, an inner wall conductor 26 having a substantially cylindrical shape is formed along the inner wall of the through hole 25 having a substantially circular cross section passing through the lower ceramic layer c <b> 1 constituting the base substrate 31. Is formed. The inner wall conductor 26 has a ring-shaped horizontal piece 26a extending between the ceramic layers c1 and c2 and a ring-shaped horizontal piece 26b extending on the back surface 33 of the base substrate 31 at the upper and lower ends. The inner wall conductor 26 has an upper end portion 26c covered with an insulating portion 40 that extends from the back surface 33 side of the base substrate 31 with a part of the ceramic material forming the upper ceramic layer c2.
The insulating portion 40 has a substantially hemispherical curved surface 41 that is recessed on the back surface 33 side of the base substrate 31 and is in contact with the inner wall conductor 26. In FIG. 9, which is a vertical cross section orthogonal to the surface 32 of the base substrate 31, the angle between the tangent line s that contacts the vicinity of the center of the curved surface 41 of the insulating portion 40 and the surface of the inner wall conductor 26 is about 140 degrees. The obtuse angle θ.

図9に示すように、上記絶縁部40に覆われた上端部26cおよび水平片26aを除いた切欠部導体26の表面全体には、下地のNiメッキ層および表層のAuメッキ層からなる金属メッキ層28が前記金属メッキ層8と同様の厚みで形成されている。
図10は、異なる多数個取り配線基板K2を示す前記図8と同様の垂直断面図、図11は、図10中の一部拡大断面図である。
図10,図11に示すように、多数個取り配線基板K2も、下・上層側のセラミック層c1〜c3からなり、複数の配線基板p2を配置した製品領域Pおよびこれを囲む耳部mを有する前記同様のベース基板31を備えている。また、各配線基板p2にも、前記同様のキャビティ14、金属層17、一対のパッド18、複数の外部端子19、内部配線20、および、ビア導体21,22が形成されている。尚、表面32および裏面33は、ベース基板31、製品領域P、配線基板p2、耳部mに共通して用いる。
As shown in FIG. 9, the entire surface of the cutout conductor 26 excluding the upper end portion 26c and the horizontal piece 26a covered with the insulating portion 40 is plated with a metal made of an underlying Ni plating layer and a surface Au plating layer. The layer 28 is formed with the same thickness as the metal plating layer 8.
FIG. 10 is a vertical sectional view similar to FIG. 8 showing a different multi-piece wiring board K2, and FIG. 11 is a partially enlarged sectional view of FIG.
As shown in FIGS. 10 and 11, the multi-piece wiring board K2 is also composed of lower and upper ceramic layers c1 to c3, and includes a product region P in which a plurality of wiring boards p2 are arranged and an ear portion m surrounding the product area P. A base substrate 31 similar to that described above is provided. In addition, the same cavity 14, metal layer 17, pair of pads 18, a plurality of external terminals 19, internal wirings 20, and via conductors 21 and 22 are formed in each wiring board p <b> 2. The front surface 32 and the back surface 33 are used in common for the base substrate 31, the product region P, the wiring substrate p2, and the ear portion m.

図11に示すように、下層側のセラミック層c1を貫通する貫通孔25には、その内壁に沿って内壁導体26が形成され、かかる内壁導体26は、前記同様の水平片26aおよび水平片26bを、上・下端に有する。かかる内壁導体26は、その上端部26cが上層側のセラミック層c2の一部がベース基板31の裏面33側の延び出た絶縁部42に覆われている。
上記絶縁部42は、ベース基板31の表面32側から裏面33側に向かって広がるように傾斜して、内壁導体26に接するほぼ円錐形のテーパ面43を有する。前記ベース基板31の表面32と直交する垂直断面図である図11において、絶縁部42の上記テーパ面43と内壁導体26の表面との間の角度は、約130度の鈍角θである。
図11に示すように、上記絶縁部42に覆われた上端部26cおよび水平片26aを除いた切欠部導体26の表面全体には、下地のNiメッキ層および表層のAuメッキ層からなる金属メッキ層28が前記同様の厚みで形成されている。
As shown in FIG. 11, an inner wall conductor 26 is formed along the inner wall of the through-hole 25 that penetrates the lower ceramic layer c1, and the inner wall conductor 26 has the same horizontal piece 26a and horizontal piece 26b as described above. At the top and bottom. The inner wall conductor 26 has an upper end portion 26c covered with an insulating portion 42 that extends partly on the upper surface side of the ceramic layer c2 on the back surface 33 side of the base substrate 31.
The insulating portion 42 has a substantially conical tapered surface 43 that is inclined so as to spread from the front surface 32 side to the rear surface 33 side of the base substrate 31 and is in contact with the inner wall conductor 26. In FIG. 11, which is a vertical sectional view orthogonal to the surface 32 of the base substrate 31, the angle between the tapered surface 43 of the insulating portion 42 and the surface of the inner wall conductor 26 is an obtuse angle θ of about 130 degrees.
As shown in FIG. 11, the entire surface of the cutout conductor 26 except for the upper end portion 26c and the horizontal piece 26a covered with the insulating portion 42 is plated with a metal composed of a base Ni plating layer and a surface Au plating layer. The layer 28 is formed with the same thickness as described above.

以上のような多数個取り配線基板K1,K2によれば、前記内壁導体26の上端部26cは、湾曲面41またはテーパ面43を有する絶縁部40,42に覆われているため、当該多数個取り配線基板K1,K2をメッキ液に浸漬した際に、当該メッキ液が環流せず、金属メッキ層が形成されない。その反面、絶縁部40,42に覆われていない部分では、メッキ液の環流がスムースとなるため、上端部26cおよび水平片26aを除いた上記内壁導体26の表面全体に、Niメッキ層およびAuメッキ層からなり所要の厚みを有する金属メッキ層28が形成されている。このため、かかる多数個取り配線基板K1,K2を、前記切断予定面fに沿って切断・分割して得られる複数の前記配線基板p1,p2ごとの前記切欠部導体6も、その上端部6cを除いて前記金属メッキ層8が形成される。従って、上記配線基板p1,p2をマザーボードに搭載する際に、かかるマザーボードの外部端子と切欠部導体6との間を、ハンダを介して強固に接合することができる。
尚、前記貫通孔25および内壁導体26は、前記図7の底面図において、複数の切断予定面fが交差する位置に形成しても良い。かかる形態の多数個取り配線基板K1,K2では、これを分割することで、前記基板本体1の下層側のセラミック層c1にて、隣接する側面4,4間のコーナ部に切欠部導体6が形成される。
According to the multi-piece wiring boards K1 and K2 as described above, the upper end portion 26c of the inner wall conductor 26 is covered with the insulating portions 40 and 42 having the curved surface 41 or the tapered surface 43. When the wiring boards K1 and K2 are immersed in the plating solution, the plating solution does not circulate and the metal plating layer is not formed. On the other hand, since the plating solution circulates smoothly in the portions not covered by the insulating portions 40 and 42, the Ni plating layer and Au are formed on the entire surface of the inner wall conductor 26 except the upper end portion 26c and the horizontal piece 26a. A metal plating layer 28 made of a plating layer and having a required thickness is formed. Therefore, the cutout conductor 6 for each of the plurality of wiring boards p1 and p2 obtained by cutting and dividing the multi-cavity wiring boards K1 and K2 along the planned cutting surface f is also the upper end portion 6c. The metal plating layer 8 is formed except for. Therefore, when the wiring boards p1 and p2 are mounted on the mother board, the external terminals of the mother board and the notch conductor 6 can be firmly joined via the solder.
The through hole 25 and the inner wall conductor 26 may be formed at a position where a plurality of scheduled cutting surfaces f intersect in the bottom view of FIG. In the multi-piece wiring boards K1 and K2 having such a configuration, by dividing this, the cutout conductor 6 is formed in the corner portion between the adjacent side surfaces 4 and 4 in the ceramic layer c1 on the lower layer side of the substrate body 1. It is formed.

前記多数個取り配線基板K1,K2および前記配線基板p1,p2は、次のようにして製造した。尚、以下においては、作図上の都合により、各図の左右方向の長さを若干短くしている。
予め、アルミナ粉末の粒子、樹脂バインダ、可塑剤、および溶剤などからなる原料を混合して、セラミックスラリを製作した。かかるセラミックスラリにドクターブレード法を施し、厚みが約300μmである3枚のグリーンシートs1〜s3を形成した。かかるグリーンシートs1〜s3は、図12で例示すように、前記配線基板p1,p2を形成する複数の配線基板(製品)pを縦横に配置した製品領域Pと、これを囲む平面視が四角枠形の耳部mと、これらの境界である切断予定面(仮想面)fとを有する多数個取り用である大版サイズのものである。
先ず、図13の上方に示すように、最上層(上層側)のグリーンシートs3に対し、その表面と裏面との間を裏面側が小径で且つ表面側が大径となるように、所要のクリアランスを有するパンチとダイの受入孔との間の剪断作用によって、各配線基板pごとの中央部に、ほぼ円錐形の貫通孔17aをそれぞれ形成した。
The multi-cavity wiring boards K1, K2 and the wiring boards p1, p2 were manufactured as follows. In the following, the length in the left-right direction of each drawing is slightly shortened for the convenience of drawing.
A ceramic slurry was prepared by mixing raw materials composed of alumina powder particles, a resin binder, a plasticizer, a solvent, and the like in advance. The ceramic slurry was subjected to a doctor blade method to form three green sheets s1 to s3 having a thickness of about 300 μm. As illustrated in FIG. 12, the green sheets s1 to s3 are square in a product area P in which a plurality of wiring boards (products) p forming the wiring boards p1 and p2 are arranged vertically and horizontally and in a plan view surrounding the product area P. It is of a large plate size that is used for taking a large number of pieces having a frame-shaped ear portion m and a planned cutting surface (virtual surface) f that is a boundary between them.
First, as shown in the upper part of FIG. 13, with respect to the green sheet s3 of the uppermost layer (upper layer side), a required clearance is provided so that the back side has a small diameter and the front side has a large diameter between the front and back surfaces. A substantially conical through-hole 17a was formed in the center of each wiring board p by a shearing action between the punch and the die receiving hole.

また、図13の中程に示すように、中層(上層側)のグリーンシートs2に対し、複数の配線基板pごとの表面と裏面との間を貫通する複数のビアホールhを、パンチとダイの受入孔とによる打ち抜き加工によって形成した。尚、グリーンシートs2の裏面側には、予め、フタル酸nブチル、ひまし油、nブチル・アルコールなどからなる溶剤wを所定の厚みで浸透するように塗布した。
更に、図13の下方に示すように、下層側のグリーンシートs1にも、複数の配線基板pごとの表面と裏面との間を貫通する複数のビアホールhを形成すると共に、切断予定面fごとの所定の位置に厚み方向に沿った貫通孔25を前記同様の打ち抜き加工によって形成した。
Further, as shown in the middle of FIG. 13, a plurality of via holes h penetrating between the front surface and the back surface of each of the plurality of wiring boards p are formed on the middle layer (upper layer side) green sheet s <b> 2. It was formed by punching with a receiving hole. In addition, a solvent w made of n-butyl phthalate, castor oil, n-butyl alcohol, or the like was previously applied to the back surface side of the green sheet s2 so as to penetrate with a predetermined thickness.
Further, as shown in the lower part of FIG. 13, a plurality of via holes h penetrating between the front surface and the back surface of each of the plurality of wiring boards p are formed in the lower layer side green sheet s 1, and each cutting scheduled surface f is also formed. Through holes 25 along the thickness direction were formed at the predetermined positions by the same punching process.

次いで、図14の上方に示すように、最上層(上層側)のグリーンシートs3の各貫通孔17aの内周面に対し、図示しないメタルマスクとスキージとを用い且つ反対側の表面または裏面から吸引状態として、WまたはMo粉末を含む導電性ペーストを所定の厚みで印刷して、それぞれに金属層17を形成した。
また、図14の中程に示すように、中層(上層側)のグリーンシートs2の各ビアホールhに対し、前記同様のメタルマスクとスキージとを用いて、上記同様の導電性ペーストを充填して、それぞれにビア導体21を形成した。
更に、図14の下方に示すように、下層側のグリーンシートs1の各ビアホールhに対しても、上記同様のビア導体21をそれぞれ形成した。併せて、上記メタルマスクとスキージとを用い且つ反対側の表面または裏面から吸引状態として、下層側のグリーンシートs1における各貫通孔25の内壁ごとに、上記同様の導電性ペーストを塗布して、ほぼ円筒形の内壁導体26を形成した。
Next, as shown in the upper part of FIG. 14, a metal mask (not shown) and a squeegee are used for the inner peripheral surface of each through-hole 17a of the uppermost (upper layer side) green sheet s3, and from the opposite surface or back surface. As the suction state, a conductive paste containing W or Mo powder was printed with a predetermined thickness, and the metal layer 17 was formed on each of them.
Further, as shown in the middle of FIG. 14, the same conductive paste as described above is filled into each via hole h of the green sheet s2 of the middle layer (upper layer side) using the same metal mask and squeegee as described above. The via conductor 21 was formed in each.
Further, as shown in the lower part of FIG. 14, via conductors 21 similar to the above were also formed in each via hole h of the green sheet s 1 on the lower layer side. In addition, using the metal mask and the squeegee and sucking from the opposite surface or back surface, apply the same conductive paste as above to each inner wall of each through hole 25 in the green sheet s1 on the lower layer side, A substantially cylindrical inner wall conductor 26 was formed.

次に、図15の中程に示すように、中層(上層側)のグリーンシートs2の表面に、各ビア導体21の上端と接続するように、前記同様の導電性ペーストをスクリーン印刷して、各製品部分pごとに一対ずつのパッド18を形成した。
更に、図15の下方に示すように、下層側のグリーンシートs1の表面と裏面とにも、各ビア導体22の上端または下端と接続するように、前記同様の導電性ペーストをスクリーン印刷して、所定パターンの内部配線20および複数の外部端子16を形成した。
そして、図15中の矢印で示すように、下層側のグリーンシートs1の上に、上層側のグリーンシートs2,s3を、順次または同時に積層して圧着した。
Next, as shown in the middle of FIG. 15, the same conductive paste as described above is screen-printed on the surface of the middle layer (upper layer side) green sheet s <b> 2 so as to be connected to the upper end of each via conductor 21. A pair of pads 18 was formed for each product portion p.
Further, as shown in the lower part of FIG. 15, the same conductive paste as described above is screen-printed on the front and back surfaces of the green sheet s1 on the lower layer side so as to be connected to the upper end or the lower end of each via conductor 22. A predetermined pattern of internal wiring 20 and a plurality of external terminals 16 were formed.
Then, as indicated by the arrows in FIG. 15, the upper-layer side green sheets s2 and s3 were laminated on the lower-layer side green sheet s1 in sequence or simultaneously and pressed.

その結果、図16に示すように、前記グリーンシートs1〜s3が積層されて表面32および裏面33を有するベース基板31と、製品領域P内に縦横に配置された複数の配線基板pと、個々の配線基板pの表面32に開口し且つ底面15および側面16からなるするキャビティ14と、を有するグリーンシート積層体S1が形成された。この際、各貫通孔25の内壁導体26の上方には、グリーンシートs2における前記溶剤wにより軟化された主にアルミナからなるセラミック材料が、前記圧着に伴う圧力によって、その一部が複数の内壁導体26の内側に延出し(伸び出し)て、かかる内壁導体26ごとの上端部26cを覆った。この結果、ベース本体31の表面32に対し垂直な断面において、ベース本体31の裏面33側に向かって窪んだほぼ半球形の湾曲面41を有する絶縁部40が各貫通孔25ごとの上部に形成された。   As a result, as shown in FIG. 16, the green substrates s1 to s3 are laminated to form a base substrate 31 having a front surface 32 and a rear surface 33, a plurality of wiring substrates p arranged vertically and horizontally in the product region P, and A green sheet laminate S1 having an opening in the front surface 32 of the wiring board p and a cavity 14 composed of a bottom surface 15 and a side surface 16 was formed. At this time, a ceramic material mainly made of alumina softened by the solvent w in the green sheet s2 above the inner wall conductor 26 of each through hole 25 is partially a plurality of inner walls due to the pressure accompanying the pressure bonding. It extended (extends) to the inside of the conductor 26 to cover the upper end portion 26c of each inner wall conductor 26. As a result, in the cross section perpendicular to the surface 32 of the base body 31, an insulating portion 40 having a substantially hemispherical curved surface 41 that is recessed toward the back surface 33 side of the base body 31 is formed at the upper portion of each through hole 25. It was done.

また、上層側のグリーンシートs2に対する前記溶剤wの浸透深さや圧着時の圧力を調整して、グリーンシートs2を形成するセラミック材料の一部を、内壁導体26ごとの内側に延出させて、かかる内壁導体26の上端部26cを覆った。
その結果、図17に示すように、前記同様のベース基板31を備えるグリーンシート積層体S2が形成されると共に、各貫通孔25ごとの上部に、かかるベース本体31の裏面33側に向かって窪んだほぼ円錐形のテーパ面43を有する絶縁埋め部42を形成することができた。
Further, by adjusting the penetration depth of the solvent w with respect to the upper layer side green sheet s2 and the pressure at the time of pressure bonding, a part of the ceramic material forming the green sheet s2 is extended inside each inner wall conductor 26, The upper end portion 26c of the inner wall conductor 26 is covered.
As a result, as shown in FIG. 17, a green sheet laminate S2 including the base substrate 31 similar to the above is formed, and is recessed toward the back surface 33 side of the base body 31 at the top of each through hole 25. However, the insulating buried portion 42 having the substantially conical tapered surface 43 could be formed.

更に、前記グリーンシート積層体S1,S2を、所要の温度帯で焼成した。
次いで、前記グリーンシートs1〜s3が焼成されて下・上層側のセラミック層c1〜c3となったベース基板31を、図示しないメッキ槽中に浸漬し、複数の内壁導体26にメッキ用の電極棒を接触させた状態で、電解Niメッキを行った後、別のメッキ槽中に浸漬し且つ上記同様の状態で、電解Auメッキを行った。
この際、焼成済みの各ベース基板31ごとの内壁導体26において、各メッキ液の環流の悪い部分は、その上端部26cを覆う湾曲面41またはテーパ面43を有する絶縁部40,42に覆われていたため、金属メッキ層28が形成されなかった。その反面、絶縁部40,42に覆われていない上端部26c以外の各内壁導体26の表面には、上記各メッキ液が容易に環流していた。
その結果、各内壁導体26の表面には、所要の厚みのNiメッキ層およびAuメッキ層からなる金属メッキ層28が形成された。同時に、前記キャビティ14の底面15に位置する各パッド18とベース基板31の裏面33に位置する各外部端子19の表面にも、上記同様の金属メッキ層(図示せず)が形成された。
Further, the green sheet laminates S1 and S2 were fired at a required temperature range.
Next, the base substrate 31 in which the green sheets s1 to s3 are fired to become the lower and upper ceramic layers c1 to c3 is dipped in a plating tank (not shown), and a plurality of inner wall conductors 26 are plated with electrode bars. After the electrolytic Ni plating was performed in the state of contact, the electrolytic Au plating was performed in the same state as described above by dipping in another plating tank.
At this time, in the inner wall conductor 26 for each base substrate 31 that has been baked, the portion where the plating solution is poorly circulated is covered with the insulating portions 40 and 42 having the curved surface 41 or the tapered surface 43 covering the upper end portion 26c. Therefore, the metal plating layer 28 was not formed. On the other hand, the plating solutions were easily circulated on the surface of each inner wall conductor 26 other than the upper end portion 26c not covered with the insulating portions 40 and 42.
As a result, a metal plating layer 28 composed of a Ni plating layer and an Au plating layer having a required thickness was formed on the surface of each inner wall conductor 26. At the same time, the same metal plating layer (not shown) was also formed on the surfaces of the pads 18 located on the bottom surface 15 of the cavity 14 and the external terminals 19 located on the back surface 33 of the base substrate 31.

引き続いて、前記と別の内壁導体26にメッキ用の電極棒を接触させた状態で、電解Niメッキを行った後、別のメッキ槽中に浸漬し且つ上記同様の状態で、電解Agメッキを行った。その結果、各キャビティ14の側面16に形成された焼成後の金属層17の表面に、下地のNiメッキを介して表層側に光反射用のAgメッキ層(何れも図示せず)を所要の厚みにして形成できた。
この結果、前記図6〜図9で示した多数個取り配線基板K1、あるいは、前記図10,図11で示した多数個取り配線基板K2を製造することができた。
以上のような多数個取り配線基板K1,K2の製造方法によれば、下層側のセラミック層c1の貫通孔25ごとに形成された内壁導体26の表面に、所要の厚みを有するNiメッキ層およびAuメッキ層からなる金属メッキ層28が形成された当該多数個取り配線基板K1,K2を確実に形成することができた。
Subsequently, after performing electrolytic Ni plating in a state where the electrode rod for plating is in contact with the inner wall conductor 26 different from the above, the electrolytic Ag plating is immersed in another plating tank and in the same manner as described above. went. As a result, an Ag plating layer for light reflection (none of which is shown) is required on the surface layer side of the surface of the fired metal layer 17 formed on the side surface 16 of each cavity 14 through the underlying Ni plating. It was able to be formed with a thickness.
As a result, the multi-cavity wiring board K1 shown in FIGS. 6 to 9 or the multi-cavity wiring board K2 shown in FIGS. 10 and 11 could be manufactured.
According to the manufacturing method of the multi-piece wiring boards K1 and K2 as described above, the Ni plating layer having a required thickness and the surface of the inner wall conductor 26 formed for each through hole 25 of the ceramic layer c1 on the lower layer side The multi-piece wiring boards K1 and K2 on which the metal plating layer 28 made of an Au plating layer was formed could be reliably formed.

そして、多数個取り配線基板K1,K2を、これらにおける前記切断予定面fに沿って、図示しないブレードを用いて、各ベース基板31の厚み方向に切断加工した。
その結果、図18に示すように、下・上層側のセラミック層c1〜c3からなる基板本体1、下層側のセラミック層c1の側面4に形成された切欠部5、かかる切欠部5に形成された切欠部導体6、および切欠部導体6の上端部6cを覆い且つ湾曲面11を有する絶縁部10を備えた前記同様の配線基板p1を、複数個ずつ製造することができた。
Then, the multi-piece wiring boards K1 and K2 were cut in the thickness direction of each base board 31 by using a blade (not shown) along the planned cutting plane f.
As a result, as shown in FIG. 18, the substrate body 1 composed of the lower and upper ceramic layers c1 to c3, the cutout portion 5 formed on the side surface 4 of the lower ceramic layer c1, and the cutout portion 5 are formed. A plurality of the same wiring boards p1 including the notched conductor 6 and the insulating part 10 covering the upper end 6c of the notched conductor 6 and having the curved surface 11 could be manufactured.

あるいは、図19に示すように、上記同様の基板本体1、切欠部5、切欠部導体6、および切欠部導体6の上端部6cを覆い且つテーパ面13を有する絶縁部12を備えた前記同様の配線基板p2を、複数個ずつ製造することができた。
以上のような配線基板p1,p2の製造方法によれば、下層側のセラミック層c1の側面4に形成された複数の切欠部5ごとに形成された切欠部導体6の表面に、所要の厚みを有するNiメッキ層およびAuメッキ層からなる金属メッキ層8が形成された当該配線基板p1,p2を効率良く確実に形成することができた。
Alternatively, as shown in FIG. 19, the substrate body 1, the notch portion 5, the notch portion conductor 6, and the insulating portion 12 that covers the upper end portion 6 c of the notch portion conductor 6 and has a tapered surface 13 as described above. A plurality of wiring boards p2 could be manufactured.
According to the manufacturing method of the wiring boards p1 and p2 as described above, a required thickness is provided on the surface of the notch conductor 6 formed for each of the plurality of notches 5 formed on the side surface 4 of the lower ceramic layer c1. The wiring boards p1 and p2 on which the metal plating layer 8 composed of the Ni plating layer and the Au plating layer having the above was formed could be efficiently and reliably formed.

本発明は、以上において説明した各形態に限定されるものではない。
前記セラミック層や前記グリーンシートは、前記アルミナに限らず、ムライトや窒化アルミニウムなどのセラミック材料としたり、低温焼成セラミックの一種であるガラス−セラミック材料からなるものとしても良い。
また、前記上層側のセラミック層を1層または3層以上からなる形態としたり、前記下層側のセラミック層を2層以上からなる形態としても良い。
更に、前記切欠部および切欠部導体は、前記下層側ベース基板の各側面ごの中間と、隣接する側面間の各コーナごととの双方に形成しても良い。これに応じて、前記多数個取り配線基板において、個々の切断予定面の中間位置と共に、複数の切断予定面が交差する位置にも、前記貫通孔および内壁導体を形成しても良い。
The present invention is not limited to the embodiments described above.
The ceramic layer and the green sheet are not limited to alumina, but may be made of a ceramic material such as mullite or aluminum nitride, or may be made of a glass-ceramic material that is a kind of low-temperature fired ceramic.
The upper ceramic layer may be formed of one layer or three or more layers, or the lower ceramic layer may be formed of two or more layers.
Further, the notch and the notch conductor may be formed both in the middle of each side surface of the lower layer side base substrate and in each corner between adjacent side surfaces. Accordingly, in the multi-piece wiring board, the through hole and the inner wall conductor may be formed at a position where a plurality of scheduled cutting surfaces intersect with each other as well as an intermediate position between each scheduled cutting surface.

更に、前記配線基板のキャビティは、底面が平面視で長円形で且つ側面がほぼ長円錐形、または底面が平面視で楕円形で且つ側面がほぼ楕円錐形などの形態としても良い。
加えて、配線基板は、その基板本体の表面を前記キャビティがない平坦面とし、かかる平坦な表面に形成したパッドにICチップなどの電子部品を導通可能として、かかる電子部品を上記表面上に搭載する形態としても良い。
あるいは、配線基板は、その基板本体の表面に開口し、平面視が矩形(正方形または長方形)の底面とその周囲から垂直に立設する4つの側面とからなるキャビティを有する形態とし、かかるキャビティの底面に上記電子部品を搭載する形態としても良い。
Further, the cavity of the wiring board may have an oval shape in a plan view and a substantially conical shape on a side surface, or an oval shape in a bottom view in a plan view, and a substantially elliptic cone shape on a side surface.
In addition, the wiring board has a flat surface without the cavity on the surface of the substrate body, and an electronic component such as an IC chip can be conducted to a pad formed on the flat surface, and the electronic component is mounted on the surface. It is good also as a form to do.
Alternatively, the wiring board is configured to have a cavity having an opening on the surface of the substrate body and having a rectangular (square or rectangular) bottom surface and four side surfaces standing vertically from the periphery of the cavity. The electronic component may be mounted on the bottom surface.

本発明における一形態の配線基板を示す垂直断面図。The vertical sectional view showing the wiring board of one form in the present invention. 上記配線基板の部分拡大断面図。The partial expanded sectional view of the said wiring board. 異なる形態の配線基板を示す垂直断面図。The vertical sectional view which shows the wiring board of a different form. 上記配線基板の部分拡大断面図。The partial expanded sectional view of the said wiring board. 図4中のY−Y線の矢視に沿った断面図。Sectional drawing along the arrow of the YY line in FIG. 本発明における一形態の多数個取り基板を示す平面図。The top view which shows the multi-piece substrate of one form in this invention. 上記多数個取り基板の底面図。The bottom view of the said multi-piece substrate. 図6,図7中のZ−Z線の矢視に沿った垂直断面図。FIG. 8 is a vertical sectional view taken along the line ZZ in FIG. 6 and FIG. 7. 図8中の部分拡大断面図。The partial expanded sectional view in FIG. 異なる形態の多数個取り基板を示す垂直断面図。The vertical sectional view which shows the multi-piece substrate of a different form. 図10中の部分拡大断面図。The elements on larger scale in FIG. 上記多数個取り基板の製造工程を示す概略図。Schematic which shows the manufacturing process of the said multi-piece substrate. 図12に続く製造工程を示す概略図。Schematic which shows the manufacturing process following FIG. 図13に続く製造工程を示す概略図。Schematic which shows the manufacturing process following FIG. 図14に続く製造工程を示す概略図。Schematic which shows the manufacturing process following FIG. 以上の各工程により得られたグリーンシート積層体を示す概略図。Schematic which shows the green sheet laminated body obtained by each above process. 異なる形態のグリーンシート積層体を示す概略図。Schematic which shows the green sheet laminated body of a different form. 上記多数個取り基板を分割した前記配線基板を示す概略図。Schematic which shows the said wiring board which divided | segmented the said multi-piece substrate. 上記同様に分割された異なる形態の前記配線基板を示す概略図。Schematic which shows the said wiring board of the different form divided | segmented similarly to the above.

符号の説明Explanation of symbols

1……………………………基板本体
2,32……………………表面
3,33……………………裏面
4……………………………側面
5……………………………切欠部
6……………………………切欠部導体
6c,26c………………上端部
10,12,40,42…絶縁部
11,41…………………湾曲面
13,43…………………テーパ面
25…………………………貫通孔
26…………………………内壁導体
31…………………………ベース基板
p,p1,p2……………配線基板(製品)
K1,K2…………………多数個取り配線基板
c1…………………………下層側のセラミック層
c2,c3…………………上層側のセラミック層
P……………………………製品領域
m……………………………耳部
f……………………………切断予定面
θ……………………………鈍角
s1…………………………下層側のグリーンシート
s2,s3…………………上層側のグリーンシート
1 …………………………… Board body 2, 32 …………………… Front side 3,33 …………………… Back side 4 …………………………… Side 5 …………………………… Notch 6 …………………………… Notch conductor 6c, 26c ……………… Upper end 10, 12, 40, 42… Insulation Part 11, 41 ............... Curved surface 13, 43 ............... Tapered surface 25 ………………………… Through hole 26 ………………………… Inner wall Conductor 31 ………………………… Base substrate p, p1, p2 …………… Wiring substrate (product)
K1, K2 ………………… Multi-layer wiring board c1 ………………………… Ceramic layer c2, c3 of the lower layer ………………… Ceramic layer P of the upper layer P …… …………………… Product area m ……………………………… Ear part f …………………………… Planned cutting plane θ ………………………… … Obtuse angle s1 ………………………… Lower side green sheet s2, s3 ………………… Upper side green sheet

Claims (7)

上層側のセラミック層と下層側のセラミック層とを積層して構成され、表面および裏面を有する基板本体と、
上記基板本体における下層側のセラミック層の側面に形成された切欠部およびかかる切欠部内に形成された切欠部導体と、
上記切欠部導体の少なくとも上端部を覆うように形成された絶縁部と、を含む、
ことを特徴とする配線基板。
A substrate body composed of a ceramic layer on the upper layer side and a ceramic layer on the lower layer side, and having a front surface and a back surface;
A notch formed on the side surface of the lower ceramic layer in the substrate body and a notch conductor formed in the notch, and
An insulating part formed so as to cover at least the upper end part of the notch conductor,
A wiring board characterized by that.
前記絶縁部は、前記切欠部導体と接する湾曲面またはテーパ面を有している、
ことを特徴とする請求項1に記載の配線基板。
The insulating portion has a curved surface or a tapered surface in contact with the notch conductor.
The wiring board according to claim 1.
前記絶縁部は、前記切欠部導体との間で鈍角を成している、
ことを特徴とする請求項1または2に記載の配線基板。
The insulating part forms an obtuse angle with the notch conductor,
The wiring board according to claim 1 or 2, wherein
上層側のセラミック層と下層側のセラミック層とを積層して構成され、平面視で複数の製品が縦横に配置される製品領域とかかる製品領域を囲む耳部とを有するベース基板と、
上記ベース基板のうち、下層側のセラミック層における製品領域内の製品同士の境界および製品領域と耳部との境界である切断予定面と交差し且つ当該下層側のセラミック層を貫通する貫通孔と、
上記貫通孔の内壁に形成された内壁導体と、
上記内壁導体の少なくとも上端部を覆うように形成された絶縁部と、を含む、
ことを特徴とする多数個取り配線基板。
A base substrate that is formed by laminating an upper ceramic layer and a lower ceramic layer, and has a product region in which a plurality of products are arranged vertically and horizontally in plan view, and an ear that surrounds the product region;
A through hole passing through the lower ceramic layer and intersecting a planned cutting surface that is a boundary between products in the product region and a boundary between the product region and the ear portion in the lower ceramic layer of the base substrate; ,
An inner wall conductor formed on the inner wall of the through hole;
An insulating part formed to cover at least the upper end part of the inner wall conductor,
A multi-piece wiring board characterized by that.
前記絶縁部は、前記内壁導体と接する湾曲面またはテーパ面を有している、
ことを特徴とする請求項4に記載の多数個取り配線基板。
The insulating portion has a curved surface or a tapered surface in contact with the inner wall conductor.
The multi-piece wiring board according to claim 4, wherein
前記絶縁部は、前記内壁導体との間で鈍角を成している、
ことを特徴とする請求項4または5に記載の多数個取り配線基板。
The insulating part forms an obtuse angle with the inner wall conductor,
6. The multi-piece wiring board according to claim 4, wherein the multi-piece wiring board is provided.
上層側のグリーンシートの裏面に溶剤を塗布する工程と、
下層側のグリーンシートの製品領域内で縦横に配置される複数の製品間の境界および製品領域とこれを囲む耳部との境界である切断予定面と交差し、且つ当該下層側のグリーンシートを貫通する複数組のスルーホールおよび当該スルーホールの内壁に沿った内壁導体を形成する工程と、
上記上層側のグリーンシートと下層側のグリーンシートとを積層して圧着する工程と、を含む、
ことを特徴とする多数個取り配線基板の製造方法。
Applying a solvent to the back side of the upper green sheet;
Crossing the boundary between a plurality of products arranged vertically and horizontally in the product region of the lower layer side green sheet and the planned cutting surface that is the boundary between the product region and the surrounding ears, and the lower side green sheet Forming a plurality of sets of through-holes penetrating through and inner wall conductors along the inner walls of the through-holes;
Laminating and pressing the upper layer side green sheet and the lower layer side green sheet,
A method of manufacturing a multi-cavity wiring board characterized by the above.
JP2006074905A 2006-03-17 2006-03-17 Wiring substrate, multipartite wiring substrate, and manufacturing method thereof Pending JP2007251017A (en)

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JP2010056226A (en) * 2008-08-27 2010-03-11 Seiko Instruments Inc Electronic component package, and method of manufacturing electronic component package
WO2015182678A1 (en) * 2014-05-28 2015-12-03 日本特殊陶業株式会社 Wiring substrate
CN106463453A (en) * 2014-07-10 2017-02-22 应用材料公司 Design of susceptor in chemical vapor deposition reactor
JPWO2015118951A1 (en) * 2014-02-07 2017-03-23 株式会社村田製作所 Resin multilayer board and component module
WO2017134924A1 (en) * 2016-02-01 2017-08-10 三菱電機株式会社 Ceramic substrate and manufacturing method therefor

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JP2004111893A (en) * 2002-07-24 2004-04-08 Kyocera Corp Method for manufacturing multiple wiring board
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Publication number Priority date Publication date Assignee Title
JP2010056226A (en) * 2008-08-27 2010-03-11 Seiko Instruments Inc Electronic component package, and method of manufacturing electronic component package
JPWO2015118951A1 (en) * 2014-02-07 2017-03-23 株式会社村田製作所 Resin multilayer board and component module
WO2015182678A1 (en) * 2014-05-28 2015-12-03 日本特殊陶業株式会社 Wiring substrate
JP5957151B2 (en) * 2014-05-28 2016-07-27 日本特殊陶業株式会社 Wiring board
CN106463465A (en) * 2014-05-28 2017-02-22 日本特殊陶业株式会社 Wiring substrate
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JPWO2017134924A1 (en) * 2016-02-01 2018-09-27 三菱電機株式会社 Ceramic substrate and manufacturing method thereof
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