JP2006269603A - Wiring board and multi-patterned wiring board - Google Patents

Wiring board and multi-patterned wiring board Download PDF

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JP2006269603A
JP2006269603A JP2005083521A JP2005083521A JP2006269603A JP 2006269603 A JP2006269603 A JP 2006269603A JP 2005083521 A JP2005083521 A JP 2005083521A JP 2005083521 A JP2005083521 A JP 2005083521A JP 2006269603 A JP2006269603 A JP 2006269603A
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wiring board
groove
pair
hole
substrate body
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Makoto Nagai
誠 永井
Hisashi Wakako
久 若子
Atsushi Uchida
敦士 内田
Masahito Morita
雅仁 森田
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Niterra Co Ltd
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NGK Spark Plug Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board on a side face of a board main body of which a groove for forming a conductor layer including a plating layer is provided, a mount strength is obtained with a mother board on which the wiring board is mounted, and the conduction with the mother board is stably attained; and to provide multi-patterned wiring board for surely attaining the tasks above. <P>SOLUTION: The wiring board 1 includes the board main body 2 made of a ceramic (insulating material) with a front side 3, a rear side 5, and side faces 4. Each corner between a pair of the side faces 4, 4 adjacent to each other in the board main body 2 is provided with the groove 10 located along the thickness direction of the board main body 2. Each groove 10 comprises a pair of end grooves 12 respectively adjacent to the front side 3 and the rear side 5 of the board main body 2, and a middle groove 11 located between them and interconnecting a pair of the end grooves 12. A pair of the end grooves 12 is greater than the middle groove 11, and a conductor layer 13 is formed to each groove 10. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、基板本体の側面にメッキ層を含む導体層を形成するための溝を有する配線基板および該配線基板を確実に得るための多数個取り用配線基板に関する。   The present invention relates to a wiring board having a groove for forming a conductor layer including a plating layer on a side surface of a board body, and a multi-cavity wiring board for reliably obtaining the wiring board.

パッケージをマザーボードなどの表面に搭載する際に、かかる表面の外部接続端子との導通を取るため、基板本体の側面に厚み方向に沿って設けた溝(キャスタレーション)の全面に側面金属層を形成するリードレスパッケージ、およびこれを得るための製造方法が提案されている(例えば、特許文献1参照)。
上記パッケージの溝は、基板本体の厚み方向に沿って一定の幅および深さの断面ほぼ半円形を呈し、かかるパッケージをマザーボードなどの表面に搭載する際に、上記溝に形成された側面金属層と半田材との接触面積が小さくなり易い。このため、搭載時の搭載強度が不足したり、導通が不安定になる恐れがあった。
When mounting the package on the surface of a motherboard, etc., a side metal layer is formed on the entire surface of the groove (castellation) provided along the thickness direction on the side surface of the board body in order to establish conduction with the external connection terminals on the surface. A leadless package and a manufacturing method for obtaining the leadless package have been proposed (see, for example, Patent Document 1).
The groove of the package has a substantially semicircular cross section having a constant width and depth along the thickness direction of the substrate body, and the side metal layer formed in the groove when the package is mounted on the surface of a mother board or the like. The contact area between the solder and the solder material tends to be small. For this reason, there is a possibility that the mounting strength at the time of mounting is insufficient, or conduction is unstable.

特開2000−68414号公報(第1〜9頁、図1〜4)JP 2000-68414 A (pages 1-9, FIGS. 1-4)

また、特許文献1では、前記パッケージを多数個取りで得るため、大版サイズのグリーンシートにおいて、隣接するパッケージ領域同士の境界に沿って円柱形のスルーホールを形成し、かかるスルーホールの内面にWなどの金属層を形成した後、当該金属層の上に電解メッキでメッキ層を被覆している。
しかし、上記スルーホールは、大版サイズのグリーンシートの厚み方向に沿って同じ内径であり、上記電解メッキ時において、メッキ液がスルーホール内に貫流しにくいため、被覆される金属メッキ層の厚みがバラツキを生じる恐れがある。特に、配線基板の小型化のニーズに対応すべく、上記スルーホールを小径にすると、上記メッキ層の厚みのバラツキが一層生じ易くなる。このため、配線基板とこれを搭載するマザーボードとの間の導通が不安定になる恐れもあった。
Further, in Patent Document 1, in order to obtain a large number of the packages, a cylindrical through hole is formed along the boundary between adjacent package regions in a large size green sheet, and the inner surface of the through hole is formed. After forming a metal layer such as W, a plating layer is coated on the metal layer by electrolytic plating.
However, the through hole has the same inner diameter along the thickness direction of the large size green sheet, and the plating solution is difficult to flow into the through hole during the electrolytic plating. May cause variation. In particular, if the through hole is made small in size in order to meet the need for downsizing of the wiring board, the thickness of the plated layer is more likely to vary. For this reason, the continuity between the wiring board and the motherboard on which the wiring board is mounted may be unstable.

本発明は、前記背景技術における問題点を解決し、基板本体の側面にメッキ層を含む導体を形成するための溝を有すると共に、搭載すべきマザーボードなどとの搭載強度が得られ且つ導通が安定して取れる配線基板、および当該配線基板を確実に得るための多数個取り用配線基板を提供する、ことを課題とする。   The present invention solves the problems in the background art described above, has a groove for forming a conductor including a plating layer on the side surface of the substrate body, provides mounting strength with a mother board to be mounted, and is stable in conduction. It is an object of the present invention to provide a wiring board that can be removed in the process, and a wiring board for multiple pieces for obtaining the wiring board reliably.

課題を解決するための手段および発明の効果Means for Solving the Problems and Effects of the Invention

本発明は、前記課題を解決するため、基板本体の側面にメッキ層を含む導体層を形成するための溝を、かかる基板本体の表面および裏面に隣接する両端部とその間を接続する中間部とで、溝の深さおよび幅を相違させる、ことに着想して成されたものである。
即ち、本発明の配線基板(請求項1)は、絶縁材からなり、表面、裏面、およびかかる表面と裏面との外周に沿って位置する側面を有する基板本体と、かかる基板本体の側面および隣接する一対の側面間のコーナ部の少なくとも一方において、かかる基板本体の厚み方向に沿って設けられる溝と、を含み、前記溝は、上記基板本体の表面および裏面に隣接する一対の端部溝と、これらの間に位置し且つ当該一対の端部溝を接続する中間溝と、で構成され、上記一対の端部溝は、中間溝よりも大きい、ことを特徴とする。
尚、上記端部溝と中間溝との大小は、各溝の深さおよび幅の双方を基準とする。
In order to solve the above problems, the present invention provides a groove for forming a conductor layer including a plating layer on the side surface of the substrate body, both ends adjacent to the front surface and the back surface of the substrate body, and an intermediate portion connecting between them. The idea is to make the depth and width of the grooves different.
That is, the wiring board of the present invention (Claim 1) is made of an insulating material, and has a front surface, a back surface, and a substrate body having a side surface located along an outer periphery of the front surface and the back surface, and a side surface of the substrate body and an adjacent surface. A groove provided along the thickness direction of the substrate body in at least one of the corner portions between the pair of side surfaces, and the groove includes a pair of end grooves adjacent to the front surface and the back surface of the substrate body. And an intermediate groove connecting the pair of end grooves, the pair of end grooves being larger than the intermediate grooves.
The size of the end groove and the intermediate groove is based on both the depth and width of each groove.

これによれば、基板本体の側面またはコーナ部に設ける溝が、かかる基板本体の表面および裏面に隣接する一対の端部溝と、これらの間を接続し且つこれらよりも小さい中間溝とで構成されている。このため、当該配線基板をマザーボードなどの表面に搭載する際、従来のような基板本体の厚み方向に沿って一定の幅および深さの溝に比べ、当該溝を構成し且つ基板本体の裏面に隣接する端部溝の表面に形成される導体層と半田材(ロウ材)との接触面積を大きくできる。また、後述するように、上記溝に形成される導体層中のメッキ層が所要の厚みでほぼ均一に被覆されているため、マザーボード側との導通も安定して取ることが可能となる。従って、本配線基板を所要の強度を伴って容易に搭載できると共に、かかる搭載時に安定した導通を取ることも可能となる。
尚、前記配線基板を形成する絶縁材には、例えばアルミナを主成分とするセラミック、低温焼成セラミックの一種であるガラス−セラミック、あるいはエポキシ系をはじめとする各種の樹脂が含まれる。また、前記基板本体には、その表面に開口し且つ底面に電子部品を実装するキャビティが形成されていても良い。
According to this, the groove provided in the side surface or corner portion of the substrate body is constituted by a pair of end grooves adjacent to the front surface and the back surface of the substrate body, and an intermediate groove that connects between them and is smaller than these. Has been. For this reason, when mounting the wiring board on the surface of a mother board or the like, the groove is formed on the back surface of the board body, compared to a groove having a constant width and depth along the thickness direction of the board body as in the prior art. The contact area between the conductor layer formed on the surface of the adjacent end groove and the solder material (brazing material) can be increased. Further, as will be described later, since the plating layer in the conductor layer formed in the groove is coated almost uniformly with a required thickness, it is possible to stably establish conduction with the mother board. Therefore, the wiring board can be easily mounted with a required strength, and stable conduction can be achieved at the time of mounting.
The insulating material for forming the wiring board includes, for example, a ceramic mainly composed of alumina, a glass-ceramic which is a kind of low-temperature fired ceramic, or various resins including epoxy. The substrate body may be formed with a cavity that opens on the surface and mounts electronic components on the bottom surface.

また、本発明には、前記溝のうち、前記基板本体の表面および裏面に隣接する一対の端部溝は、上記基板本体の表面および裏面に向かって広がる傾斜面で構成されている、配線基板(請求項2)も含まれる。
これによれば、上記一対の端部溝は、基板本体の表面および裏面に向かって広がる傾斜面を有する、例えばほぼ半円錐形、またはほぼ4分の1の円錐形を呈するため、当該配線基板をマザーボードなどの表面に搭載する際、当該溝に形成される導体と半田材との接触面積を大きくできる。また、上記溝に形成される導体層中のメッキ層が所要の厚みでほぼ均一に被覆されているため、マザーボード側との導通も安定して取ることができる。従って、本配線基板を所要の強度をもって容易且つ確実に搭載でき、且つ導通も安定して確保することができる。
In the present invention, the pair of end grooves adjacent to the front surface and the back surface of the substrate main body of the groove are formed of inclined surfaces that extend toward the front surface and the back surface of the substrate main body. (Claim 2) is also included.
According to this, since the pair of end grooves have inclined surfaces extending toward the front surface and the back surface of the substrate body, for example, have a substantially semi-conical shape or a substantially quarter conical shape, the wiring substrate Is mounted on the surface of a mother board or the like, the contact area between the conductor formed in the groove and the solder material can be increased. In addition, since the plating layer in the conductor layer formed in the groove is almost uniformly coated with a required thickness, conduction with the mother board can be stably taken. Therefore, it is possible to easily and reliably mount the wiring board with a required strength, and to ensure stable conduction.

付言すれば、本発明には、前記溝を構成する一対の端部溝と中間溝とは、互い異なる断面形状である、配線基板も含まれ得る。
これによる場合、例えば、端部溝がほぼ半円錐形で且つ中間溝がほぼ半円柱形、端部溝がほぼ半円柱形で且つ中間溝が断面ほぼ長方形、端部溝がほぼ4分の1の円錐形で且つ中間溝がほぼ4分の1の円柱形、あるいは、端部溝が4分の1のほぼ円柱形で且つ中間溝が断面ほぼ長方形、などの形態とすることが可能となる。
また、本発明には、前記溝の端部溝および中間溝の表面には、金属層およびメッキ層からなる導体層が形成されている、配線基板も含まれ得る。
これによる場合、当該配線基板をマザーボードなどの表面に搭載する際に、上記導体層とマザーボードの接続端子との導通を確実に取ることが可能となる。
In other words, the present invention may include a wiring board in which the pair of end grooves and the intermediate grooves constituting the grooves have different cross-sectional shapes.
In this case, for example, the end groove is substantially semi-conical and the intermediate groove is substantially semi-cylindrical, the end groove is almost semi-cylindrical and the intermediate groove is substantially rectangular in cross section, and the end groove is almost 1/4. It is possible to adopt a shape such as a cylindrical shape having an intermediate groove of approximately 1/4, or an end groove having a substantially cylindrical shape having a quarter, and an intermediate groove having a substantially rectangular cross section. .
Further, the present invention may include a wiring board in which a conductor layer made of a metal layer and a plating layer is formed on the surface of the end groove and the intermediate groove of the groove.
In this case, when the wiring board is mounted on the surface of a mother board or the like, it is possible to reliably establish conduction between the conductor layer and the connection terminal of the mother board.

一方、本発明の多数個取り用配線基板(請求項3)は、配線基板が平面方向に沿って複数個併設される配線基板集合領域と、かかる配線基板集合領域の周囲を囲む耳部と、上記配線基板集合領域における隣接する複数の配線基板同士の境界および配線基板と耳部との境界において、各配線基板の厚み方向に沿って貫通する貫通孔と、を備え、前記貫通孔は、各配線基板の表面および裏面に隣接して開口する一対の端部孔と、これらの間に位置し且つ当該一対の端部を接続する中間孔とで構成され、上記一対の端部孔の径は、上記中間孔の径よりも大である、ことを特徴とする。上記端部孔の径と中間孔の径との大小は、各孔の内径または断面積の少なくとも一方を基準とする。   On the other hand, the multi-cavity wiring board of the present invention (Claim 3) includes a wiring board assembly region in which a plurality of wiring substrates are provided along the plane direction, and an ear portion surrounding the periphery of the wiring substrate assembly region, A through hole penetrating along the thickness direction of each wiring board at the boundary between the plurality of adjacent wiring boards in the wiring board assembly region and at the boundary between the wiring board and the ear portion, It is composed of a pair of end holes that are opened adjacent to the front and back surfaces of the wiring board, and an intermediate hole that is located between them and connects the pair of ends, and the diameter of the pair of end holes is The diameter is larger than the diameter of the intermediate hole. The size of the diameter of the end hole and the diameter of the intermediate hole is based on at least one of the inner diameter or the cross-sectional area of each hole.

これによれば、前記貫通孔は、各配線基板の表面および裏面に隣接して開口する一対の端部孔と、これらの間に位置し且つ当該一対の端部を接続し且つ一対の端部孔の径よりも小径の中間孔とで構成されている。このため、かかる貫通孔にWなどの金属層を形成し、かかる金属層の表面にNiメッキ、Auメッキ、およびAgメッキなどのメッキ層を電解メッキして形成する際に、従来の同じ断面の貫通孔に比べて、メッキ液が上記貫通孔を高い流動性をもって貫流し易くなる。この結果、上記メッキ層を比較的均一な厚みで貫通孔の全内面に容易に被覆できるため、追って複数個の配線基板ごとに分離した際、上記金属層およびメッキ層からなる導体層を介して、搭載すべきマザーボードなどとの導通が確実に取れる配線基板を確実に提供することが可能となる。
尚、前記多数個取り用配線基板には、例えばアルミナを主成分とするセラミックからなる大版サイズの積層体、低温焼成セラミックの1種であるガラス−セラミックからなる大版サイズの積層体、あるいはエポキシ系をはじめとする各種の樹脂からなる大版サイズの積層体が含まれる。
According to this, the through hole is a pair of end holes opened adjacent to the front surface and the back surface of each wiring board, and is located between and connects the pair of end portions and a pair of end portions. An intermediate hole having a diameter smaller than the diameter of the hole is used. For this reason, when a metal layer such as W is formed in such a through hole, and a plating layer such as Ni plating, Au plating, and Ag plating is formed on the surface of the metal layer by electrolytic plating, Compared to the through hole, the plating solution can easily flow through the through hole with high fluidity. As a result, since the plating layer can be easily coated on the entire inner surface of the through hole with a relatively uniform thickness, when the wiring layer is separated into a plurality of wiring boards later, the conductor layer composed of the metal layer and the plating layer is interposed. Therefore, it is possible to reliably provide a wiring board that can be reliably connected to a mother board to be mounted.
The multi-piece wiring board includes, for example, a large-size laminate made of ceramic mainly composed of alumina, a large-size laminate made of glass-ceramic, which is one kind of low-temperature fired ceramic, or A large-size laminate composed of various resins including epoxy is included.

また、本発明には、前記貫通孔のうち、前記配線基板の表面および裏面に隣接する一対の端部孔は、上記配線基板の表面または裏面に向かって広がるほぼ円錐形の傾斜面で構成されている、多数個取り用配線基板(請求項4)も含まれる。
これによれば、貫通孔にWなどの金属層を形成し、かかる金属層の表面にNi、Au、およびAgなどのメッキ層を電解メッキして形成する際に、メッキ液が上記貫通孔を高い流動性をもって貫流し易くなるので、上記メッキ層を比較的均一な厚みで貫通孔の全面に容易に被覆することが可能となる。
In the present invention, a pair of end holes adjacent to the front surface and the back surface of the wiring board among the through holes are formed by a substantially conical inclined surface extending toward the front surface or the back surface of the wiring board. A multi-piece wiring board (claim 4) is also included.
According to this, when a metal layer such as W is formed in the through hole, and a plating layer such as Ni, Au, and Ag is formed on the surface of the metal layer by electrolytic plating, the plating solution is used to form the through hole. Since it becomes easy to flow through with high fluidity, it is possible to easily cover the entire surface of the through-hole with a relatively uniform thickness.

付言すれば、本発明には、前記貫通孔を構成する一対の端部孔は、前記中間孔の内径よりも大径の円柱形である、多数個取り用配線基板も含まれ得る。
これによる場合も、貫通孔の前記金属層に前記メッキ層を電解メッキする際、メッキ液を上記貫通孔に流動性をもって容易に貫流させるが可能となる。
また、本発明には、前記貫通孔を構成する一対の端部孔および中間孔の各内面には、金属層およびメッキ層からなる導体層が被覆されている、多数個取り用配線基板も含まれ得る。これによる場合、追って、かかる多数個取り用配線基板を複数個の配線基板ごとに分割した際、上記導体層を介して、搭載すべきマザーボードなどとの導通が確実に取れる配線基板の提供が可能となる。
In other words, the present invention may include a multi-cavity wiring board in which the pair of end holes constituting the through hole are cylindrical with a diameter larger than the inner diameter of the intermediate hole.
Also in this case, when the plating layer is electrolytically plated on the metal layer of the through hole, the plating solution can easily flow through the through hole with fluidity.
The present invention also includes a multi-cavity wiring board in which the inner surfaces of the pair of end holes and intermediate holes constituting the through hole are covered with a conductor layer made of a metal layer and a plating layer. Can be. In this case, it is possible to provide a wiring board capable of reliably connecting with a mother board to be mounted via the conductor layer when the multi-piece wiring board is divided into a plurality of wiring boards. It becomes.

以下において、本発明を実施するための最良の形態について説明する。
図1は、本発明の一形態である配線基板1を示す平面図、図2は、図1中のX−X線の矢視に沿った断面図である。
配線基板1は、図1,図2に示すように、表面3、裏面5、およびこれらの外周に沿って位置する四辺の側面4を有する基板本体2と、隣接する側面4,4間のコーナ部において当該基板本体2の厚み方向に沿って設けられる四つの溝10と、かかる溝10ごとの表面に形成される導体層13と、を備えている。
基板本体2は、例えばアルミナ系のセラミック層s1〜s5を一体に積層したもので、平面視がほぼ正方形を呈し、約5×5×3mmのサイズである。かかる基板本体2の表面3には、キャビティ6が開口している。かかるキャビティ6は、平面視がほぼ正方形の底面7と、その周辺から立設する四辺の側面8とからなり、基板本体2の表面3寄りのセラミック層s4,s5の中央部を貫通している。
In the following, the best mode for carrying out the present invention will be described.
FIG. 1 is a plan view showing a wiring board 1 according to one embodiment of the present invention, and FIG. 2 is a cross-sectional view taken along the line XX in FIG.
As shown in FIGS. 1 and 2, the wiring substrate 1 includes a substrate body 2 having a front surface 3, a back surface 5, and four side surfaces 4 positioned along the outer periphery thereof, and a corner between adjacent side surfaces 4 and 4. This section includes four grooves 10 provided along the thickness direction of the substrate body 2 and a conductor layer 13 formed on the surface of each groove 10.
The substrate body 2 is formed by integrally laminating alumina-based ceramic layers s1 to s5, for example, has a substantially square shape in plan view, and has a size of about 5 × 5 × 3 mm. A cavity 6 is opened on the surface 3 of the substrate body 2. The cavity 6 includes a bottom surface 7 having a substantially square shape in plan view and four side surfaces 8 erected from the periphery thereof, and penetrates through the central portions of the ceramic layers s4 and s5 near the surface 3 of the substrate body 2. .

図1,図2に示すように、キャビティ6の底面7には、一対のパッド(導体層)9と、例えばSn−Ag系やCu−Ag系などの低融点合金の半田(ロウ)材17またはエポキシ系の接着性樹脂(図示せず)を介して、ICチップ(電子部品)16とが実装される。かかるパッド9とICチップ16とは、ボンディングワイヤwを介して導通される。尚、パッド9は、W、Mo、Ag、またはCuなどからなる金属層の表面に後述するNiおよびAuなどのメッキ層が形成されている。
図2に示すように、基板本体2のセラミック層s1〜s5間には、W、Mo、Ag、またはCuなどからなる所定パターンの配線層18が形成され、これらの間および前記パッド9との間には、上記同様の金属からなるビア導体19が形成されている。尚、基板本体2の裏面5にも、図示しないパッドを形成しても良い。
As shown in FIGS. 1 and 2, a bottom surface 7 of the cavity 6 has a pair of pads (conductor layers) 9 and a solder (brazing material) 17 of a low melting point alloy such as Sn-Ag or Cu-Ag. Alternatively, the IC chip (electronic component) 16 is mounted via an epoxy adhesive resin (not shown). The pad 9 and the IC chip 16 are electrically connected via the bonding wire w. The pad 9 has a plating layer such as Ni and Au, which will be described later, formed on the surface of a metal layer made of W, Mo, Ag, or Cu.
As shown in FIG. 2, a wiring layer 18 having a predetermined pattern made of W, Mo, Ag, Cu or the like is formed between the ceramic layers s <b> 1 to s <b> 5 of the substrate body 2, and between these and the pad 9. A via conductor 19 made of the same metal as described above is formed therebetween. A pad (not shown) may be formed on the back surface 5 of the substrate body 2.

図1,図2に示すように、基板本体2の隣接する側面4,4間のコーナ部には、平面視がほぼ4分の1の円形(円弧形)で且つ基板本体2の表面3および裏面5に隣接する一対の端部溝12と、これらの間に位置し且つ当該一対の端部溝12,12間を接続する中間溝11と、により構成される溝10が形成されている。
上記溝10を構成している一対の端部溝12は、それぞれ基板本体2の表面3および裏面5に向かって広がる4分の1のほぼ円錐形を呈し、中間溝11は、断面が4分の1の円形(円弧形)を呈する。かかる端部溝12の幅および深さは、中間溝11の幅および深さよりも大きい。
尚、図2中の仮想水平線に対する端部溝12の傾斜角度(仰角)は、45〜85度である。かかる傾斜角度が45度未満になると、基板本体2の表面3および裏面5の各コーナ部が大きく削られ過ぎる恐れが生じる。一方、上記傾斜角度が85度を超えると、垂直の90度とほぼ同じになり、搭載時の半田材との接触面積を大きく取れず、後述する電解メッキ時の貫通孔へのメッキ液の貫流性を高められない。これらのため、上記傾斜角度を45〜85度の範囲とした。
As shown in FIGS. 1 and 2, the corner portion between the adjacent side surfaces 4 and 4 of the substrate body 2 has a circular shape (arc shape) having a substantially quarter view and a surface 3 of the substrate body 2. And a pair of end grooves 12 adjacent to the back surface 5 and an intermediate groove 11 located between them and connecting between the pair of end grooves 12, 12 are formed. .
The pair of end grooves 12 constituting the groove 10 have a substantially conical shape of a quarter extending toward the front surface 3 and the back surface 5 of the substrate body 2, respectively, and the intermediate groove 11 has a cross section of 4 minutes. 1 circle (arc shape). The width and depth of the end groove 12 are larger than the width and depth of the intermediate groove 11.
The inclination angle (elevation angle) of the end groove 12 with respect to the virtual horizontal line in FIG. 2 is 45 to 85 degrees. If the inclination angle is less than 45 degrees, the corner portions of the front surface 3 and the back surface 5 of the substrate body 2 may be excessively shaved. On the other hand, when the inclination angle exceeds 85 degrees, the vertical contact angle becomes almost the same as 90 degrees, and the contact area with the solder material at the time of mounting cannot be made large. Can't improve sex. For these reasons, the inclination angle is in the range of 45 to 85 degrees.

前記溝10の中間溝11および一対の端部溝12の表面には、Wなどからなる金属層と、NiおよびAuなどのメッキ層とからなる導体層13が形成されている。かかる導体層13は、図2に示すように、中間溝11の表面に形成される断面4分の1の円形(円弧形)の中間導体14と、一対の端部溝12の表面に形成される4分の1のほぼ円錐形を呈する端部導体15とからなる。各中間導体14は、その内側面で前記配線層18の何れかと接続されている。
尚、前記キャビティ6の側面を平面視で円形、長円形、楕円形、全体がほぼ円錐形、ほぼ長円錐形、ほぼ楕円錐形の形態とし、これらの側面にWなどからなる金属とNi、Au、およびAgなどのメッキ層とからなる光反射層を形成しても良い。この場合、キャビティ6の底面7に発光ダイオードや半導体レーザなどの発光素子を実装した際に、これらからの光を効率良く反射することが可能となる。
On the surfaces of the intermediate groove 11 and the pair of end grooves 12 of the groove 10, a conductor layer 13 made of a metal layer made of W or the like and a plated layer made of Ni or Au is formed. As shown in FIG. 2, the conductor layer 13 is formed on the surface of the pair of end grooves 12 and a circular (arc-shaped) intermediate conductor 14 having a quarter cross section formed on the surface of the intermediate groove 11. Of the end conductor 15 having a substantially conical shape. Each intermediate conductor 14 is connected to one of the wiring layers 18 on the inner surface thereof.
The side surface of the cavity 6 is circular, oval, elliptical in a plan view, and has a substantially conical shape, a substantially conical shape, a substantially elliptical cone shape as a whole. You may form the light reflection layer which consists of plating layers, such as Au and Ag. In this case, when a light emitting element such as a light emitting diode or a semiconductor laser is mounted on the bottom surface 7 of the cavity 6, light from these can be efficiently reflected.

以上のような配線基板1によれば、基板本体2の各コーナ部に設ける溝10が、基板本体2の表面3および裏面5に隣接する一対の端部溝12と、これらの間を接続し且つこれらよりも小径の中間溝11とで構成されている。このため、当該配線基板1をマザーボード(図示せず)などの表面に搭載する際、従来のような基板本体の厚み方向に沿って一定の幅および深さの溝に比べ、基板本体2の裏面5に隣接する端部溝12に形成される導体層13の端部導体15と半田材(図示せず)との接触面積を大きくできる。しかも、後述するように、上記溝10に形成される導体層13中のメッキ層が所要の厚みでほぼ均一に被覆されているため、上記マザーボード側との導通も安定して取ることできる。従って、配線基板1を所要の強度を伴って容易に搭載できると共に、かかる搭載時に安定した導通性を取ることも可能となる。   According to the wiring board 1 as described above, the groove 10 provided in each corner portion of the substrate body 2 connects between the pair of end grooves 12 adjacent to the front surface 3 and the back surface 5 of the substrate body 2. And it is comprised with the intermediate groove 11 smaller in diameter than these. For this reason, when the wiring board 1 is mounted on the surface of a mother board (not shown) or the like, the back surface of the board body 2 is compared with a conventional groove having a certain width and depth along the thickness direction of the board body. 5, the contact area between the end conductor 15 of the conductor layer 13 formed in the end groove 12 adjacent to 5 and the solder material (not shown) can be increased. Moreover, as will be described later, since the plating layer in the conductor layer 13 formed in the groove 10 is almost uniformly coated with a required thickness, conduction with the motherboard side can be stably taken. Therefore, the wiring board 1 can be easily mounted with a required strength, and stable conductivity can be obtained at the time of mounting.

図3は、前記配線基板1を得るための多数個取り用配線基板(以下、単に配線基板と称する)20を示す平面図である。
かかる配線基板20は、図3に示すように、前記配線基板1を縦・横(平面)方向に沿って3個ずつ合計9個を併設する配線基板集合領域21と、かかる集合領域21の周囲を囲む平面視が四角枠形の耳部22と、を備えている。尚、図3中の破線は、追って配線基板1を個々に分割する際の切断予定線を示す。
図3に示すように、上記配線基板集合領域21において隣接する4つの配線基板1の交差部(境界)および外周の配線基板1と耳部22との境界において、各配線基板1の厚み方向に沿って、上記集合領域21や、かかる集合領域21および耳部22に跨って貫通する複数の貫通孔23が形成されている。また、左右の耳部22の中間には、断面ほぼ半円形のメッキ用電極29が形成されている。
上記貫通孔23の細部と、その表面に形成される金属層およびメッキ層とは、次述する配線基板20の製造方法において、詳細に説明する。
FIG. 3 is a plan view showing a multi-piece wiring board (hereinafter simply referred to as a wiring board) 20 for obtaining the wiring board 1.
As shown in FIG. 3, the wiring board 20 includes a wiring board gathering region 21 in which three wiring boards 1 are arranged in a vertical / horizontal (planar) direction for a total of nine, and the surroundings of the gathering region 21. And an ear portion 22 having a square frame shape. Note that the broken lines in FIG. 3 indicate the planned cutting lines when the wiring board 1 is individually divided later.
As shown in FIG. 3, in the thickness direction of each wiring board 1 at the intersection (boundary) of the four wiring boards 1 adjacent in the wiring board assembly region 21 and the boundary between the peripheral wiring board 1 and the ear part 22. A plurality of through holes 23 penetrating the aggregate region 21 and the collective region 21 and the ear portion 22 are formed. A plating electrode 29 having a substantially semicircular cross section is formed between the left and right ears 22.
Details of the through hole 23 and the metal layer and the plating layer formed on the surface thereof will be described in detail in the method of manufacturing the wiring board 20 described below.

前記配線基板20を得るための製造方法について、以下に説明する。
先ず、図4の左側に示すように、前記セラミック層s1(s5)となるアルミナ系材料からなる大版サイズのグリーンシートS1を、円形断面の孔hを有するダイDの上で固定し、かかる孔hの内径よりも直径が小さく所要のクリアランスcを形成するパンチPを用意する。図4の中央に示すように、かかるパンチPの先端部をダイDの孔hに押し込むことで、パンチPの外周縁と孔hの内周縁との間に剪断作用が働き、断面ほぼ台形で且つほぼ円錐形の打ち抜き屑dが除去される。かかる打ち抜き加工の結果、図4の右側に示すように、グリーンシートS1の所定の位置には、ほぼ円錐形の傾斜面を有する貫通孔h1が形成される。かかる貫通孔h1は、前記図3で示した貫通孔23と同数が形成される。
A manufacturing method for obtaining the wiring board 20 will be described below.
First, as shown on the left side of FIG. 4, a large-size green sheet S1 made of an alumina-based material that becomes the ceramic layer s1 (s5) is fixed on a die D having a hole h having a circular cross section. A punch P having a diameter smaller than the inner diameter of the hole h and forming a required clearance c is prepared. As shown in the center of FIG. 4, by pushing the tip of the punch P into the hole h of the die D, a shearing action acts between the outer peripheral edge of the punch P and the inner peripheral edge of the hole h, and the cross section is substantially trapezoidal. Further, the substantially conical punching waste d is removed. As a result of the punching process, as shown on the right side of FIG. 4, a through hole h1 having a substantially conical inclined surface is formed at a predetermined position of the green sheet S1. The same number of the through holes h1 as the through holes 23 shown in FIG.

図5の上方に示すように、前記セラミック層s5となるアルミナ系材料からなる大版サイズのグリーンシートS5に対しても、上記と同様な方法で同じ位置に同数の貫通孔h1が形成される。尚、パンチPの直径に対し、最小限のクリアランスcとなる孔hを有するダイDを用いて、円柱形の貫通孔を形成した後、かかる貫通孔に円錐形の金型(図示せず)を押し込む方法によっても、ほぼ円錐形の前記貫通孔h1を形成することができる。
また、前記セラミック層s2〜s4となるアルミナ系材料からなる大版サイズのグリーンシートS2〜S4に対して、パンチPの直径に対し、最小限のクリアランスcとなる孔hを有するダイDを用いて、それぞれ打ち抜き加工する。これにより、図5の中程に示すように、円柱形の貫通孔h2を所定の位置に形成する。かかる貫通孔h2も、前記図3で示した貫通孔23と同数が形成される。
As shown in the upper part of FIG. 5, the same number of through-holes h1 are formed at the same position in the same manner as described above for the large-sized green sheet S5 made of an alumina-based material as the ceramic layer s5. . A cylindrical through hole is formed using a die D having a hole h with a minimum clearance c with respect to the diameter of the punch P, and then a conical mold (not shown) is formed in the through hole. The through-hole h1 having a substantially conical shape can also be formed by a method of pushing in.
Further, a die D having a hole h that has a minimum clearance c with respect to the diameter of the punch P is used for the large-size green sheets S2 to S4 made of an alumina-based material that becomes the ceramic layers s2 to s4. And punching each. Thereby, as shown in the middle of FIG. 5, a cylindrical through hole h2 is formed at a predetermined position. The same number of the through holes h2 as the through holes 23 shown in FIG.

尚、セラミック層s4,s5には、各配線基板1の前記キャビティ6となる断面角形の貫通孔も、図3に示す位置で且つ同数が別途に形成される。また、図5中で例示するように、グリーンシートS1〜S4の上面には、前記配線層18となるW粉末などを含むペースト状の金属層(18)が公知の印刷法により形成されている。前記パッド9やビア導体19となる金属層も同様に形成されている。
ほぼ円錐形の貫通孔h1を有するグリーンシートS1,S5の間に、円柱形の貫通孔h2を有するグリーンシートS2〜S4を配置し、それらの貫通孔h1と貫通孔h2とが連通するように積層し且つ圧着する。その結果、図6に一部の断面を示す大版サイズのグリーンシート積層体GSが形成される。
In addition, the ceramic layers s4 and s5 are separately formed with the same number of through-holes having square cross-sections serving as the cavities 6 of the respective wiring boards 1 at the positions shown in FIG. In addition, as illustrated in FIG. 5, a paste-like metal layer (18) containing W powder or the like to be the wiring layer 18 is formed on the upper surfaces of the green sheets S1 to S4 by a known printing method. . The metal layer that becomes the pad 9 and the via conductor 19 is formed in the same manner.
Green sheets S2 to S4 having a cylindrical through hole h2 are arranged between green sheets S1 and S5 having a substantially conical through hole h1, so that the through hole h1 and the through hole h2 communicate with each other. Laminate and crimp. As a result, a large-size green sheet laminate GS whose partial cross section is shown in FIG. 6 is formed.

上記積層体GSにおいて、互いに連通した上下一対の貫通孔h1とこれらの間で同心で連通する3つの貫通孔h2とは、図6に示すように、全体がほぼ鼓形を呈する貫通孔23を形成する。かかる貫通孔23は、ほぼ円錐形の傾斜面を有する上下一対の端部孔24と、これらの間に位置し且つ同径で接続する円柱形の内周面を有する中間孔25と、で構成される。
尚、図6に示すように、貫通孔23の内周面には、前記W粉末などを含むペースト状の金属層(18)の一端面が露出している。また、前記積層体GSの外側に位置し追って耳部22となる辺の側面に、前記メッキ用電極(29)を同様にして形成する。
In the laminated body GS, a pair of upper and lower through holes h1 communicating with each other and three through holes h2 concentrically communicating therebetween are formed as shown in FIG. Form. The through-hole 23 is composed of a pair of upper and lower end holes 24 having a substantially conical inclined surface, and an intermediate hole 25 having a cylindrical inner peripheral surface located between them and connected with the same diameter. Is done.
As shown in FIG. 6, one end face of the paste-like metal layer (18) containing the W powder is exposed on the inner peripheral surface of the through hole 23. In addition, the electrode for plating (29) is formed in the same manner on the side surface of the side that is positioned outside the laminated body GS and becomes the ear portion 22 later.

次いで、図7の左側に示すように、各貫通孔23における一方の開口部を真空ポンプ(図示せず)に連通して、貫通孔23内を減圧状態とする。かかる状態で、他方の開口部の外側に端部孔24の最大径よりやや大きな外径とやや小さな内径との間に位置するリング形のパターン孔を有するメッシュマスクと、スキージ(何れも図示せず)とを用いて、W粉末などを含むペースト状の金属層27を、貫通孔23の中間孔24および一対の端部孔25の内周面に形成する。
引き続いて、各貫通孔23における他方の開口部を真空ポンプに連通して上記同様の減圧状態とし、各貫通孔23における一方の開口部から、上記同様にしてペースト状の金属層27を、貫通孔23の内周面にほぼ均一にして形成する。
Next, as shown on the left side of FIG. 7, one opening in each through hole 23 is communicated with a vacuum pump (not shown), and the inside of the through hole 23 is brought into a reduced pressure state. In this state, a mesh mask having a ring-shaped pattern hole located between an outer diameter slightly larger than the maximum diameter of the end hole 24 and an inner diameter slightly smaller than the other opening, and a squeegee (both not shown) The paste-like metal layer 27 containing W powder or the like is formed on the inner peripheral surface of the through hole 23 and the pair of end holes 25.
Subsequently, the other opening in each through hole 23 is communicated with a vacuum pump so as to be in a reduced pressure state similar to the above, and the pasty metal layer 27 is penetrated from one opening in each through hole 23 in the same manner as described above. It is formed almost uniformly on the inner peripheral surface of the hole 23.

かかる状態で、グリーンシート積層体GSを、所定の温度帯で加熱・保持して焼成することで、前記グリーンシートS1〜S5がセラミック層s1〜s5になると共に、ペースト状の金属層(27)やメッキ用電極(29)などが、配線層18やメッキ用電極29などになる。
更に、図7の右側に示すように、貫通孔23の内周面に形成された金属層27の上に、NiメッキおよびAuメッキを施して、メッキ層28を形成する。かかるメッキ工程は、前記焼成済みのグリーンシート積層体GSを、電解メッキ槽のメッキ液(何れも図示せず)中に浸漬し、公知の電解Niメッキおよび電解Auメッキを施すことで形成される。
In this state, the green sheet laminate GS is heated and held at a predetermined temperature range and fired, whereby the green sheets S1 to S5 become ceramic layers s1 to s5, and a paste-like metal layer (27) The plating electrode (29) and the like become the wiring layer 18 and the plating electrode 29.
Furthermore, as shown on the right side of FIG. 7, Ni plating and Au plating are performed on the metal layer 27 formed on the inner peripheral surface of the through hole 23 to form a plating layer 28. Such a plating process is formed by immersing the fired green sheet laminate GS in a plating solution (both not shown) in an electrolytic plating tank and performing known electrolytic Ni plating and electrolytic Au plating. .

即ち、前記焼成済みのグリーンシート積層体GSのメッキ用電極29に電極棒(図示せず)を接触させ、かかるメッキ用電極29から、図示しないタイバー、上記積層体GSの外周に沿って位置する貫通孔23に形成された金属層27、および各配線基板1の配線層18などを介して、全ての貫通孔23に形成された金属層27を通電状態とする。かかる状態で、前記焼成済みのグリーンシート積層体GSおよび電極棒を、電解メッキ槽のメッキ液中に浸漬した後、メッキ液中で対向する反対側の電極との間で、電解Niメッキおよび電解Auメッキを順次施す。この際、各メッキ液は、貫通孔23の両端が外側に広がる傾斜面を有する端部孔24を有するため、かかる貫通孔23内を高い流動性をもって貫流する。
この結果、メッキ層28は、貫通孔23(24,25)の内周面全体において、比較的均一な厚みで確実に形成される。
That is, an electrode rod (not shown) is brought into contact with the plating electrode 29 of the fired green sheet laminate GS, and the tie bar (not shown) is positioned along the outer periphery of the laminate GS from the plating electrode 29. The metal layers 27 formed in all the through holes 23 are energized through the metal layers 27 formed in the through holes 23 and the wiring layers 18 of the respective wiring boards 1. In such a state, after the fired green sheet laminate GS and the electrode rod are immersed in a plating solution in an electrolytic plating tank, electrolytic Ni plating and electrolysis are performed between the opposite electrode in the plating solution. Au plating is performed sequentially. At this time, each plating solution has an end hole 24 having an inclined surface in which both ends of the through hole 23 spread outward, and thus flows through the through hole 23 with high fluidity.
As a result, the plating layer 28 is reliably formed with a relatively uniform thickness over the entire inner peripheral surface of the through hole 23 (24, 25).

そして、前記図3中および図7の右側にて破線で示す切断予定線に沿って、公知のダイシング加工またはブレーク加工を施す。その結果、前記配線基板集合領域21は、9個の配線基板1に分割され、且つ耳部22が除去される。この際、個々の配線基板1における基板本体2の各コーナ部において、平面視で4分割された貫通孔23の中間孔25および端部孔24は、前記溝10の中間溝11および端部溝12となる。同時に、金属層27およびメッキ層28は、それぞれ4分割されることで、各溝10の表面を覆う前記導体層13の中間導体14および端部導体15となる。
以上のようにして製造される配線基板20によれば、貫通孔23の内周面に金属層27を介して、ほぼ均一な厚みのメッキ層28を確実に形成できるため、マザーボードなどへの搭載や導通が容易に取れる前記配線基板1を効率良く提供することが可能となる。
Then, a known dicing process or break process is performed along a planned cutting line indicated by a broken line on the right side of FIG. 3 and FIG. As a result, the wiring board assembly region 21 is divided into nine wiring boards 1 and the ears 22 are removed. At this time, in each corner portion of the substrate body 2 in each wiring board 1, the intermediate hole 25 and the end hole 24 of the through hole 23 divided into four in plan view are the intermediate groove 11 and the end groove of the groove 10. 12 At the same time, the metal layer 27 and the plating layer 28 are divided into four parts, so that the intermediate conductor 14 and the end conductor 15 of the conductor layer 13 covering the surface of each groove 10 are formed.
According to the wiring board 20 manufactured as described above, the plating layer 28 having a substantially uniform thickness can be reliably formed on the inner peripheral surface of the through hole 23 via the metal layer 27, so that it can be mounted on a mother board or the like. It is possible to efficiently provide the wiring board 1 that can be easily connected.

図8は、本発明における異なる形態の配線基板30を示す平面図、図9は、図8中のY−Y線の矢視に沿った断面図である。尚、以下において、前記配線基板1と共通する部分については、同じ符号を用いる。
配線基板30は、図8,9に示すように、表面33、裏面35、およびこれらの外周沿って位置する四辺の側面34を有する基板本体32と、各側面34の中間において当該基板本体32の厚み方向に沿って設けられる四つの溝40と、かかる溝40ごとの表面に形成される導体層43と、を備えている。
基板本体32も、前記同様のセラミック層s1〜s5を一体に積層したものであり、かかる基板本体32の表面33には、平面視が正方形の底面37とその周辺から立設する四つの側壁38とからなるキャビティ36が開口している。かかるキャビティ36の底面37には、前記同様に一対のパッド9が形成され、かかる底面37の中央部にICチップ16が前記同様に実装され、且つこれらの間をボンディングワイヤwが導通している。
FIG. 8 is a plan view showing a wiring board 30 of a different form according to the present invention, and FIG. 9 is a cross-sectional view taken along the line YY in FIG. In the following description, the same reference numerals are used for portions common to the wiring board 1.
As shown in FIGS. 8 and 9, the wiring substrate 30 includes a substrate body 32 having a front surface 33, a back surface 35, and four side surfaces 34 positioned along the outer periphery thereof, and the substrate body 32 between the side surfaces 34. Four grooves 40 provided along the thickness direction and a conductor layer 43 formed on the surface of each groove 40 are provided.
The substrate body 32 is also formed by integrally laminating the same ceramic layers s1 to s5 as described above, and the surface 33 of the substrate body 32 has a square bottom surface 37 in plan view and four side walls 38 standing from its periphery. A cavity 36 is opened. A pair of pads 9 is formed on the bottom surface 37 of the cavity 36 in the same manner as described above, the IC chip 16 is mounted in the center of the bottom surface 37 in the same manner as described above, and a bonding wire w is conducted between them. .

図8,図9に示すように、基板本体32の各側面34の中間には、平面視がほぼ半円形(半円弧形)で且つ基板本体32の表面33および裏面35に隣接する一対の端部溝42と、これらの間に位置し且つ当該一対の端部溝42,42間を接続する中間溝41と、により構成される溝40が形成されている。
上記溝40を構成している一対の端部溝42は、それぞれ基板本体32の表面33および裏面35に向かって広がるほぼ半円錐形を呈し、中間溝41は、断面がほぼ半円形(半円弧形)を呈する。かかる端部溝42の幅および深さは、中間溝41の幅および深さよりも大きい。尚、図9中の仮想水平線に対する端部溝42の傾斜角度(仰角)は、45〜85度である。
As shown in FIGS. 8 and 9, between each side surface 34 of the substrate main body 32, a pair of adjacent sides of the front surface 33 and the back surface 35 of the substrate main body 32 is substantially semicircular (semicircular arc shape) in plan view. A groove 40 is formed that includes an end groove 42 and an intermediate groove 41 that is located between the end groove 42 and connects between the pair of end grooves 42 and 42.
The pair of end grooves 42 constituting the groove 40 has a substantially semi-conical shape extending toward the front surface 33 and the back surface 35 of the substrate body 32, respectively, and the intermediate groove 41 has a substantially semicircular cross section (semicircle). Arc). The width and depth of the end groove 42 are larger than the width and depth of the intermediate groove 41. Note that the inclination angle (elevation angle) of the end groove 42 with respect to the virtual horizontal line in FIG. 9 is 45 to 85 degrees.

前記溝40の中間溝41および一対の端部溝42の表面には、Wなどからなる金属層とNiおよびAuなどのメッキ層とからなる導体層43が形成されている。かかる導体層43は、図9に示すように、中間溝41の表面に形成される断面ほぼ半円形(半円弧形)の中間導体44と、一対の端部溝42の表面に形成されるほぼ半円錐形を呈する端部導体45とからなる。尚、各中間導体44は、その内側面で前記配線層18の何れかと接続されている。
尚、前記キャビティ36の側面を平面視で円形、長円形、楕円形、全体がほぼ円錐形、ほぼ長円錐形、ほぼ楕円錐形の形態とし、これらの側面にWなどからなる金属とNi、Au、Agなどのメッキ層とからなる光反射層を形成しても良い。この場合、キャビティ36の底面37に発光ダイオードや半導体レーザなどの発光素子を実装した際に、これらからの光を効率良く反射することが可能となる。
On the surface of the intermediate groove 41 and the pair of end grooves 42 of the groove 40, a conductor layer 43 made of a metal layer made of W or the like and a plating layer made of Ni or Au is formed. As shown in FIG. 9, the conductor layer 43 is formed on the surface of the pair of end grooves 42 and the intermediate conductor 44 having a substantially semicircular cross section (semicircular arc shape) formed on the surface of the intermediate groove 41. The end conductor 45 has a substantially semi-conical shape. Each intermediate conductor 44 is connected to one of the wiring layers 18 on the inner side surface.
In addition, the side surface of the cavity 36 is circular, oval, elliptical, generally in the form of a cone, substantially a long cone, or a substantially elliptical cone in plan view. You may form the light reflection layer which consists of plating layers, such as Au and Ag. In this case, when a light emitting element such as a light emitting diode or a semiconductor laser is mounted on the bottom surface 37 of the cavity 36, light from these can be efficiently reflected.

以上のような配線基板30によれば、基板本体32の各側面34に設ける溝40が、基板本体32の表面33および裏面35に隣接する一対の端部溝42と、これらの間を接続し且つこれらよりも小さい中間溝41とで構成されている。このため、当該配線基板30をマザーボード(図示せず)などの表面に搭載する際、従来の基板本体の厚み方向に沿って一定の幅および深さの溝に比べ、基板本体32の裏面35に隣接する端部溝42に形成される導体層43の端部導体45と、前記同様の半田材(図示せず)との接触面積を大きくすることができる。しかも、後述するように、上記溝40に形成される導体層43中のメッキ層が所要の厚みでほぼ均一に被覆されているため、上記マザーボード側との導通も安定して取ることできる。従って、配線基板30を所要の強度を伴って容易に搭載できると共に、かかる搭載時に安定した導通性を取ることも可能となる。   According to the wiring board 30 as described above, the grooves 40 provided on the respective side surfaces 34 of the substrate body 32 connect the pair of end grooves 42 adjacent to the front surface 33 and the back surface 35 of the substrate body 32 and these. And it is comprised with the intermediate groove 41 smaller than these. For this reason, when mounting the wiring board 30 on the surface of a mother board (not shown) or the like, the back surface 35 of the board body 32 is compared with the groove having a constant width and depth along the thickness direction of the conventional board body. The contact area between the end conductor 45 of the conductor layer 43 formed in the adjacent end groove 42 and the same solder material (not shown) can be increased. In addition, as will be described later, since the plating layer in the conductor layer 43 formed in the groove 40 is almost uniformly coated with a required thickness, conduction with the motherboard side can be stably taken. Therefore, it is possible to easily mount the wiring board 30 with a required strength, and it is also possible to obtain a stable continuity during such mounting.

図10は、前記配線基板30を得るための多数個取り用配線基板(以下、単に配線基板と称する)50を示す平面図、図11は、図10中のZ−Z線の矢視に沿った部分拡大断面図である。
配線基板50は、図10に示すように、前記配線基板30を縦・横(平面)方向に沿って3個ずつ合計9個を併設する配線基板集合領域51と、かかる集合領域51の周囲を囲む平面視が四角枠形の耳部52と、を備えている。尚、図10,図11中の破線は、追って個々の配線基板30に分割する際の切断予定線を示す。
図10に示すように、上記配線基板集合領域51において隣接する2つの配線基板30の境界および外周の配線基板30と耳部52との境界において、各配線基板30の厚み方向に沿って、上記集合領域51や、かかる集合領域51および耳部52に跨って貫通する複数の貫通孔53が形成されている。各貫通孔53の内周面には、導体層56が形成されている。また、耳部52の各辺には、前記メッキ用電極29と同様な断面ほぼ半円形のメッキ用電極59が形成されている。
FIG. 10 is a plan view showing a multi-cavity wiring board (hereinafter simply referred to as a wiring board) 50 for obtaining the wiring board 30, and FIG. 11 is taken along the line ZZ in FIG. FIG.
As shown in FIG. 10, the wiring board 50 includes a wiring board gathering area 51 in which nine of the wiring boards 30 are arranged along the vertical and horizontal (planar) directions, and a surrounding area of the gathering area 51. The surrounding planar view includes a square frame-shaped ear portion 52. The broken lines in FIGS. 10 and 11 indicate the planned cutting lines when dividing into individual wiring boards 30 later.
As shown in FIG. 10, at the boundary between two wiring boards 30 adjacent to each other in the wiring board assembly area 51 and the boundary between the wiring board 30 and the ear 52 on the outer periphery, along the thickness direction of each wiring board 30, The collective region 51 and a plurality of through holes 53 penetrating the collective region 51 and the ear portion 52 are formed. A conductor layer 56 is formed on the inner peripheral surface of each through-hole 53. Further, on each side of the ear portion 52, a plating electrode 59 having a substantially semicircular cross section similar to the plating electrode 29 is formed.

図11に示すように、貫通孔53は、セラミック層s1,s5に設けられ、各配線基板30の表面33および裏面35に向かって広がる傾斜面を有するほぼ円錐形を呈する一対の端部孔54と、これらの間を接続し、端部孔54の内径よりも小さな内径で円柱形を呈する中間孔55とからなり、全体がほぼ鼓形を呈する。
上記貫通孔53の中間孔55および端部孔54の表面には、前記と同様の方法によって、Wなどからなる金属層57と、ほぼ均一な厚みのNiメッキ層およびAuメッキ層からなるメッキ層58と、を有する導体層56が形成されている。
かかる配線基板50も、前記図4〜図7に示した各製造工程をほぼ同様に経ることによって、容易に製造される。
As shown in FIG. 11, the through holes 53 are provided in the ceramic layers s <b> 1 and s <b> 5 and have a pair of end holes 54 having a substantially conical shape having inclined surfaces extending toward the front surface 33 and the back surface 35 of each wiring substrate 30. And an intermediate hole 55 which has a cylindrical shape with an inner diameter smaller than the inner diameter of the end hole 54, and the whole has a substantially drum shape.
On the surface of the intermediate hole 55 and the end hole 54 of the through hole 53, a metal layer 57 made of W or the like and a plating layer made of a Ni plating layer and an Au plating layer having a substantially uniform thickness are formed by the same method as described above. 58, a conductor layer 56 is formed.
Such a wiring board 50 is also easily manufactured through substantially the same manufacturing steps shown in FIGS.

そして、前記図10,図11中の破線で示す切断予定線に沿って、公知のダイシング加工またはブレーク加工を施すことにより、前記配線基板集合領域51は、9個の配線基板30に分割され、且つ耳部52が除去される。この際、個々の配線基板30における基板本体32の各側面34において、平面視で2分割された貫通孔53の中間孔55および端部孔54は、前記溝40の中間溝41および端部溝42となる。同時に、導体層56の金属層57およびメッキ層58は、それぞれ2分割されることで、各溝40の表面を覆う前記導体層43の中間導体44および端部導体45となる。
以上のような配線基板50によっても、貫通孔53の内周面に金属層57を介して、ほぼ均一な厚みのメッキ層58を確実に形成されているため、マザーボードなどへの搭載や導通が容易に取れる前記配線基板30を効率良く提供することが可能となる。
Then, the wiring board assembly region 51 is divided into nine wiring boards 30 by performing a known dicing process or a break process along a planned cutting line indicated by a broken line in FIGS. And the ear | edge part 52 is removed. At this time, the intermediate hole 55 and the end hole 54 of the through hole 53 that are divided into two in plan view on the respective side surfaces 34 of the substrate body 32 in each wiring board 30 are the intermediate groove 41 and the end groove of the groove 40. 42. At the same time, the metal layer 57 and the plating layer 58 of the conductor layer 56 are each divided into two, thereby forming the intermediate conductor 44 and the end conductor 45 of the conductor layer 43 covering the surface of each groove 40.
Also with the wiring board 50 as described above, the plating layer 58 having a substantially uniform thickness is reliably formed on the inner peripheral surface of the through-hole 53 via the metal layer 57, so that mounting or conduction to a motherboard or the like is possible. It is possible to efficiently provide the wiring board 30 that can be easily taken.

本発明は、以上において説明した各形態に限定されるものではない。
前記溝は、配線基板の側面およびコーナ部の双方に形成し、これらの溝に金属層およびメッキ層からなる導体層を形成する形態としても良い。これに応じて、多数個取り用配線基板にも、配線基板集合領域中の配線基板同士の境界や、かかる集合領域と耳部の境界における所定の位置に貫通孔を形成する。
また、前記基板本体は、低温焼成セラミックの一種であるガラス−セラミックにより形成しても良い。あるいは、BT樹脂などからなるコア基板の表面および裏面の少なくとも一方にエポキシ系の樹脂層や樹脂フィルムを積層した形態としても良い。後者の場合、前記パッド、配線層、溝に形成する金属層は、Cuなどからなるものとし、それらの表面にNiおよびAuメッキを施して導体層を形成する。
The present invention is not limited to the embodiments described above.
The groove may be formed on both the side surface and the corner of the wiring board, and a conductor layer made of a metal layer and a plating layer may be formed in these grooves. Accordingly, through-holes are also formed in the multi-cavity wiring board at predetermined positions at the boundary between the wiring boards in the wiring board assembly area and at the boundary between the assembly area and the ear part.
The substrate body may be formed of glass-ceramic which is a kind of low-temperature fired ceramic. Or it is good also as a form which laminated | stacked the epoxy-type resin layer and the resin film on at least one of the surface of the core board | substrate which consists of BT resin. In the latter case, the metal layer formed in the pad, wiring layer, and groove is made of Cu or the like, and Ni and Au plating is performed on the surface thereof to form a conductor layer.

更に、前記溝の中間溝は、断面長方形とし、且つ両端の端部溝をほぼ半四角錐形とした形態としても良い。あるいは、半円柱形または4分の1の円柱形である中間溝に対し、幅および深さの大きな半円柱形または4分の1の円柱形である端部溝としても良い。
また、上記溝の形態に対応して、多数取り用配線基板に設ける貫通孔は、その中間孔を断面ほぼ正方形とし、且つ両端の端部孔をほぼ四角錐形とした形態としても良い。あるいは、円柱形の中間孔に対し、幅および深さが大きな円柱形の円柱形である端部孔としても良い。
加えて、前記配線基板は、基板本体の表面が平坦な形態とし、かかる表面にICチップなどの電子部品などを実装するためのパッドを有する形態としても良い。
Further, the intermediate groove of the groove may have a rectangular cross section, and the end grooves at both ends may have a substantially half quadrangular pyramid shape. Or it is good also as an end groove | channel which is a semi-cylinder shape or a quarter cylinder shape with a large width | variety and depth with respect to the intermediate groove which is a semi-cylinder shape or a quarter cylinder shape.
Further, the through holes provided in the multi-wiring substrate corresponding to the shape of the groove may have a shape in which the intermediate hole has a substantially square cross section and the end holes at both ends have a substantially quadrangular pyramid shape. Or it is good also as an edge part hole which is a cylindrical column shape with a large width | variety and depth with respect to a cylindrical intermediate hole.
In addition, the wiring board may have a form in which the surface of the board body is flat and a pad for mounting an electronic component such as an IC chip on the surface.

本発明の一形態である配線基板を示す平面図。The top view which shows the wiring board which is 1 form of this invention. 図1中のX−X線の矢視に沿った断面図。Sectional drawing along the arrow of the XX in FIG. 上記配線基板を得るための多数個取り用配線基板を示す平面図。The top view which shows the wiring board for multi-piece taking for obtaining the said wiring board. 上記多数個取り用配線基板の製造工程の一部を示す概略図。Schematic which shows a part of manufacturing process of the said multi-cavity wiring board. 図4に続く製造工程の一部を示す概略図。Schematic which shows a part of manufacturing process following FIG. 図5に続く製造工程の一部を示す概略図。Schematic which shows a part of manufacturing process following FIG. 図6に続く製造工程の一部を示す概略図。Schematic which shows a part of manufacturing process following FIG. 異なる形態の配線基板を示す平面図。The top view which shows the wiring board of a different form. 図8中のY−Y線の矢視に沿った断面図。Sectional drawing along the arrow of the YY line in FIG. 上記配線基板を得るための多数個取り用配線基板を示す平面図。The top view which shows the wiring board for multi-piece taking for obtaining the said wiring board. 図10中のZ−Z線の矢視に沿った部分拡大断面図。FIG. 11 is a partially enlarged cross-sectional view taken along the line ZZ in FIG. 10.

符号の説明Explanation of symbols

1,30……配線基板
2,32……基板本体
3,33……表面
4,34……側面
5,35……裏面
10,40…溝
11,41…中間溝
12,42…端部溝
20,50…多数個取り用配線基板
21,51…配線基板集合領域
22,52…耳部
23.53…貫通孔
24,54…端部孔
25,55…中間孔
DESCRIPTION OF SYMBOLS 1,30 ... Wiring board 2,32 ... Board | substrate main body 3,33 ... Front surface 4,34 ... Side surface 5,35 ... Back surface 10,40 ... Groove 11, 41 ... Intermediate groove 12, 42 ... End groove 20, 50 ... Wiring boards for multi-cavity 21, 51 ... Wiring board assembly area 22, 52 ... Ear part 23.53 ... Through hole 24, 54 ... End hole 25, 55 ... Intermediate hole

Claims (4)

絶縁材からなり、表面、裏面、およびかかる表面と裏面との外周に沿って位置する側面を有する基板本体と、
上記基板本体の側面および隣接する一対の側面間のコーナ部の少なくとも一方において、かかる基板本体の厚み方向に沿って設けられる溝と、を含み、
上記溝は、上記基板本体の表面および裏面に隣接する一対の端部溝と、これらの間に位置し且つ当該一対の端部溝を接続する中間溝と、で構成され、
上記一対の端部溝は、中間溝よりも大きい、
ことを特徴とする配線基板。
A substrate body made of an insulating material, having a front surface, a back surface, and a side surface located along the outer periphery of the front surface and the back surface;
A groove provided along the thickness direction of the substrate body in at least one of the side surface of the substrate body and a corner portion between a pair of adjacent side surfaces;
The groove is composed of a pair of end grooves adjacent to the front surface and the back surface of the substrate body, and an intermediate groove located between them and connecting the pair of end grooves,
The pair of end grooves are larger than the intermediate grooves,
A wiring board characterized by that.
前記溝のうち、前記基板本体の表面および裏面に隣接する一対の端部溝は、上記基板本体の表面および裏面に向かって広がる傾斜面で構成されている、
ことを特徴とする請求項1に記載の配線基板。
Among the grooves, the pair of end grooves adjacent to the front and back surfaces of the substrate body are configured by inclined surfaces that extend toward the front and back surfaces of the substrate body.
The wiring board according to claim 1.
配線基板が平面方向に沿って複数個併設される配線基板集合領域と、
上記配線基板集合領域の周囲を囲む耳部と、
上記配線基板集合領域における隣接する複数の配線基板同士の境界および配線基板と耳部との境界において、各配線基板の厚み方向に沿って貫通する貫通孔と、を備え、
上記貫通孔は、各配線基板の表面および裏面に隣接して開口する一対の端部孔と、これらの間に位置し且つ当該一対の端部を接続する中間孔とで構成され、
上記一対の端部孔の径は、上記中間孔の径よりも大である、
ことを特徴とする多数個取り用配線基板。
A wiring board assembly region in which a plurality of wiring boards are provided along the plane direction;
Ears surrounding the periphery of the wiring board assembly area;
A through hole penetrating along the thickness direction of each wiring board at the boundary between adjacent wiring boards in the wiring board assembly region and at the boundary between the wiring board and the ear part,
The through hole is composed of a pair of end holes that are opened adjacent to the front surface and the back surface of each wiring board, and an intermediate hole that is located between and connects the pair of end portions,
The diameter of the pair of end holes is larger than the diameter of the intermediate hole.
A wiring board for multi-piece production characterized by the above.
前記貫通孔のうち、前記配線基板の表面および裏面に隣接する一対の端部孔は、上記配線基板の表面または裏面に向かって広がるほぼ円錐形の傾斜面で構成されている、
ことを特徴とする請求項3に記載の多数個取り用配線基板。

Of the through-holes, a pair of end holes adjacent to the front and back surfaces of the wiring board are configured by a substantially conical inclined surface extending toward the front or back surface of the wiring board.
The multi-cavity wiring board according to claim 3, wherein:

JP2005083521A 2005-03-23 2005-03-23 Wiring board and multi-patterned wiring board Pending JP2006269603A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010040701A (en) * 2008-08-04 2010-02-18 Jfe Mineral Co Ltd Planar magnetic element
JP2010074118A (en) * 2008-08-21 2010-04-02 Kyocera Corp Multi-piece wiring board
JPWO2016121491A1 (en) * 2015-01-30 2017-10-05 株式会社村田製作所 Electronic circuit module

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0946019A (en) * 1995-08-03 1997-02-14 Kuwabara Seisakusho:Kk Printed wiring board
JPH10126025A (en) * 1996-10-15 1998-05-15 Oki Electric Ind Co Ltd Through hole structure for printed wiring board
JP2002076615A (en) * 2000-08-31 2002-03-15 Asahi Chem Res Lab Ltd Printed circuit board and method for soldering to its through hole
JP2003283067A (en) * 2002-03-26 2003-10-03 Kyocera Corp Multiple wiring board
JP2004343072A (en) * 2003-04-23 2004-12-02 Kyocera Corp Multipiece wiring board

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0946019A (en) * 1995-08-03 1997-02-14 Kuwabara Seisakusho:Kk Printed wiring board
JPH10126025A (en) * 1996-10-15 1998-05-15 Oki Electric Ind Co Ltd Through hole structure for printed wiring board
JP2002076615A (en) * 2000-08-31 2002-03-15 Asahi Chem Res Lab Ltd Printed circuit board and method for soldering to its through hole
JP2003283067A (en) * 2002-03-26 2003-10-03 Kyocera Corp Multiple wiring board
JP2004343072A (en) * 2003-04-23 2004-12-02 Kyocera Corp Multipiece wiring board

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010040701A (en) * 2008-08-04 2010-02-18 Jfe Mineral Co Ltd Planar magnetic element
JP2010074118A (en) * 2008-08-21 2010-04-02 Kyocera Corp Multi-piece wiring board
JPWO2016121491A1 (en) * 2015-01-30 2017-10-05 株式会社村田製作所 Electronic circuit module

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