JP2007234660A - Wiring board, and production process of wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To enhance connection reliability of a mounting pad where a semiconductor device (IC chip) is solder mounted in a wiring board. <P>SOLUTION: The wiring board comprises an insulating substrate 2, an electrode 3 formed on the insulating substrate 2, a first Ni layer 4 formed on the surface of the electrode 3, an Ni oxide layer 5 formed on the first Ni layer 4, and an Au layer 7 formed on the Ni oxide layer 5 and to which a solder bump containing Sn is bonded. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a wiring board used for a tester or the like for measuring electrical characteristics of a semiconductor integrated circuit device, and a method for manufacturing the wiring board.

  In recent years, electronic devices equipped with semiconductor integrated circuit devices (hereinafter referred to as “semiconductor devices”) have been dramatically reduced in size, price, and speed, and microprocessors having a clock speed exceeding 100 MHz have already been developed. ing. Along with this, there is an increasing demand for downsizing, cost reduction, and speeding up of semiconductor devices. Due to the demand for miniaturization of electronic equipment, the method of mounting a semiconductor device on a package is used, and a method of mounting directly on a circuit board while being cut out from a semiconductor wafer is being widely used. An increasing number of testers measure properties.

  In addition, the tester is required to increase the speed due to the higher speed of the semiconductor device. In addition to increasing the density of the semiconductor device (IC chip) used for this, not only the wiring board on which the semiconductor device (IC chip) is mounted. However, there is a demand for higher integration. Therefore, not only fine pattern processing is required for the wiring board, but also advanced mounting technology is required for connection to the semiconductor device.

In the mounting pad portion of such a wiring board, a Ni layer and an Au layer are formed on the electrodes. (For example, refer to Patent Document 1 below).
JP 2004-281914 A JP 2000-323609

  However, in the mounting pad portion of the conventional wiring board, when LSI or the like is mounted on the board by solder, the Au layer on the surface layer is not eroded by the solder, and Sn in the solder diffuses into the underlying Ni layer. Since Ni becomes brittle, the bonding strength between the electrode and the Ni layer may be reduced.

  Therefore, the present invention has been completed in view of the above-described conventional problems, and its purpose is to improve the connection reliability of the mounting pad portion when the semiconductor device (IC chip) is solder-mounted on the wiring board. There is to make it.

  The wiring board of the present invention includes an insulating base, an electrode formed on the insulating base, a first Ni layer formed on the surface of the electrode, and an Ni oxide formed on the first Ni layer. It comprises a physical layer and an Au layer formed on the Ni oxide layer and to which a solder bump containing Sn is bonded.

  The wiring board manufacturing method of the present invention includes a step of forming an electrode on an insulating substrate, a step of forming a first Ni layer on the surface of the electrode, and the first Ni layer on the insulating substrate. Forming a resin layer covering the surface, forming a through hole in the resin layer so as to expose the surface of the first Ni layer, and forming a Ni oxide layer on the surface of the first Ni layer. And a step of performing laser processing.

  When the wiring board of the present invention includes the Ni oxide layer formed on the first Ni layer, the Au layer is not eroded by the solder when the IC chip is mounted by solder. However, since the diffusion of Sn is prevented by the Ni oxide layer on the surface of the first Ni layer 4, the first Ni layer 4 and the electrode 3 are not affected. Can be obtained.

  Moreover, the Ni oxide layer is formed on the first Ni layer 4 by performing laser processing on the surface of the first Ni layer 4 to form a Ni oxide layer that is a Sn diffusion preventing layer. Since it is formed only on the very surface, Ni in the first Ni layer 4 is prevented from diffusing into the underlying electrode 3, and the electrode 3 does not become a conductor having a high conduction resistance value, so that signal propagation is possible. This is a method for manufacturing a wiring board in which the speed does not deteriorate.

  A wiring board of the present invention used for a tester for measuring various electrical characteristics of a semiconductor integrated circuit device will be described below with reference to the drawings. FIG. 1 is a schematic cross-sectional view showing an example of an embodiment of a wiring board according to the present invention.

  The wiring board 1 of the present invention is formed on the insulating base 2, the electrode 3 formed on the insulating base 2, the first Ni layer 4 formed on the surface of the electrode 3, and the first Ni layer 4. And an Au layer 7 formed on the Ni oxide layer 5.

  The wiring board 1 shown in FIG. 1 includes a second Ni layer 6 formed between the Ni oxide layer 5 and the Au layer 7. Further, the conductor layer 8, the first insulating resin layer 9, and the second insulating resin layer 10 are laminated on the insulating base 2, and the electrode 3 and the conductor layer 8 are the first insulating resin. They are connected by through conductors 11 provided in the layers.

The insulating base 2 is made of ceramics such as an aluminum oxide (Al ₂ O ₃ ) sintered body and glass ceramics, which are materials having a thermal expansion coefficient close to that of a silicon wafer and excellent in insulating properties.

  The thickness of the conductor layer 8 is preferably 100 to 2,000 angstroms. If it is less than 100 angstroms, it tends to be difficult to firmly adhere to the underlying insulating substrate 2. If it exceeds 2,000 angstroms, peeling occurs due to stress inside the conductor layer 8 when the conductor layer 8 is formed. It becomes easy.

  The Ni oxide layer 5 reduces the diffusion of Sn contained in the solder joined to the Au layer 7 into the first Ni layer 4 formed on the electrode 3. In other words, the Ni oxide layer 5 functions as a Sn diffusion barrier with respect to the first Ni layer 4.

The conductor layer 8 is preferably made of a metal having good adhesion to the insulating substrate 2, and Ti, Cr, tantalum (Ta), niobium (Nb), Ni—Cr alloy, Ta ₂ N, or the like is used.

  Moreover, although various metals can be used for the through-hole 11 and the electrode 3 formed in the through-hole and the surface of the 1st insulating resin layer 9, Preferably a Cr-Cu alloy is good. This is because a thin film having excellent adhesion and denseness can be formed relatively easily on the first insulating resin layer 9. In addition, Cr is made of an organic insulating resin, and the physical characteristics of the resin insulating layer are impaired by the diffusion of Cu that easily reacts with the first insulating resin layer 9 into the first insulating resin layer 9. It serves to prevent. Further, the thickness of Cr is preferably 0.05 μm to 0.1 μm. If the thickness is less than 0.05 μm, it is difficult to sufficiently achieve the function of preventing Cu diffusion. On the other hand, if the thickness exceeds 0.1 μm, sputtering takes time and cost, which is not preferable.

  Here, the manufacturing method of the wiring board of this invention is demonstrated.

  The insulating base 2 is manufactured by the following method. For example, when it is formed of an aluminum oxide sintered body, a suitable organic solvent and solvent are added to the raw material powder of aluminum oxide, silicon oxide, magnesium oxide, and calcium oxide to form a mud and then a doctor blade. A ceramic green sheet is formed by a method or the like, and cut into a plurality of ceramic green sheets to be the insulating base 2. When a through conductor is required for the insulating substrate 2, a hole is formed by appropriate punching at a predetermined position where the through conductor of the ceramic green sheet is formed.

  Next, a metal paste comprising a metal powder having a high melting point such as tungsten (W), molybdenum (Mo), molybdenum-manganese (Mo-Mn) alloy, or an appropriate resin binder is prepared, and a predetermined paste is obtained by a screen printing method or the like. A metal paste layer serving as an inner conductor layer is formed to a thickness of 10 to 15 μm at a predetermined position of the ceramic green sheet, and a metal paste is filled in a hole where a through conductor is formed. Finally, these ceramic green sheets are stacked, fired at a high temperature, and divided into predetermined shapes.

  A conductor layer 8 is formed on the surface of the insulating substrate 2 as shown in FIG. The conductor layer 8 is made of, for example, a chromium (Cr) -Cu alloy layer or a titanium (Ti) -Cu alloy layer, and is formed by a thin film forming method such as a vapor deposition method, a sputtering method, or an ion plating method, The wiring conductor having a predetermined shape is processed by lithography or etching.

  As shown in FIG. 2B, a first insulating resin layer 9 is formed on the conductor layer 8.

  As shown in FIG. 2C, a through-hole is formed in the first insulating resin layer 9 by laser processing technology in the first insulating resin layer 9.

  As shown in FIG. 3A, a metal layer such as a Cr—Cu alloy layer is formed on the upper surface of the first insulating resin layer 9 and the inner surface of the through hole by a sputtering method or the like, and a photolithography method or an etching method. A conductor layer or electrode 3 having a predetermined shape is formed by, for example.

  As shown in FIG. 3B, a first Ni layer 4 is formed on the electrode 3 by electrolytic plating.

  As shown in FIG. 3C, a second resin insulating layer 10 is formed on the first insulating resin layer 9.

  As shown in FIG. 4A, an opening is formed in the second resin insulating layer 10 on the first Ni layer 4 by a laser processing technique. At that time, a Ni oxide layer 5 serving as a Sn diffusion preventing layer is formed on the surface of the first Ni layer 4 by the heat of the laser.

  As shown in FIGS. 4B and 4C, the second Ni layer 6 and the Au layer 7 are formed in the opening of the second resin insulating layer 10 by electrolytic plating.

  In this manner, the insulating base, the electrode formed on the insulating base, the first Ni layer 4 formed on the surface of the electrode, and the Sn diffusion preventing layer 12 are formed on the first Ni layer 4. Therefore, when the IC chip is mounted with solder, the Au layer 7 on the second Ni layer 6 is eroded by the solder and disappears, and Sn in the solder diffuses with the second Ni layer 6. Even if the brittle layer is changed, Sn diffusion is stopped by the Sn diffusion prevention layer 12 formed by the Ni oxide layer on the surface of the first Ni layer 4, and the first Ni layer 4 and the electrode 3 are affected. Since there is no influence, a wiring board having good mountability can be obtained.

  Further, the Ni oxide layer 5 is formed by performing laser processing on the surface of the first Ni layer 4 by forming a Ni oxide layer 5 that is a Sn diffusion preventing layer. 4 is formed only on the top surface, it prevents Ni of the first Ni layer 4 from diffusing into the underlying electrode 3, and the electrode 3 does not become a conductor having a high conduction resistance value. This is a method for manufacturing a wiring board in which the propagation speed of the wiring does not deteriorate.

It is sectional drawing which shows an example of embodiment of the wiring board of this invention. It is process drawing which shows the manufacturing method of the wiring board of this invention. It is process drawing which shows the manufacturing method of the wiring board of this invention. It is process drawing which shows the manufacturing method of the wiring board of this invention.

Explanation of symbols

1: Wiring board 2: Insulating substrate 3: Electrode 4: First Ni layer 5: Ni oxide layer 6: Second Ni layer 7: Au layer 8: Conductor layer 9: First insulating resin layer
10: Second insulating resin layer
11: Through conductor

Claims (4)

An insulating base, an electrode formed on the insulating base, a first Ni layer formed on the surface of the electrode, a Ni oxide layer formed on the first Ni layer, and the Ni oxide A wiring board comprising: an Au layer formed on a physical layer and to which a solder bump containing Sn is bonded. The wiring board according to claim 1, further comprising a second Ni layer formed between the Ni oxide layer and the Au layer. Forming an electrode on an insulating substrate; forming a first Ni layer on the surface of the electrode; forming a resin layer covering the first Ni layer on the insulating substrate; Forming a through hole in the resin layer so as to expose the surface of the first Ni layer, and forming a Ni oxide layer on the surface of the first Ni layer, and performing a laser processing. A method of manufacturing a wiring board. A step of forming a second Ni layer covering the Ni oxide layer in the through-hole of the resin layer; and a step of forming an Au layer on the surface of the second Ni layer. A method for manufacturing a wiring board according to claim 3.

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