WO2021066475A1 - Substrate for semiconductor light emitting device and semiconductor light emitting device using same - Google Patents

Substrate for semiconductor light emitting device and semiconductor light emitting device using same Download PDF

Info

Publication number
WO2021066475A1
WO2021066475A1 PCT/KR2020/013259 KR2020013259W WO2021066475A1 WO 2021066475 A1 WO2021066475 A1 WO 2021066475A1 KR 2020013259 W KR2020013259 W KR 2020013259W WO 2021066475 A1 WO2021066475 A1 WO 2021066475A1
Authority
WO
WIPO (PCT)
Prior art keywords
emitting device
light emitting
semiconductor light
substrate
electrode
Prior art date
Application number
PCT/KR2020/013259
Other languages
French (fr)
Korean (ko)
Inventor
정겨울
김경민
Original Assignee
주식회사 세미콘라이트
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 세미콘라이트 filed Critical 주식회사 세미콘라이트
Publication of WO2021066475A1 publication Critical patent/WO2021066475A1/en

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Definitions

  • the present disclosure relates to a semiconductor light emitting device substrate and a semiconductor light emitting device using the same (SUBSTRATE FOR SEMICONDUCTOR LIGHT EMITTING DEVICE AND SEMICONDUCTOR LIGHT EMITTING DEVICE USING THE SAME), and in particular, a substrate for a semiconductor light emitting device that does not require a solder resist and It relates to a semiconductor light emitting device using this.
  • FIG. 1 is a view showing an example of a semiconductor light emitting device disclosed in Korean Patent Publication No. 10-1722117. For convenience of explanation, reference numerals have been changed.
  • the semiconductor light emitting device includes a substrate 10, a pattern 30, a first cavity 31, and a semiconductor light emitting device chip 20.
  • the substrate 10 includes a first conductive portion 11, a second conductive portion 12, and an oxide film 13 disposed between the first conductive portion 11 and the second conductive portion 12.
  • the aluminum (AL) has poor contact force with the solder (a), so that the solder (a) is formed on the aluminum (AL).
  • the electrode layer 40 may be formed under the first conductive part 11 and the second conductive part 12 to increase adhesion.
  • solder (a) is formed on the electrode layer 40 of the first conductive part 11 and the second conductive part 12. At this time, since the solder (a) formed on the electrode layer (40) and the solder (a) melted and spread during reflow, a short circuit may occur, so that a solder resist (b) is formed between the solder (a) and the solder (a). Can be used to prevent short circuit.
  • FIGS. 2 to 3 are views showing an example of a method of forming a conventional solder resist pattern disclosed in Korean Patent Publication No. 10-0688707. For convenience of explanation, reference numerals have been changed.
  • FIG. 2 is a diagram illustrating a process of forming a pattern
  • FIG. 3 is a diagram illustrating a substrate on which a pattern is formed.
  • the solder resist 60 is applied using the squeeze 51.
  • a squeeze 51, a plate-making 52, and a jig 53 are required to apply the solder resist 60 by the screen printing method, and the plate-making 52 and the jig 53 are holes ( It is manufactured according to the hole 63 or the design to fill the 63).
  • the screen printing method in the process of printing the solder resist 60 on the substrate 70, the ink 80 is placed on the plate-making 52, the substrate 70 is mounted on the jig 53, and then the squeeze 51 is applied. Apply pressure to move back and forth to print. Thereafter, the solder resist 60 is applied to the back side of the substrate 100 with a squeeze 51.
  • solder resist 60 is applied to the substrate 70 of FIG. 3 to expose the copper foil 57 or the plating layer 55 formed on the insulating layer 58.
  • Solder (not shown) may be provided to be electrically connected to the copper foil 57 or the plating layer 55. The solder is surrounded by the wall formed by the solder resist 60 so that it does not spread out of the solder resist 60.
  • the solder resist 60 is formed, and it takes a long time to process the solder resist 60.
  • various tools such as a squeeze 51, a jig 53, and a plate-making 52 are required.
  • a substrate for a semiconductor light emitting device comprising: a plate on which a conducting wire is formed; An electrode electrically connected to the conducting wire and formed on the plate; An oxide film formed over the electrode;
  • a substrate for a semiconductor light emitting device including an adhesive formed on the oxide film is provided.
  • a semiconductor light emitting device in a semiconductor light emitting device, the substrate according to any one of claims 1 to 9;
  • a semiconductor light emitting device including a pad, wherein the pad is a semiconductor light emitting device chip in contact with the adhesive is provided.
  • FIG. 1 is a view showing an example of a semiconductor light emitting device disclosed in Korean Patent Publication No. 10-1722117;
  • FIGS. 2 to 3 are views showing an example of a method of forming a conventional solder resist pattern disclosed in Korean Patent Publication No. 10-0688707;
  • FIG. 4 is a view showing an example of a substrate according to the present disclosure.
  • FIG. 5 is a view showing an example of a semiconductor light emitting device using a substrate according to the present disclosure
  • FIG. 6 to 7 are views showing an example of a substrate according to the present disclosure and a method of manufacturing a semiconductor light emitting device using the same;
  • FIG 8 is a view showing another example of a semiconductor light emitting device using a substrate according to the present disclosure.
  • FIG. 4 is a diagram illustrating an example of a substrate according to the present disclosure.
  • the substrate 100 includes a plate 110, an electrode 120, an oxide film 130, an adhesive 140, and an adhesion layer 150.
  • a conducting wire 111 may be formed on the plate 110. Between the plate 110 and the conducting wire 111 may be electrically insulated.
  • the plate 110 may be formed of an insulator, and the plate 110 may be applied with a metal substrate as shown in FIG. 1. Alternatively, an insulating material may be provided between the plate 110 and the conducting wire 111.
  • the conducting wire 111 may be formed through the plate 110 or may be formed on the plate 110. The position of the conducting wire 111 is not limited as long as it is insulated from the plate 110.
  • the conducting wire 111 may be formed to be connected to the outside.
  • the plate 110 can be applied to any plate distributed on the market.
  • the electrode 120 is provided on the plate 110, and the electrode 120 may be made of aluminum.
  • the electrode 120 may be electrically connected to the conducting wire 111.
  • the oxide film 130 is formed on the electrode 120 and may be a material in which the electrode 120 is oxidized.
  • the oxide layer 130 may be aluminum oxide. It is preferable that the thickness of the oxide film 130 is 10 to 200 ⁇ . This is because, when the thickness of the oxide layer 130 exceeds 200 ⁇ , it is difficult for a current to flow through the oxide layer 130, so that the resistance increases and the voltage also increases.
  • the oxide layer 130 may be formed to surround the electrode 120. It is preferable that the oxide film 130 is naturally oxidized by air. The naturally oxidized oxide layer 130 may uniformly form a minimum oxide layer without the need for an additional process. Accordingly, the oxide film 130 may be formed on the entire conductive line 111 and the electrode 120.
  • the oxide film 130 may be formed at a constant height from the electrode 120 and the conductive wire 111. Therefore, when the electrode 120 and the conducting wire 111 are formed to have a constant height, the oxide film 130 is also formed to have a constant height, so that the electrode 120 and the conducting wire 111 may have the same height.
  • the oxide film is provided between the electrode and the adhesive, it is possible to block contact between the electrode and the adhesive, and block direct electrical connection between the electrode and the adhesive.
  • the adhesive 140 is provided on the oxide film 130.
  • the adhesive 140 may be a SAC (Sn-Ag-Cu) alloy, AgSn, AuSn, or the like.
  • the adhesive 140 is formed on the oxide film 130 having a constant height from the electrode 120 and the conductive wire 111.
  • the adhesion layer 150 is provided between the adhesive 140 and the oxide film 130, and the adhesive 140 may be in close contact with the oxide film 130.
  • the adhesion layer 150 may include Cr, Ti, Ni, or the like.
  • the adhesion layer 150 may vary depending on the material of the oxide layer 130. If the adhesive 140 is placed on the oxide film 130 without the adhesion layer 150, the adhesive 140 may be easily separated from the oxide film 130.
  • FIG. 5 is a diagram illustrating an example of a semiconductor light emitting device using a substrate according to the present disclosure.
  • the semiconductor light emitting device 200 includes a substrate 100 and a semiconductor light emitting device chip 210.
  • the substrate 100 may be the substrate 100 described in FIG. 4.
  • the semiconductor light emitting device chip 210 may be a flip chip, a lateral chip, or a vertical chip.
  • the semiconductor light emitting device chip 210 includes a pad 220.
  • the size of the semiconductor light emitting device chip 210 may be less than 300 ⁇ m.
  • the semiconductor light emitting device chip 210 is preferably a mini LED or a micro LED. In the case of a mini LED, it is common to have a size of less than 300um, and in the case of a micro LED, it is generally a size of less than 100um.
  • a mini LED of less than 300um or a micro LED of less than 100um has a driving current of less than 50mA. Considering the voltage increase due to the resistance of the oxide layer 130, there is no problem because a small amount increases in the case of a low current, but the higher the voltage is applied, the higher the voltage increase is, making it difficult to configure the module.
  • FIG. 5 illustrates one semiconductor light emitting device chip 210, but may be applied to a plurality of semiconductor light emitting device chips 210.
  • the conducting wire 111 may be provided between the plurality of semiconductor light emitting device chips 210.
  • the electrode 120 in FIG. 5 is shown higher than the height of the conductive wire 111, when the electrode 120 and the conductive wire 111 are formed in the same process, the electrode 120 and the conductive wire 111 have the same height. Can be formed.
  • the oxide film 130 is formed only on the electrode 120, but the oxide film 130 may also be formed on the conducting wire 111.
  • an encapsulant for covering the plate 110 and the semiconductor light emitting device chip 210 may be provided on the substrate 100.
  • 6 to 7 are views showing an example of a method of manufacturing a substrate and a semiconductor light emitting device using the same according to the present disclosure.
  • a plate 110 provided with a conducting wire 111 (see FIG. 5) is prepared.
  • the conducting wire 111 is omitted in the drawing.
  • the electrode 120 may be formed to be electrically connected to the conductive wire 111.
  • the electrode 120 may be deposited.
  • An oxide film 130 is formed on the electrode 120 as shown in FIG. 6C.
  • the oxide film 130 may be formed on the conductive wire 111 as well. A part of the deposited electrode 120 may naturally become the oxide film 130.
  • an adhesion layer 150 is formed on the oxide film 130.
  • An adhesive 140 is provided on the adhesion layer 150 as shown in FIG. 7(b).
  • the adhesive 140 may be deposited on the adhesion layer 150.
  • the adhesive 140 is melted by heat.
  • the melted adhesive 140 may be formed to be wider than the first deposited area in FIG. 7(b), but it does not spread wide enough to flow into other electrodes. Since the melted adhesive 140 does not spread by heat, it does not short-circuit between the narrow electrodes 120, and thus, a solder resistor generally formed between the electrodes 120 is not required to prevent a short circuit. This is because the adhesive 140 does not react with the oxide layer 130.
  • the oxide film 130 does not react with the adhesive 140, so it cannot be combined with the adhesive layer 150 again. I can.
  • FIG. 8 is a diagram illustrating another example of a semiconductor light emitting device according to the present disclosure.
  • the semiconductor light emitting device 200 may include a plurality of semiconductor light emitting device chips 210.
  • the substrate 100 may include a plurality of electrodes 120 to correspond to the plurality of semiconductor light emitting device chips 210.
  • the plurality of semiconductor light emitting device chips 210 may be a first semiconductor light emitting device chip 211, a second semiconductor light emitting device chip 212, and a third semiconductor light emitting device chip 213.
  • the first semiconductor light emitting device chip 211 may emit red light
  • the second semiconductor light emitting device chip 212 may emit green light
  • the third semiconductor light emitting device chip 213 may emit blue light.
  • the first semiconductor light emitting device chip 211 includes a first pad 211-1 and a second pad 211-2
  • the second semiconductor light emitting device chip 212 includes a first pad 212-1 and A second pad 212-2 is included
  • the third semiconductor light emitting device chip 213 includes a first pad 213-1 and a second pad 213-2.
  • the substrate 100 includes a plurality of electrodes 120, and the plurality of electrodes 120 includes a first electrode 121, a second electrode 122, a third electrode 123, a fourth electrode 124, It may be a fifth electrode 125 and a sixth electrode 126.
  • the first electrode 121, the third electrode 123, the fifth electrode 125 and the second electrode 122, the fourth electrode 124, and the sixth electrode 126 may be formed to have different conductivity. I can.
  • the first semiconductor light emitting device chip 211 is electrically connected to the first electrode 121 and the second electrode 122, and the first pad 211-1 and the second electrode of the first semiconductor light emitting device chip 211
  • the pad 211-2 may be electrically connected to the first electrode 121 and the second electrode 122.
  • the second semiconductor light emitting device chip 212 is electrically connected to the third electrode 123 and the fourth electrode 124, and The pad 212-2 may be electrically connected to the third electrode 123 and the fourth electrode 124.
  • the third semiconductor light emitting device chip 213 is electrically connected to the fifth electrode 125 and the sixth electrode 126, and the first pad 213-1 and the second pad 213-1 of the third semiconductor light emitting device chip 213
  • the pad 213-2 may be electrically connected to the fifth electrode 125 and the sixth electrode 126.
  • a substrate comprising: a plate on which a conductive wire is formed; An electrode electrically connected to the conducting wire and formed on the plate; An oxide film formed over the electrode; And, an adhesive formed on the oxide film; a plate for a semiconductor light emitting device comprising a.
  • the oxide film is a substrate for a semiconductor light emitting device, which is a natural oxide of an electrode.
  • the electrode is a substrate for a semiconductor light emitting device formed of aluminum.
  • the adhesive is a substrate for a semiconductor light emitting device of SAC (Sn-Ag-Cu).
  • a substrate for a semiconductor light emitting device provided with an adhesion layer between the oxide film and the adhesive.
  • the adhesion layer is a substrate for a semiconductor light emitting device containing at least one or more of Cr, Ti, and Ni.
  • the oxide film is a substrate for a semiconductor light emitting device formed over the entire conductive line and the electrode.
  • the oxide film is a substrate for a semiconductor light emitting device that blocks between the electrode and the adhesive.
  • a semiconductor light emitting device comprising: the substrate according to any one of claims 1 to 9; And a semiconductor light emitting device chip comprising a pad, the pad being in contact with the adhesive.
  • a semiconductor light emitting device chip is a semiconductor light emitting device having a size of less than 300um.
  • a chip is a semiconductor light-emitting device that can be driven under 50mA.
  • the adhesive formed on the oxide film does not spread around more than before being reflowed.
  • an adhesive agent is provided between the adhesive and the oxide film to help prevent the adhesive from falling off from the oxide film.
  • a semiconductor light emitting device chip having a low driving voltage or a driving current connected over the oxide film can drive the semiconductor light emitting device chip even when a low current flows.

Abstract

The present disclosure relates to a substrate for a semiconductor light emitting device and a semiconductor light emitting device using same, the substrate comprising: a plate on which a conducting wire is formed; an electrode electrically connected to the conducting wire and formed on the plate; an oxide film formed on the electrode; and an adhesive formed on the oxide film.

Description

반도체 발광소자용 기판 및 이를 이용한 반도체 발광소자Substrate for semiconductor light emitting device and semiconductor light emitting device using the same
본 개시(Disclosure)는 전체적으로 반도체 발광소자용 기판 및 이를 이용한 반도체 발광소자(SUBSTRATE FOR SEMICONDUCTOR LIGHT EMITTING DEVICE AND SEMICONDUCTOR LIGHT EMITTING DEVICE USING THE SAME}에 관한 것으로, 특히 솔더 레지스트가 필요없는 반도체 발광소자용 기판 및 이를 이용한 반도체 발광소자에 관한 것이다.The present disclosure (Disclosure) relates to a semiconductor light emitting device substrate and a semiconductor light emitting device using the same (SUBSTRATE FOR SEMICONDUCTOR LIGHT EMITTING DEVICE AND SEMICONDUCTOR LIGHT EMITTING DEVICE USING THE SAME), and in particular, a substrate for a semiconductor light emitting device that does not require a solder resist and It relates to a semiconductor light emitting device using this.
여기서는, 본 개시에 관한 배경기술이 제공되며, 이들이 반드시 공지기술을 의미하는 것은 아니다(This section provides background information related to the present disclosure which is not necessarily prior art).Here, a background technology related to the present disclosure is provided, and these do not necessarily mean a known technology (This section provides background information related to the present disclosure which is not necessarily prior art).
도 1은 한국 등록특허공보 제10-1722117호에 개시된 반도체 발광소자의 일 예를 나타내는 도면이다. 설명의 편의를 위해 도면 부호를 변경하였다.1 is a view showing an example of a semiconductor light emitting device disclosed in Korean Patent Publication No. 10-1722117. For convenience of explanation, reference numerals have been changed.
반도체 발광소자는 기판(10), 패턴(30), 제1 캐비티(31) 및 반도체 발광소자 칩(20)을 포함한다. 기판(10)은 제1 도전부(11), 제2 도전부(12), 제1 도전부(11)와 제2 도전부(12) 사이에 있는 산화막(13)을 포함한다. 알루미늄(AL)으로 형성된 제1 도전부(11)와 제2 도전부(12)를 가질 때, 알루미늄(AL)은 솔더(a)와 접촉력이 좋지 않아서 솔더(a)를 알루미늄(AL)에 형성할 수 없다. 접착력을 높이기 위해서 제1 도전부(11)와 제2 도전부(12) 하부에 전극층(40)이 형성될 수 있다. The semiconductor light emitting device includes a substrate 10, a pattern 30, a first cavity 31, and a semiconductor light emitting device chip 20. The substrate 10 includes a first conductive portion 11, a second conductive portion 12, and an oxide film 13 disposed between the first conductive portion 11 and the second conductive portion 12. When having the first conductive part 11 and the second conductive part 12 formed of aluminum (AL), the aluminum (AL) has poor contact force with the solder (a), so that the solder (a) is formed on the aluminum (AL). Can not. The electrode layer 40 may be formed under the first conductive part 11 and the second conductive part 12 to increase adhesion.
일반적으로 반도체 발광소자를 외부에 연결할 때, 솔더(a)를 제1 도전부(11)와 제2 도전부(12)의 전극층(40) 위에 형성한다. 이때, 전극층(40) 위에 형성된 솔더(a)와 솔더(a)가 리플로우시 녹으면서 퍼져 닿으면 쇼트가 될 수 있기 때문에, 솔더(a)와 솔더(a) 사이에 솔더 레지스트(b)를 사용하여 쇼트를 방지할 수 있다. In general, when connecting the semiconductor light emitting device to the outside, solder (a) is formed on the electrode layer 40 of the first conductive part 11 and the second conductive part 12. At this time, since the solder (a) formed on the electrode layer (40) and the solder (a) melted and spread during reflow, a short circuit may occur, so that a solder resist (b) is formed between the solder (a) and the solder (a). Can be used to prevent short circuit.
도 2 내지 도 3은 한국 등록특허공보 제10-0688707호에 개시된 종래의 솔더 레지스트 패턴 형성 방법의 일 예를 나타낸 도면이다. 설명의 편의를 위해 도면 부호를 변경하였다.2 to 3 are views showing an example of a method of forming a conventional solder resist pattern disclosed in Korean Patent Publication No. 10-0688707. For convenience of explanation, reference numerals have been changed.
도 2는 패턴 형성 방법 중 하나의 과정을 나타낸 도면이고, 도 3은 패턴이 형성된 기판을 나타내는 도면이다.FIG. 2 is a diagram illustrating a process of forming a pattern, and FIG. 3 is a diagram illustrating a substrate on which a pattern is formed.
스퀴즈(51)를 이용하여 솔더 레지스트(60)를 도포한다. 도 2에 도시된 바와 같이 스크린 인쇄법으로 솔더 레지스트(60)를 도포 하는데는 스퀴즈(51), 제판(52), 지그(53)가 필요하며, 제판(52)과 지그(53)는 홀(63)을 충진하기 위하여 홀(63)이나 디자인에 맞추어 제작된다. 스크린 인쇄법에 의하면 솔더 레지스트(60)를 기판(70)에 인쇄하는 과정은 잉크(80)를 제판(52)위에 올려놓고 지그(53)위에 기판(70)을 안착시킨 후 스퀴즈(51)에 압력을 가하여 앞뒤로 움직이며 인쇄를 진행한다. 이후, 기판(100)의 뒷면에도 스퀴즈(51)로 솔더 레지스트(60)를 도포한다. 이후, 솔더 레지스트(60)가 도포된 기판(70)을 건조한다. 이후, 솔더 레지스트(60)의 패턴 부분에 대응하는 솔더 레지스트(60)를 경화하고, 경화되지 않은 부분은 제거한다. 도 3의 기판(70)에는 솔더 레지스트(60)가 제거되어 절연층(58)에 형성된 동박(57) 또는 도금층(55)이 노출된다. 동박(57) 또는 도금층(55)과 전기적으로 연결되도록 솔더(미도시)가 구비될 수 있다. 솔더는 솔더 레지스트(60)에 의해 형성된 벽에 둘러싸여 솔더 레지스트(60)를 벗어나 퍼지지 않도록 한다.The solder resist 60 is applied using the squeeze 51. As shown in FIG. 2, a squeeze 51, a plate-making 52, and a jig 53 are required to apply the solder resist 60 by the screen printing method, and the plate-making 52 and the jig 53 are holes ( It is manufactured according to the hole 63 or the design to fill the 63). According to the screen printing method, in the process of printing the solder resist 60 on the substrate 70, the ink 80 is placed on the plate-making 52, the substrate 70 is mounted on the jig 53, and then the squeeze 51 is applied. Apply pressure to move back and forth to print. Thereafter, the solder resist 60 is applied to the back side of the substrate 100 with a squeeze 51. Thereafter, the substrate 70 to which the solder resist 60 is applied is dried. Thereafter, the solder resist 60 corresponding to the pattern portion of the solder resist 60 is cured, and the uncured portion is removed. The solder resist 60 is removed from the substrate 70 of FIG. 3 to expose the copper foil 57 or the plating layer 55 formed on the insulating layer 58. Solder (not shown) may be provided to be electrically connected to the copper foil 57 or the plating layer 55. The solder is surrounded by the wall formed by the solder resist 60 so that it does not spread out of the solder resist 60.
리플로우시 퍼지는 솔더를 방지하기 위해 솔더 레지스트(60)를 형성하는데, 솔더 레지스트(60)의 공정에 장시간이 소요된다. 또한, 솔더 레지스트(60)를 형성하는데 스퀴즈(51), 지그(53), 제판(52) 등의 여러 가지의 공구가 필요한 문제점이 있다.To prevent solder spreading during reflow, the solder resist 60 is formed, and it takes a long time to process the solder resist 60. In addition, to form the solder resist 60, there is a problem that various tools such as a squeeze 51, a jig 53, and a plate-making 52 are required.
이에 대하여 '발명의 실시를 위한 구체적인 내용'의 후단에 기술한다.This will be described later in the'Specific Contents for Implementation of the Invention'.
여기서는, 본 개시의 전체적인 요약(Summary)이 제공되며, 이것이 본 개시의 외연을 제한하는 것으로 이해되어서는 아니된다(This section provides a general summary of the disclosure and is not a comprehensive disclosure of its full scope or all of its features).Here, a summary of the present disclosure is provided, and this section provides a general summary of the disclosure and is not a comprehensive disclosure of its full scope or all of its features).
본 개시에 따른 일 측면에 의하면(According to one aspect of the present disclosure), 반도체 발광소자용 기판에 있어서, 도선이 형성된 판; 도선과 전기적으로 연결되어 판 위에 형성되는 전극; 전극 위에 형성된 산화막; 그리고, 산화막 위에 형성되는 접착제;를 포함하는 반도체 발광소자용 기판이 제공된다.According to an aspect according to the present disclosure, there is provided a substrate for a semiconductor light emitting device, comprising: a plate on which a conducting wire is formed; An electrode electrically connected to the conducting wire and formed on the plate; An oxide film formed over the electrode; In addition, a substrate for a semiconductor light emitting device including an adhesive formed on the oxide film is provided.
본 개시에 따른 다른 측면에 의하면(According to other aspect of the present disclosure), 반도체 발광소자에 있어서, 청구항 1항 내지 9항 중 하나에 기재된 기판; 그리고, 패드를 포함하며, 패드는 접착제에 접촉하는 반도체 발광소자 칩;을 포함하는 반도체 발광소자가 제공된다.According to another aspect of the present disclosure (According to other aspect of the present disclosure), in a semiconductor light emitting device, the substrate according to any one of claims 1 to 9; In addition, a semiconductor light emitting device including a pad, wherein the pad is a semiconductor light emitting device chip in contact with the adhesive is provided.
이에 대하여 '발명의 실시를 위한 구체적인 내용'의 후단에 기술한다.This will be described later in the'Specific Contents for Implementation of the Invention'.
도 1은 한국 등록특허공보 제10-1722117호에 개시된 반도체 발광소자의 일 예를 나타내는 도면,1 is a view showing an example of a semiconductor light emitting device disclosed in Korean Patent Publication No. 10-1722117;
도 2 내지 도 3은 한국 등록특허공보 제10-0688707호에 개시된 종래의 솔더 레지스트 패턴 형성 방법의 일 예를 나타낸 도면,2 to 3 are views showing an example of a method of forming a conventional solder resist pattern disclosed in Korean Patent Publication No. 10-0688707;
도 4는 본 개시에 따른 기판의 일 예를 나타내는 도면,4 is a view showing an example of a substrate according to the present disclosure;
도 5는 본 개시에 따른 기판을 이용한 반도체 발광소자의 일 예를 나타내는 도면,5 is a view showing an example of a semiconductor light emitting device using a substrate according to the present disclosure;
도 6 내지 도 7은 본 개시에 따른 기판 및 이를 이용한 반도체 발광소자를 제조하는 방법의 일 예를 나타낸 도면,6 to 7 are views showing an example of a substrate according to the present disclosure and a method of manufacturing a semiconductor light emitting device using the same;
도 8은 본 개시에 따른 기판을 이용한 반도체 발광소자의 다른 예를 나타내는 도면.8 is a view showing another example of a semiconductor light emitting device using a substrate according to the present disclosure.
이하, 본 개시를 첨부된 도면을 참고로 하여 자세하게 설명한다(The present disclosure will now be described in detail with reference to the accompanying drawing(s)). Hereinafter, the present disclosure will now be described in detail with reference to the accompanying drawing(s)).
도 4는 본 개시에 따른 기판의 일 예를 나타내는 도면이다.4 is a diagram illustrating an example of a substrate according to the present disclosure.
기판(100)은 판(110), 전극(120), 산화막(130), 접착제(140) 및 밀착층(150)을 포함한다.The substrate 100 includes a plate 110, an electrode 120, an oxide film 130, an adhesive 140, and an adhesion layer 150.
판(110)에는 도선(111)이 형성될 수 있다. 판(110)과 도선(111) 사이는 전기적으로 절연될 수 있다. 판(110)이 절연체로 형성될 수 있고, 판(110)은 도 1과 같은 금속 기판이 적용될 수 있다. 또는 판(110)과 도선(111) 사이에 절연물질이 구비될 수 있다. 도선(111)은 판(110)을 통과해서도 형성될 수 있고, 판(110)의 위에도 형성될 수도 있다. 도선(111)의 위치는 판(110)과 절연된다면 제한되지 않는다. 도선(111)은 외부와 연결되도록 형성될 수 있다. 판(110)은 시중에 유통되는 모든 판을 적용 가능하다.A conducting wire 111 may be formed on the plate 110. Between the plate 110 and the conducting wire 111 may be electrically insulated. The plate 110 may be formed of an insulator, and the plate 110 may be applied with a metal substrate as shown in FIG. 1. Alternatively, an insulating material may be provided between the plate 110 and the conducting wire 111. The conducting wire 111 may be formed through the plate 110 or may be formed on the plate 110. The position of the conducting wire 111 is not limited as long as it is insulated from the plate 110. The conducting wire 111 may be formed to be connected to the outside. The plate 110 can be applied to any plate distributed on the market.
전극(120)은 판(110) 위에 구비되며, 전극(120)은 알루미늄일 수 있다. 전극(120)은 도선(111)과 전기적으로 연결될 수 있다.The electrode 120 is provided on the plate 110, and the electrode 120 may be made of aluminum. The electrode 120 may be electrically connected to the conducting wire 111.
산화막(130)은 전극(120) 위에 형성되며, 전극(120)이 산화된 물질일 수 있다. 일 예로 산화막(130)은 알루미늄 산화물일 수 있다. 산화막(130)의 두께는 10~200Å인 것이 바람직하다. 왜냐하면, 산화막(130)의 두께가 200Å초과하는 경우, 산화막(130)을 통과해서 전류가 흐르기 어려워 저항이 상승하여 전압도 상승하기 때문이다. 미도시 되었지만 산화막(130)은 전극(120)을 둘러싸도록 형성될 수 있다. 산화막(130)은 공기에 의해 자연 산화되는 것이 바람직하다. 자연적으로 산화된 산화막(130)은 추가 공정이 필요 없이 최소한의 산화막을 균일하게 형성할 수 있다. 따라서, 산화막(130)은 도선(111)과 전극(120)의 전체에 형성될 수 있다. 산화막(130)은 전극(120) 및 도선(111)으로부터 일정한 높이로 형성될 수 있다. 따라서, 전극(120) 및 도선(111)이 일정한 높이로 형성되면, 산화막(130)도 일정한 높이로 형성되어 전극(120) 및 도선(111)은 같은 높이를 가질 수 있다. 산화막은 전극과 접착제 사이에 구비되어, 전극과 접착제가 접촉하는 것을 차단하고, 전극과 접착제가 직접적으로 전기적으로 연결되는 것을 차단할 수 있다.The oxide film 130 is formed on the electrode 120 and may be a material in which the electrode 120 is oxidized. For example, the oxide layer 130 may be aluminum oxide. It is preferable that the thickness of the oxide film 130 is 10 to 200 Å. This is because, when the thickness of the oxide layer 130 exceeds 200 Å, it is difficult for a current to flow through the oxide layer 130, so that the resistance increases and the voltage also increases. Although not shown, the oxide layer 130 may be formed to surround the electrode 120. It is preferable that the oxide film 130 is naturally oxidized by air. The naturally oxidized oxide layer 130 may uniformly form a minimum oxide layer without the need for an additional process. Accordingly, the oxide film 130 may be formed on the entire conductive line 111 and the electrode 120. The oxide film 130 may be formed at a constant height from the electrode 120 and the conductive wire 111. Therefore, when the electrode 120 and the conducting wire 111 are formed to have a constant height, the oxide film 130 is also formed to have a constant height, so that the electrode 120 and the conducting wire 111 may have the same height. The oxide film is provided between the electrode and the adhesive, it is possible to block contact between the electrode and the adhesive, and block direct electrical connection between the electrode and the adhesive.
접착제(140)는 산화막(130) 위에 구비된다. 예를 들어, 접착제(140)는 SAC(Sn-Ag-Cu) 합금, AgSn, AuSn 등 일 수 있다. 접착제(140)는 전극(120) 및 도선(111)으로부터 일정한 높이를 가지는 산화막(130) 위에 형성된다.The adhesive 140 is provided on the oxide film 130. For example, the adhesive 140 may be a SAC (Sn-Ag-Cu) alloy, AgSn, AuSn, or the like. The adhesive 140 is formed on the oxide film 130 having a constant height from the electrode 120 and the conductive wire 111.
밀착층(150)은 접착제(140)와 산화막(130) 사이에 구비되며, 산화막(130)에 접착제(140)가 밀착되도록 할 수 있다. 밀착층(150)은 Cr, Ti, Ni등 을 포함할 수 있다. 밀착층(150)은 산화막(130)의 소재에 따라서 달라질 수 있다. 밀착층(150) 없이 접착제(140)를 산화막(130) 위에 올리면 산화막(130)으로부터 접착제(140)가 쉽게 떨어질 수 있다. The adhesion layer 150 is provided between the adhesive 140 and the oxide film 130, and the adhesive 140 may be in close contact with the oxide film 130. The adhesion layer 150 may include Cr, Ti, Ni, or the like. The adhesion layer 150 may vary depending on the material of the oxide layer 130. If the adhesive 140 is placed on the oxide film 130 without the adhesion layer 150, the adhesive 140 may be easily separated from the oxide film 130.
도 5는 본 개시에 따른 기판을 이용한 반도체 발광소자의 일 예를 나타내는 도면이다.5 is a diagram illustrating an example of a semiconductor light emitting device using a substrate according to the present disclosure.
반도체 발광소자(200)는 기판(100) 및 반도체 발광소자 칩(210)을 포함한다.The semiconductor light emitting device 200 includes a substrate 100 and a semiconductor light emitting device chip 210.
기판(100)은 도 4에서 설명된 기판(100)일 수 있다.The substrate 100 may be the substrate 100 described in FIG. 4.
반도체 발광소자 칩(210)은 플립칩, 레터럴칩, 버티컬 칩 일 수 있다. 예를 들어, 플립칩 일 경우를 설명하자면, 반도체 발광소자 칩(210)은 패드(220)를 포함한다. 반도체 발광소자 칩(210)의 크기는 300um 미만일 수 있다. 반도체 발광소자 칩(210)은 미니 LED 또는 마이크로 LED인 것이 바람직하다. 미니 LED인 경우 300um 미만의 크기를 가지고, 마이크로 LED인 경우, 100um미만의 크기를 가지는 것이 일반적이다. 300um 미만의 미니 LED 또는 100um 미만의 마이크로 LED는 50mA이하의 구동전류를 가진다. 산화막(130)의 저항으로 인한 전압상승으로 볼 때, 저 전류의 경우 적은 양이 상승하여 문제가 없으나, 높은 전압을 적용할수록 전압 상승량이 높아 모듈을 구성하기 어렵다.The semiconductor light emitting device chip 210 may be a flip chip, a lateral chip, or a vertical chip. For example, in the case of a flip chip, the semiconductor light emitting device chip 210 includes a pad 220. The size of the semiconductor light emitting device chip 210 may be less than 300 μm. The semiconductor light emitting device chip 210 is preferably a mini LED or a micro LED. In the case of a mini LED, it is common to have a size of less than 300um, and in the case of a micro LED, it is generally a size of less than 100um. A mini LED of less than 300um or a micro LED of less than 100um has a driving current of less than 50mA. Considering the voltage increase due to the resistance of the oxide layer 130, there is no problem because a small amount increases in the case of a low current, but the higher the voltage is applied, the higher the voltage increase is, making it difficult to configure the module.
도 5는 하나의 반도체 발광소자 칩(210)에 대해 설명하였으나 복수의 반도체 발광소자 칩(210)에도 적용될 수 있다. 도선(111)은 복수의 반도체 발광소자 칩(210) 사이에 구비될 수도 있다.FIG. 5 illustrates one semiconductor light emitting device chip 210, but may be applied to a plurality of semiconductor light emitting device chips 210. The conducting wire 111 may be provided between the plurality of semiconductor light emitting device chips 210.
도 5의 전극(120)의 높이를 도선(111)의 높이보다 높게 도시하였으나, 전극(120)과 도선(111)이 같은 공정에서 형성될 때에는 전극(120)과 도선(111)이 같은 높이로 형성될 수 있다. 또한, 도 5에는 전극(120) 위에만 산화막(130)이 형성된 것으로 표현하였으나 산화막(130)은 도선(111)에도 형성될 수 있다.Although the height of the electrode 120 in FIG. 5 is shown higher than the height of the conductive wire 111, when the electrode 120 and the conductive wire 111 are formed in the same process, the electrode 120 and the conductive wire 111 have the same height. Can be formed. In addition, in FIG. 5, the oxide film 130 is formed only on the electrode 120, but the oxide film 130 may also be formed on the conducting wire 111.
도시하지 않았지만 기판(100) 위에는 판(110) 및 반도체 발광소자 칩(210)을 덮는 봉지재가 구비될 수도 있다. Although not shown, an encapsulant for covering the plate 110 and the semiconductor light emitting device chip 210 may be provided on the substrate 100.
도 6 내지 도 7은 본 개시에 따른 기판 및 이를 이용한 반도체 발광소자를 제조하는 방법의 일 예를 나타낸 도면이다.6 to 7 are views showing an example of a method of manufacturing a substrate and a semiconductor light emitting device using the same according to the present disclosure.
도 6(a)와 같이 도선(111;도 5 참조)이 구비된 판(110)을 준비한다. 도선(111)은 도면에서는 생략하였다.As shown in FIG. 6(a), a plate 110 provided with a conducting wire 111 (see FIG. 5) is prepared. The conducting wire 111 is omitted in the drawing.
도 6(b)와 같이 도선(111)과 전기적으로 연결되도록 전극(120)이 형성될 수 있다. 전극(120)은 증착될 수 있다.As shown in FIG. 6B, the electrode 120 may be formed to be electrically connected to the conductive wire 111. The electrode 120 may be deposited.
도 6(c)와 같이 전극(120)에 산화막(130)을 형성한다. 도선(111)이 형성된 경우, 도선(111) 위에도 산화막(130)이 형성될 수 있다. 증착된 전극(120)의 일부가 자연적으로 산화막(130)이 될 수 있다.An oxide film 130 is formed on the electrode 120 as shown in FIG. 6C. When the conductive wire 111 is formed, the oxide film 130 may be formed on the conductive wire 111 as well. A part of the deposited electrode 120 may naturally become the oxide film 130.
도 7(a)와 같이 산화막(130) 위에 밀착층(150)을 형성한다.As shown in Fig. 7(a), an adhesion layer 150 is formed on the oxide film 130.
도 7(b)와 같이 밀착층(150) 위에 접착제(140)를 구비한다. 접착제(140)는 밀착층(150) 위에 증착될 수 있다. An adhesive 140 is provided on the adhesion layer 150 as shown in FIG. 7(b). The adhesive 140 may be deposited on the adhesion layer 150.
도 7(c)와 같이 도 7(b)의 기판(100)에 열이 가해지는 리플로우 공정에 기판(100)이 들어가면, 접착제(140)는 열에 의해 용융된다. 이때, 용융된 접착제(140)는 도 7(b)에서 처음 증착된 면적보다는 넓게 형성될 수 있지만 다른 전극에 흘러 들어갈 만큼 넓게 퍼지지는 않는다. 열에 의해 용융된 접착제(140)가 퍼지지 않으므로, 좁은 전극(120) 사이를 쇼트 시키지 않으므로 쇼트를 방지하기 위해 일반적으로 전극(120) 사이에 형성되는 솔더 레지스터가 필요 없다. 이는 접착제(140)가 산화막(130)과 반응이 일어나지 않기 때문이다.When the substrate 100 enters the reflow process in which heat is applied to the substrate 100 of FIG. 7(b) as shown in FIG. 7(c), the adhesive 140 is melted by heat. At this time, the melted adhesive 140 may be formed to be wider than the first deposited area in FIG. 7(b), but it does not spread wide enough to flow into other electrodes. Since the melted adhesive 140 does not spread by heat, it does not short-circuit between the narrow electrodes 120, and thus, a solder resistor generally formed between the electrodes 120 is not required to prevent a short circuit. This is because the adhesive 140 does not react with the oxide layer 130.
특히, 접착제(140)는 밀착층(150) 위에서 밀착층(150) 밖으로 접착제(140)가 밀려나와도 산화막(130)은 접착제(140)와 반응이 일어나지 않기 때문에 다시 밀착층(150)과 결합할 수 있다.In particular, even if the adhesive 140 is pushed out of the adhesive layer 150 on the adhesive layer 150, the oxide film 130 does not react with the adhesive 140, so it cannot be combined with the adhesive layer 150 again. I can.
도 8은 본 개시에 따른 반도체 발광소자의 다른 예를 나타내는 도면이다.8 is a diagram illustrating another example of a semiconductor light emitting device according to the present disclosure.
반도체 발광소자(200)는 복수의 반도체 발광소자 칩(210)을 구비할 수 있다.The semiconductor light emitting device 200 may include a plurality of semiconductor light emitting device chips 210.
기판(100;도 4)은 복수의 반도체 발광소자 칩(210)에 대응하도록 복수의 전극(120)을 구비할 수 있다.The substrate 100 (FIG. 4) may include a plurality of electrodes 120 to correspond to the plurality of semiconductor light emitting device chips 210.
예를 들면, 복수의 반도체 발광소자 칩(210)은 제1 반도체 발광소자 칩(211), 제2 반도체 발광소자 칩(212) 및 제3 반도체 발광소자 칩(213) 일 수 있다. 제1 반도체 발광소자 칩(211)은 붉은 빛을 내고, 제2 반도체 발광소자 칩(212)은 녹색 빛을 내고, 제3 반도체 발광소자 칩(213)은 푸른 빛을 낼 수 있다. 제1 반도체 발광소자 칩(211)은 제1 패드(211-1) 및 제2 패드(211-2)를 포함하고, 제2 반도체 발광소자 칩(212)은 제1 패드(212-1) 및 제2 패드(212-2)를 포함하고, 제3 반도체 발광소자 칩(213)은 제1 패드(213-1) 및 제2 패드(213-2)를 포함한다.For example, the plurality of semiconductor light emitting device chips 210 may be a first semiconductor light emitting device chip 211, a second semiconductor light emitting device chip 212, and a third semiconductor light emitting device chip 213. The first semiconductor light emitting device chip 211 may emit red light, the second semiconductor light emitting device chip 212 may emit green light, and the third semiconductor light emitting device chip 213 may emit blue light. The first semiconductor light emitting device chip 211 includes a first pad 211-1 and a second pad 211-2, and the second semiconductor light emitting device chip 212 includes a first pad 212-1 and A second pad 212-2 is included, and the third semiconductor light emitting device chip 213 includes a first pad 213-1 and a second pad 213-2.
기판(100)은 복수의 전극(120)을 포함하며, 복수의 전극(120)은 제1 전극(121), 제2 전극(122), 제3 전극(123), 제4 전극(124), 제5 전극(125), 제6 전극(126)일 수 있다. 제1 전극(121), 제3 전극(123), 제5 전극(125) 및 제2 전극(122), 제4 전극(124), 제6 전극(126)은 각각 다른 도전성을 가지도록 형성될 수 있다.The substrate 100 includes a plurality of electrodes 120, and the plurality of electrodes 120 includes a first electrode 121, a second electrode 122, a third electrode 123, a fourth electrode 124, It may be a fifth electrode 125 and a sixth electrode 126. The first electrode 121, the third electrode 123, the fifth electrode 125 and the second electrode 122, the fourth electrode 124, and the sixth electrode 126 may be formed to have different conductivity. I can.
제1 반도체 발광소자 칩(211)은 제1 전극(121)과 제2 전극(122)에 전기적으로 연결되고, 제1 반도체 발광소자 칩(211)의 제1 패드(211-1) 및 제2 패드(211-2)와 제1 전극(121) 및 제2 전극(122)이 전기적으로 연결될 수 있다.The first semiconductor light emitting device chip 211 is electrically connected to the first electrode 121 and the second electrode 122, and the first pad 211-1 and the second electrode of the first semiconductor light emitting device chip 211 The pad 211-2 may be electrically connected to the first electrode 121 and the second electrode 122.
제2 반도체 발광소자 칩(212)은 제3 전극(123)과 제4 전극(124)에 전기적으로 연결되고, 제2 반도체 발광소자 칩(212)의 제1 패드(212-1) 및 제2 패드(212-2)와 제3 전극(123) 및 제4 전극(124)이 전기적으로 연결될 수 있다.The second semiconductor light emitting device chip 212 is electrically connected to the third electrode 123 and the fourth electrode 124, and The pad 212-2 may be electrically connected to the third electrode 123 and the fourth electrode 124.
제3 반도체 발광소자 칩(213)은 제5 전극(125)과 제6 전극(126)에 전기적으로 연결되고, 제3 반도체 발광소자 칩(213)의 제1 패드(213-1) 및 제2 패드(213-2)와 제5 전극(125) 및 제6 전극(126)이 전기적으로 연결될 수 있다.The third semiconductor light emitting device chip 213 is electrically connected to the fifth electrode 125 and the sixth electrode 126, and the first pad 213-1 and the second pad 213-1 of the third semiconductor light emitting device chip 213 The pad 213-2 may be electrically connected to the fifth electrode 125 and the sixth electrode 126.
이하 본 개시의 다양한 실시 형태에 대하여 설명한다.Hereinafter, various embodiments of the present disclosure will be described.
(1) 기판에 있어서, 도선이 형성된 판; 도선과 전기적으로 연결되어 판 위에 형성되는 전극; 전극 위에 형성된 산화막; 그리고, 산화막 위에 형성되는 접착제;를 포함하는 반도체 발광소자용 판.(1) A substrate, comprising: a plate on which a conductive wire is formed; An electrode electrically connected to the conducting wire and formed on the plate; An oxide film formed over the electrode; And, an adhesive formed on the oxide film; a plate for a semiconductor light emitting device comprising a.
(2) 산화막은 전극의 자연 산화물인 반도체 발광소자용 기판.(2) The oxide film is a substrate for a semiconductor light emitting device, which is a natural oxide of an electrode.
(3) 전극은 알루미늄으로 형성되는 반도체 발광소자용 기판.(3) The electrode is a substrate for a semiconductor light emitting device formed of aluminum.
(4) 산화막의 두께는 20~100Å인 반도체 발광소자용 기판.(4) A substrate for a semiconductor light emitting device with an oxide film having a thickness of 20 to 100Å.
(5) 접착제는 SAC(Sn-Ag-Cu)인 반도체 발광소자용 기판.(5) The adhesive is a substrate for a semiconductor light emitting device of SAC (Sn-Ag-Cu).
(6) 산화막과 접착제 사이에는 밀착층이 구비되는 반도체 발광소자용 기판.(6) A substrate for a semiconductor light emitting device provided with an adhesion layer between the oxide film and the adhesive.
(7) 밀착층은 Cr, Ti, Ni 중 적어도 하나 이상을 포함하는 반도체 발광소자용 기판.(7) The adhesion layer is a substrate for a semiconductor light emitting device containing at least one or more of Cr, Ti, and Ni.
(8) 산화막은 도선 및 전극 전체에 형성되는 반도체 발광소자용 기판.(8) The oxide film is a substrate for a semiconductor light emitting device formed over the entire conductive line and the electrode.
(9) 산화막은 전극과 접착제 사이를 차단하는 반도체 발광소자용 기판.(9) The oxide film is a substrate for a semiconductor light emitting device that blocks between the electrode and the adhesive.
(10) 반도체 발광소자에 있어서, 청구항 1항 내지 9항 중 하나에 기재된 기판; 그리고, 패드를 포함하며, 패드는 접착제에 접촉하는 반도체 발광소자 칩;을 포함하는 반도체 발광소자.(10) A semiconductor light emitting device comprising: the substrate according to any one of claims 1 to 9; And a semiconductor light emitting device chip comprising a pad, the pad being in contact with the adhesive.
(11) 반도체 발광소자 칩은 300um 미만의 크기를 가지는 반도체 발광소자.(11) A semiconductor light emitting device chip is a semiconductor light emitting device having a size of less than 300um.
(12) 반도체 발광소자 칩은 50mA이하에서 구동가능한 반도체 발광소자.(12) Semiconductor light-emitting device A chip is a semiconductor light-emitting device that can be driven under 50mA.
본 개시에 따른 하나의 반도체 발광소자용 기판에 의하면, 산화막 위에 형성된 접착제는 리플로우 되기 전보다 주위로 퍼지지 않는다.According to one substrate for a semiconductor light emitting device according to the present disclosure, the adhesive formed on the oxide film does not spread around more than before being reflowed.
본 개시에 따른 또 하나의 반도체 발광소자용 기판에 의하면, 접착제와 산화막 사이에는 밀착제가 구비되어 접착제가 산화막으로부터 떨어지지 않게 돕는다.According to another substrate for a semiconductor light emitting device according to the present disclosure, an adhesive agent is provided between the adhesive and the oxide film to help prevent the adhesive from falling off from the oxide film.
본 개시에 따른 하나의 반도체 발광소자에 의하면, 산화막 위에 연결되는 구동전압 또는 구동전류가 낮은 반도체 발광소자 칩은 낮은 전류가 흘러도 반도체 발광소자 칩의 구동이 가능하다.According to one semiconductor light emitting device according to the present disclosure, a semiconductor light emitting device chip having a low driving voltage or a driving current connected over the oxide film can drive the semiconductor light emitting device chip even when a low current flows.

Claims (12)

  1. 반도체 발광소자용 기판에 있어서,In the substrate for a semiconductor light emitting device,
    도선이 형성된 판;A plate on which a conducting wire is formed;
    도선과 전기적으로 연결되어 판 위에 형성되는 전극;An electrode electrically connected to the conducting wire and formed on the plate;
    전극 위에 형성된 산화막; 그리고,An oxide film formed over the electrode; And,
    산화막 위에 형성되는 접착제;를 포함하는 반도체 발광소자용 기판.A substrate for a semiconductor light emitting device comprising; an adhesive formed on the oxide film.
  2. 청구항 1에 있어서,The method according to claim 1,
    산화막은 전극의 자연 산화물인 반도체 발광소자용 기판.The oxide film is a substrate for a semiconductor light emitting device, which is a natural oxide of an electrode.
  3. 청구항 1에 있어서,The method according to claim 1,
    전극은 알루미늄으로 형성되는 반도체 발광소자용 기판.The electrode is a substrate for a semiconductor light emitting device formed of aluminum.
  4. 청구항 1에 있어서,The method according to claim 1,
    산화막의 두께는 20~100Å인 반도체 발광소자용 기판.A substrate for a semiconductor light emitting device with an oxide film having a thickness of 20 to 100Å.
  5. 청구항 1에 있어서,The method according to claim 1,
    접착제는 SAC(Sn-Ag-Cu)인 반도체 발광소자용 기판.The adhesive is a SAC (Sn-Ag-Cu) substrate for a semiconductor light emitting device.
  6. 청구항 1에 있어서,The method according to claim 1,
    산화막과 접착제 사이에는 밀착층이 구비되는 반도체 발광소자용 기판.A substrate for a semiconductor light emitting device having an adhesion layer between the oxide film and the adhesive.
  7. 청구항 6에 있어서,The method of claim 6,
    밀착층은 Cr, Ti, Ni 중 적어도 하나 이상을 포함하는 반도체 발광소자용 기판.The adhesion layer is a substrate for a semiconductor light emitting device comprising at least one or more of Cr, Ti, and Ni.
  8. 청구항 1에 있어서,The method according to claim 1,
    산화막은 도선 및 전극 전체에 형성되는 반도체 발광소자용 기판.The oxide film is a substrate for a semiconductor light emitting device formed over the entire conductor and electrode.
  9. 청구항 1에 있어서,The method according to claim 1,
    산화막은 전극과 접착제 사이를 차단하는 반도체 발광소자용 기판.The oxide film is a substrate for a semiconductor light emitting device that blocks between an electrode and an adhesive.
  10. 반도체 발광소자에 있어서,In a semiconductor light emitting device,
    청구항 1항 내지 9항 중 하나에 기재된 기판; 그리고,The substrate according to any one of claims 1 to 9; And,
    패드를 포함하며, 패드는 접착제에 접촉하는 반도체 발광소자 칩;을 포함하는 반도체 발광소자.A semiconductor light emitting device comprising a pad, wherein the pad is a semiconductor light emitting device chip in contact with the adhesive.
  11. 청구항 10에 있어서,The method of claim 10,
    반도체 발광소자 칩은 300um 미만의 크기를 가지는 반도체 발광소자.A semiconductor light emitting device chip is a semiconductor light emitting device having a size of less than 300um.
  12. 청구항 10에 있어서,The method of claim 10,
    반도체 발광소자 칩은 50mA이하에서 구동가능한 반도체 발광소자.A semiconductor light emitting device chip is a semiconductor light emitting device that can be driven under 50mA.
PCT/KR2020/013259 2019-10-01 2020-09-28 Substrate for semiconductor light emitting device and semiconductor light emitting device using same WO2021066475A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020190121378A KR102252598B1 (en) 2019-10-01 2019-10-01 Substrate and semiconductor light emitting device using the same
KR10-2019-0121378 2019-10-01

Publications (1)

Publication Number Publication Date
WO2021066475A1 true WO2021066475A1 (en) 2021-04-08

Family

ID=75338363

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2020/013259 WO2021066475A1 (en) 2019-10-01 2020-09-28 Substrate for semiconductor light emitting device and semiconductor light emitting device using same

Country Status (2)

Country Link
KR (1) KR102252598B1 (en)
WO (1) WO2021066475A1 (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002270905A (en) * 2001-03-14 2002-09-20 Matsushita Electric Ind Co Ltd Composite light emitting device
JP2007234660A (en) * 2006-02-27 2007-09-13 Kyocera Corp Wiring board, and production process of wiring board
KR101037325B1 (en) * 2010-10-27 2011-05-26 (주)포스 Metal base board for led lighting device and method for fabricating the same
KR20120090203A (en) * 2011-02-07 2012-08-17 앰코 테크놀로지 코리아 주식회사 Semiconductor package
KR20120135006A (en) * 2010-04-12 2012-12-12 데쿠세리아루즈 가부시키가이샤 Method of manufacturing light emitting device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012248573A (en) * 2011-05-25 2012-12-13 Mitsubishi Electric Corp Light emitting device
KR102514851B1 (en) * 2016-04-06 2023-03-28 쑤저우 레킨 세미컨덕터 컴퍼니 리미티드 Semiconductor device package

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002270905A (en) * 2001-03-14 2002-09-20 Matsushita Electric Ind Co Ltd Composite light emitting device
JP2007234660A (en) * 2006-02-27 2007-09-13 Kyocera Corp Wiring board, and production process of wiring board
KR20120135006A (en) * 2010-04-12 2012-12-12 데쿠세리아루즈 가부시키가이샤 Method of manufacturing light emitting device
KR101037325B1 (en) * 2010-10-27 2011-05-26 (주)포스 Metal base board for led lighting device and method for fabricating the same
KR20120090203A (en) * 2011-02-07 2012-08-17 앰코 테크놀로지 코리아 주식회사 Semiconductor package

Also Published As

Publication number Publication date
KR20210039514A (en) 2021-04-12
KR102252598B1 (en) 2021-05-18

Similar Documents

Publication Publication Date Title
CN109147584A (en) A kind of LED display unit group and display panel
WO2010110572A2 (en) Light-emitting diode package
WO2012039528A1 (en) Light-emitting diode package and method of fabricating the same
CN101562178B (en) Semiconductor light-emitting device
CN209015627U (en) A kind of LED display unit group and display panel
WO2020096415A1 (en) Mounting structure for mounting micro led
JP2010501980A (en) Light source device and liquid crystal display device including the same
WO2021045482A1 (en) Micro led display and method for manufacturing the same
CN109411455A (en) A kind of LED display unit group and display panel
WO2012002629A1 (en) Light-emitting diode module
CN112242476B (en) LED display unit group and display panel
WO2021029657A1 (en) Micro led display and manufacturing method thereof
JPH07508858A (en) Assembly unit for multilayer hybrids with power elements
EP2628176A2 (en) Radiant heat circuit board, method of manufacturing the same, heat generating device package having the same, and backlight
WO2011105670A1 (en) Surface-mounted light-emitting unit array, method for repairing same, and light-emitting unit for repairing same
WO2013009082A2 (en) Substrate for optical device
US7307287B2 (en) LED package and method for producing the same
WO2016197496A1 (en) Led integrated light-emitting module
WO2021066475A1 (en) Substrate for semiconductor light emitting device and semiconductor light emitting device using same
US20120170265A1 (en) Light-source module and light-emitting device
WO2013115578A1 (en) Light emitting diode package
WO2013089341A1 (en) Optical device integrated with driving circuit and power supply circuit, method for manufacturing optical device substrate used therein, and substrate thereof
CN218763226U (en) Lamp body and lighting device
WO2018182327A1 (en) Semiconductor package test socket and method for manufacturing same
WO2012150777A2 (en) The printed circuit board and the method for manufacturing the same

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20873320

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 20873320

Country of ref document: EP

Kind code of ref document: A1