JP2007209098A - Inverter device - Google Patents

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JP2007209098A
JP2007209098A JP2006023930A JP2006023930A JP2007209098A JP 2007209098 A JP2007209098 A JP 2007209098A JP 2006023930 A JP2006023930 A JP 2006023930A JP 2006023930 A JP2006023930 A JP 2006023930A JP 2007209098 A JP2007209098 A JP 2007209098A
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mosfet
signal
failure
switching
wave signal
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JP4769587B2 (en
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Harunobu Nukushina
治信 温品
Naoyoshi Uesugi
通可 植杉
Koji Noda
浩二 野田
Takahisa Endo
隆久 遠藤
Hiroshi Mochikawa
宏 餅川
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Toshiba Corp
Toshiba Carrier Corp
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Toshiba Carrier Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide an inverter device that can prevent the overheating and the breakage of a MOSFET when a reverse voltage application circuit is failed, and is improved in safety. <P>SOLUTION: When a backflow current flows into the MOSFET in each series circuit of a switching circuit 1, a reverse voltage is applied to the MOSFET from a reverse voltage application circuit prior to the turning-on of the other switching element of the same series circuit as of the MOSFET for suppressing a reverse recovery current in the MOSFET. When the reverse voltage application circuit is failed as inoperable, a frequency is reduced in the generation of the reverse recovery current in the MOSFET. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

この発明は、たとえばモータを駆動するインバータ装置に関する。   The present invention relates to an inverter device for driving a motor, for example.

誘導成分を含む負荷たとえばブラシレスDCモータを駆動するインバータ装置は、電圧の印加方向に沿って上流側および下流側となる2つのスイッチング素子の直列回路を複数備え、これら直列回路の上流側スイッチング素子と下流側スイッチング素子の相互接続点がブラシレスDCモータの各相巻線に接続される。各スイッチング素子は、還流ダイオード(寄生ダイオードともいう)を有している。   An inverter device for driving a load including an inductive component, for example, a brushless DC motor, includes a plurality of series circuits of two switching elements on the upstream side and the downstream side in the voltage application direction. The interconnection point of the downstream switching element is connected to each phase winding of the brushless DC motor. Each switching element has a free wheel diode (also referred to as a parasitic diode).

スイッチング素子としては、最近、IGBTやMOSFETが多く採用されている。MOSFETを用いている場合、MOSFETのオン,オフ速度が速いため高周波スイッチングが可能というメリットがあり、また低電圧出力時のロスが小さいことからファンモータ等の出力の小さいモータを駆動する場合に多用される。   Recently, many IGBTs and MOSFETs have been adopted as switching elements. When a MOSFET is used, there is a merit that high-frequency switching is possible because the on / off speed of the MOSFET is fast, and it is frequently used when driving a motor with a small output such as a fan motor because the loss at low voltage output is small. Is done.

ただし、MOSFETでは、素子製造の過程において同じ素子上に作られる還流ダイオードの逆回復特性が悪いという問題がある。近年、オン時の抵抗が低くてスイッチング特性にすぐれたスーパージャンクションMOSFETが開発されているが、このスーパージャンクションMOSFETにおいては、素子上に形成される還流ダイオードの逆回復特性がますます悪いものとなっている。   However, in MOSFET, there is a problem that reverse recovery characteristics of a free-wheeling diode made on the same element in the process of manufacturing the element are poor. In recent years, super junction MOSFETs have been developed that have low on-state resistance and excellent switching characteristics. However, in this super junction MOSFET, the reverse recovery characteristics of the freewheeling diode formed on the device become worse. ing.

還流ダイオードの逆回復特性が悪いと、次の不具合を生じる。すなわち、MOSFETがオフしたとき、誘導性負荷に蓄えられたエネルギによってMOSFETの還流ダイオードに順方向電流(還流電流ともいう)が流れるが、その状態で、同じ直列回路の他方のスイッチング素子がオンしてMOSFETに直流電圧が加わると、還流ダイオードに蓄えられた電荷による大きな逆回復電流(スパイク電流ともいう)が還流ダイオードに流れる。この逆回復電流は、大きな電力損失となる。また、この電力損失の多くは、MOSFETと対となる他方のスイッチング素子のオン時の発熱となり、これが大きくなると他方のスイッチング素子がその熱によって破壊するという問題がある。   If the reverse recovery characteristic of the freewheeling diode is poor, the following problems occur. That is, when the MOSFET is turned off, the forward current (also called the reflux current) flows to the MOSFET's freewheeling diode due to the energy stored in the inductive load. In this state, the other switching element of the same series circuit is turned on. When a DC voltage is applied to the MOSFET, a large reverse recovery current (also referred to as a spike current) due to the charge stored in the freewheeling diode flows through the freewheeling diode. This reverse recovery current results in a large power loss. In addition, most of the power loss is generated when the other switching element paired with the MOSFET is turned on, and when this is increased, the other switching element is destroyed by the heat.

このようなことから、たとえば空気調和機のコンプレッサモータを駆動するような大きな電流が流れるインバータにMOSFETを採用することは、非常に難しい。   For this reason, it is very difficult to employ a MOSFET for an inverter through which a large current flows, for example, to drive a compressor motor of an air conditioner.

そこで、従来、上記他方のスイッチング素子のオンに先立ってMOSFETに逆電圧を印加する逆電圧印加回路を設け、この逆電圧の印加によって還流ダイオードに流れる逆回復電流を防止し、電力損失の低減を図るものがある(例えば、特許文献1)。
特開平10−327585号公報
Therefore, conventionally, a reverse voltage application circuit that applies a reverse voltage to the MOSFET prior to turning on the other switching element is provided, and the reverse recovery current flowing to the freewheeling diode is prevented by applying the reverse voltage, thereby reducing power loss. There is something to plan (for example, Patent Document 1).
Japanese Patent Laid-Open No. 10-327585

上記のような逆電圧印加回路を採用した場合、逆回復電流による電力損失が大きく抑えられるため、コンプレッサモータ駆動用などの大出力モータにもスイッチング素子としてMOSFETの採用が可能となるが、万が一逆電圧印加回路に破壊や特性劣化等で不動作になる故障(開放故障)が生じると、還流ダイオードにおける逆回復電流を防止することができなくなり、最悪の場合はスイッチング素子が過熱して破壊に至ってしまう。   When the reverse voltage application circuit as described above is adopted, the power loss due to the reverse recovery current can be greatly suppressed, so that a MOSFET can be adopted as a switching element for a large output motor for driving a compressor motor or the like. If a failure (opening failure) occurs due to breakdown or deterioration of characteristics in the voltage application circuit, reverse recovery current in the freewheeling diode cannot be prevented, and in the worst case, the switching element overheats and breaks down. End up.

なお、逆電圧回路はダイオードやキャパシタ等の簡単な電気・電子回路構成のため、故障は生じ難いと考えられるが、逆電圧印加の時期および期間をコントロールするためにスイッチング素子が用いられている。このスイッチング素子部が電気的な可動部分となるため、この部分に故障の生じる可能性が最も高い。そして、この回路の故障としては最終的に開放(オープン)故障に至る場合がほとんどと考えられる。   Although the reverse voltage circuit is a simple electric / electronic circuit configuration such as a diode or a capacitor, it is unlikely that a failure will occur. However, a switching element is used to control the timing and period of reverse voltage application. Since this switching element part becomes an electrically movable part, the possibility that a failure will occur in this part is the highest. And it is considered that most of the failure of this circuit finally leads to an open (open) failure.

また、故障が生じた場合、インバータ装置の運転を停止することでスイッチング素子の破壊を防止することができるが、インバータ装置の負荷が空気調和機や冷蔵庫の圧縮機、給水ポンプ、工場の大型換気ファン等である場合には、それ以上故障が拡大しない範囲内で運転を継続することが望まれる。   In addition, when a failure occurs, it is possible to prevent the switching element from being destroyed by stopping the operation of the inverter device, but the load on the inverter device is an air conditioner, refrigerator compressor, water supply pump, large-scale ventilation in the factory. In the case of a fan or the like, it is desirable to continue the operation within a range where the failure does not expand any more.

この発明は、上記の事情を考慮したもので、逆電圧印加回路が不動作となる故障を起こした場合でもスイッチング素子の過熱や破壊を防ぎながら、運転の継続が可能なインバータ装置を提供することを目的とする。   In view of the above circumstances, the present invention provides an inverter device capable of continuing operation while preventing overheating and destruction of a switching element even when a failure occurs in which a reverse voltage application circuit does not operate. With the goal.

請求項1に係る発明のインバータ装置は、還流ダイオードを有するMOSFETを少なくとも一方に用いた2つのスイッチング素子の直列回路を複数備え、これら直列回路の各スイッチング素子の相互接続点が負荷に接続されるスイッチング回路と、上記各直列回路のうち少なくとも1つの直列回路の上流側のスイッチング素子および別の少なくとも1つの直列回路の下流側のスイッチング素子による前記負荷への通電を、順次に切換える第1制御手段と、上記MOSFETと同じ直列回路の他方のスイッチング素子のオンに先立ち、同MOSFETに逆電圧を印加する逆電圧印加回路と、この逆電圧印加回路の不動作の故障を検出する故障検出手段と、この故障検出手段で故障が検出された場合に、上記MOSFETのスイッチング回数を通常より減らす第2制御手段と、を備えている。   The inverter device of the invention according to claim 1 includes a plurality of series circuits of two switching elements using at least one of MOSFETs having a freewheeling diode, and an interconnection point of each switching element of these series circuits is connected to a load. First control means for sequentially switching energization to the load by a switching circuit and a switching element upstream of at least one of the series circuits and a switching element downstream of at least one other series circuit And, prior to turning on the other switching element of the same series circuit as the MOSFET, a reverse voltage application circuit for applying a reverse voltage to the MOSFET, and a failure detection means for detecting a malfunction of the reverse voltage application circuit, When a failure is detected by this failure detection means, the number of times the MOSFET is switched is And it includes a second control means for reducing a normally, the.

この発明のインバータ装置によれば、逆電圧印加回路が故障した場合、MOSFETにおける逆回復電流の頻度が低減される。これにより、スイッチング素子の過熱や破壊を防ぎながらある程度の継続運転が可能となる。   According to the inverter device of the present invention, when the reverse voltage application circuit fails, the frequency of the reverse recovery current in the MOSFET is reduced. Thereby, a certain amount of continuous operation is possible while preventing overheating and destruction of the switching element.

[1]以下、この発明の第1の実施形態について図面を参照して説明する。
図1において、Mは空気調和機のコンプレッサモータとして使用されるブラシレスDCモータ(負荷)で、星形結線された3つの相巻線Lu,Lv,Lwを有するステータ、および永久磁石を有するロータにより構成されている。相巻線Lu,Lv,Lwに電流が流れることにより生じる磁界と永久磁石が作る磁界との相互作用により、ロータが回転する。
[1] A first embodiment of the present invention will be described below with reference to the drawings.
In FIG. 1, M is a brushless DC motor (load) used as a compressor motor of an air conditioner, and includes a stator having three phase windings Lu, Lv, Lw connected in a star shape, and a rotor having a permanent magnet. It is configured. The rotor rotates due to the interaction between the magnetic field generated by the current flowing through the phase windings Lu, Lv, and Lw and the magnetic field generated by the permanent magnet.

このブラシレスDCモータMが動力源として圧縮機20に収容されている。冷房時、この圧縮機20から吐出される冷媒が図示実線矢印で示すように四方弁21を介して室外熱交換器22に流れ、その室外熱交換器22を経た冷媒が膨張弁23を介して室内熱交換器24に流れる。そして、室内熱交換器24を経た冷媒が、上記四方弁21を介して圧縮機20に吸込まれる。これにより、室外熱交換器22が凝縮器、室内熱交換器24が蒸発器として機能する。暖房時は、四方弁21が切換わることにより、破線矢印で示す方向に冷媒が流れ、室内熱交換器24が凝縮器、室外熱交換器22が蒸発器として機能する。   The brushless DC motor M is accommodated in the compressor 20 as a power source. During cooling, the refrigerant discharged from the compressor 20 flows to the outdoor heat exchanger 22 via the four-way valve 21 as shown by the solid line arrow in the figure, and the refrigerant passing through the outdoor heat exchanger 22 passes through the expansion valve 23. It flows to the indoor heat exchanger 24. Then, the refrigerant that has passed through the indoor heat exchanger 24 is sucked into the compressor 20 through the four-way valve 21. Thereby, the outdoor heat exchanger 22 functions as a condenser, and the indoor heat exchanger 24 functions as an evaporator. At the time of heating, the four-way valve 21 is switched, whereby the refrigerant flows in the direction indicated by the broken-line arrow, and the indoor heat exchanger 24 functions as a condenser and the outdoor heat exchanger 22 functions as an evaporator.

上記ブラシレスDCモータMに、本発明のインバータ装置が接続されている。このインバータ装置は、商用交流電源を整流した直流電源30の出力(例えば直流280V)を受けて上記相巻線Lu,Lv,Lwに対する通電およびその通電切換を行うスイッチング回路1、このスイッチング回路1を駆動制御する制御部10により、構成されている。   The brushless DC motor M is connected to the inverter device of the present invention. The inverter device includes a switching circuit 1 that receives an output (for example, DC 280 V) of a DC power source 30 rectified from a commercial AC power source and performs energization to the phase windings Lu, Lv, and Lw and switching of the energization. It is comprised by the control part 10 which controls drive.

スイッチング回路1は、直流電圧の印加方向に沿って上流側および下流側のスイッチング素子として低損失パワーMOSFET(スーパージャンクションMOSFET等)の直列回路をU,V,Wの三相分有するもので、U相の上流側にMOSFET2u、U相の下流側にMOSFET3u、V相の上流側にMOSFET2v、V相の下流側にMOSFET3v、W相の上流側にMOSFET2w、W相の下流側にMOSFET3wを備えている。そして、MOSFET2u,2v,2wに対し、還流ダイオードDu+,Dv+,Dw+がそれぞれ逆並列接続されている。MOSFET3u,3v,3wに対し、還流ダイオードDu−,Dv−,Dw−がそれぞれ逆並列接続されている。これら還流ダイオードは、寄生ダイオードとしてそれぞれ対応するMOSFET(素子本体)に内蔵される。   The switching circuit 1 has a series circuit of low-loss power MOSFETs (superjunction MOSFETs, etc.) for three phases U, V, and W as upstream and downstream switching elements along a DC voltage application direction. MOSFET 2u is provided upstream of the phase, MOSFET 3u is provided downstream of the U phase, MOSFET 2v is provided upstream of the V phase, MOSFET 3v is provided downstream of the V phase, MOSFET 2w is provided upstream of the W phase, and MOSFET 3w is provided downstream of the W phase. . The free-wheeling diodes Du +, Dv +, and Dw + are connected in reverse parallel to the MOSFETs 2u, 2v, and 2w, respectively. The free-wheeling diodes Du−, Dv−, and Dw− are connected in reverse parallel to the MOSFETs 3u, 3v, and 3w, respectively. These free-wheeling diodes are built in corresponding MOSFETs (element bodies) as parasitic diodes.

MOSFET2uとMOSFET3uの相互接続点、MOSFET2vとMOSFET3vの相互接続点、MOSFET2wとMOSFET3wの相互接続点に、上記相巻線Lu,Lv,Lwのそれぞれ非結線端が接続されている。   The unconnected ends of the phase windings Lu, Lv, and Lw are respectively connected to an interconnection point between the MOSFETs 2u and 3u, an interconnection point between the MOSFETs 2v and 3v, and an interconnection point between the MOSFETs 2w and 3w.

また、スイッチング回路1は、誘導性負荷である相巻線Lu,Lv,Lwに蓄えられたエネルギによって還流ダイオードDu+,Dv+,Dw+に順方向電流(還流電流)が流れた場合に、下流側のMOSFET3u,3v,3wのオンに伴って還流ダイオードDu+,Dv+,Dw+に流れる逆回復電流Irrを抑制するため、MOSFET3u,3v,3wのそれぞれオンに先立ってMOSFET2u,2v,2wの還流ダイオードDu+,Dv+,Dw+に逆電圧を印加する逆電圧印加回路4u,4v,4wを備えている。   In addition, the switching circuit 1 has a downstream current when a forward current (return current) flows through the freewheeling diodes Du +, Dv +, and Dw + by the energy stored in the phase windings Lu, Lv, and Lw that are inductive loads. In order to suppress the reverse recovery current Irr flowing through the free-wheeling diodes Du +, Dv +, and Dw + when the MOSFETs 3u, 3v, and 3w are turned on, the free-wheeling diodes Du + and Dv + of the MOSFETs 2u, 2v, and 2w are turned on before the MOSFETs 3u, 3v, and 3w are turned on. , Dw + are provided with reverse voltage application circuits 4u, 4v, 4w.

同様に、下流側のMOSFET3u,3v,3wにもそれぞれ逆電圧印加回路5u,5v,5wを備えられている。   Similarly, reverse-side voltage application circuits 5u, 5v, and 5w are provided in the downstream MOSFETs 3u, 3v, and 3w, respectively.

逆電圧印加回路4uは、直流電源40の電圧(例えば15V)を抵抗41を介して逆電圧印加用コンデンサ42に印加し、その逆電圧印加用コンデンサ42の電圧を逆電圧印加用MOSFET43のドレイン・ソース間、およびダイオード44を介して、MOSFET2uに逆電圧として印加する。また、逆電圧印加回路4uは、逆電圧印加用MOSFET43の駆動用として、パルス生成回路45およびゲート駆動回路46を有している。パルス生成回路45は、制御部10からの指令に応じて逆電圧印加用のパルス信号を生成する。ゲート駆動回路46は、パルス生成回路45で生成されたパルス信号に基づき、逆電圧印加用MOSFET43をオンするための1ショットパルス信号を出力する。この出力が逆電圧印加用MOSFET43のゲートに供給される。   The reverse voltage application circuit 4 u applies a voltage (for example, 15 V) of the DC power supply 40 to the reverse voltage application capacitor 42 via the resistor 41, and uses the voltage of the reverse voltage application capacitor 42 as the drain of the reverse voltage application MOSFET 43. A reverse voltage is applied to the MOSFET 2u between the sources and via the diode 44. Further, the reverse voltage application circuit 4 u has a pulse generation circuit 45 and a gate drive circuit 46 for driving the reverse voltage application MOSFET 43. The pulse generation circuit 45 generates a pulse signal for applying a reverse voltage in response to a command from the control unit 10. The gate drive circuit 46 outputs a one-shot pulse signal for turning on the reverse voltage application MOSFET 43 based on the pulse signal generated by the pulse generation circuit 45. This output is supplied to the gate of the reverse voltage application MOSFET 43.

他の逆電圧印加回路4v,4wおよび逆電圧印加回路5uも、逆電圧印加回路4uと同じ構成である。よって、その説明は省略する。逆電圧印加回路5v,5wについては、逆電圧印加回路5uの直流電源40から直流電圧を取込んでいる点がほかと異なるだけで、残りの構成は逆電圧印加回路4uと同じ構成である。   The other reverse voltage application circuits 4v and 4w and the reverse voltage application circuit 5u have the same configuration as the reverse voltage application circuit 4u. Therefore, the description is omitted. The reverse voltage application circuits 5v and 5w are the same as the reverse voltage application circuit 4u, except that the reverse voltage application circuits 5v and 5w are different from the other in that a direct current voltage is taken from the direct current power source 40 of the reverse voltage application circuit 5u.

一方、MOSFET2uとMOSFET3uの直列回路におけるMOSFET3uの下流側に、電流検出用の抵抗11uが挿接されている。MOSFET2vとMOSFET3vの直列回路におけるMOSFET3vの下流側に、電流検出用の抵抗11vが挿接されている。MOSFET2wとMOSFET3wの直列回路におけるMOSFET3wの下流側に、電流検出用の抵抗11wが挿接されている。MOSFET3u,3v,3wを通して流れる電流に応じたレベルの電圧が、これら抵抗11u,11v,11wに生じる。そして、抵抗11u,11v,11wに生じる電圧が、制御部10に供給される。   On the other hand, a current detection resistor 11u is inserted downstream of the MOSFET 3u in the series circuit of the MOSFET 2u and the MOSFET 3u. A current detection resistor 11v is inserted downstream of the MOSFET 3v in the series circuit of the MOSFET 2v and the MOSFET 3v. A current detection resistor 11w is inserted downstream of the MOSFET 3w in the series circuit of the MOSFET 2w and the MOSFET 3w. A voltage of a level corresponding to the current flowing through the MOSFETs 3u, 3v, 3w is generated in these resistors 11u, 11v, 11w. Then, voltages generated in the resistors 11u, 11v, and 11w are supplied to the control unit 10.

制御部10は、抵抗11u,11v,11wに生じる電圧からブラシレスDCモータMの各相巻線に流れる電流を検出し、検出した電流からブラシレスDCモータMのロータの回転速度を推定し、推定した回転速度に基づく所定のタイミングでスイッチング回路1の各MOSFETおよび各逆電圧印加回路を駆動するもので、主要な機能として、スイッチング回路1における各MOSFETの直列回路のうち少なくとも1つの直列回路の上流側のMOSFETおよび別の少なくとも1つの直列回路の下流側のMOSFETによる各相巻線への通電を順次に切換える第1制御手段と、スイッチング回路1における各逆電圧印加回路の故障を検出する故障検出手段と、この故障検出手段で故障が検出された場合に各MOSFETに逆回復電流が流れる頻度を低減する第2制御手段とを有している。第2制御手段は、逆回復電流が流れる頻度を低減するために、具体的には、各MOSFETのスイッチング回数を通常より減らす制御を実行する。この制御部10の要部を図2に示す。   The controller 10 detects the current flowing through each phase winding of the brushless DC motor M from the voltage generated in the resistors 11u, 11v, and 11w, and estimates the rotational speed of the rotor of the brushless DC motor M from the detected current. Drives each MOSFET and each reverse voltage application circuit of the switching circuit 1 at a predetermined timing based on the rotational speed. As a main function, the upstream side of at least one of the series circuits of each MOSFET in the switching circuit 1 First control means for sequentially switching energization of each phase winding by the MOSFET on the downstream side of the MOSFET and another at least one series circuit, and failure detection means for detecting a failure of each reverse voltage application circuit in the switching circuit 1 When a failure is detected by this failure detection means, a reverse recovery current flows through each MOSFET. And a second control means for reducing the frequency that. Specifically, in order to reduce the frequency at which the reverse recovery current flows, the second control means executes control for reducing the number of switching times of each MOSFET than usual. The principal part of this control part 10 is shown in FIG.

図2において、50は基準信号生成部で、三相正弦波信号生成部51、波形整形部52、および選択部53を有している。三相正弦波信号生成部51は、互いに位相が120度異なる三相正弦波信号を生成する。波形整形部52は、三相正弦波信号生成部51で生成される三相正弦波信号を基に波形整形することにより、三相正弦波の相間電圧(電圧差)を基準とした二相変調用の信号、すなわち最も電圧の低い相を基準とし、その相が所定期間(位相が120度の期間)にわたって零レベルに固定される電圧波形を有する三相波信号を生成する。選択部53は、三相正弦波信号生成部51で生成される三相正弦波信号、および波形整形部52で生成される二相変調用信号のうち、後述の選択制御部74からの指令に応じたいずれか一方を、基準信号Eu,Ev,Ewとして出力する。基準信号EuはPWM基本信号Vu生成部55、基準信号EvはPWM基本信号Vv生成部56、基準信号EwはPWM基本信号Vw生成部57に、それぞれ供給される。   In FIG. 2, reference numeral 50 denotes a reference signal generation unit having a three-phase sine wave signal generation unit 51, a waveform shaping unit 52, and a selection unit 53. The three-phase sine wave signal generator 51 generates three-phase sine wave signals whose phases are different from each other by 120 degrees. The waveform shaping unit 52 performs two-phase modulation based on the interphase voltage (voltage difference) of the three-phase sine wave by shaping the waveform based on the three-phase sine wave signal generated by the three-phase sine wave signal generation unit 51. Signal, that is, a three-phase wave signal having a voltage waveform whose phase is fixed at a zero level over a predetermined period (period having a phase of 120 degrees). The selection unit 53 responds to a command from a selection control unit 74 described later among the three-phase sine wave signal generated by the three-phase sine wave signal generation unit 51 and the two-phase modulation signal generated by the waveform shaping unit 52. Any one of them is output as the reference signals Eu, Ev, Ew. The reference signal Eu is supplied to the PWM basic signal Vu generator 55, the reference signal Ev is supplied to the PWM basic signal Vv generator 56, and the reference signal Ew is supplied to the PWM basic signal Vw generator 57, respectively.

54は三角波信号生成部で、予め定められた周波数および電圧レベルの三角波信号(キャリア信号ともいう)Eoを生成する。この三角波信号Eoが上記PWM基本信号Vu生成部55、PWM基本信号Vv生成部56、PWM基本信号Vw生成部57に供給される。   A triangular wave signal generator 54 generates a triangular wave signal (also called a carrier signal) Eo having a predetermined frequency and voltage level. The triangular wave signal Eo is supplied to the PWM basic signal Vu generator 55, the PWM basic signal Vv generator 56, and the PWM basic signal Vw generator 57.

PWM基本信号Vu生成部55、PWM基本信号Vv生成部56、PWM基本信号Vw生成部57は、基準信号生成部50から出力される基準信号Eu,Ev,Ewと三角波信号生成部54から出力される三角波信号Eoとの電圧比較により、各MOSFETに対するスイッチング用のPWM基本信号Vu,Vv,Vwを生成する。   The PWM basic signal Vu generation unit 55, the PWM basic signal Vv generation unit 56, and the PWM basic signal Vw generation unit 57 are output from the reference signals Eu, Ev, Ew output from the reference signal generation unit 50 and the triangular wave signal generation unit 54. The PWM basic signals Vu, Vv, Vw for switching for each MOSFET are generated by voltage comparison with the triangular wave signal Eo.

三相正弦波信号生成部51で生成される三相正弦波信号が基準信号Euとして選択出力される場合の基準信号Eu、三角波信号Eo、PWM基本信号Vuの波形を一例として図3に示している。波形整形部52で生成される二相変調用信号が基準信号Euとして選択出力される場合の基準信号Eu、三角波信号Eo、PWM基本信号Vuの波形を一例として図4に示している。   FIG. 3 shows an example of waveforms of the reference signal Eu, the triangular wave signal Eo, and the PWM basic signal Vu when the three-phase sine wave signal generated by the three-phase sine wave signal generation unit 51 is selectively output as the reference signal Eu. Yes. FIG. 4 shows an example of waveforms of the reference signal Eu, the triangular wave signal Eo, and the PWM basic signal Vu when the two-phase modulation signal generated by the waveform shaping unit 52 is selectively output as the reference signal Eu.

PWM基本信号Vu生成部55で生成されるPWM基本信号Vuは、遅延部61を介して上流側のMOSFET2uおよび逆電圧印加回路4uに上素子駆動信号として供給されるとともに、反転回路62および遅延回路63を介して下流側のMOSFET3uおよび逆電圧印加回路5uに下素子駆動信号として供給される。   The PWM basic signal Vu generated by the PWM basic signal Vu generating unit 55 is supplied as an upper element drive signal to the upstream side MOSFET 2u and the reverse voltage applying circuit 4u via the delay unit 61, and the inverting circuit 62 and the delay circuit. A lower element drive signal is supplied to the downstream side MOSFET 3u and the reverse voltage application circuit 5u via 63.

PWM基本信号Vv生成部56で生成されるPWM基本信号Vvは、遅延部64を介して上流側のMOSFET2vおよび逆電圧印加回路4vに上素子駆動信号として供給されるとともに、反転回路62および遅延回路63を介して下流側のMOSFET3vおよび逆電圧印加回路5vに下素子駆動信号として供給される。   The PWM basic signal Vv generated by the PWM basic signal Vv generator 56 is supplied as an upper element drive signal to the upstream MOSFET 2v and the reverse voltage application circuit 4v via the delay unit 64, and also includes the inverting circuit 62 and the delay circuit. The lower element drive signal is supplied to the downstream side MOSFET 3v and the reverse voltage application circuit 5v through 63.

PWM基本信号Vv生成部57で生成されるPWM基本信号Vvは、遅延部67を介して上流側のMOSFET2wおよび逆電圧印加回路4wに上素子駆動信号として供給されるとともに、反転回路68および遅延回路69を介して下流側のMOSFET3wおよび逆電圧印加回路5wに下素子駆動信号として供給される。   The PWM basic signal Vv generated by the PWM basic signal Vv generation unit 57 is supplied as an upper element drive signal to the upstream side MOSFET 2w and the reverse voltage application circuit 4w via the delay unit 67, as well as the inverting circuit 68 and the delay circuit. 69 is supplied as a lower element drive signal to the downstream side MOSFET 3w and the reverse voltage application circuit 5w via 69.

基準信号Eu、三角波信号Eo、PWM基本信号Vu、上素子駆動信号、下素子駆動信号、反転信号、逆電圧印加回路5uで生成されるパルス信号および1ショットパルス信号を一例として図5に示している。なお、図5は低レベル駆動(Low Active)の信号波形を示しており、上素子駆動信号、下素子駆動信号、1ショットパルス信号がそれぞれ低レベルのときにMOSFETがオンし、高レベルのときにMOSFETがオフする。   FIG. 5 shows an example of the reference signal Eu, the triangular wave signal Eo, the PWM basic signal Vu, the upper element driving signal, the lower element driving signal, the inverted signal, the pulse signal generated by the reverse voltage application circuit 5u, and the one-shot pulse signal. Yes. FIG. 5 shows a signal waveform of low level driving (Low Active). When the upper element driving signal, the lower element driving signal, and the one-shot pulse signal are low level, the MOSFET is turned on, and when it is high level. The MOSFET is turned off.

遅延部61は、PWM基本信号Vuの低レベルへの立下りから一定時間t1後に上素子駆動信号を低レベルに立下げる。反転回路62は、PWM基本信号Vuの高レベルと低レベルを反転する。遅延部63は、PWM基本信号Vuの高レベルへの立上りから一定時間t1後に下素子駆動信号を低レベルに立下げる。逆電圧印加回路5uのパルス生成回路45は、PWM基本信号Vuの低レベルへの立下り、すなわち下素子(3u)駆動信号の立上がりから一定時間t2遅れて立下がり、下素子(3u)駆動信号の立下がりから一定時間t2遅れて立上がる波形のパルス信号を生成する。さらに、パルス生成回路45は、上述の生成パルス信号の低レベルへの立下りに同期して低レベルに立下がり、その立下りから一定時間t3後に高レベルに立上がる波形の1ショットパルス信号を出力する。この1ショットパルス信号がゲート駆動回路46のゲート駆動信号となり、逆電圧印加回路5uの逆電圧印加用MOSFET43をオンする。   The delay unit 61 causes the upper element drive signal to fall to a low level after a predetermined time t1 from the fall of the PWM basic signal Vu to a low level. The inverting circuit 62 inverts the high level and low level of the PWM basic signal Vu. The delay unit 63 lowers the lower element drive signal to a low level after a predetermined time t1 from the rising of the PWM basic signal Vu to a high level. The pulse generation circuit 45 of the reverse voltage application circuit 5u falls to the low level of the PWM basic signal Vu, that is, falls after a certain time t2 from the rise of the lower element (3u) drive signal, and the lower element (3u) drive signal. A pulse signal having a waveform rising after a certain time t2 from the falling of the signal is generated. Further, the pulse generation circuit 45 generates a one-shot pulse signal having a waveform that falls to a low level in synchronization with the fall of the generated pulse signal to a low level and rises to a high level after a certain time t3 from the fall. Output. This one-shot pulse signal becomes the gate drive signal of the gate drive circuit 46, and turns on the reverse voltage application MOSFET 43 of the reverse voltage application circuit 5u.

一定時間t1,t2,t3には、t1>t2およびt3>(t1−t2)の条件がある。このうち、一定時間t1は、同じ直列回路における上流側のMOSFET2uと下流側のMOSFET3uとが同時にオン(直列回路が短絡)しないようにするためのデッドタイムである。一定時間t2は、下流側のMOSFET3uがオフしてから上流側のMOSFET2uがオンするまでの期間における1ショットパルス信号の生成タイミングを設定するためのものである。したがって、一定時間t3は、上流側のMOSFET2uがオンするタイミングを包含する期間となる。すなわち、各MOSFET2,3の逆電圧印加回路4,5は、対応するMOSFETがオフした後でオンし、そのMOSFETと対となるMOSFETがオンした後にオフするようになっている。   There are conditions of t1> t2 and t3> (t1-t2) in the fixed times t1, t2, and t3. Among these, the fixed time t1 is a dead time for preventing the upstream-side MOSFET 2u and the downstream-side MOSFET 3u from being simultaneously turned on (the series circuit is short-circuited) in the same series circuit. The fixed time t2 is for setting the generation timing of the one-shot pulse signal in the period from when the downstream side MOSFET 3u is turned off to when the upstream side MOSFET 2u is turned on. Therefore, the fixed time t3 is a period including the timing when the upstream MOSFET 2u is turned on. That is, the reverse voltage application circuits 4 and 5 of the MOSFETs 2 and 3 are turned on after the corresponding MOSFET is turned off, and turned off after the MOSFET paired with the MOSFET is turned on.

一方、抵抗11u,11v,11wに生じる電圧が、電流検出部70に供給される。電流検出部70は、抵抗11u,11v,11wに生じる電圧から、各MOSFETに流れる電流、つまりブラシレスDCモータMの各相巻線に流れる電流を検出する。この検出結果が上記基準信号発生部50の三相正弦波信号生成部51に供給されるとともに、故障検出部71に供給される。三相正弦波信号生成部51は、電流検出部70の検出結果からブラシレスDCモータMのロータの回転速度を推定し、推定した回転速度に応じて三相正弦波信号Eu,Ev,Ewの周波数を変化させる。故障検出部71は、スイッチング回路1における逆電圧印加回路4u,5u,4v,5v,4w,5wの故障を検出するもので、上記電流検出部70で検出される各MOSFETに流れる電流から過大な逆回復電流Irrの発生を検出し、逆電圧印加回路4u,5u,4v,5v,4w,5wが不動作の故障であるか否かを判定する。この判定結果が選択制御部54に供給される。選択制御部54は、基準信号生成部50の選択部53を制御するもので、故障検出部71の判定結果が故障なしの場合に三相正弦波信号生成部51からの三相正弦波信号を選択出力させ、故障検出部71の判定結果が故障ありの場合に波形整形部52からの二相変調用信号を選択出力させる。なお、逆回復電流Irrは、逆方向電圧印加回路が正常に動作している場合には、逆電圧印加回路のオン時に発生し、不動作時には対となるMOSFETのオン時に発生するので、その発生タイミングが異なっていること、また電流の大きさも異なることから、この2つの条件のいずれかまたは両方の組み合せを用いて検出が可能である。   On the other hand, the voltage generated in the resistors 11u, 11v, and 11w is supplied to the current detector 70. The current detection unit 70 detects the current flowing through each MOSFET, that is, the current flowing through each phase winding of the brushless DC motor M, from the voltages generated in the resistors 11u, 11v, and 11w. This detection result is supplied to the three-phase sine wave signal generation unit 51 of the reference signal generation unit 50 and also to the failure detection unit 71. The three-phase sine wave signal generation unit 51 estimates the rotational speed of the rotor of the brushless DC motor M from the detection result of the current detection unit 70, and the frequencies of the three-phase sine wave signals Eu, Ev, Ew according to the estimated rotational speed. To change. The failure detection unit 71 detects a failure of the reverse voltage application circuits 4u, 5u, 4v, 5v, 4w, and 5w in the switching circuit 1, and is excessive from the current flowing through each MOSFET detected by the current detection unit 70. Generation of the reverse recovery current Irr is detected, and it is determined whether or not the reverse voltage application circuits 4u, 5u, 4v, 5v, 4w, and 5w are malfunctions. The determination result is supplied to the selection control unit 54. The selection control unit 54 controls the selection unit 53 of the reference signal generation unit 50. When the determination result of the failure detection unit 71 indicates no failure, the selection control unit 54 outputs the three-phase sine wave signal from the three-phase sine wave signal generation unit 51. The two-phase modulation signal from the waveform shaping unit 52 is selectively output when the determination result of the failure detection unit 71 is faulty. The reverse recovery current Irr is generated when the reverse voltage application circuit is operating normally when the reverse voltage application circuit is operating normally, and is generated when the paired MOSFET is turned on when the reverse voltage application circuit is not operating. Since the timing is different and the magnitude of the current is also different, detection is possible using either one of these two conditions or a combination of both.

つぎに、図5および図6を参照しながら作用について説明する。
三相正弦波(図3)の基準信号Eu,Ev,Ewと三角波信号Eoとの電圧比較によるいわゆる三相変調が実行される。基準信号Eu,Ev,Ewは、ブラシレスDCモータMの回転速度に比例して周波数が変化する。この電圧比較により、上流側のMOSFET2u,2v,2wをそれぞれオン,オフするための上素子駆動信号、および別の直列回路の下流側のMOSFET3u,3v,3wをオン,オフするための下素子駆動信号が作成される。
Next, the operation will be described with reference to FIGS.
So-called three-phase modulation is performed by voltage comparison between the reference signals Eu, Ev, Ew of the three-phase sine wave (FIG. 3) and the triangular wave signal Eo. The frequencies of the reference signals Eu, Ev, Ew change in proportion to the rotation speed of the brushless DC motor M. By this voltage comparison, an upper element drive signal for turning on and off the upstream side MOSFETs 2u, 2v, and 2w, and a lower element drive for turning on and off the downstream side MOSFETs 3u, 3v, and 3w of another series circuit, respectively. A signal is created.

この三相変調によって作成される上素子駆動信号および下素子駆動信号により、スイッチング回路1における各直列回路のうち、少なくとも1つの直列回路の上流側MOSFETがオン,オフして別の少なくとも1つの直列回路の下流側MOSFETがオンする複数相通電が、順次に切換えられる。この複数相通電の切換えにより、3つの相間電圧が生じ、その各相間電圧がブラシレスDCモータMの相巻線Lu,Lv,Lwに印加される。これにより、Lu,Lv,Lwに正弦波状の電流が流れ、ブラシレスDCモータMが動作する。   By the upper element drive signal and the lower element drive signal created by this three-phase modulation, the upstream MOSFET of at least one series circuit of each series circuit in the switching circuit 1 is turned on and off to turn on at least one other series. Multiple-phase energization in which the downstream MOSFET of the circuit is turned on is sequentially switched. By switching the multiphase energization, three interphase voltages are generated, and the interphase voltages are applied to the phase windings Lu, Lv, and Lw of the brushless DC motor M. Thereby, a sinusoidal current flows through Lu, Lv, and Lw, and the brushless DC motor M operates.

ところで、いずれかの相巻線に蓄えられたエネルギに基づく電流が上流側のMOSFET2uの還流ダイオードDu+を順方向に流れたとする。この順方向電流いわゆる還流電流が流れている場合、下流側のMOSFET3uのオンに先立ち、逆電圧印加回路4uの逆電圧印加用MOSFET43がオンし、逆電圧印加用コンデンサ42に蓄えられている電圧がMOSFET2uの還流ダイオードDu+に逆電圧として印加される。この逆電圧の印加期間は、MOSFET3uのオフ後から始まり、MOSFET2uのオンタイミングを含む一定時間t3である。   By the way, it is assumed that a current based on the energy stored in one of the phase windings flows in the forward direction through the free-wheeling diode Du + of the upstream MOSFET 2u. When this forward current so-called return current flows, the reverse voltage application MOSFET 43 of the reverse voltage application circuit 4u is turned on prior to turning on the downstream side MOSFET 3u, and the voltage stored in the reverse voltage application capacitor 42 is reduced. The reverse voltage is applied to the freewheeling diode Du + of the MOSFET 2u. The reverse voltage application period starts after the MOSFET 3u is turned off and is a fixed time t3 including the ON timing of the MOSFET 2u.

還流電流が流れている状態のMOSFET2uに逆電圧印加回路4uから電圧が印加されると、MOSFET2uの還流ダイオードDu+に逆回復電流Irrが流れる。この場合、MOSFET2uに印加される逆電圧は逆電圧印加回路4u内の直流電源40に基づく電圧であり、直流電源30の電圧(例えば直流280V)よりもはるかに電圧が低いことから、MOSFET2uの還流ダイオードDu+に逆回復電流Irrが流れても、その逆回復電流Irrの値はきわめて小さい。   When a voltage is applied from the reverse voltage application circuit 4u to the MOSFET 2u in a state where the return current flows, a reverse recovery current Irr flows through the return diode Du + of the MOSFET 2u. In this case, the reverse voltage applied to the MOSFET 2u is a voltage based on the DC power supply 40 in the reverse voltage application circuit 4u and is much lower than the voltage of the DC power supply 30 (for example, DC 280V). Even if the reverse recovery current Irr flows through the diode Du +, the value of the reverse recovery current Irr is extremely small.

なお、逆回復電流Irrが流れる期間については、直流電源30の電圧(例えば280V)が加わる場合よりも、長くなる。しかしながら、MOSFET2uの還流ダイオードDu+における電力積算値は、消費電力と時間の積であるから、たとえ逆回復電流Irrの期間が長くなっても、逆回復電流Irrの値がきわめて小さければ、積算電力は大幅に低くなる。したがって、MOSFET2uの還流ダイオードDu+における電力損失を大幅に低減することができ、効率の向上が図れる。   Note that the period during which the reverse recovery current Irr flows is longer than when the voltage of the DC power supply 30 (for example, 280 V) is applied. However, since the integrated power value of the freewheeling diode Du + of the MOSFET 2u is a product of the power consumption and the time, even if the period of the reverse recovery current Irr is long, if the value of the reverse recovery current Irr is very small, the integrated power is Significantly lower. Therefore, the power loss in the free-wheeling diode Du + of the MOSFET 2u can be greatly reduced, and the efficiency can be improved.

ここで、各逆電圧印加回路の内部で開放となる不動作の故障が生じると、逆回復電流Irrを抑制できなくなり、故障した逆電圧印加回路に対応するMOSFETの温度が大きく上昇する。この場合、故障検出部71において、各逆電圧印加回路のいずれかが故障であると判定される。   Here, if an inoperative failure that opens in each reverse voltage application circuit occurs, the reverse recovery current Irr cannot be suppressed, and the temperature of the MOSFET corresponding to the failed reverse voltage application circuit rises greatly. In this case, the failure detection unit 71 determines that any one of the reverse voltage application circuits has a failure.

故障ありが判定されると、図4に示す二相変調用信号が基準信号Eu,Ev,Ewとして選択出力される。そして、二相変調用信号の基準信号Eu,Ev,Ewと三角波信号Eoとの電圧比較によるいわゆる2相変調が実行されることで、各MOSFETのスイッチング回数が通常(三相変調時)のほぼ2/3に減少する。これに伴い、各MOSFETに逆回復電流Irrが流れる頻度が低減する。各MOSFETに逆回復電流Irrが流れる頻度が低減することにより、故障した逆電圧印加回路に対応するMOSFETの温度上昇が抑制され、そのMOSFETの過熱や破壊を防ぐことができる。この変調方式の変更に伴い、効率低下や波形の歪み等の若干の不具合が生じるが、致命的な問題は生じないため、そのまま運転が継続可能となる。   When it is determined that there is a failure, the two-phase modulation signal shown in FIG. 4 is selectively output as the reference signals Eu, Ev, Ew. Then, by performing so-called two-phase modulation based on voltage comparison between the reference signals Eu, Ev, Ew of the two-phase modulation signal and the triangular wave signal Eo, the number of switching times of each MOSFET is almost the same as usual (during three-phase modulation). Decrease to 2/3. Along with this, the frequency of the reverse recovery current Irr flowing through each MOSFET is reduced. By reducing the frequency of the reverse recovery current Irr flowing through each MOSFET, the temperature rise of the MOSFET corresponding to the failed reverse voltage application circuit is suppressed, and overheating and destruction of the MOSFET can be prevented. Along with this change in the modulation method, there are some problems such as efficiency reduction and waveform distortion, but since no fatal problem occurs, the operation can be continued as it is.

[2]第2の実施形態について説明する。
制御部10の要部を図7に示している。すなわち、第1の実施形態の選択制御部74に代わり、周波数制御部75が採用されている。周波数制御部75は、三角波信号生成部54で生成される三角波信号Eoの周波数を制御するもので、故障検出部71における判定結果が故障なしの場合に三角波信号Eoの周波数を予め定められている所定周波数fsに設定し、判定結果が故障ありの場合に三角波信号Eoの周波数を上記所定周波数fsよりもΔfだけ低い周波数に設定する。
他の構成は、第1の実施形態と同じである。作用を図8のフローチャートに示す。
故障ありが判定されると、三角波信号Eoの周波数が通常時の所定周波数fsよりもΔfだけ低い周波数に設定される。こうして、三角波信号Eoの周波数が低減されることで、各MOSFETのスイッチング回数が通常よりも減少する。これに伴い、各MOSFETに逆回復電流Irrが流れる頻度が低減する。
[2] A second embodiment will be described.
The principal part of the control part 10 is shown in FIG. That is, a frequency control unit 75 is employed instead of the selection control unit 74 of the first embodiment. The frequency control unit 75 controls the frequency of the triangular wave signal Eo generated by the triangular wave signal generation unit 54, and the frequency of the triangular wave signal Eo is determined in advance when the determination result in the failure detection unit 71 indicates no failure. The predetermined frequency fs is set, and when the determination result is a failure, the frequency of the triangular wave signal Eo is set to a frequency lower by Δf than the predetermined frequency fs.
Other configurations are the same as those of the first embodiment. The operation is shown in the flowchart of FIG.
When it is determined that there is a failure, the frequency of the triangular wave signal Eo is set to a frequency lower by Δf than the normal frequency fs. Thus, the frequency of the triangular wave signal Eo is reduced, so that the number of switching times of each MOSFET is reduced more than usual. Along with this, the frequency of the reverse recovery current Irr flowing through each MOSFET is reduced.

[3]第3の実施形態について説明する。
制御部10の要部を図9に示している。すなわち、第1の実施形態の選択制御部74に代わり、周波数制御部75が採用されるとともに、電流検出部70の検出電流からMOSFETに流れる電流の大きさを推定する電流推定部72が新たに追加され、周波数制御部75に電流推定部72の推定結果が供給される。
[3] A third embodiment will be described.
The principal part of the control part 10 is shown in FIG. That is, instead of the selection control unit 74 of the first embodiment, a frequency control unit 75 is adopted, and a current estimation unit 72 that estimates the magnitude of the current flowing through the MOSFET from the detection current of the current detection unit 70 is newly provided. In addition, the estimation result of the current estimation unit 72 is supplied to the frequency control unit 75.

周波数制御部75は、故障検出部71における判定結果が故障なしの場合に三角波信号Eoの周波数を予め定められている所定周波数fsに設定し、判定結果が故障ありの場合に三角波信号Eoの周波数を上記所定周波数fsよりも低く且つ電流推定部72の電流推定結果に応じた周波数に設定する。他の構成は、第1の実施形態と同じで、作用を図10のフローチャートに示す。
故障ありが判定されると、三角波信号Eoの周波数が通常時の所定周波数fsよりも低く、かつ電流推定部72の電流推定結果に応じた周波数に設定される。すなわち、電流・温度推定部72で推定される電流が大きいほど、MOSFETの温度上昇が大きいとの判断の下に、三角波信号Eoの周波数の低減幅が増大される。
The frequency control unit 75 sets the frequency of the triangular wave signal Eo to a predetermined frequency fs that is set in advance when the determination result in the failure detection unit 71 indicates no failure, and the frequency of the triangular wave signal Eo when the determination result indicates that there is a failure. Is set to a frequency lower than the predetermined frequency fs and according to the current estimation result of the current estimation unit 72. The other configuration is the same as that of the first embodiment, and the operation is shown in the flowchart of FIG.
If it is determined that there is a failure, the frequency of the triangular wave signal Eo is set to a frequency that is lower than the predetermined frequency fs during normal operation and that corresponds to the current estimation result of the current estimation unit 72. That is, the greater the current estimated by the current / temperature estimation unit 72, the greater the reduction in the frequency of the triangular wave signal Eo under the judgment that the temperature rise of the MOSFET is greater.

三角波信号Eoの周波数が低減されることで、各MOSFETのスイッチング回数が通常よりも減少し、そのMOSFETの過熱や破壊を防ぐことができる。   By reducing the frequency of the triangular wave signal Eo, the switching frequency of each MOSFET is reduced more than usual, and overheating and destruction of the MOSFET can be prevented.

[4]第4の実施形態について説明する。この第4の実施形態では、上記した第1、第2、第3の実施形態のいずれかの制御に加え、逆電圧印加回路の故障時に、モータのベクトル制御を調整してMOSFETに流れる電流を低減する。
制御部10における基準信号生成部50の構成を図11に示し、その動作概要を図12のフローチャートに示している。基準信号生成部50は、電流検出部70で検出される相巻線電流からブラシレスDCモータMのロータの回転速度を推定し、推定した回転速度ωestと外部からの設定回転速度ωrefとの差分を求め、求めた差分に対応する電流制御値IqrefをPI制御部で得るとともに、その電流制御値Iqrefからもう1つの電流制御値Idrefを得る。そして、基準信号生成部50は、電流制御値Iqref,IdrefをIq制限手段およびId制限手段に通し、さらにPI制御部にそれぞれ通すことにより電圧制御値Vq,Vdを得て、その電圧制御値Vq,Vdに応じた電圧レベルの三相正弦波信号を基準信号Eu,Ev,Ewとして出力する。Iq制限手段およびId制限手段は、故障検出部71で故障が検出された場合に、Iq制限およびId制限をオンする。この制限オンにより、基準信号Eu,Ev,Ewの電圧が通常レベルより低いレベルに設定される。これにより、各MOSFETのオン,オフデューティが減少し、それに伴い、各MOSFETに流れる電流が減少し、それに伴って逆回復電流が低減される。
他の構成は、第1の実施形態と同じである。
[4] A fourth embodiment will be described. In the fourth embodiment, in addition to the control of any of the first, second, and third embodiments described above, the current flowing through the MOSFET is adjusted by adjusting the motor vector control when the reverse voltage application circuit fails. To reduce.
The configuration of the reference signal generation unit 50 in the control unit 10 is shown in FIG. 11, and the outline of the operation is shown in the flowchart of FIG. The reference signal generator 50 estimates the rotational speed of the rotor of the brushless DC motor M from the phase winding current detected by the current detector 70, and calculates the difference between the estimated rotational speed ωest and the externally set rotational speed ωref. The current control value Iqref corresponding to the obtained difference is obtained by the PI control unit, and another current control value Idref is obtained from the current control value Iqref. The reference signal generation unit 50 passes the current control values Iqref and Idref through the Iq limiting unit and the Id limiting unit, and further passes through the PI control unit, thereby obtaining the voltage control values Vq and Vd, and the voltage control value Vq , Vd, a three-phase sine wave signal having a voltage level corresponding to Vd is output as reference signals Eu, Ev, Ew. The Iq restriction unit and the Id restriction unit turn on the Iq restriction and the Id restriction when a failure is detected by the failure detection unit 71. With this restriction ON, the voltages of the reference signals Eu, Ev, Ew are set to a level lower than the normal level. As a result, the on / off duty of each MOSFET decreases, and accordingly, the current flowing through each MOSFET decreases, and the reverse recovery current decreases accordingly.
Other configurations are the same as those of the first embodiment.

なお、変形例として、図13のフローチャートに示すように、第1の実施形態の制御、第3の実施形態の制御、および第4の実施形態の制御を組み合わせてもよい。故障した逆電圧印加回路に対応するMOSFETの温度上昇が確実に抑制され、MOSFETの過熱や破壊を防ぐことができる。   As a modification, as shown in the flowchart of FIG. 13, the control of the first embodiment, the control of the third embodiment, and the control of the fourth embodiment may be combined. The temperature rise of the MOSFET corresponding to the failed reverse voltage application circuit is reliably suppressed, and the MOSFET can be prevented from overheating and destruction.

[5]第5の実施形態について説明する。
上記各実施形態では、故障を電流から検出するとともに、各MOSFETの電流に応じてスイッチング回数等の制御量を変更するように構成したが、各MOSFETの温度を間接的に検知し、これを故障検出に用いるとともに、制御量の変更を行う構成としてもよい。
[5] A fifth embodiment will be described.
In each of the above embodiments, the failure is detected from the current, and the control amount such as the number of switching is changed according to the current of each MOSFET. However, the temperature of each MOSFET is indirectly detected, and the failure is detected. While using for a detection, it is good also as a structure which changes a control amount.

すなわち、図14において、80はスイッチング回路1が搭載される回路基板である。この回路基板80上にフレーム81が立設され、そのフレーム81に3つの保持部材82を介してMOSFET2u,3u,2v,3v,2w,3wが背面のヒートシンク(フィン付き放熱板)83に密着するように保持されている。これらMOSFETは、回路基板80に配線接続されている。そして、MOSFETの近傍のヒートシンク83に、ヒートシンク83の温度を検出する温度センサ84が取り付けられている。温度センサ84は1つであるが、各MOSFETの配設位置が近く、かつ熱伝導性の良いヒートシンク83に密着して取り付けられているため、MOSFETのいずれか1つが温度上昇すれば、それを検知することができる。   That is, in FIG. 14, 80 is a circuit board on which the switching circuit 1 is mounted. A frame 81 is erected on the circuit board 80, and the MOSFETs 2 u, 3 u, 2 v, 3 v, 2 w, and 3 w are in close contact with the heat sink (fined heat sink) 83 on the back surface via three holding members 82. So that it is held. These MOSFETs are connected to the circuit board 80 by wiring. A temperature sensor 84 that detects the temperature of the heat sink 83 is attached to the heat sink 83 near the MOSFET. Although there is only one temperature sensor 84, each MOSFET is located close to each other and is attached in close contact with a heat sink 83 with good thermal conductivity, so if any one of the MOSFETs rises in temperature, Can be detected.

この構成を第1の実施形態に適用すると、図2の故障検出部71には電流検出部70の検出結果の代わりに温度センサ84の検知温度が入力され、その検知温度が所定値以上であれば、故障と判定され、所定値未満であれば正常と判定される。   When this configuration is applied to the first embodiment, the detection temperature of the temperature sensor 84 is input to the failure detection unit 71 in FIG. 2 instead of the detection result of the current detection unit 70, and the detection temperature is equal to or higher than a predetermined value. If it is less than a predetermined value, it is determined to be normal.

また、図9の第3の実施形態に適用すれば、故障検出部71には電流検出部70の検出結果の代わりに温度センサ84の検知温度が入力され、電流推定部72の代わりに温度推定部が設けられる。この温度推定部は、温度センサ84が検知してヒートシンク温度からMOSFET素子の温度を推定する。そして、故障ありが判定されると、三角波信号Eoの周波数が通常時の所定周波数fsよりも低く、かつ推定される温度が高いほど、三角波信号Eoの周波数の低減幅が増大される。同様に、第2、第5の実施形態についても適用可能である。   Further, when applied to the third embodiment of FIG. 9, the detected temperature of the temperature sensor 84 is input to the failure detection unit 71 instead of the detection result of the current detection unit 70, and the temperature estimation is performed instead of the current estimation unit 72. Parts are provided. This temperature estimation part is detected by the temperature sensor 84 and estimates the temperature of the MOSFET element from the heat sink temperature. When it is determined that there is a failure, the frequency width of the triangular wave signal Eo is increased as the frequency of the triangular wave signal Eo is lower than the normal frequency fs and the estimated temperature is higher. Similarly, the present invention can be applied to the second and fifth embodiments.

さらに、故障検出は電流にて検出し、制御量(スイッチング回路)の変更は、素子の推定温度に基づいて制御したり、逆に故障は温度にて検出し、制御量の変更は、素子に流れる電流推定値に基づいて制御することも可能であり、種々の組み合わせが考えられる。   In addition, failure detection is detected by current, and the change of the control amount (switching circuit) is controlled based on the estimated temperature of the element, or conversely, the failure is detected by temperature. It is also possible to control based on the estimated current value, and various combinations are conceivable.

[6]上記各実施形態では、スイッチング回路1におけるスイッチング素子として全てMOSFETを用いたが、MOSFETはスイッチング回路1における各直列回路の少なくとも一方に用いられていればよく、残りは他のスイッチング素子を用いることが可能である。   [6] In each of the above embodiments, MOSFETs are all used as switching elements in the switching circuit 1. However, the MOSFETs only need to be used in at least one of the series circuits in the switching circuit 1, and the remaining switching elements are other switching elements. It is possible to use.

この発明の第1の実施形態の構成および冷凍サイクルの構成を示す図。The figure which shows the structure of 1st Embodiment of this invention, and the structure of a refrigerating cycle. 第1の実施形態における制御部の要部の構成を示すブロック図。The block diagram which shows the structure of the principal part of the control part in 1st Embodiment. 第1の実施形態における三相正弦波信号、三角波信号、PWM基本信号の波形を示す図。The figure which shows the waveform of the three-phase sine wave signal in 1st Embodiment, a triangular wave signal, and a PWM basic signal. 第1の実施形態における二相変調用信号、三角波信号、PWM基本信号の波形を示す図。The figure which shows the waveform of the signal for a two-phase modulation in 1st Embodiment, a triangular wave signal, and a PWM basic signal. 各実施形態における各部の尊号波形を示す図。The figure which shows the honorific waveform of each part in each embodiment. 第1の実施形態の作用を説明するためのフローチャート。The flowchart for demonstrating the effect | action of 1st Embodiment. 第2の実施形態における制御部の要部の構成を示すブロック図。The block diagram which shows the structure of the principal part of the control part in 2nd Embodiment. 第2の実施形態の作用を説明するためのフローチャート。The flowchart for demonstrating the effect | action of 2nd Embodiment. 第3の実施形態における制御部の要部の構成を示すブロック図。The block diagram which shows the structure of the principal part of the control part in 3rd Embodiment. 第3の実施形態の作用を説明するためのフローチャート。The flowchart for demonstrating the effect | action of 3rd Embodiment. 第4の実施形態における制御部の要部の構成を示すブロック図。The block diagram which shows the structure of the principal part of the control part in 4th Embodiment. 第4の実施形態の作用を説明するためのフローチャート。The flowchart for demonstrating the effect | action of 4th Embodiment. 第4の実施形態の変形例の作用を説明するためのフローチャート。The flowchart for demonstrating the effect | action of the modification of 4th Embodiment. 第5の実施形態における温度センサの取付け状態を示す図。The figure which shows the attachment state of the temperature sensor in 5th Embodiment.

符号の説明Explanation of symbols

1…スイッチング回路、2u,2v,2w…上流側のMOSFET(スイッチング素子)、3u,3v,3w…下流側のMOSFET(スイッチング素子)、4u,4v,4w…逆電圧印加回路、5u,5v,5w…逆電圧印加回路、Du+,Dv+,Dw+,Du−,Dv−,Dw−…還流ダイオード、10…制御部、30…直流電源、42…逆電圧印加用コンデンサ、43…逆電圧印加用MOSFET、50…基準信号生成部、51…三相正弦波信号生成部、52…波形整形部、53…選択部、54…三角波信号生成部、55…PWM基本信号Vu生成部、56…PWM基本信号Vv生成部、57…PWM基本信号Vw生成部、70…電流検出部、71…故障検出部、72…電流・温度推定部、73…故障判定部、74…選択制御部、75…周波数制御部、80…回路基板、84…温度センサ、M…ブラシレスDCモータ、Lu,Lv,Lw…相巻線   DESCRIPTION OF SYMBOLS 1 ... Switching circuit, 2u, 2v, 2w ... Upstream side MOSFET (switching element), 3u, 3v, 3w ... Downstream side MOSFET (switching element), 4u, 4v, 4w ... Reverse voltage application circuit, 5u, 5v, 5w ... reverse voltage application circuit, Du +, Dv +, Dw +, Du-, Dv-, Dw -... freewheeling diode, 10 ... control unit, 30 ... DC power supply, 42 ... reverse voltage application capacitor, 43 ... reverse voltage application MOSFET 50 ... reference signal generator 51 ... three-phase sine wave signal generator 52 ... waveform shaping unit 53 ... selection unit 54 ... triangular wave signal generator 55 ... PWM basic signal Vu generator 56 ... PWM basic signal Vv generator, 57 ... PWM basic signal Vw generator, 70 ... current detector, 71 ... failure detector, 72 ... current / temperature estimator, 73 ... failure determiner, 74 ... selection controller, 7 ... frequency control unit, 80 ... circuit board, 84 ... temperature sensor, M ... brushless DC motor, Lu, Lv, Lw ... phase winding

Claims (5)

還流ダイオードを有するMOSFETを少なくとも一方に用いた2つのスイッチング素子の直列回路を複数備え、これら直列回路の各スイッチング素子の相互接続点が負荷に接続されるスイッチング回路と、
前記各直列回路のうち少なくとも1つの直列回路の上流側のスイッチング素子および別の少なくとも1つの直列回路の下流側のスイッチング素子による前記負荷への通電を、順次に切換える第1制御手段と、
前記MOSFETと同じ直列回路の他方のスイッチング素子のオンに先立ち、同MOSFETに逆電圧を印加する逆電圧印加回路と、
前記逆電圧印加回路の不動作の故障を検出する故障検出手段と、
前記故障検出手段で故障が検出された場合に、前記MOSFETのスイッチング回数を通常より減らす第2制御手段と、
を備えていることを特徴とするインバータ装置。
A switching circuit in which a plurality of series circuits of two switching elements each using a MOSFET having a free-wheeling diode are used, and an interconnection point of each switching element of these series circuits is connected to a load;
First control means for sequentially switching energization to the load by a switching element upstream of at least one of the series circuits and a switching element downstream of another at least one of the series circuits;
Prior to turning on the other switching element of the same series circuit as the MOSFET, a reverse voltage application circuit for applying a reverse voltage to the MOSFET,
Failure detection means for detecting a malfunction of the reverse voltage application circuit; and
A second control means for reducing the number of switchings of the MOSFET from a normal level when a failure is detected by the failure detection means;
An inverter device comprising:
前記第1制御手段は、三相正弦波信号と二相変調用信号を生成可能で、生成した三相正弦波信号および二相変調用信号のいずれか一方を基準信号として出力する基準信号生成部と、この基準信号生成部から出力される基準信号と三角波信号との電圧比較により前記各スイッチング素子に対するスイッチング用の基本信号を生成する基本信号生成部と、を有し、
前記第2制御手段は、前記故障検出手段で故障が検出されない場合に前記基準信号生成部から前記三相正弦波信号を出力させ、前記故障検出手段で故障が検出された場合に前記基準信号生成部から前記二相変調用信号を出力させる、
ことを特徴とする請求項1に記載のインバータ装置。
The first control means is capable of generating a three-phase sine wave signal and a two-phase modulation signal, and outputs either one of the generated three-phase sine wave signal or two-phase modulation signal as a reference signal. And a basic signal generation unit that generates a basic signal for switching with respect to each of the switching elements by voltage comparison between the reference signal output from the reference signal generation unit and the triangular wave signal,
The second control unit outputs the three-phase sine wave signal from the reference signal generation unit when no failure is detected by the failure detection unit, and generates the reference signal when a failure is detected by the failure detection unit. Output the two-phase modulation signal from the unit,
The inverter device according to claim 1.
前記第1制御手段は、三相正弦波信号を生成し、生成した三相正弦波信号を基準信号として出力する基準信号生成部と、この基準信号生成部から出力される基準信号と三角波信号との電圧比較により前記各スイッチング素子に対するスイッチング用の基本信号を生成する基本信号生成部と、を有し、
前記第2制御手段は、前記故障検出手段で故障が検出されない場合に前記三角波信号の周波数を予め定められている所定周波数に設定し、前記故障検出手段で故障が検出された場合に前記三角波信号の周波数を前記所定周波数よりも低い周波数に設定する、
ことを特徴とする請求項1に記載のインバータ装置。
The first control means generates a three-phase sine wave signal, outputs the generated three-phase sine wave signal as a reference signal, a reference signal and a triangular wave signal output from the reference signal generation unit, A basic signal generation unit that generates a basic signal for switching for each of the switching elements by voltage comparison of
The second control means sets the frequency of the triangular wave signal to a predetermined frequency when no failure is detected by the failure detecting means, and the triangular wave signal when a failure is detected by the failure detecting means. Is set to a frequency lower than the predetermined frequency,
The inverter device according to claim 1.
前記故障検出手段は、前記各スイッチング素子に流れる電流または前記各スイッチング素子の温度を推定する推定手段と、この推定手段の推定結果に応じて前記逆電圧印加回路が不動作の故障であるか否かを判定する判定手段と、を有している、
ことを特徴とする請求項1ないし請求項3のいずれかに記載のインバータ装置。
The failure detection means includes: estimation means for estimating a current flowing through each switching element or a temperature of each switching element; and whether the reverse voltage application circuit is a malfunction that does not operate according to an estimation result of the estimation means. Determination means for determining whether or not
The inverter device according to any one of claims 1 to 3, wherein
前記第1制御手段は、三相正弦波信号を生成し、生成した三相正弦波信号を基準信号として出力する基準信号生成部と、この基準信号生成部から出力される基準信号と三角波信号との電圧比較により前記各スイッチング素子に対するスイッチング用の基本信号を生成する基本信号生成部と、を有している、
前記第2制御手段は、前記故障検出手段で故障が検出されない場合に前記基準信号の電圧を通常レベルに設定し、前記故障検出手段で故障が検出された場合に前記基準信号の電圧を前記通常レベルより低いレベルに設定する、
ことを特徴とする請求項1に記載のインバータ装置。
The first control means generates a three-phase sine wave signal, outputs the generated three-phase sine wave signal as a reference signal, a reference signal and a triangular wave signal output from the reference signal generation unit, A basic signal generation unit that generates a basic signal for switching for each of the switching elements by voltage comparison of
The second control unit sets the voltage of the reference signal to a normal level when no failure is detected by the failure detection unit, and sets the voltage of the reference signal when the failure is detected by the failure detection unit. Set to a lower level,
The inverter device according to claim 1.
JP2006023930A 2006-01-31 2006-01-31 Inverter device Expired - Fee Related JP4769587B2 (en)

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JP2010206896A (en) * 2009-03-02 2010-09-16 Seiko Epson Corp Pwm drive circuit and electromechanical device
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JP2010206896A (en) * 2009-03-02 2010-09-16 Seiko Epson Corp Pwm drive circuit and electromechanical device
JP2011109749A (en) * 2009-11-13 2011-06-02 Mitsubishi Electric Corp Motor driver and freezing air conditioner
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