JP2007206955A - 情報処理装置および方法、プログラム、並びに記録媒体 - Google Patents

情報処理装置および方法、プログラム、並びに記録媒体 Download PDF

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Publication number
JP2007206955A
JP2007206955A JP2006024647A JP2006024647A JP2007206955A JP 2007206955 A JP2007206955 A JP 2007206955A JP 2006024647 A JP2006024647 A JP 2006024647A JP 2006024647 A JP2006024647 A JP 2006024647A JP 2007206955 A JP2007206955 A JP 2007206955A
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JP
Japan
Prior art keywords
data
interrupt
information processing
received
processor
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Pending
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JP2006024647A
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English (en)
Japanese (ja)
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JP2007206955A5 (enExample
Inventor
Hiroshi Kusogami
宏 久曽神
Masahito Kajimoto
雅人 梶本
Chiaki Yamana
千秋 山名
Kazuyoshi Horie
和由 堀江
Taku Tanaka
卓 田中
Kazumine Tachibana
一峰 立花
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Interactive Entertainment Inc
Sony Corp
Original Assignee
Sony Corp
Sony Computer Entertainment Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp, Sony Computer Entertainment Inc filed Critical Sony Corp
Priority to JP2006024647A priority Critical patent/JP2007206955A/ja
Priority to US11/669,766 priority patent/US7783810B2/en
Publication of JP2007206955A publication Critical patent/JP2007206955A/ja
Publication of JP2007206955A5 publication Critical patent/JP2007206955A5/ja
Pending legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Small-Scale Networks (AREA)
  • Computer And Data Communications (AREA)
JP2006024647A 2006-02-01 2006-02-01 情報処理装置および方法、プログラム、並びに記録媒体 Pending JP2007206955A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2006024647A JP2007206955A (ja) 2006-02-01 2006-02-01 情報処理装置および方法、プログラム、並びに記録媒体
US11/669,766 US7783810B2 (en) 2006-02-01 2007-01-31 Apparatus and method of processing information

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006024647A JP2007206955A (ja) 2006-02-01 2006-02-01 情報処理装置および方法、プログラム、並びに記録媒体

Publications (2)

Publication Number Publication Date
JP2007206955A true JP2007206955A (ja) 2007-08-16
JP2007206955A5 JP2007206955A5 (enExample) 2009-03-26

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ID=38445374

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JP2006024647A Pending JP2007206955A (ja) 2006-02-01 2006-02-01 情報処理装置および方法、プログラム、並びに記録媒体

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Country Link
US (1) US7783810B2 (enExample)
JP (1) JP2007206955A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2161660A2 (en) 2008-09-09 2010-03-10 Fujitsu Limited Information processing device having load sharing function
US8645668B2 (en) 2007-01-11 2014-02-04 Sony Corporation Information processing apparatus, information processing method and computer program
JP2014038438A (ja) * 2012-08-14 2014-02-27 Fujitsu Ltd 演算処理装置、情報処理装置及び割込制御方法

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103180829B (zh) * 2010-10-22 2016-08-03 三菱电机株式会社 中断信号接收装置及计算机装置
JP5933356B2 (ja) * 2012-06-12 2016-06-08 ルネサスエレクトロニクス株式会社 コンピュータシステム
US9628333B2 (en) * 2013-12-04 2017-04-18 International Business Machines Corporation Operating a dual chipset network interface controller (‘NIC’) that includes a high performance media access control chipset and a low performance media access control chipset

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6159565A (ja) * 1984-08-31 1986-03-27 Hitachi Ltd マルチコンピユ−タシステムの割込入力装置
JPH05298264A (ja) * 1992-04-22 1993-11-12 Toshiba Corp コンピュータシステム
JP2002342299A (ja) * 2001-05-18 2002-11-29 Nec Corp クラスタシステム、コンピュータ及びプログラム
JP2005316629A (ja) * 2004-04-28 2005-11-10 Hitachi Ltd ネットワークプロトコル処理装置

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6389468B1 (en) * 1999-03-01 2002-05-14 Sun Microsystems, Inc. Method and apparatus for distributing network traffic processing on a multiprocessor computer
US6467008B1 (en) * 1999-03-01 2002-10-15 Sun Microsystems, Inc. Method and apparatus for indicating an interrupt in a network interface
US6631422B1 (en) * 1999-08-26 2003-10-07 International Business Machines Corporation Network adapter utilizing a hashing function for distributing packets to multiple processors for parallel processing
US7126952B2 (en) * 2001-09-28 2006-10-24 Intel Corporation Multiprotocol decapsulation/encapsulation control structure and packet protocol conversion method
US7177943B1 (en) * 2001-12-27 2007-02-13 Cisco Technology, Inc. System and method for processing packets in a multi-processor environment
US7529242B1 (en) * 2002-02-15 2009-05-05 Symantec Corporation Routing network packets for multi-processor network flow analysis
JP2004252776A (ja) 2003-02-20 2004-09-09 Ntt Data Corp マルチオペレーティングシステム制御方法、およびその方法をコンピュータに実行させるプログラム、ならびにマルチオペレーティングシステム制御装置
US7418505B2 (en) * 2003-05-26 2008-08-26 Ewha University Industry Collaboration Foundation IP address lookup using either a hashing table or multiple hash functions
US20050125582A1 (en) * 2003-12-08 2005-06-09 Tu Steven J. Methods and apparatus to dispatch interrupts in multi-processor systems
US7103693B2 (en) * 2004-09-30 2006-09-05 International Business Machines Corporation Method for applying interrupt coalescing to incoming messages based on message length
EP1734418A1 (fr) * 2005-06-15 2006-12-20 Manufacture Roger Dubuis S.A. Pièce d'horlogerie

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6159565A (ja) * 1984-08-31 1986-03-27 Hitachi Ltd マルチコンピユ−タシステムの割込入力装置
JPH05298264A (ja) * 1992-04-22 1993-11-12 Toshiba Corp コンピュータシステム
JP2002342299A (ja) * 2001-05-18 2002-11-29 Nec Corp クラスタシステム、コンピュータ及びプログラム
JP2005316629A (ja) * 2004-04-28 2005-11-10 Hitachi Ltd ネットワークプロトコル処理装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8645668B2 (en) 2007-01-11 2014-02-04 Sony Corporation Information processing apparatus, information processing method and computer program
EP2161660A2 (en) 2008-09-09 2010-03-10 Fujitsu Limited Information processing device having load sharing function
JP2014038438A (ja) * 2012-08-14 2014-02-27 Fujitsu Ltd 演算処理装置、情報処理装置及び割込制御方法

Also Published As

Publication number Publication date
US20070204084A1 (en) 2007-08-30
US7783810B2 (en) 2010-08-24

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