JP2007133283A - Pixel circuit and display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a pixel circuit that can optimize mobility correction in the whole grayscale and suppress gain reduction of a bootstrap operation in a pixel capacitor carried out upon emitting light. <P>SOLUTION: The pixel circuit 2 has an additional capacitor Cgd and a switching transistor Tr6 connected between the gate G and the drain D of a drive transistor Trd. The switching transistor Tr6 is in an ON state during mobility correction is carried out and inserts the additional capacitor Cgd into between the gate G and the drain D of the drive transistor Trd to optimize the correction operation, and the switching transistor Tr6 is in an OFF state when the drive transistor Trd starts driving a light emitting element EL and separates the additional capacitor Cgd from between the gate G and the drain D of the drive transistor Trd to optimize the bootstrap operation of the pixel capacitor Cs carried out upon starting light emission of the light emitting element EL. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a pixel circuit that current-drives a light emitting element arranged for each pixel. In addition, this pixel circuit is a display device arranged in a matrix (matrix), and the amount of current supplied to a light emitting element such as an organic EL is controlled by an insulated gate field effect transistor provided in each pixel circuit. The present invention relates to a so-called active matrix display device.

  In an image display device such as a liquid crystal display, an image is displayed by arranging a large number of liquid crystal pixels in a matrix and controlling the transmission intensity or reflection intensity of incident light for each pixel in accordance with image information to be displayed. This also applies to an organic EL display using an organic EL element as a pixel, but unlike a liquid crystal pixel, the organic EL element is a self-luminous element. Therefore, the organic EL display has advantages such as higher image visibility than the liquid crystal display, no backlight, and high response speed. Further, the luminance level (gradation) of each light emitting element can be controlled by the value of the current flowing therethrough, and is greatly different from a voltage control type such as a liquid crystal display in that it is a so-called current control type.

In the organic EL display, similarly to the liquid crystal display, there are a simple matrix method and an active matrix method as driving methods. Although the former has a simple structure, there is a problem that it is difficult to realize a large-sized and high-definition display. Therefore, the active matrix method is actively developed at present. In this method, a current flowing through a light emitting element in each pixel circuit is controlled by an active element (generally a thin film transistor or TFT) provided in the pixel circuit, and is described in the following patent documents.
JP 2003-255856 A JP 2003-271095 A JP 2004-133240 A JP 2004-029791 A JP 2004-093682 A

  A conventional pixel circuit is arranged at a portion where a row scanning line for supplying a control signal and a column signal line for supplying a video signal intersect, and includes at least a sampling transistor, a capacitor, a drive transistor, and a light emitting element. . The sampling transistor conducts in response to the control signal supplied from the scanning line and samples the video signal supplied from the signal line. The capacitor unit holds an input voltage corresponding to the sampled video signal. The drive transistor supplies an output current during a predetermined light emission period in accordance with the input voltage held in the capacitor unit. In general, the output current depends on the carrier mobility and threshold voltage of the channel region of the drive transistor. The light emitting element emits light with luminance according to the video signal by the output current supplied from the drive transistor.

  The drive transistor receives the input voltage held in the capacitor portion at the gate, causes an output current to flow between the source and the drain, and energizes the light emitting element. In general, the light emission luminance of a light emitting element is proportional to the amount of current applied. Further, the output current supply amount of the drive transistor is controlled by the gate voltage, that is, the input voltage written in the capacitor. The conventional pixel circuit controls the amount of current supplied to the light emitting element by changing the input voltage applied to the gate of the drive transistor in accordance with the input video signal.

Here, the operating characteristic of the drive transistor is expressed by the following Equation 1.
Ids = (1/2) μ (W / L) Cox (Vgs−Vth) ² Formula 1
In the transistor characteristic formula 1, Ids represents a drain current flowing between the source and the drain, and is an output current supplied to the light emitting element in the pixel circuit. Vgs represents a gate voltage applied to the gate with reference to the source, and is the above-described input voltage in the pixel circuit. Vth is the threshold voltage of the transistor. Μ represents the mobility of the semiconductor thin film constituting the channel of the transistor. In addition, W represents the channel width, L represents the channel length, and Cox represents the gate capacitance. As is apparent from the transistor characteristic equation 1, when the thin film transistor operates in the saturation region, if the gate voltage Vgs increases beyond the threshold voltage Vth, the thin film transistor is turned on and the drain current Ids flows. In principle, as shown in the above transistor characteristic equation 1, if the gate voltage Vgs is constant, the same amount of drain current Ids is always supplied to the light emitting element. Therefore, if video signals of the same level are supplied to all the pixels constituting the screen, all the pixels should emit light with the same luminance, and the uniformity of the screen should be obtained.

  However, in reality, thin film transistors (TFTs) composed of semiconductor thin films such as polysilicon have variations in individual device characteristics. In particular, the threshold voltage Vth is not constant and varies from pixel to pixel. As apparent from the transistor characteristic equation 1 described above, if the threshold voltage Vth of each drive transistor varies, even if the gate voltage Vgs is constant, the drain current Ids varies and the luminance varies from pixel to pixel. , Damage the screen uniformity. Conventionally, a pixel circuit incorporating a function for canceling variations in threshold voltages of drive transistors has been developed, and is disclosed in, for example, Patent Document 3 described above.

  A pixel circuit incorporating a function for canceling variations in threshold voltage can improve screen uniformity to some extent. However, the characteristics of polysilicon thin film transistors vary not only in the threshold voltage but also in the mobility μ from element to element. As apparent from the transistor characteristic equation 1 described above, when the mobility μ varies, the drain current Ids varies even when the gate voltage Vgs is constant. As a result, the emission luminance varies from pixel to pixel, and there is a problem that the uniformity of the screen is impaired.

  In view of the above-described problems of the related art, the present invention provides a pixel circuit and a display device that can cancel the influence of mobility and thereby correct variations in drain current (output current) supplied by a drive transistor. With the goal. In particular, it is an object of the present invention to provide a pixel circuit and a display device that can optimize mobility correction over all gradations and can suppress a decrease in gain of a bootstrap operation of a pixel capacitor performed during light emission. In order to achieve this purpose, the following measures were taken. That is, according to the present invention, at least a sampling transistor, a pixel capacitor connected to the sampling transistor, and a pixel capacitor connected to the row scanning line that supplies a control signal and a column signal line that supplies a video signal are connected. And a light emitting element connected thereto. The sampling transistor conducts in response to a control signal supplied from the scanning line during a predetermined sampling period, and converts the video signal supplied from the signal line to the pixel capacitor. The pixel capacitor applies an input voltage between the gate and the source of the drive transistor according to the sampled video signal, and the drive transistor outputs an output according to the input voltage during a predetermined light emission period. Current is supplied to the light emitting element, and the output current is relative to the carrier mobility in the channel region of the drive transistor. In order to cancel the dependency of the output current on the carrier mobility in the pixel circuit that emits light with the luminance corresponding to the video signal by the output current supplied from the drive transistor. A correction unit configured to correct the input voltage held in the pixel capacitor; the correction unit operates in a part of the sampling period in accordance with a control signal supplied from a scanning line; In this state, an output current is taken out from the drive transistor, negatively fed back to the pixel capacitor to correct the input voltage, and an additional capacitor and a switching transistor connected between the gate and drain of the drive transistor The switching transistor is in an on state when the correction means operates, and the additional capacitor is connected to the switching transistor. The switching transistor is inserted between the gate and drain of the live transistor, thereby optimizing the operation of the correction means, while the switching transistor is turned off when the drive transistor starts driving the light emitting element. Is separated from the gate and drain of the drive transistor, and the bootstrap operation of the pixel capacitor performed in accordance with the start of light emission of the light emitting element is optimized.

  Preferably, the additional capacitor has a capacitance value set so that the luminance of the light emitting element is appropriate at each gradation level between the white level and the black level of the video signal. The additional capacitor is increased in size with the increase in luminance of the light emitting element, and the capacitance value is set to such an extent that the gain of the bootstrap operation of the pixel capacitor is reduced. The additional capacitor is separated from the gate and drain of the drive transistor to prevent a decrease in gain of the bootstrap operation. The switching transistor is ON / OFF controlled by the same control signal as the control signal applied to the sampling transistor, and the additional capacitor is inserted between the drain and gate of the drive transistor during the sampling period. The additional capacitor is disconnected from the drain and gate of the drive transistor. The drive transistor has an output current dependent on the threshold voltage in addition to the carrier mobility of the channel region, and the correction means cancels the dependency of the output current on the threshold voltage in advance. Prior to the sampling period, the threshold voltage of the drive transistor is detected, and the detected threshold voltage is added to the input voltage.

  The present invention also includes a pixel array section, a scanner section, and a signal section, and the pixel array section is disposed at a portion where the scanning lines arranged in rows and the signal lines arranged in columns intersect with each other. The signal unit supplies a video signal to the signal line, the scanner unit supplies a control signal to the scanning line, and sequentially scans the pixels for each row. A control signal supplied from a scanning line during a predetermined sampling period, including at least a sampling transistor, a capacitor connected to the sampling transistor, a drive transistor connected to the capacitor, and a light emitting element connected to the drive transistor. In accordance with the sampled video signal, the video signal supplied from the signal line is sampled in the capacitor unit, and the capacitor unit receives the gate and source of the drive transistor in accordance with the sampled video signal. An input voltage is applied in between, and the drive transistor supplies an output current corresponding to the input voltage to the light-emitting element during a predetermined light emission period, and the output current corresponds to the carrier mobility in the channel region of the drive transistor. In the display device in which the light emitting element emits light with luminance according to the video signal by the output current supplied from the drive transistor, each pixel has a carrier mobility of the output current of the drive transistor. In order to cancel the dependence on the input voltage, a correction unit that corrects the input voltage held in the capacitor unit before or at the beginning of the light emission period is provided, and the correction unit applies a control signal supplied from the scanning line to the control signal. Accordingly, it operates during a part of the sampling period, and takes an output current from the drive transistor in a state where the video signal is sampled. The input voltage is corrected by negatively feeding it back to the capacitor, and each pixel includes an additional capacitor and a switching transistor connected between the gate and drain of the drive transistor, and the switching transistor Is in an on state when the correction means is operating, and the additional capacitor is inserted into the gate and drain of the drive transistor, thereby optimizing the operation of the correction means, while the switching transistor is When the transistor starts to drive the light emitting element, the transistor is turned off to disconnect the additional capacitor from the gate and drain of the drive transistor, and the bootstrap operation of the pixel capacitor performed when the light emitting element starts to emit light is optimized. To do.

  According to the present invention, in order to cancel the dependence of the output current of the drive transistor on the carrier mobility, the pixel circuit is provided with a correcting means for correcting the input voltage (gate voltage) to the drive transistor before or at the beginning of the light emission period. . This correction means operates during a part of the sampling period, takes out the output current (drain current) from the drive transistor while the potential of the video signal (signal potential) is being sampled, and negatively feeds this back to the capacitor and inputs it The voltage (gate voltage) is corrected. As apparent from the transistor characteristic equation 1 described above, the output current (drain current) is proportional to the mobility. Therefore, when the mobility of the drive transistor of a certain pixel is high, the output current becomes relatively large. This is negatively fed back to the capacitor to correct the input voltage (gate voltage). If the mobility is large, the negative feedback amount is increased as a result, so that the input voltage (gate voltage) is greatly corrected downward accordingly. Since the gate voltage is lowered, the drain current is consequently suppressed. On the other hand, when the mobility of the drive transistor of another pixel is relatively small, the drain current is also reduced. Therefore, the amount of negative feedback with respect to the capacitor portion is also small, so the downward correction of the gate voltage is small. As a result, when the mobility of the drive transistor is small, the output current is not corrected so low. In this way, the correction means of the present invention feedback corrects the input voltage so as to cancel the variation in mobility, so that the uniformity of the screen is improved. In particular, mobility correction is performed in a state where the signal potential is being sampled. The amplitude of the video signal potential changes from the black level to the white level, but mobility correction can be appropriately performed at any level. Further, the amount of negative feedback applied to the input voltage depends on the output current extraction time. The longer the extraction time, the larger the negative feedback amount. In the present invention, the negative feedback amount can be optimized by variably adjusting the output current extraction time during the sampling period. In the present invention, the video signal potential is sampled and the light emitting element is driven by current. It is the same as a conventional liquid crystal display in that the video signal potential is sampled. Therefore, a voltage signal driver that has been widely used in an active matrix type liquid crystal display can be used for the signal portion of the present invention. Further, like the active matrix type liquid crystal panel in which conventional polysilicon transistors are integrated, the display device of the present invention also includes a peripheral circuit in which the peripheral scanner unit and signal unit are formed integrally with the pixel array unit. It is also possible to put together a mold panel.

  Particularly in the pixel circuit of the present invention, an additional capacitor and a switching transistor are connected between the gate and drain of the drive transistor. This switching transistor is in an on state when the above-described mobility correcting means operates, and an additional capacitor is inserted into the gate and drain of the drive transistor, thereby optimizing the operation of the mobility correcting means. Specifically, capacitive coupling is inserted into the gate of the drive transistor within the mobility correction period, thereby uniformizing the mobility correction optimum period for all gradations. As a result, the yield of the panel can be improved.

  In addition, higher brightness is desired as part of improving the image quality of organic EL display devices. In this case, as the luminance of the light emitting element is increased, the additional capacity is inevitably increased, and as a result, the value of the additional capacity reaches a level where the gain of the bootstrap operation of the pixel capacity is reduced. Therefore, in the present invention, the additional capacitor is separated from the gate and drain of the drive transistor at the time of light emission to prevent the gain reduction of the bootstrap operation. As a result, the yield of the panel can be further improved.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing the overall configuration of a display device according to the present invention. As shown in the figure, this display device is an active matrix type, and is composed of a pixel array 1 as a main part and a peripheral circuit part. The peripheral circuit unit includes a horizontal selector 3, a write scanner 4, a drive scanner 5, a first correction scanner 71, a second correction scanner 72, and the like. The pixel array 1 includes row-like scanning lines WS and column-like signal lines SL, and pixels R, G, and B arranged in a matrix at the intersection of the two. In order to enable color display, RGB three primary color pixels are prepared, but the present invention is not limited to this. Each pixel R, G, B is composed of a pixel circuit 2. The signal line SL is driven by the horizontal selector 3. The horizontal selector 3 forms a signal unit and supplies a video signal to the signal line SL. The scanning line WS is scanned by the write scanner 4. In addition, other scanning lines DS, AZ1, and AZ2 are also wired in parallel with the scanning line WS. The scanning line DS is scanned by the drive scanner 5. The scanning line AZ1 is scanned by the first correction scanner 71. The scanning line AZ2 is scanned by the second correction scanner 72. The write scanner 4, the drive scanner 5, the first correction scanner 71, and the second correction scanner 72 constitute a scanner unit, and sequentially scan the pixel rows every horizontal period. Each pixel circuit 2 samples a video signal from the signal line SL when selected by the scanning line WS. Further, when selected by the scanning line DS, the light emitting element included in the pixel circuit 2 is driven in accordance with the sampled video signal. In addition, the pixel circuit 2 performs a predetermined correction operation when scanned by the scanning lines AZ1 and AZ2. In this embodiment, this correction operation includes a threshold voltage correction operation and a mobility correction operation.

  The pixel array 1 described above is usually formed on an insulating substrate such as glass and is a flat panel. Each pixel circuit 2 is formed of an amorphous silicon thin film transistor (TFT) or a low temperature polysilicon TFT. In the case of an amorphous silicon TFT, the scanner part is composed of TAB or the like different from the panel, and is connected to the flat panel by a flexible cable. In the case of the low-temperature polysilicon TFT, the signal portion and the scanner portion can be formed of the same low-temperature polysilicon TFT, so that the pixel array, the signal portion, and the scanner portion can be integrally formed on the flat panel.

  FIG. 2 is a circuit diagram showing a prior development example of a pixel circuit incorporated in the display device shown in FIG. The pixel circuit according to this prior development example is the basis of the present invention. Therefore, as a part of the description of the present invention, the pixel circuit will be described in detail below.

  The pixel circuit 2 includes five thin film transistors Tr1 to Tr4 and Trd, one capacitor element (pixel capacitor) Cs, and one light emitting element EL. The transistors Tr1 to Tr3 and Trd are N channel type polysilicon TFTs. Only the transistor Tr4 is a P-channel type polysilicon TFT. One capacitive element Cs constitutes a capacitive part of the pixel circuit 2. The light emitting element EL is, for example, a diode type organic EL element having an anode and a cathode. However, the present invention is not limited to this, and the light emitting element generally includes all devices that emit light by current drive.

  The drive transistor Trd which is the center of the pixel circuit 2 has a gate G connected to one end of the pixel capacitor Cs and a source S connected to the other end of the pixel capacitor Cs. The gate G of the drive transistor Trd is connected to another reference potential Vss1 via the switching transistor Tr2. The drain of the drive transistor Trd is connected to the power source Vcc via the switching transistor Tr4. The gate of the switching transistor Tr2 is connected to the scanning line AZ1. The gate of the switching transistor Tr4 is connected to the scanning line DS. The anode of the light emitting element EL is connected to the source S of the drive transistor Trd, and the cathode is grounded. This ground potential may be represented by Vcath. Further, the switching transistor Tr3 is interposed between the source S of the drive transistor Trd and a predetermined reference potential Vss2. The gate of the transistor Tr3 is connected to the scanning line AZ2. On the other hand, the sampling transistor Tr1 is connected between the signal line SL and the gate G of the drive transistor Trd. The gate of the sampling transistor Tr1 is connected to the scanning line WS.

  In such a configuration, the sampling transistor Tr1 conducts in response to the control signal WS supplied from the scanning line WS during a predetermined sampling period, and samples the video signal Vsig supplied from the signal line SL in the capacitor unit Cs. The capacitor Cs applies the input voltage Vgs between the gate G and the source S of the drive transistor in accordance with the sampled video signal Vsig. The drive transistor Trd supplies an output current Ids corresponding to the input voltage Vgs to the light emitting element EL during a predetermined light emission period. The output current (drain current) Ids has dependency on the carrier mobility μ and the threshold voltage Vth in the channel region of the drive transistor Trd. The light emitting element EL emits light with luminance according to the video signal Vsig by the output current Ids supplied from the drive transistor Trd.

  As a feature of the present invention, the pixel circuit 2 includes correction means including switching transistors Tr2 to Tr4, and in order to cancel the dependency of the output current Ids on the carrier mobility μ, the capacitance is previously set at the head of the light emission period. The input voltage Vgs held in the part Cs is corrected. Specifically, the correction means (Tr2 to Tr4) operate in a part of the sampling period according to the control signals WS and DS supplied from the scanning lines WS and DS, and the video signal Vsig is sampled. Thus, the output current Ids is extracted from the drive transistor Trd and negatively fed back to the capacitor Cs to correct the input voltage Vgs. Further, the correction means (Tr2 to Tr4) detects the threshold voltage Vth of the drive transistor Trd in advance of the sampling period and cancels the dependency of the output current Ids on the threshold voltage Vth. Is added to the input voltage Vgs.

  In the case of this embodiment, the drive transistor Trd is an N-channel transistor, and the drain is connected to the power supply Vcc side, while the source S is connected to the light emitting element EL side. In this case, the correction means described above takes out the output current Ids from the drive transistor Trd at the beginning of the light emission period that overlaps the latter part of the sampling period, and negatively feeds back to the capacitor Cs side. At this time, the present correcting means causes the output current Ids extracted from the source S side of the drive transistor Trd at the head of the light emission period to flow into the capacitance of the light emitting element EL. Specifically, the light emitting element EL is composed of a diode type light emitting element having an anode and a cathode. The anode side is connected to the source S of the drive transistor Trd, and the cathode side is grounded. With this configuration, the correction means (Tr2 to Tr4) sets the anode / cathode of the light emitting element EL in a reverse bias state in advance, and the output current Ids extracted from the source S side of the drive transistor Trd is the light emitting element EL. This diode-type light emitting element EL functions as a capacitive element. The correction means can adjust the time width t for extracting the output current Ids from the drive transistor Trd within the sampling period, and thereby optimizes the negative feedback amount of the output current Ids with respect to the capacitor Cs.

  FIG. 3 is a schematic view of the pixel circuit portion extracted from the display device shown in FIG. In order to facilitate understanding, the video signal Vsig sampled by the sampling transistor Tr1, the input voltage Vgs and output current Ids of the drive transistor Trd, and the capacitance component Coled of the light emitting element EL are added. The basic operation of the pixel circuit 2 will be described below with reference to FIG.

  FIG. 4 is a timing chart of the pixel circuit shown in FIG. With reference to FIG. 4, the operation of the pixel circuit shown in FIG. 3 will be described more specifically and in detail. FIG. 4 shows the waveforms of control signals applied to the scanning lines WS, AZ1, AZ2 and DS along the time axis T. In order to simplify the notation, the control signals are also represented by the same reference numerals as the corresponding scanning lines. Since the transistors Tr1, Tr2 and Tr3 are N-channel type, they are turned on when the scanning lines WS, AZ1 and AZ2 are at a high level, and turned off when the scanning lines are at a low level. On the other hand, since the transistor Tr4 is a P-channel type, it is turned off when the scanning line DS is at a high level and turned on when it is at a low level. This timing chart also shows the change in the potential of the gate G and the change in the potential of the source S of the drive transistor Trd, along with the waveforms of the control signals WS, AZ1, AZ2, and DS.

  In the timing chart of FIG. 7, timings T1 to T8 are defined as one field (1f). Each row of the pixel array is sequentially scanned once during one field. The timing chart shows the waveforms of the control signals WS, AZ1, AZ2, DS applied to the pixels for one row.

  At timing T0 before the field starts, all control line numbers WS, AZ1, AZ2, DS are at a low level. Therefore, the N-channel transistors Tr1, Tr2, Tr3 are in the off state, while only the P-channel transistor Tr4 is in the on state. Therefore, since the drive transistor Trd is connected to the power supply Vcc via the transistor Tr4 in the on state, the output current Ids is supplied to the light emitting element EL according to the predetermined input voltage Vgs. Therefore, the light emitting element EL emits light at the timing T0. At this time, the input voltage Vgs applied to the drive transistor Trd is expressed by the difference between the gate potential (G) and the source potential (S).

  At the timing T1 when the field starts, the control signal DS is switched from the low level to the high level. As a result, the transistor Tr4 is turned off and the drive transistor Trd is disconnected from the power supply Vcc, so that the light emission stops and the non-light emission period starts. Therefore, at the timing T1, all the transistors Tr1 to Tr4 are turned off.

  Subsequently, at timing T2, since the control signals AZ1 and AZ2 are at a high level, the switching transistors Tr2 and Tr3 are turned on. As a result, the gate G of the drive transistor Trd is connected to the reference potential Vss1, and the source S is connected to the reference potential Vss2. Here, Vss1−Vss2> Vth is satisfied, and by setting Vss1−Vss2 = Vgs> Vth, preparation for Vth correction performed at timing T3 is performed. In other words, the period T2-T3 corresponds to a reset period of the drive transistor Trd. Further, when the threshold voltage of the light emitting element EL is VthEL, VthEL> Vss2 is set. Thereby, a minus bias is applied to the light emitting element EL, and a so-called reverse bias state is obtained. This reverse bias state is necessary for normally performing the Vth correction operation and the mobility correction operation to be performed later.

  At timing T3, the control signal AZ2 is set to the low level, and the control signal DS is also set to the low level. As a result, the transistor Tr3 is turned off while the transistor Tr4 is turned on. As a result, the drain current Ids flows into the pixel capacitor Cs, and the Vth correction operation is started. At this time, the gate G of the drive transistor Trd is held at Vss1, and the current Ids flows until the drive transistor Trd is cut off. When cut off, the source potential (S) of the drive transistor Trd becomes Vss1-Vth. At timing T4 after the drain current is cut off, the control signal DS is returned to the high level again, and the switching transistor Tr4 is turned off. Further, the control signal AZ1 is also returned to the low level, and the switching transistor Tr2 is also turned off. As a result, Vth is held and fixed in the pixel capacitor Cs. Thus, the timing T3-T4 is a period for detecting the threshold voltage Vth of the drive transistor Trd. Here, this detection period T3-T4 is called a Vth correction period.

  After performing the Vth correction in this way, the control signal WS is switched to the high level at timing T5, the sampling transistor Tr1 is turned on, and the video signal Vsig is written into the pixel capacitor Cs. The pixel capacitance Cs is sufficiently smaller than the equivalent capacitance Coled of the light emitting element EL. As a result, most of the video signal Vsig is written into the pixel capacitor Cs. To be precise, for Vss1. The difference Vsig−Vss1 of Vsig is written to the pixel capacitor Cs. Therefore, the voltage Vgs between the gate G and the source S of the drive transistor Trd becomes a level (Vsig−Vss1 + Vth) obtained by adding Vth previously detected and held and Vsig−Vss1 sampled this time. Hereinafter, for simplification of description, assuming that Vss1 = 0V, the gate / source voltage Vgs becomes Vsig + Vth as shown in the timing chart of FIG. The sampling of the video signal Vsig is performed until timing T7 when the control signal WS returns to the low level. That is, the timing T5-T7 corresponds to the sampling period.

  At timing T6 before the end of the sampling period T7, the control signal DS becomes low level and the switching transistor Tr4 is turned on. As a result, the drive transistor Trd is connected to the power supply Vcc, so that the pixel circuit proceeds from the non-light emitting period to the light emitting period. In this manner, the mobility correction of the drive transistor Trd is performed in the period T6-T7 in which the sampling transistor Tr1 is still on and the switching transistor Tr4 is on. That is, in the present embodiment, the mobility correction is performed in the period T6-T7 in which the latter part of the sampling period and the head part of the light emission period overlap. Note that, at the beginning of the light emission period in which the mobility correction is performed, the light emitting element EL is actually in a reverse bias state, and thus does not emit light. In the mobility correction period T6-T7, the drain current Ids flows through the drive transistor Trd while the gate G of the drive transistor Trd is fixed at the level of the video signal Vsig. Here, by setting Vss1−Vth <VthEL, the light emitting element EL is placed in a reverse bias state, so that it exhibits simple capacitance characteristics instead of diode characteristics. Therefore, the current Ids flowing through the drive transistor Trd is written into a capacitor C = Cs + Coled obtained by combining both the pixel capacitor Cs and the equivalent capacitor Coled of the light emitting element EL. As a result, the source potential (S) of the drive transistor Trd increases. In the timing chart of FIG. 7, this increase is represented by ΔV. Since this increase ΔV is eventually subtracted from the gate / source voltage Vgs held in the pixel capacitor Cs, negative feedback is applied. In this way, the mobility μ can be corrected by negatively feeding back the output current Ids of the drive transistor Trd to the input voltage Vgs of the drive transistor Trd. The negative feedback amount ΔV can be optimized by adjusting the time width t of the mobility correction period T6-T7.

  At timing T7, the control signal WS becomes low level and the sampling transistor Tr1 is turned off. As a result, the gate G of the drive transistor Trd is disconnected from the signal line SL. Since the application of the video signal Vsig is cancelled, the gate potential (G) of the drive transistor Trd can be increased and increases with the source potential (S). This operation performed with the start of the light emission period is called a bootstrap operation. During this bootstrap operation, the gate / source voltage Vgs held in the pixel capacitor Cs maintains the value of (Vsig−ΔV + Vth). In other words, the bootstrap gain at the gate potential (G) is basically 100%. By this bootstrap operation, the source potential (S) rises and the reverse bias state of the light emitting element EL is eliminated. Therefore, the light emitting element EL actually starts to emit light by the inflow of the output current Ids.

The relationship between the drain current Ids and the gate voltage Vgs at this time is given by the following equation 2 by substituting Vsig−ΔV + Vth into Vgs of the previous transistor characteristic equation 1.
Ids = kμ (Vgs−Vth) ² = kμ (Vsig−ΔV) ² Equation 2
In the above formula 2, k = (1/2) (W / L) Cox. It can be seen from the characteristic formula 2 that the term Vth is canceled and the output current Ids supplied to the light emitting element EL does not depend on the threshold voltage Vth of the drive transistor Trd. Basically, the drain current Ids is determined by the signal voltage Vsig of the video signal. In other words, the light emitting element EL emits light with a luminance corresponding to the video signal Vsig. At that time, Vsig is corrected by the feedback amount ΔV. This correction amount ΔV acts so as to cancel the effect of the mobility μ located in the coefficient part of the characteristic formula 2 just. Therefore, the drain current Ids substantially depends only on the video signal Vsig.

  Finally, when the timing T8 is reached, the control signal DS becomes high level, the switching transistor Tr4 is turned off, the light emission ends, and the field ends. Thereafter, the operation proceeds to the next field, and the Vth correction operation, the mobility correction operation, and the light emission operation are repeated again.

  FIG. 5 is a circuit diagram showing a state of the pixel circuit 2 in the mobility correction period T6-T7. As shown in the figure, in the mobility correction period T6-T7, the sampling transistor Tr1 and the switching transistor Tr4 are on, while the remaining switching transistors Tr2 and Tr3 are off. In this state, the source potential (S) of the drive transistor Tr4 is Vss1-Vth. This source potential S is also the anode potential of the light emitting element EL. By setting Vss1−Vth <VthEL as described above, the light emitting element EL is placed in a reverse bias state, and exhibits simple capacitance characteristics instead of diode characteristics. Therefore, the current Ids flowing through the drive transistor Trd flows into the combined capacitance C = Cs + Coled of the pixel capacitance Cs and the equivalent capacitance Coled of the light emitting element EL. In other words, a part of the drain current Ids is negatively fed back to the pixel capacitor Cs, and the mobility is corrected.

  FIG. 6 is a graph of the above-described transistor characteristic formula 2, in which Ids is plotted on the vertical axis and Vsig is plotted on the horizontal axis. The characteristic formula 2 is also shown below the graph. In the graph of FIG. 6, a characteristic curve is drawn in a state where the pixel 1 and the pixel 2 are compared. The mobility μ of the drive transistor of the pixel 1 is relatively large. Conversely, the mobility μ of the drive transistor included in the pixel 2 is relatively small. Thus, when the drive transistor is composed of a polysilicon thin film transistor or the like, it is inevitable that the mobility μ varies between pixels. For example, when the video signal Vsig of the same level is written in both the pixels 1 and 2, the output current Ids 1 ′ flowing in the pixel 1 having the high mobility μ is the pixel 2 having the low mobility μ unless the mobility is corrected. A large difference is generated as compared with the output current Ids2 'flowing through the current. In this way, a large difference occurs between the output currents Ids due to the variation in the mobility μ, so that the uniformity of the screen is impaired.

  Therefore, in the present invention, the variation in mobility is canceled by negatively feeding back the output current to the input voltage side. As is clear from the transistor characteristic equation, the drain current Ids increases when the mobility is large. Therefore, the negative feedback amount ΔV increases as the mobility increases. As shown in the graph of FIG. 6, the negative feedback amount ΔV1 of the pixel 1 having a high mobility μ is larger than the negative feedback amount ΔV2 of the pixel 2 having a low mobility. Therefore, the larger the mobility μ is, the more negative feedback is applied, and the variation can be suppressed. As shown in the figure, when ΔV1 is corrected in the pixel 1 having a high mobility μ, the output current greatly decreases from Ids1 ′ to Ids1. On the other hand, since the correction amount ΔV2 of the pixel 2 having the low mobility μ is small, the output current Ids2 ′ does not decrease so much to Ids2. As a result, Ids1 and Ids2 are substantially equal, and the variation in mobility is cancelled. Since the cancellation of the variation in mobility is performed in the entire range of Vsig from the black level to the white level, the uniformity of the screen becomes extremely high. In summary, when there are pixels 1 and 2 having different mobility, the correction amount ΔV1 of the pixel 1 having high mobility is smaller than the correction amount ΔV2 of the pixel 2 having low mobility. That is, as the mobility increases, ΔV increases and the decrease value of Ids increases. As a result, pixel current values having different mobilities are made uniform, and variations in mobility can be corrected.

For reference, a numerical analysis of the mobility correction described above is performed with reference to FIG. As shown in FIG. 7, the analysis is performed by taking the source potential of the drive transistor Trd as a variable V in a state where the transistors Tr1 and Tr4 are turned on. Assuming that the source potential (S) of the drive transistor Trd is V, the drain current Ids flowing through the drive transistor Trd is as shown in Equation 3 below.

Further, Ids = dQ / dt = CdV / dt is established as shown in the following Expression 4 by the relationship between the drain current Ids and the capacitance C (= Cs + Coled).

００５０〜００５７ Both sides are integrated by substituting Equation 3 into Equation 4. Here, the initial state of the source voltage V is -Vth, and the mobility variation correction time (T6-T7) is t. When this differential equation is solved, the pixel current with respect to the mobility correction time t is given as shown in Equation 5 below.

0050-0057

  FIG. 8 is a graph of Equation 5, which is based on actual measurement data. The vertical axis represents the output current Ids, and the horizontal axis represents the video signal Vsig. As parameters, mobility correction times t = 0 us, 1.0 us, and 2.0 us are set. Further, when the mobility μ is a relatively large parameter, 1.2 μ is used, and when the mobility μ is relatively small, 0.8 μ is used as a parameter. In addition, the capacitance C is the sum of the pixel capacitance Cs and the light emitting element capacitance Coled. Compared to the case where the mobility correction is not substantially applied at t = 0 us, the slope of the Vsig-Ids characteristic curve becomes gentle at t = 1.0 us, and the mobility is high when the mobility is large (1.2 μm). When it is small (0.8 μ), the difference in the output current Ids is small. Further, when the mobility correction time t is set to 2.0 us, the difference in the drain current Ids due to the mobility is further reduced, and the uniformity is improved. It can be seen that the variation in the mobility μ can be absorbed by setting the optimum mobility correction time (t = 2.0 us in the illustrated example).

  By performing the above operation, it can be seen that the mobility variation can be corrected even in the pixel circuit of the video signal potential sampling method. The driving method of a liquid crystal display that has already been put into practical use is basically voltage driving for sampling a video signal potential. Therefore, even in organic EL panels, it is possible to correct the mobility variation by voltage drive, so that an external source driver or a source driver with a built-in panel using a low-temperature polysilicon TFT, etc., used in a conventional liquid crystal display can be used. This makes it possible to produce an organic EL panel module at a low cost. Further, in this pixel circuit, switching transistors other than the drive transistor are used in a mixture of N-channel type and P-channel type, but the characteristics of each transistor may be N-channel or P-channel.

  However, when the graph of FIG. 8 is examined in detail, it can be seen that there is some variation in the drain current Ids even when the mobility correction time t is set optimally. In particular, it can be seen that the change in Ids is large in the halftone range of the video signal Vsig of 2V to 4V. Therefore, in this prior development example, even if the mobility correction time is optimized, there is still a difference in output current variation between gradations, which is a problem to be solved.

  FIG. 9 is a circuit diagram showing an improved example of the pixel circuit incorporated in the display device shown in FIG. In order to facilitate understanding, parts corresponding to those of the preceding development example shown in FIG. This improvement example is an improvement of the prior development example shown in FIG. Specifically, an additional capacitor Cgd is inserted between the gate G and the drain D of the drive transistor Trd. By inserting the additional capacitor Cgd between the gate G and the drain D of the drive transistor Trd, a capacitive coupling is inserted into the gate G of the drive transistor Trd within the mobility correction period, and the difference in mobility in all gradations. To achieve uniformization. Thereby, the yield of the panel can be improved.

  FIG. 10 is a graph showing a Vsig-Ids characteristic curve obtained in the improved example shown in FIG. In order to facilitate comparison, the parameters of the graph of the prior development example shown in FIG. 8 and the graph of the improvement example shown in FIG. 10 are set to be the same. As is apparent from the graph of FIG. 10, in this improved example, by inserting the additional capacitor Cgd and coupling the gate G of the drive transistor during the mobility correction operation, the mobility correction optimum time is approximately t = 1. 0us. When t = 1.0 us, the output current Ids has almost no difference over the entire gradation range of 0V to 6V regardless of the mobility μ. In this way, by setting the capacitance value of the additional capacitor Cgd optimally, it is possible to absorb the variation in mobility in all gradations almost completely.

  However, the improved example of FIG. 10 has an adverse effect on the bootstrap operation by inserting the additional capacitor Cgd, and this side effect is a problem. FIG. 11 is a circuit diagram showing the state of the pixel circuit 2 at the timing T7. As described above, since the sampling transistor Tr1 is turned off at the timing T7, the pixel capacitor Cs and the drive transistor Trd are disconnected from the signal line SL side. In this state, the drive transistor Trd starts to supply the output current Ids to the light emitting element EL, and enters the light emission period. First, a bootstrap operation occurs at timing T7, and the potential of the source S of the drive transistor Trd begins to rise. In conjunction with this, the potential of the gate G also rises. In an ideal bootstrap operation, the gate potential Ggs held in the pixel capacitor Cs is kept constant, the source potential rises, and light emission starts when the threshold voltage of the light emitting element EL is exceeded. . If there is no additional capacitor Cgd, the gate potential of the drive transistor Trd becomes high impedance, and the bootstrap operation is performed with a gain of almost 100%. However, if the additional capacitor Cgd is connected between the gate G and the drain D, the gate G of the drive transistor does not become high impedance, and the bootstrap gain is reduced. As a result, there is a side effect that the characteristic deterioration of the light emitting element EL becomes visible. In particular, when the luminance of the light emitting element is increased in accordance with the improvement in the image quality of the display device, it is necessary to increase the size of the additional capacitor Cgd accordingly. When Cgd is increased in size, the capacitance value has a serious adverse effect on the bootstrap operation and needs to be solved.

  FIG. 12 is a circuit diagram showing a pixel circuit according to the present invention. This pixel circuit further improves the pixel circuit of the improvement example shown in FIG. 10, and an optimum mobility correction period is set for all gradations without reducing the bootstrap gain even in a panel having a large output luminance. A pixel circuit that can be made uniform is provided. In order to facilitate understanding, portions corresponding to the improved example shown in FIG. 10 are denoted by corresponding reference numerals. The difference is that an additional switching transistor Tr6 is interposed between the additional capacitor Cgd and the drain D of the drive transistor Trd. The gate of the switching transistor Tr6 is connected to the scanning line WS. Therefore, the additional switching transistor Tr6 is ON / OFF controlled by the write scanner 4 at exactly the same timing as the sampling transistor Tr1. The switching transistor Tr6 is in an on state when the mobility correcting unit operates, and an additional capacitor Cgd is inserted between the gate G and the drain D of the drive transistor Trd to optimize the operation of the mobility correcting unit. Yes. The switching transistor Tr6 is turned off when the drive transistor Trd starts to drive the light emitting element EL, disconnects the additional capacitor Cgd from between the gate G and the drain D of the drive transistor Trd, and is activated when the light emitting element EL starts to emit light. The bootstrap operation of the pixel capacitor Cs is optimized. The capacitance of the additional capacitor Cgd is set so that the luminance of the light emitting element EL is optimal at each gradation level between the white level and the black level of the video signal Vsig. The additional capacitance Cgd is increased in size with the increase in luminance of the light emitting element EL, and the capacitance value is set to such an extent that the gain of the bootstrap operation of the pixel capacitance Cs is reduced. The switching transistor Tr6 separates the enlarged additional capacitor Cgd from between the gate G and the drain D of the drive transistor Trd to prevent a gain reduction in the bootstrap operation. The switching transistor Tr6 is ON / OFF controlled by the same control signal WS as the control signal WS applied to the sampling transistor Tr1, and an additional capacitor Cgd is inserted between the drain D and the gate G of the drive transistor Trd during the sampling period to emit light. During the period, the additional capacitor Cgd is disconnected from the drain D and the gate G of the drive transistor Trd.

  As described above, in the pixel circuit of the present invention, the switching transistor Tr6 is turned on during the mobility correction period, and the change of the drain voltage is coupled to the gate voltage via the additional capacitor Cgd as in the improved example of FIG. The optimum mobility correction period is made uniform over the gradation. When the control signal WS is turned off, the sampling transistor Tr1 is turned off, the gate potential of the drive transistor Trd becomes high impedance, and the bootstrap operation is started. At this time, the switching transistor Tr6 is turned off in response to the same control signal WS. For this reason, the additional capacitor Cgd becomes high impedance, and the additional capacitor Cgd becomes invisible during the bootstrap operation. Therefore, the bootstrap gain does not include Cgd, and the gain can be suppressed from decreasing.

  FIG. 13 is a timing chart for explaining the operation of the pixel circuit according to the present invention shown in FIG. For easy understanding, portions corresponding to those in the timing chart according to the preceding development example shown in FIG. 4 are given corresponding reference numbers. The operation of this pixel circuit is basically the same as that of the pixel circuit of the preceding development example from timing T1 to T8. The difference is that in the mobility correction period T6-T7, the additional capacitor Cgd is inserted between the gate G and the drain D of the drive transistor, so that the gate potential (G) of the drive transistor Trd varies slightly. It is to be. In this mobility correction period T6-T7, the correction amount ΔV corresponding to the mobility μ of the drive transistor Trd is subtracted from the video signal Vsig written in the pixel capacitor Cs. Thereafter, the bootstrap operation starts at timing T7. At this time, the additional capacitor Cgd is disconnected from the gate G of the drive transistor Trd. Therefore, the bootstrap operation can be performed without any gain loss.

  FIG. 14 is a circuit diagram showing a state of the pixel circuit 2 of the present invention in the mobility correction period T6-T7. As illustrated, mobility correction is performed in a state where the sampling transistor Tr1, the switching transistor Tr4, and the additional switching transistor Tr6 are all conductive. The drain current Ids supplied from the drive transistor Trd does not flow into the light emitting element EL because the light emitting element EL is reverse biased. The light emitting element capacitance Coled and the pixel capacitance Cs are charged, and the amounts correspond to the mobility μ. Therefore, the mobility μ of the drive transistor Trd can be corrected by this operation. At this time, by inserting Cgd coupling into the gate of the drive transistor Trd, the mobility correction optimum time can be set to be the same over all gradations.

  FIG. 15 is a circuit diagram showing the state of the pixel circuit of the present invention at the timing J7. At timing T7 when the light emission period starts, the switching transistor Tr6 is switched from on to off. As a result, the additional capacitor Cgd becomes high impedance and is not visible during the bootstrap operation. Therefore, the bootstrap gain does not include Cgd, and the gain can be prevented from decreasing.

  FIG. 15 is a circuit diagram showing a modification of the pixel circuit according to the present invention shown in FIG. Corresponding parts are given corresponding reference numbers for ease of understanding. The difference is that the switching transistor Tr6 is connected between the additional capacitor Cgd and the gate G of the drive transistor Trd. The gate of the switching transistor Tr6 is connected to the scanning line WS. Therefore, the pixel circuit according to the modification shown in FIG. 15 operates in the same sequence as the pixel circuit according to the present invention shown in FIG.

It is a typical block diagram which shows the whole structure of the display apparatus concerning this invention. It is a circuit diagram which shows the prior development example of the pixel circuit integrated in the display apparatus shown in FIG. It is a schematic diagram with which it uses for operation | movement description of the pixel circuit of a prior development example. It is a timing chart similarly provided for operation | movement description of a prior development example. It is a circuit diagram with which it uses for operation | movement description of a prior development example similarly. It is a graph similarly provided for operation | movement description of a prior development example. It is a circuit diagram with which it uses for operation | movement description of a prior development example similarly. It is a graph similarly provided for operation | movement description of a prior development example. It is a circuit diagram which shows the example of improvement of the pixel circuit integrated in the display apparatus shown in FIG. It is a graph with which it uses for operation | movement description of the pixel circuit concerning the example of improvement. It is a circuit diagram with which it uses for operation | movement description of an improvement example similarly. FIG. 2 is a circuit diagram showing an embodiment of a pixel circuit of the present invention incorporated in the display device shown in FIG. 1. It is a timing chart with which it uses for operation | movement description of embodiment shown in FIG. It is a circuit diagram with which it uses for operation | movement description of embodiment similarly. It is a circuit diagram with which it uses for operation | movement description of embodiment similarly. It is a circuit which shows other embodiment of the pixel circuit concerning this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Pixel array, 2 ... Pixel circuit, 3 ... Horizontal selector, 4 ... Write scanner, 5 ... Drive scanner, 71 ... 1st correction scanner, 72 ... 1st 2 correction scanner, Tr1 ... sampling transistor, Tr2 ... switching transistor, Tr3 ... switching transistor, Tr4 ... switching transistor, Tr6 ... switching transistor, Trd ... drive transistor, Cs.・ Pixel capacitance, Cgd ... additional capacitance, EL ... light emitting element

Claims (6)

A row-shaped scanning line for supplying a control signal and a column-shaped signal line for supplying a video signal are arranged at a crossing portion, at least a sampling transistor, a pixel capacitor connected thereto, a drive transistor connected thereto, Including a light emitting element connected thereto,
The sampling transistor conducts according to a control signal supplied from a scanning line during a predetermined sampling period and samples a video signal supplied from the signal line into the pixel capacitor,
The pixel capacitor applies an input voltage between the gate and the source of the drive transistor according to the sampled video signal,
The drive transistor supplies an output current corresponding to the input voltage to the light emitting element during a predetermined light emission period, and the output current has dependency on carrier mobility in a channel region of the drive transistor,
In the pixel circuit that emits light with luminance according to the video signal by the output current supplied from the drive transistor,
In order to cancel the dependence of the output current on the carrier mobility, a correction means for correcting the input voltage held in the pixel capacitor is provided.
The correction means operates in a part of the sampling period in accordance with a control signal supplied from a scanning line, takes out an output current from the drive transistor in a state where the video signal is sampled, and uses this as a pixel capacitance. Negative feedback to correct the input voltage,
An additional capacitor connected between the gate and drain of the drive transistor and a switching transistor;
The switching transistor is in an on state when the correction means operates, and the additional capacitor is inserted between the gate and drain of the drive transistor, thereby optimizing the operation of the correction means.
The switching transistor is turned off when the drive transistor starts to drive the light emitting element, disconnects the additional capacitance from between the gate and drain of the drive transistor, and the pixel capacitance is performed in accordance with the start of light emission of the light emitting element. A pixel circuit characterized by optimizing the bootstrap operation.   The capacitance value of the additional capacitor is set so that the luminance of the light emitting element is appropriate at each gradation level between the white level and the black level of the video signal. The pixel circuit described. The additional capacitor is increased in size with the increase in luminance of the light emitting element, and the capacitance value is set to such an extent that the gain of the bootstrap operation of the pixel capacitor is reduced.
3. The pixel circuit according to claim 2, wherein the switching transistor separates the additional capacitor from a gate and a drain of the drive transistor to prevent a gain reduction in the bootstrap operation.   The switching transistor is ON / OFF controlled by the same control signal as the control signal applied to the sampling transistor, and the additional capacitor is inserted between the drain and gate of the drive transistor during the sampling period. 2. The pixel circuit according to claim 1, wherein the additional capacitor is separated from a drain and a gate of the drive transistor. The drive transistor has an output current dependent on the threshold voltage in addition to the carrier mobility of the channel region,
In order to cancel the dependence of the output current on the threshold voltage, the correction means detects the threshold voltage of the drive transistor in advance prior to the sampling period, and adds the detected threshold voltage to the input voltage. The pixel circuit according to claim 1, wherein Including a pixel array unit, a scanner unit, and a signal unit,
The pixel array section includes scanning lines arranged in rows and signal lines arranged in columns, and matrix-like pixels arranged in a portion where both intersect,
The signal unit supplies a video signal to the signal line,
The scanner unit supplies a control signal to the scanning line to sequentially scan pixels for each row,
Each pixel includes at least a sampling transistor, a capacitor connected to the sampling transistor, a drive transistor connected to the capacitor, and a light emitting element connected thereto.
The sampling transistor conducts according to a control signal supplied from a scanning line during a predetermined sampling period and samples a video signal supplied from the signal line into the capacitor unit,
The capacitor unit applies an input voltage between the gate and the source of the drive transistor according to the sampled video signal,
The drive transistor supplies an output current corresponding to the input voltage to the light emitting element during a predetermined light emission period, and the output current has dependency on carrier mobility in a channel region of the drive transistor,
In the display device that emits light with luminance according to the video signal by the output current supplied from the drive transistor,
Each pixel includes correction means for correcting the input voltage held in the capacitor unit in advance before or at the beginning of the light emission period in order to cancel the dependence of the output current of the drive transistor on the carrier mobility. ,
The correction means operates in a part of the sampling period in response to a control signal supplied from a scanning line, takes out an output current from the drive transistor in a state where the video signal is sampled, and supplies the output current to the capacitor unit. Negative feedback to correct the input voltage,
Each pixel includes an additional capacitor and a switching transistor connected between the gate and drain of the drive transistor.
The switching transistor is in an on state when the correction means operates, and the additional capacitor is inserted into the gate and drain of the drive transistor, thereby optimizing the operation of the correction means,
The switching transistor is turned off when the drive transistor starts to drive the light emitting element, disconnects the additional capacitance from between the gate and drain of the drive transistor, and the pixel capacitance is performed in accordance with the start of light emission of the light emitting element. A display device characterized by optimizing the bootstrap operation.

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