JP2007115390A - メモリ機器、データを転送する方法、およびデータを格納する方法 - Google Patents
メモリ機器、データを転送する方法、およびデータを格納する方法 Download PDFInfo
- Publication number
- JP2007115390A JP2007115390A JP2006268644A JP2006268644A JP2007115390A JP 2007115390 A JP2007115390 A JP 2007115390A JP 2006268644 A JP2006268644 A JP 2006268644A JP 2006268644 A JP2006268644 A JP 2006268644A JP 2007115390 A JP2007115390 A JP 2007115390A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- data
- error correction
- bank
- correction code
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C2029/0411—Online error correction
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Error Detection And Correction (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US72272205P | 2005-09-30 | 2005-09-30 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2007115390A true JP2007115390A (ja) | 2007-05-10 |
| JP2007115390A5 JP2007115390A5 (enExample) | 2009-11-12 |
Family
ID=37432280
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006268644A Pending JP2007115390A (ja) | 2005-09-30 | 2006-09-29 | メモリ機器、データを転送する方法、およびデータを格納する方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US7676730B2 (enExample) |
| EP (1) | EP1777624A3 (enExample) |
| JP (1) | JP2007115390A (enExample) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7996712B2 (en) | 2008-02-20 | 2011-08-09 | Hitachi, Ltd. | Data transfer controller, data consistency determination method and storage controller |
| KR20150070252A (ko) * | 2012-10-11 | 2015-06-24 | 어드밴스드 마이크로 디바이시즈, 인코포레이티드 | 높은 신뢰도 메모리 컨트롤러 |
| EP2924576A1 (en) | 2014-03-28 | 2015-09-30 | Fujitsu Limited | Storage control apparatus, control program, and control method |
| CN110990186A (zh) * | 2018-10-02 | 2020-04-10 | 三星电子株式会社 | 片上系统、操作片上系统的方法和存储系统 |
Families Citing this family (36)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7734985B2 (en) * | 2006-02-27 | 2010-06-08 | Intel Corporation | Systems, methods, and apparatuses for using the same memory type to support an error check mode and a non-error check mode |
| US7904789B1 (en) * | 2006-03-31 | 2011-03-08 | Guillermo Rozas | Techniques for detecting and correcting errors in a memory device |
| US7280398B1 (en) * | 2006-08-31 | 2007-10-09 | Micron Technology, Inc. | System and memory for sequential multi-plane page memory operations |
| US7590899B2 (en) * | 2006-09-15 | 2009-09-15 | International Business Machines Corporation | Processor memory array having memory macros for relocatable store protect keys |
| US8386676B2 (en) * | 2007-06-05 | 2013-02-26 | Intel Corporation | Systems, methods, and apparatuses for transmitting data mask bits to a memory device |
| US8161356B2 (en) * | 2008-03-28 | 2012-04-17 | Intel Corporation | Systems, methods, and apparatuses to save memory self-refresh power |
| US8949684B1 (en) * | 2008-09-02 | 2015-02-03 | Apple Inc. | Segmented data storage |
| CN102045478B (zh) * | 2009-10-23 | 2013-05-01 | 精工爱普生株式会社 | 图像读取装置、校正处理方法及用该装置的图像处理方法 |
| WO2011062825A2 (en) | 2009-11-20 | 2011-05-26 | Rambus Inc. | Bit-replacement technique for dram error correction |
| US8484536B1 (en) * | 2010-03-26 | 2013-07-09 | Google Inc. | Techniques for data storage, access, and maintenance |
| US8719675B1 (en) | 2010-06-16 | 2014-05-06 | Google Inc. | Orthogonal coding for data storage, access, and maintenance |
| US8612676B2 (en) | 2010-12-22 | 2013-12-17 | Intel Corporation | Two-level system main memory |
| US8644104B2 (en) | 2011-01-14 | 2014-02-04 | Rambus Inc. | Memory system components that support error detection and correction |
| US8694857B2 (en) * | 2011-04-13 | 2014-04-08 | Inphi Corporation | Systems and methods for error detection and correction in a memory module which includes a memory buffer |
| US8621317B1 (en) | 2011-07-25 | 2013-12-31 | Google Inc. | Modified orthogonal coding techniques for storing data |
| US8615698B1 (en) | 2011-09-28 | 2013-12-24 | Google Inc. | Skewed orthogonal coding techniques |
| WO2013048493A1 (en) | 2011-09-30 | 2013-04-04 | Intel Corporation | Memory channel that supports near memory and far memory access |
| US9189329B1 (en) * | 2011-10-13 | 2015-11-17 | Marvell International Ltd. | Generating error correcting code (ECC) data using an ECC corresponding to an identified ECC protection level |
| US8959417B2 (en) | 2011-11-23 | 2015-02-17 | Marvell World Trade Ltd. | Providing low-latency error correcting code capability for memory |
| US9753858B2 (en) | 2011-11-30 | 2017-09-05 | Advanced Micro Devices, Inc. | DRAM cache with tags and data jointly stored in physical rows |
| US8856619B1 (en) | 2012-03-09 | 2014-10-07 | Google Inc. | Storing data across groups of storage nodes |
| US9391637B2 (en) | 2012-03-30 | 2016-07-12 | Intel Corporation | Error correcting code scheme utilizing reserved space |
| US8694862B2 (en) * | 2012-04-20 | 2014-04-08 | Arm Limited | Data processing apparatus using implicit data storage data storage and method of implicit data storage |
| US8949698B2 (en) * | 2012-09-27 | 2015-02-03 | Intel Corporation | Method, apparatus and system for handling data faults |
| US9734921B2 (en) | 2012-11-06 | 2017-08-15 | Rambus Inc. | Memory repair using external tags |
| KR101767018B1 (ko) | 2013-09-27 | 2017-08-09 | 인텔 코포레이션 | 비휘발성 메모리에서의 오류 정정 |
| DE102016123247B4 (de) | 2015-12-01 | 2024-03-21 | Nvidia Corporation | Systeme und verfahren zur speicherverwaltung |
| KR102766654B1 (ko) * | 2016-11-16 | 2025-02-12 | 에스케이하이닉스 주식회사 | 반도체장치 및 반도체시스템 |
| US10606696B2 (en) | 2017-12-04 | 2020-03-31 | International Business Machines Corporation | Internally-generated data storage in spare memory locations |
| US20190243566A1 (en) * | 2018-02-05 | 2019-08-08 | Infineon Technologies Ag | Memory controller, memory system, and method of using a memory device |
| US11119909B2 (en) | 2018-12-11 | 2021-09-14 | Texas Instmments Incorporated | Method and system for in-line ECC protection |
| US20200097362A1 (en) | 2019-11-29 | 2020-03-26 | Intel Corporation | Methods and apparatus for reducing microbumps for inter-die double-data rate (ddr) transfer |
| US11144383B2 (en) * | 2020-03-10 | 2021-10-12 | Sap Se | Platform for automated administration and monitoring of in-memory systems |
| CN114756403B (zh) * | 2022-04-25 | 2023-03-14 | 电子科技大学 | 一种基于网络编码的ram利用率提升方法 |
| US12216521B2 (en) * | 2022-08-12 | 2025-02-04 | Micron Technology, Inc. | Common rain buffer for multiple cursors |
| US12504876B2 (en) * | 2023-05-19 | 2025-12-23 | Qualcomm Incorporated | Flexible metadata regions for a memory device |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4955024A (en) * | 1987-09-14 | 1990-09-04 | Visual Information Technologies, Inc. | High speed image processing computer with error correction and logging |
| US5117428A (en) * | 1989-11-22 | 1992-05-26 | Unisys Corporation | System for memory data integrity |
| US5088092A (en) * | 1989-11-22 | 1992-02-11 | Unisys Corporation | Width-expansible memory integrity structure |
| US5052001A (en) * | 1989-11-22 | 1991-09-24 | Unisys Corporation | Multiple memory bank parity checking system |
| US6070262A (en) * | 1997-04-04 | 2000-05-30 | International Business Machines Corporation | Reconfigurable I/O DRAM |
| JPH1198462A (ja) * | 1997-09-19 | 1999-04-09 | Hitachi Ltd | データ再生装置 |
| JP3184129B2 (ja) | 1997-09-29 | 2001-07-09 | 甲府日本電気株式会社 | 記憶装置 |
| JP3809719B2 (ja) * | 1998-01-05 | 2006-08-16 | ソニー株式会社 | ディジタルビデオ信号処理装置および方法、ディジタルビデオ信号再生装置、復号装置および方法、ならびに、再生装置および方法 |
| US6353910B1 (en) | 1999-04-09 | 2002-03-05 | International Business Machines Corporation | Method and apparatus for implementing error correction coding (ECC) in a dynamic random access memory utilizing vertical ECC storage |
| US6279072B1 (en) * | 1999-07-22 | 2001-08-21 | Micron Technology, Inc. | Reconfigurable memory with selectable error correction storage |
| US6854084B2 (en) * | 2000-07-14 | 2005-02-08 | Sun Microsystems, Inc. | Partitioned random access memory |
| US6718444B1 (en) * | 2001-12-20 | 2004-04-06 | Advanced Micro Devices, Inc. | Read-modify-write for partial writes in a memory controller |
| US7117421B1 (en) * | 2002-05-31 | 2006-10-03 | Nvidia Corporation | Transparent error correction code memory system and method |
| US7043679B1 (en) * | 2002-06-27 | 2006-05-09 | Advanced Micro Devices, Inc. | Piggybacking of ECC corrections behind loads |
| KR100481820B1 (ko) * | 2002-09-26 | 2005-04-11 | (주)실리콘세븐 | 패러티로서 비유효한 출력 데이터를 보정하는 에스램 호한메모리와 그 구동방법 |
| KR100482380B1 (ko) * | 2002-11-11 | 2005-04-14 | (주)실리콘세븐 | 메모리 뱅크별 기입 동작의 수행이 가능한 에스램 호환 메모리 및 그 구동방법 |
| US20040128465A1 (en) * | 2002-12-30 | 2004-07-01 | Lee Micheil J. | Configurable memory bus width |
| US20040128464A1 (en) * | 2002-12-30 | 2004-07-01 | Lee Micheil J. | Memory reclamation |
| US7447950B2 (en) * | 2003-05-20 | 2008-11-04 | Nec Electronics Corporation | Memory device and memory error correction method |
-
2005
- 2005-12-29 US US11/322,446 patent/US7676730B2/en not_active Expired - Fee Related
-
2006
- 2006-09-29 JP JP2006268644A patent/JP2007115390A/ja active Pending
- 2006-10-02 EP EP06255091A patent/EP1777624A3/en not_active Withdrawn
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7996712B2 (en) | 2008-02-20 | 2011-08-09 | Hitachi, Ltd. | Data transfer controller, data consistency determination method and storage controller |
| KR20150070252A (ko) * | 2012-10-11 | 2015-06-24 | 어드밴스드 마이크로 디바이시즈, 인코포레이티드 | 높은 신뢰도 메모리 컨트롤러 |
| KR101626040B1 (ko) | 2012-10-11 | 2016-06-13 | 어드밴스드 마이크로 디바이시즈, 인코포레이티드 | 높은 신뢰도 메모리 컨트롤러 |
| EP2924576A1 (en) | 2014-03-28 | 2015-09-30 | Fujitsu Limited | Storage control apparatus, control program, and control method |
| US9639417B2 (en) | 2014-03-28 | 2017-05-02 | Fujitsu Limited | Storage control apparatus and control method |
| CN110990186A (zh) * | 2018-10-02 | 2020-04-10 | 三星电子株式会社 | 片上系统、操作片上系统的方法和存储系统 |
| KR20200038145A (ko) * | 2018-10-02 | 2020-04-10 | 삼성전자주식회사 | 메모리 이용 효율을 향상한 보안 처리기를 포함하는 시스템 온 칩, 메모리 시스템 및 시스템 온 칩의 동작방법 |
| KR102557993B1 (ko) * | 2018-10-02 | 2023-07-20 | 삼성전자주식회사 | 메모리 이용 효율을 향상한 보안 처리기를 포함하는 시스템 온 칩, 메모리 시스템 및 시스템 온 칩의 동작방법 |
| CN110990186B (zh) * | 2018-10-02 | 2024-09-13 | 三星电子株式会社 | 片上系统、操作片上系统的方法和存储系统 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20070079217A1 (en) | 2007-04-05 |
| EP1777624A2 (en) | 2007-04-25 |
| US7676730B2 (en) | 2010-03-09 |
| EP1777624A3 (en) | 2012-03-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2007115390A (ja) | メモリ機器、データを転送する方法、およびデータを格納する方法 | |
| CN109426583B (zh) | 运行中的独立磁盘冗余阵列奇偶校验计算 | |
| US5459742A (en) | Solid state disk memory using storage devices with defects | |
| KR101405741B1 (ko) | 스트라이프-기반 비-휘발성 멀티레벨 메모리 동작 | |
| KR100385370B1 (ko) | 개선된 메모리 시스템 장치 및 방법 | |
| US8862963B2 (en) | Nonvolatile memory, memory controller, nonvolatile memory accessing method, and program | |
| US11646092B2 (en) | Shared error check and correct logic for multiple data banks | |
| EP1815338B1 (en) | Predictive error correction code generation facilitating high-speed byte-write in a semiconductor memory | |
| TWI478171B (zh) | 非揮發性記憶體系統 | |
| US7827348B2 (en) | High performance flash memory devices (FMD) | |
| JP4744867B2 (ja) | データをセクタ単位にランダムに入出力することができるフラッシュメモリシステム | |
| US6754858B2 (en) | SDRAM address error detection method and apparatus | |
| US5343426A (en) | Data formater/converter for use with solid-state disk memory using storage devices with defects | |
| US9754684B2 (en) | Completely utilizing hamming distance for SECDED based ECC DIMMs | |
| US9130597B2 (en) | Non-volatile memory error correction | |
| JP2007115390A5 (enExample) | ||
| US20130173991A1 (en) | Facilitating Error Detection And Recovery In A Memory System | |
| US20130117632A1 (en) | Storage control apparatus | |
| US10078548B2 (en) | Memory controller, semiconductor device and method of controlling semiconductor device | |
| EP2980704B1 (en) | Memory bank accessing method, apparatus and system | |
| JP3272308B2 (ja) | 誤り訂正システム、誤り訂正方法および誤り訂正機能を有するデータ記憶システム | |
| US12079488B2 (en) | Memory system and method of operating the same | |
| US12051480B2 (en) | Semiconductor storage device | |
| JPH08190512A (ja) | データ記憶制御装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20090918 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20090918 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20110610 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20110614 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20111108 |