JP2007109751A - Mounting structure and mounting method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a mounting structure of a semiconductor with which the semiconductor device having PHS (Plated Heat Sink) sharing heat dissipation and grounding at a rear face can easily and securely be soldered, heat generated at that time is appropriately diffused, and grounding can easily be performed. <P>SOLUTION: The mounting structure of the semiconductor device is provided with the semiconductor device 1 having PHS 6 sharing heat dissipation and grounding at the rear face, a substrate 2 having through-holes 12, first solders 3 connecting a part except for PHS 6 of the semiconductor device 1 and the substrate 2, and second solder 4 connecting a part of PHS 6 of the semiconductor device 1 and the substrate 2 with which the through-hole 12 of the substrate 2 is filled and whose melting point is lower than the first solders 3. The part except for PHS 6 is soldered by first solder 3, and the part of PHS 6 is soldered by second solder. Heat dissipation radiators 8 and 9 can be arranged in a face opposite to the mounting face of the semiconductor device 1 in the substrate 2 and a case of the semiconductor device 1. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a mounting structure and mounting method for a semiconductor device, and in particular, a semiconductor device that is mounted by soldering the back surface of a surface mounting component such as a semiconductor package directly to a substrate and dissipating heat generated from the surface mounting component appropriately. The present invention relates to a mounting structure and a mounting method.

  Conventionally, when a semiconductor chip is mounted on a circuit board, grounding the semiconductor chip to the circuit board has been one of the important elements. Therefore, for example, in the mounting structure and mounting method of the semiconductor device described in Patent Document 1, a conductive adhesive is passed through the circuit board in order to ground the semiconductor device manufactured by the TAB (Tape Automated Bonding) method to the circuit board. A technique for grounding a semiconductor chip to a circuit board by pouring from the opposite surface of the circuit board through a hole is disclosed. This technique has a temporary effect in grounding a semiconductor device manufactured by the TAB method to a circuit board and appropriately dissipating heat generated from the semiconductor device manufactured by the TAB method.

  Further, in this type of mounting structure, it is one of the important elements to dissipate heat generated from the back surface of the surface mounting component appropriately. Therefore, for example, in the semiconductor package mounting substrate described in Patent Document 2, a pattern corresponding to the back surface of the surface mount component and a planar conductor layer are formed on the opposite surface of the substrate, and the back surface of the surface mount component is soldered. At the same time, the two conductor layers are connected to each other through a through hole. This technology guides the heat generated from the surface mount component to the back surface of the surface mount component, the conductor layer on the board mounting surface, the through hole, and the conductor layer on the opposite surface of the substrate, thereby generating heat generated from the back surface of the surface mount component. It has a temporary effect in properly dissipating.

  Further, in this type of mounting structure, since the back surface of the surface-mounted component is soldered, the solder on the back surface causes the entire component to float, and there is a problem that the soldering quality of the wiring electrode is degraded. Thus, for example, in the surface mounting component mounting structure, mounting method, and repair method described in Patent Document 3, a technique of providing a through hole in a pad corresponding to the back surface of the surface mounting component is disclosed. This technique has a temporary effect in suppressing the floating of the surface mount component by allowing excess solder to flow into the through hole during reflow.

Japanese Patent No. 2778790 JP-A-6-85427 JP 2004-349418 A

  However, the technique described in Patent Document 1 is specialized for a semiconductor device manufactured by the TAB method, and includes the thermal expansion coefficient of the conductive adhesive and the thermal expansion coefficient of the soldered input / output terminals. Due to the difference, there is a problem that a crack may be newly generated in the conductive adhesive or the solder. In the case of the TAB method, the stress due to the difference between the thermal expansion coefficient of the conductive adhesive and the thermal expansion coefficient of the soldered input / output terminal can be absorbed by the TAB lead and the input / output terminal, which is an effective means. . However, when considering application to a semiconductor device having a plated heat sink that serves as both heat dissipation and grounding on the back surface of the surface mount component, there is a problem that stress due to a difference in thermal expansion coefficient cannot be absorbed.

  Further, as pointed out in Patent Document 3, the semiconductor package mounting substrate described in Patent Document 2 has a problem that the solder on the back surface causes the entire component to float, and the soldering quality of the wiring electrode is degraded. there were.

  Furthermore, in the technique described in Patent Document 3, it is necessary to control the amount of solder paste on the back surface of the surface-mounted component, and excessive solder flows into the through hole. However, the excessive amount of solder is too large. Then, the entire part is lifted, and if it is too small, there is a problem that the soldering on the back surface becomes insufficient.

  Accordingly, the present invention has been made in view of the above-described problems in the conventional technology, and can easily and reliably solder a semiconductor device including a plated heat sink that combines heat dissipation and grounding on the back surface. An object of the present invention is to provide a mounting structure and a mounting method for a semiconductor device which can dissipate heat generated at that time and can be easily grounded.

  In order to achieve the above object, the present invention provides a semiconductor device mounting structure, a semiconductor device having a plated heat sink (hereinafter referred to as “PHS”) having both heat dissipation and grounding on the back surface, and a substrate having a through hole. And connecting the PHS portion of the semiconductor device and the substrate to the through hole of the substrate, the first solder for connecting the portion other than the PHS of the semiconductor device and the substrate, the PHS portion of the semiconductor device, and the substrate. And a second solder having a melting point lower than that of the first solder.

  According to the present invention, the difference in thermal expansion coefficient between the first solder and the second solder (low temperature solder) is made sufficiently smaller than the thermal expansion coefficient between the first solder and the conductive adhesive. Therefore, there is no possibility that cracks or the like occur in the solder portion, and a semiconductor device having a PHS that combines heat dissipation and grounding on the back surface can be easily and reliably mounted.

  In addition, according to the present invention, a cylindrical thermal via filled with low-temperature solder, which is a good electrical and thermal conductor, is formed, and compared with a conventional hollow cylindrical thermal via, The thermal resistance between the surface and the opposite surface can be greatly reduced.

  Further, as a secondary effect, the temperature rise during soldering of PHS can be suppressed to about the melting point of low-temperature solder, so that the semiconductor device is also less susceptible to thermal stress.

  In the semiconductor device mounting structure, a heat dissipation radiator may be provided on a surface of the substrate opposite to the mounting surface of the semiconductor device. Thereby, the heat dissipation efficiency can be further increased.

  In the semiconductor device mounting structure, a heat dissipation radiator may be provided in the case of the semiconductor device. Thereby, the heat dissipation efficiency can be further increased.

  Furthermore, the present invention provides a semiconductor device mounting method for mounting a semiconductor device having a PHS having both heat dissipation and grounding on a substrate having a through-hole on the back surface, and a portion other than the PHS is mounted on the substrate. A first step of soldering with solder, and soldering the PHS portion from the opposite side of the mounting surface of the semiconductor device to the substrate with a second solder having a melting point lower than that of the first solder The second solder is filled in the through hole of the substrate after the second step is completed.

  According to the present invention, as described above, there is no possibility that cracks or the like occur in the solder portion, and a semiconductor device including a PHS that combines heat dissipation and grounding can be easily and reliably mounted on the back surface. . For example, when the first solder is lead eutectic solder in the first stage, the melting point of lead eutectic solder is about 183 ° C. When the second low-temperature solder is indium solder, the melting point is about 100 ° C., and the melting point is lower than that of the first solder, so that the soldering quality in the first stage is not deteriorated.

  In addition, according to the present invention, compared to a conventional hollow cylindrical thermal via, the thermal resistance between the mounting surface and the opposite surface can be greatly reduced, and the temperature rise during soldering of PHS is also low. The temperature can be suppressed to the melting point of the solder, and the semiconductor device is less susceptible to thermal stress.

  In the mounting method of the semiconductor device, a heat dissipation radiator can be mounted on the surface of the substrate opposite to the mounting surface of the semiconductor device. Thereby, the heat dissipation efficiency can be further increased.

  Further, in the semiconductor device mounting method, a heat dissipation radiator can be mounted on the case of the semiconductor device. Thereby, the heat dissipation efficiency can be further increased.

  As described above, according to the present invention, it is possible to easily and reliably solder a semiconductor device including a PHS that serves as both heat dissipation and grounding on the back surface, appropriately dissipating the heat generated at that time, and grounding. Can also be easily performed.

  Next, embodiments of the present invention will be described with reference to the drawings. The mounting structure and mounting method of the semiconductor device according to the present invention is a surface mount device (SMD) shape such as Small Outline Pakage (SOP), Quad Flat Pakage (QFP), and Leaderess Chip Carrier (LCC), and the bottom surface. It can be suitably used for a large heat generating semiconductor device having PHS. One example is a hetero-bipolar transistor (HBT) using an indium-gallium-phosphorus (InGaP) process, which is mainly SOP-shaped, and most of the bottom surface is occupied by PHS that combines heat dissipation and grounding. In the following description, a case where SOP is mounted will be described as an example.

  In the present invention, when the semiconductor device 1 having a large calorific value is implemented on the substrate 2, first, as shown in FIG. Solder with 1 solder).

  Next, as shown in FIG. 1B, as a second stage, low-temperature solder is applied only to the thermal via 5 (see FIG. 2) from the surface of the substrate 2 opposite to the mounting surface of the semiconductor device 1. (Second solder) 4 is soldered. At this time, the low-temperature solder 4 is liquefied and soldered by flowing into the PHS 6 through the thermal via 5. As shown in FIG. 2, a large number of through holes 13 are formed in the substrate 2, and the leads 3 are connected to the input signal pattern 10, the output signal pattern 11, and the power input pattern 12.

  Since the PHS 6 exists on the same plane as the lead 3 soldered in the first stage, a gap having a thickness corresponding to the solder layer in the first stage exists between the PHS 6 and the substrate 2. Low-temperature solder 4 flows into the gap mainly by capillary action. The PHS 6 of the semiconductor device 1 is usually precoated with solder, and the case 7 (see FIG. 3) of the semiconductor device 1 is mostly plastic. For this reason, the affinity of the low-temperature solder 4 differs greatly between the plastic case and the substrate as compared with between the PHS 6 and the substrate 2, and the low-temperature solder 4 wraps around only the portion between the PHS 6 and the substrate 2.

  The amount of the low-temperature solder 4 used in the second stage is equivalent to the volume of the thermal via 5 for one thermal via 5 shown in FIG. It is easy to calculate the volume of the thermal via 5 from the board design drawing. In order to reduce the thermal resistance between the PHS 6 and the board mounting surface and the opposite surface of the board, it is usual to form a plurality of thermal vias 5 with respect to the PHS 6, so the amount of low-temperature solder 4 flowing between the PHS 6 and the board 2 is This is because the amount is smaller than the total volume of the plurality of thermal vias 5.

  As described above, in the present invention, soldering is added once compared to the conventional case. However, as already described, since the low temperature solder 4 is used, for example, only the temperature profile of the reflow furnace is changed. It is possible to cope with. Further, since the low temperature solder 4 is used, the time required for soldering can be shortened.

  In the above embodiment, an SOP-shaped semiconductor device is shown as an example. However, as described above, the present invention can also be applied to a QFP having a PHS on the bottom surface, an LCC shape, and other SMDs.

  In the above embodiment, the normal solder is the first solder and the low-temperature solder is the second solder. What is important here is that the difference between the thermal expansion coefficients of the two types of solder is sufficiently small. There is a need to use low-temperature solder that melts at a temperature that does not degrade the soldering quality of ordinary solder.

  In addition, after the above-mentioned two times of soldering, as shown in FIG. 4, the heat radiation effect can be further enhanced by attaching the heat radiation radiator 8 to the surface of the substrate 2 opposite to the mounting surface of the semiconductor device 1. it can. As described above, on the opposite surface side of the thermal via 5, the filled low-temperature solder 4 flows into the mounting surface of the PHS 6 and the substrate 2 in a small amount, and therefore is slightly recessed inside. Therefore, the opposite surface of the thermal via 5 is flat enough to attach the heat dissipation radiator 8. The heat dissipation radiator 8 may be fixed with a thermal good conductor adhesive, or may be pressed with a mechanical spring or the like.

  Further, as shown in FIG. 5, it is possible to further enhance the heat dissipation effect by attaching a heat dissipation radiator 9 to the case 7 itself of the semiconductor device 1.

It is sectional drawing for demonstrating one Embodiment of the mounting method of the semiconductor device concerning this invention, (a) shows a 1st step and (b) shows a 2nd step. It is a figure which shows an example of the back surface of the semiconductor device to which this invention is applied. It is a back surface perspective view of the board | substrate which shows one Embodiment of the mounting structure of the semiconductor device concerning this invention. It is sectional drawing which shows other embodiment of the mounting structure of the semiconductor device concerning this invention. It is sectional drawing which shows other embodiment of the mounting structure of the semiconductor device concerning this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Board | substrate 3 Lead (normal solder part soldered in the 1st step)
4 Low-temperature solder 5 Thermal via 6 PHS of semiconductor device
7 Semiconductor Device Case 8 Heat Dissipation Radiator 9 Heat Dissipation Radiator 10 Semiconductor Device Input Signal Pattern 11 Semiconductor Device Output Signal Pattern 12 Semiconductor Device Power Supply Input Pattern 13 Through Hole

Claims (6)

A semiconductor device having a plated heat sink that combines heat dissipation and grounding on the back surface;
A substrate having a through hole;
A portion of the semiconductor device other than the plated heat sink and a first solder for connecting the substrate;
The plated heat sink portion of the semiconductor device is connected to the substrate, and the second solder is filled in the through hole of the substrate and has a melting point lower than that of the first solder. A mounting structure of a semiconductor device.   The semiconductor device mounting structure according to claim 1, further comprising a heat dissipation radiator on a surface of the substrate opposite to the mounting surface of the semiconductor device.   The semiconductor device mounting structure according to claim 1, wherein a heat dissipation radiator is provided in the case of the semiconductor device. A semiconductor device mounting method for mounting a semiconductor device including a plated heat sink that combines heat dissipation and grounding on a back surface to a substrate having a through hole,
A first step of soldering a portion other than the plated heat sink to the substrate with a first solder;
A second step of soldering the plated heat sink portion with a second solder having a melting point lower than that of the first solder from the opposite side of the mounting surface of the semiconductor device of the substrate;
A semiconductor device mounting method, wherein the second solder is filled in the through hole of the substrate after the second stage is completed.   5. The semiconductor device mounting method according to claim 4, wherein a heat dissipation radiator is mounted on a surface of the substrate opposite to the mounting surface of the semiconductor device.   The semiconductor device mounting method according to claim 4, wherein a heat dissipation radiator is mounted on the case of the semiconductor device.

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