JP2007093851A - Electrooptic device and electronic equipment - Google Patents

Electrooptic device and electronic equipment Download PDF

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JP2007093851A
JP2007093851A JP2005281405A JP2005281405A JP2007093851A JP 2007093851 A JP2007093851 A JP 2007093851A JP 2005281405 A JP2005281405 A JP 2005281405A JP 2005281405 A JP2005281405 A JP 2005281405A JP 2007093851 A JP2007093851 A JP 2007093851A
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electro
line
optical device
pixel
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Shigenori Katayama
Takashi Totani
隆史 戸谷
茂憲 片山
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Sanyo Epson Imaging Devices Corp
三洋エプソンイメージングデバイス株式会社
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Abstract

PROBLEM TO BE SOLVED: To provide an electro-optical device capable of suppressing the generation of moiré fringes and preventing deterioration of display quality.
An electro-optical device includes a plurality of scanning lines 12, data lines 21 and 22, and a plurality of pixel transistors provided corresponding to intersections of the plurality of scanning lines 12 and the plurality of data lines 21 and 22. An element substrate 60 having a circuit element group 58 including a plurality of pixel electrodes 561 provided corresponding to the circuit element group 58 is provided. The relative position of the pixel electrode 561 with respect to the circuit element group 58 differs between adjacent pixel circuits 57.
[Selection] Figure 4

Description

  The present invention relates to, for example, an electro-optical device using liquid crystal and an electronic apparatus having the electro-optical device.

Conventionally, a total reflection type active matrix liquid crystal display device is known as an electro-optical device (see Patent Document 1).
Such a liquid crystal display device comprises a liquid crystal panel. The liquid crystal panel includes a display area having a plurality of pixels, and a scanning line driving circuit and a data line driving circuit which are provided around the display area and drive the pixels.

  A liquid crystal panel is sandwiched between an element substrate on which a thin film transistor (hereinafter referred to as TFT) as a switching element is disposed corresponding to a pixel, a counter substrate disposed opposite to the element substrate, and the element substrate and the counter substrate. And a liquid crystal as an electro-optical material.

The element substrate includes a plurality of scanning lines provided at predetermined intervals, a plurality of data lines substantially orthogonal to the scanning lines and provided at predetermined intervals, and intersections between the scanning lines and the data lines. And a corresponding pixel circuit.
This pixel circuit includes a plurality of TFTs and a pixel electrode electrically connected to these TFTs.
The counter substrate includes a counter electrode and a color filter provided to face the pixel electrode.

  The above liquid crystal device operates as follows. That is, all the pixels related to a certain scanning line are selected by supplying a selection voltage from the scanning line driving circuit to the scanning line in a line sequential manner. Then, in synchronization with the selection of these pixels, an image signal is supplied from the data line driving circuit to the data line. Accordingly, an image signal is supplied from the data line to the pixel selected by the scanning line driving circuit and the data line driving circuit via the switching element, and the image data is written into the pixel electrode.

When image data is written to the pixel electrode, a driving voltage is applied to the liquid crystal due to a potential difference between voltages applied to the pixel electrode and the counter electrode. Therefore, by changing the voltage level of the image signal, the orientation and order of the liquid crystal are changed, and gradation display is performed by light modulation of each pixel.
JP-A-8-286170

  As described above, data lines and scanning lines are arranged on the element substrate of the electro-optical device, and pixel circuits are formed corresponding to the intersections between the data lines and the scanning lines. Therefore, since all the pixel circuits are provided at a fixed position on the element substrate with respect to the intersection of the data line and the scanning line, the surface of the surface formed by the wiring such as the scanning line and the data line and the TFT is formed. The uneven pattern is a pattern that is repeated for each pixel circuit.

On the other hand, since the counter electrode and the color filter are also formed on the second substrate so as to face the pixel electrode, the pattern of the counter electrode and the color filter is repeated every pixel.
Accordingly, when the electro-optic panel is configured by superimposing the first substrate and the second substrate, the pattern of the unevenness of the first substrate and the pattern of the second substrate interfere optically, and moire fringes are formed. As a result, the display quality of the electro-optical device is deteriorated.

  It is an object of the present invention to provide an electro-optical device and an electronic apparatus that can suppress the occurrence of moire fringes and prevent deterioration in display quality.

  The electro-optical device of the present invention includes a plurality of scanning lines, a plurality of data lines intersecting with the plurality of scanning lines, and a plurality of scanning lines provided corresponding to the intersections of the plurality of scanning lines and the plurality of data lines. An electro-optical device comprising a substrate having a switching element and a plurality of pixel electrodes provided corresponding to the switching element, wherein the relative position of the pixel electrode with respect to the switching element is between adjacent pixels It is characterized by being different.

  According to the present invention, the relative position of the pixel electrode with respect to the switching element is made different between adjacent pixels. Therefore, the uneven pattern on the surface formed by the wiring such as the scanning lines and the data lines and the insulating layer on the substrate is repeated for each predetermined number of pixel circuits. Therefore, since the appearance period of the uneven pattern can be increased compared to the conventional case, it is possible to prevent optical interference between the pattern due to the unevenness of the substrate and the pattern due to the other substrate, and suppress the generation of moire fringes. Quality degradation can be prevented.

  In the electro-optical device according to the aspect of the invention, it is preferable that the switching element is provided at a fixed position with respect to the intersection of the scanning line and the data line.

  According to the present invention, since the switching element is provided at a fixed position with respect to the intersection of the scanning line and the data line, generation of moire fringes can be suppressed more reliably.

  In the electro-optical device according to the aspect of the invention, it is preferable that a relative position between the switching element and the pixel electrode is different between adjacent pixels in the unit with a plurality of pixels as a unit.

  According to the present invention, the relative positions of the switching element and the pixel electrode are made different between adjacent pixels in the unit with a plurality of pixels as a unit. Therefore, the appearance cycle of the concavo-convex pattern can be a unit composed of a plurality of pixels.

  In the electro-optical device according to the aspect of the invention, the pixel electrode is formed on the layer on which the switching element, the scanning line, and the data line are formed via an insulating layer, and the first substrate includes the first substrate, An address line for designating a region selected by a scan line, the address line including an address trunk line extending along the data line, and an address branch line extending from the address trunk line along the scan line; The address trunk line is preferably arranged for each predetermined number of the switching elements.

  According to the present invention, the address line is constituted by an address trunk line and an address branch line, and the address trunk line is arranged for each predetermined number of switching elements in the layer where the switching elements are formed. Thereby, the arrangement interval of the pixel electrodes can be increased by the width of the address trunk line without changing the arrangement interval of the switching elements. Therefore, the relative position of the pixel electrode with respect to the switching element can be easily made different between adjacent pixel circuits.

  The electro-optical device of the present invention includes a plurality of scanning lines, a plurality of data lines intersecting with the plurality of scanning lines, and a plurality of scanning lines provided corresponding to the intersections of the plurality of scanning lines and the plurality of data lines. An electro-optical device comprising a substrate having a pixel circuit and a plurality of pixel electrodes provided corresponding to the pixel circuit, wherein the relative position of the pixel electrode with respect to the pixel circuit is determined between adjacent pixel circuits. It is characterized by being different.

  According to the present invention, the relative positions of the pixel electrodes with respect to the pixel circuit are made different in adjacent pixel circuits. Therefore, the uneven pattern on the surface formed by the wiring such as the scanning lines and the data lines and the insulating layer on the substrate is repeated for each predetermined number of pixel circuits. Therefore, since the appearance period of the uneven pattern can be increased compared to the conventional case, it is possible to prevent optical interference between the pattern due to the unevenness of the substrate and the pattern due to the other substrate, and suppress the generation of moire fringes. Quality degradation can be prevented.

  In the electro-optical device according to the aspect of the invention, it is preferable that a relative position between the pixel circuit and the pixel electrode is different between adjacent pixel circuits in the unit with a plurality of pixels as a unit.

  According to the present invention, the relative positions of the pixel circuit and the pixel electrode are made different between adjacent pixel circuits in the unit with a plurality of pixels as a unit. Therefore, the appearance cycle of the concavo-convex pattern can be a unit composed of a plurality of pixels.

  The electro-optical device according to the aspect of the invention includes a common wiring electrically connected to the pixel circuit in the unit, and the sum of the width of the pixel circuit and the width of the common wiring in the unit is the pixel. It is preferable to be equal to the sum of the widths of the pixel electrodes corresponding to the circuit.

  According to the present invention, in the unit, the sum of the width of the pixel circuit and the width of the common wiring is made equal to the sum of the widths of the pixel electrodes corresponding to the pixel circuit. Therefore, the relative position between the pixel circuit and the pixel electrode can be easily made different between adjacent pixels in the unit only by arranging a common wiring.

An electronic apparatus according to an aspect of the invention includes the above-described electro-optical device.
According to the present invention, there are effects similar to those described above.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following description of embodiments and modifications, the same constituent elements are denoted by the same reference numerals, and the description thereof is omitted or simplified.
<Embodiment>
FIG. 1 is a block diagram of an electro-optical device 1 according to an embodiment of the present invention.
The electro-optical device 1 includes a liquid crystal panel AA.
The liquid crystal panel AA includes a display area A having a plurality of pixels 50, a scanning line driving circuit 10, a data line driving circuit 20, and a driving signal supply circuit 30 that are provided around the display area A and drive the pixels 50. And comprising.

  The liquid crystal panel AA includes a pair of wiring lines including address lines 11 and scanning lines 12 extending in the horizontal direction (X direction) in FIG. 1, and first drive lines 31 and first lines extending in the horizontal direction (X direction) in FIG. A pair of wirings composed of two drive lines 32 are alternately provided at predetermined intervals. Further, the first data line 21 and the second data line 22 that intersect the address line 11, the scanning line 12, the first drive line 31, and the second drive line 32 and extend in the vertical direction (Y direction) in FIG. Are alternately provided at predetermined intervals.

  The pixel 50 is provided at the intersection of the address line 11, the scanning line 12, the first drive line 31, the second drive line 32, and the first data line 21 and the second data line 22.

The scanning line driving circuit 10 supplies an X signal (address signal) for designating an area selected by the scanning line 12 to each address line 11, and outputs a Y signal (scanning signal) for selecting the pixel 50 in a line sequential manner. This is supplied to the scanning line 12. Thus, the display area A is divided into a plurality of areas along the X direction and the Y direction, the area divided along the X direction is designated by the X signal (address signal), and the Y signal (scanning signal) ) Designates an area divided along the Y direction.
The data line driving circuit 20 supplies an image signal to each first data line 21 and supplies an inverted image signal obtained by inverting the image signal to each second data line 22.
The drive signal supply circuit 30 supplies an alternating drive signal to each first drive line 31 and supplies an inverted drive signal obtained by inverting this drive signal to each second drive line 32.

FIG. 2 is a circuit diagram of the transistor level of the pixel 50. FIG. 3 is an enlarged plan view of the liquid crystal panel AA.
The pixel 50 includes a memory cell 51, a first switching circuit 52, a second switching circuit 53, a first transfer gate 54, a second transfer gate 55, and a liquid crystal cell 56.

  The memory cell 51 is configured by connecting two inverters 511 and 512 in a loop. That is, the input terminal of the inverter 511 is connected to the output terminal of the inverter 512, and the output terminal of the inverter 511 is connected to the input terminal of the inverter 512. Here, in the memory cell 51, an input terminal of the inverter 511, that is, an output terminal of the inverter 512 is a terminal P1, and an output terminal of the inverter 511, that is, an input terminal of the inverter 512 is a terminal P2.

The first switching circuit 52 supplies the image signal from the first data line 21 to the terminal P1 of the memory cell 51 in accordance with the X signal (address signal) from the address line 11 and the Y signal (scanning signal) from the scanning line 12. To do.
Specifically, the first switching circuit 52 includes an nMOS-structure TFT 521 that is turned on / off according to a Y signal (scanning signal), and an nMOS-structure TFT 522 that is turned on / off according to an X signal (address signal). Are connected in series.
The gate of the TFT 521 is connected to the scanning line 12, and the source is connected to the first data line 21. The gate of the TFT 522 is connected to the address line 11, the source is connected to the drain of the TFT 521, and the drain is connected to the terminal P 1 of the memory cell 51.

The second switching circuit 53 applies the inverted image signal from the second data line 22 to the terminal P2 of the memory cell 51 in accordance with the X signal (address signal) from the address line 11 and the Y signal (scanning signal) from the scanning line 12. Supply.
Specifically, the second switching circuit 53 includes an nMOS-structure TFT 531 that is turned on / off according to a Y signal (scanning signal), and an nMOS-structure TFT 532 that is turned on / off according to an X signal (address signal). Are connected in series.
The gate of the TFT 531 is connected to the scanning line 12, and the source is connected to the second data line 22. The gate of the TFT 532 is connected to the address line 11, the source is connected to the drain of the TFT 531, and the drain is connected to the terminal P 2 of the memory cell 51.

  The liquid crystal cell 56 includes a pixel electrode 561, a counter electrode 562 disposed to face the pixel electrode 561, and a liquid crystal layer sandwiched between the pixel electrode 561 and the counter electrode 562.

The first transfer gate 54 has a CMOS (complementary) structure, and supplies a drive signal from the first drive line 31 to the pixel electrode 561 of the liquid crystal cell 56 in accordance with a control signal from the memory cell 51.
Specifically, the control terminal of the first transfer gate 54 is connected to the terminals P 1 and P 2 of the memory cell 51, the input terminal is connected to the first drive line 31, and the output terminal is connected to the pixel electrode 561. The

The second transfer gate 55 has a CMOS (complementary) structure and supplies an inverted drive signal from the second drive line 32 to the pixel electrode 561 of the liquid crystal cell 56 in accordance with a control signal from the memory cell 51.
Specifically, the control terminal of the second transfer gate 55 is connected to the terminals P1 and P2 of the memory cell 51, the input terminal is connected to the second drive line 32, and the output terminal is connected to the pixel electrode 561. The

The above electro-optical device 1 operates as follows.
That is, an X signal (address signal) is supplied from the scanning line driving circuit 10 to each address line 11 to designate a specific area of the display area A, and a Y signal (scanning signal) is line-sequentially applied to each scanning line 12. Supply.
Then, the TFTs 522 and 532 of the pixel 50 in the specific area of the display area A are turned on by the X signal (address signal). Further, the TFTs 521 and 531 of the pixel 50 related to a certain scanning line are turned on by the Y signal (scanning signal).
Thereby, all the pixels 50 included in a specific region among the pixels 50 related to a certain scanning line 12 are selected.

In synchronization with the selection of the pixels 50, an image signal and an inverted image signal are supplied from the data line driving circuit 20 to the first data line 21 and the second data line 22. Then, the image signal and the inverted image signal are written into the memory cell 51 of the selected pixel 50 and supplied to the control terminals of the transfer gates 54 and 55.
As a result, the first transfer gate 54 or the second transfer gate 55 is selectively turned on, and the drive signal from the first drive line 31 or the inverted drive signal from the second drive line 32 is written to the pixel electrode 561.

When an image signal or an inverted image signal is written to the pixel electrode 561, a driving voltage is applied to the liquid crystal due to a potential difference between the pixel electrode 561 and the counter electrode 562. As a result, the alignment and order of the liquid crystal are changed, and display by light modulation of each pixel 50 is performed.
Note that the image signal and the inverted image signal are held by the memory cell 51, whereby the drive voltage applied to the liquid crystal is also held until the next frame is written.

In addition, according to the electro-optical device 1, not only the full screen display displayed on the entire surface of the display area A as described above, but also a partial display that displays only on a part of the display area A is possible.
That is, in the partial display mode, a specific area is designated among a plurality of areas formed by dividing the display area A by the X signal (address signal) and the Y signal (scanning signal), and only in the designated area. , Display.
Thereby, power saving can be achieved in the partial display mode.

FIG. 4 is a plan view of the liquid crystal panel AA. FIG. 5 is a partial cross-sectional view of the liquid crystal panel AA. FIG. 6 is a perspective view showing the relationship between the pixel electrode and each wiring in the liquid crystal panel AA.
Here, FIG. 5 is a cross-sectional view including the first transfer gate 54 or the second transfer gate 55 and the pixel electrode 561.

  As shown in FIG. 5, the above-described liquid crystal panel AA has an element substrate 60 as a first substrate on which a plurality of pixel transistors 59 as switching elements are arranged corresponding to the pixels 50, and is disposed opposite to the element substrate 60. The counter substrate 70 as the second substrate, and the liquid crystal sandwiched between the element substrate 60 and the counter substrate 70 are configured.

As shown in FIG. 4, in the element substrate 60, in addition to the address lines 11, the scanning lines 12, the first drive lines 31, and the second drive lines 32 extending in the horizontal direction in FIG. 4, a high potential power supply line Vdd and a low potential are provided. A power supply line Vss is formed, and a pixel circuit 57 is formed corresponding to the pixel 50.
The pixel circuit 57 includes a plurality of pixel transistors 59 and a pixel electrode 561. Hereinafter, among the circuit elements constituting the pixel circuit 57, the pixel element 561 is excluded from the circuit element group 58. Call it.
That is, the circuit element group 58 specifically includes the memory cell 51, the first switching circuit 52, the second switching circuit 53, the first transfer gate 54, and the second transfer gate 55 described above.
Such a circuit element group 58 includes the address line 11, the scanning line 12, the first drive line 31, the second drive line 32, the high-potential power line Vdd, the low-potential power line Vss, the first data line 21, and the like. It is provided at a fixed position with respect to the intersection of the second data lines 22.

  The address line 11 includes an address trunk line 111 as a common wiring extending along the first data line 21 and the second data line 22, and an address branch line 112 extending from the address trunk line 111 along the scanning line 12. Is provided.

In the present embodiment, the pixel transistor 59 is a planar polysilicon TFT, and each pixel 50 includes a plurality of TFTs.
Specifically, the TFTs 521 and 522 constituting the first switching circuit 52, the TFTs 531 and 532 constituting the second switching circuit 53, the TFTs constituting the inverters 511 and 512 of the memory cell 51, and the first transfer gate 54 are provided. The constituting TFT and the TFT constituting the second transfer gate 55 are formed of a planar type polysilicon TFT.

Hereinafter, a specific structure of the liquid crystal panel AA will be described.
First, the element substrate 60 will be described.
The element substrate 60 has a glass substrate 68, and a semiconductor layer 61 made of p-Si (polycrystalline silicon) and n + p-Si is formed in a region on the glass substrate 68 where the TFT is formed. Yes.
A gate insulating film 62 is formed over the entire surface of the display region A on the semiconductor layer 61 and the glass substrate 68.

A gate electrode 591 is formed on the gate insulating film 62 so as to face the semiconductor layer 61.
Further, on the gate insulating film 62, in addition to the address branch lines 112, the scanning lines 12, the first drive lines 31, and the second drive lines 32 that constitute the address lines 11, the high potential power supply line Vdd and the low potential are provided. A power supply line Vss is formed.
Although not illustrated, the gate electrode 591 in FIG. 5 is connected to the wiring from the terminal P1 or the terminal P2.

  On the gate electrode 591, the address branch line 112, the scanning line 12, the first drive line 31, the second drive line 32, the high potential power supply line Vdd, the low potential power supply line Vss, and the gate insulating film 62, an interlayer insulating film 63 is coated.

  A contact hole 621 for electrically connecting the semiconductor layer 61 and a source electrode 592 described later is electrically connected to the gate insulating film 62 and the interlayer insulating film 63, and a semiconductor layer 61 and a drain electrode 593 described later are electrically connected. Contact holes 622 are formed.

A source electrode 592 and a drain electrode 593 are formed on the interlayer insulating film 63.
The drain electrode 593 is extended to a position where a contact hole 641 described later is formed. Further, the above-described first data line 21 and second data line 22 are formed on the interlayer insulating film 63.
Although not shown, the first drive line 31 and the second drive line 32 described above are connected to the source electrode 592 in FIG.
Thus, the circuit element group 58 described above is formed.

  Further, as described above, as shown in FIG. 6, the first data line 21 and the second data line 22 have the address branch lines 112, the scanning lines 12, the first drive lines 31, And the second drive line 32, the high potential power supply line Vdd, and the low potential power supply line Vss.

On the interlayer insulating film 63, as shown in FIGS. 5 and 6, an address trunk line 111 constituting the address line 11 is formed for every eight columns of the circuit element group 58. The address trunk line 111 and the address branch line 112 are electrically connected by a contact 113 penetrating the interlayer insulating film 63 at the intersection.
As a result, each address line 11 supplies X signals (address signals) to the pixel circuits 57 arranged in four columns on both sides of the address trunk line 111, and eight columns of pixels are selected as regions selected by the scanning lines 12. 50 can be specified.

A planarizing film 64 as an insulating film is formed on the source electrode 592, the drain electrode 593, the first data line 21, the second data line 22, the address trunk line 111, and the interlayer insulating film 63.
A contact hole 641 for electrically connecting the drain electrode 593 and a pixel electrode 561 described later is formed in the planarization film 64.

On the planarizing film 64, a reflective film 65 that reflects incident light is formed over the entire area where the pixel circuit 561 is formed, except for the area where the contact hole 641 is formed.
On the drain electrode 593 exposed from the reflective film 65 and the contact hole 641, the pixel electrode 561 made of a transparent electrode such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide) is formed. This pixel electrode 561 also covers the inside of the contact hole 641, whereby the pixel electrode 561 and the drain electrode 593 are electrically connected.
An alignment film (not shown) made of an organic film such as a polyimide film is formed on the pixel electrode 561.

As described above, since the address trunk line 111 of the address line 11 is formed in every eight columns of the circuit element group 58 in the layer where the circuit element group 58 is formed, the width of the circuit element group 58 is a1, and the address When the width of the trunk line 111 is c, the width of every eight columns of the circuit element group 58 is 8 (a1) + c.
On the other hand, there is no wiring like the address trunk line 111 in the layer where the pixel electrode 561 is formed. Therefore, when the width of the pixel electrode 561 is b1, the following formula is established.

  8 (a1) + c = 8 (b1)

That is, with the pixel circuits 57 in eight columns as a unit, the sum of the width of the circuit element group 58 of the pixel circuit 57 and the width of the address trunk line 111 in this unit is the sum of the widths of the pixel electrodes 561 corresponding to the pixel circuit 57. Is equal to
As a result, as shown in FIG. 4, the relative position of the pixel electrode 561 with respect to the circuit element group 58 differs between adjacent pixel circuits 57 in units of eight columns of pixel circuits 57.
If the length of the circuit element group 58 is a2 and the length of the pixel electrode 561 is b2, a2 and b2 are equal.
As described above, the relative positions of the pixel electrodes 561 with respect to the circuit element group 58 are different between adjacent pixels in the direction in which the address lines 11 and the scanning lines 12 extend.

  In the adjacent pixels in the direction in which the first data line 21 and the second data line 22 extend, the circuit element group 58 and the pixel electrode 561 have a pixel boundary line (for example, the first drive line 31 in the present embodiment). Are arranged symmetrically (mirror arrangement).

Next, the counter substrate 70 will be described.
The counter substrate 70 has a glass substrate 74, and a light shielding film 71 that forms a black matrix is formed at a position facing the boundary of the pixel electrode 561 in the glass substrate 74.
A colored layer 72 of a color filter is formed on the glass substrate 74 and the light shielding film 71.
On the coloring layer 72 of the color filter, a counter electrode 562 made of a transparent conductive film such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide) is formed to face the pixel electrode 561. An alignment film (not shown) is formed on the counter electrode 562.

  A liquid crystal layer is formed between the element substrate 60 and the counter substrate 70, and this liquid crystal layer is sealed with a sealing material (not shown) formed around the element substrate 60 and the counter substrate 70.

  A phase difference plate and a polarizing plate (not shown) are provided on the surfaces of the element substrate 60 and the counter substrate 70.

Next, display of the electro-optical device 1 will be described.
The electro-optical device 1 performs total reflection display. That is, as indicated by arrows in FIG. 5, ambient light incident from the outside becomes linearly polarized light by the polarizing plate (not shown) of the counter substrate 70, and is transmitted through the glass substrate 74, the colored layer 72 of the color filter, and the counter electrode 562. Then, it enters the liquid crystal layer. The light incident on the liquid crystal layer passes through the pixel electrode 561, is reflected by the reflective film 65, passes through the pixel electrode 561 again, and passes through the liquid crystal layer. While passing through the liquid crystal layer, the polarization direction is rotated according to the applied voltage. The light that has passed through the liquid crystal layer again passes through the counter electrode 562, the colored layer 72 of the color filter, and the glass substrate 74, and reaches the polarizing plate of the counter substrate 70. The light that has reached the polarizing plate is transmitted through the polarizing plate according to the amount of rotation in the polarization direction by the liquid crystal.

  Since the total reflection type electro-optical device 1 can form the pixel electrode 561 on a circuit such as the memory cell 51, the switching circuits 52 and 53, and the transfer gates 54 and 55, the effective area of the pixel electrode 561 can be reduced to the memory. A sufficiently wide area can be secured without being affected by the area of the cell 51 and its wiring, and a light source such as a backlight is not required, so that high-luminance display can be realized with low power consumption.

According to this embodiment, there are the following effects.
(1) In the adjacent pixel circuit 57, the relative position of the pixel electrode 561 with respect to the circuit element group 58 is varied. Therefore, in the element substrate 60, the address line 11, the scanning line 12, the first drive line 31, the second drive line 32, the high potential power line Vdd, the low potential power line Vss, the first data line 21, and the second data line. The concave / convex pattern on the surface formed by the wirings 22 and the like and the insulating layers such as the gate insulating film 62, the interlayer insulating film 63, and the planarizing film 64 has the eight columns of pixel circuits 57 as a unit. This is repeated in units of the circuit 57. Therefore, since the period of appearance of the uneven pattern can be increased as compared with the conventional case, it is possible to prevent the pattern due to the unevenness of the element substrate 60 and the pattern due to the counter substrate 70 from interfering optically, and to suppress the generation of moire fringes , Display quality can be prevented from deteriorating.

  (2) The address line 11 is composed of the address trunk line 111 and the address branch line 112, and the address trunk line 111 is arranged for each of the eight circuit element groups 58 in the layer where the circuit element group 58 is formed. Thereby, the arrangement interval of the pixel electrodes 561 can be increased by the width of the address trunk line 111 without changing the arrangement interval of the circuit element group 58. Therefore, the relative position of the pixel electrode 561 with respect to the circuit element group 58 can be easily made different between adjacent pixel circuits 57.

<Modification>
It should be noted that the present invention is not limited to the above-described embodiment, and modifications, improvements, etc. within a scope that can achieve the object of the present invention are included in the present invention.
For example, in the above-described embodiment, the electro-optical device 1 is configured to perform total reflection display, but is not limited thereto, and may be configured to perform transmission display, or may be a transflective type for both transmission and reflection. It is good also as a structure which displays.
In the above embodiment, the address trunk line 111 is provided in the same layer as the circuit element group 58 to increase the arrangement interval of the circuit element group 58 by the width of the address trunk line 111. However, the present invention is not limited to this. That is, the arrangement interval of the circuit element groups may be simply increased without providing the address trunk line 111.

Examples of the liquid crystal include TN (Twisted Nematic) liquid crystal and STN (Super Twisted Nematic) liquid crystal.
In each of the above embodiments, the present invention uses the liquid crystal as the electro-optical material. For example, an electrophoretic display panel using a microcapsule containing a colored liquid and white particles dispersed in the liquid as an electro-optical material, and a twist ball that is separately applied to different colors for areas of different polarity Various types such as a twist ball display panel used as an electro-optical material, a toner display panel using black toner as an electro-optical material, a plasma display panel using high-pressure gas such as helium or neon as an electro-optical material, or an organic EL panel The present invention can also be applied to an electro-optical device as in the above embodiment.
In the above embodiment, a polysilicon TFT is used as the pixel transistor 59. However, the present invention is not limited to this, and an amorphous silicon TFT may be used.

<Application example>
Next, an electronic apparatus to which the electro-optical device 1 according to the above-described embodiment is applied will be described.
FIG. 7 is a perspective view showing a configuration of a mobile phone to which the electro-optical device 1 is applied. The cellular phone 3000 includes a plurality of operation buttons 3001, scroll buttons 3002, and the electro-optical device 1. By operating the scroll button 3002, the screen displayed on the electro-optical device 1 is scrolled.

  As an electronic apparatus to which the electro-optical device 1 is applied, in addition to those shown in FIG. 7, a personal computer, an information portable terminal, a digital still camera, a liquid crystal television, a viewfinder type, a monitor direct view type video tape recorder, a car navigation system. Examples of the apparatus include a device, a pager, an electronic notebook, a calculator, a word processor, a workstation, a video phone, a POS terminal, and a touch panel. The electro-optical device described above can be applied as a display unit of these various electronic devices.

1 is a block diagram illustrating a configuration of an electro-optical device according to an embodiment of the invention. FIG. FIG. 3 is a circuit diagram of a transistor level of a pixel of the electro-optical device. FIG. 3 is an enlarged plan view of a liquid crystal panel constituting the electro-optical device. 2 is a plan view of a liquid crystal panel of the electro-optical device. FIG. FIG. 3 is a partial cross-sectional view of a liquid crystal panel of the electro-optical device. FIG. 4 is a perspective view illustrating a relationship between a pixel electrode and each wiring in a liquid crystal panel of the electro-optical device. It is a perspective view which shows the mobile telephone to which the electro-optical device mentioned above is applied.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Electro-optical apparatus, 11 ... Address line, 12 ... Scan line, 21 ... 1st data line (data line), 22 ... 2nd data line (data line), 57 ... Pixel circuit, 58 ... Circuit element group, 59 ... pixel transistor (switching element), 60 ... element substrate (first substrate), 64 ... planarization film (insulating film), 70 ... counter substrate (second substrate), 111 ... address trunk line (common wiring), 112: Address branch lines, 561: Pixel electrodes, 3000: Mobile phones (electronic devices).

Claims (8)

  1. A plurality of scanning lines, a plurality of data lines intersecting with the plurality of scanning lines, a plurality of switching elements provided corresponding to the intersection of the plurality of scanning lines and the plurality of data lines, and the switching elements An electro-optical device comprising a substrate having a plurality of correspondingly provided pixel electrodes,
    2. The electro-optical device according to claim 1, wherein a relative position of the pixel electrode with respect to the switching element is different between adjacent pixels.
  2. The electro-optical device according to claim 1.
    The electro-optical device, wherein the switching element is provided at a fixed position with respect to an intersection of the scanning line and the data line.
  3. The electro-optical device according to claim 1,
    The relative position between the switching element and the pixel electrode is different between adjacent pixels in the unit with a plurality of pixels as a unit.
  4. The electro-optical device according to claim 1,
    The pixel electrode is formed on the layer where the switching element, the scanning line, and the data line are formed via an insulating layer,
    The first substrate includes an address line for designating a region selected by the scanning line,
    The address line includes an address trunk line extending along the data line, and an address branch line extending from the address trunk line along the scanning line.
    The electro-optical device, wherein the address trunk line is arranged for each predetermined number of the switching elements.
  5. A plurality of scanning lines, a plurality of data lines intersecting with the plurality of scanning lines, a plurality of pixel circuits provided corresponding to the intersection of the plurality of scanning lines and the plurality of data lines, and the pixel circuit An electro-optical device comprising a substrate having a plurality of correspondingly provided pixel electrodes,
    2. The electro-optical device according to claim 1, wherein a relative position of the pixel electrode with respect to the pixel circuit is different between adjacent pixel circuits.
  6. The electro-optical device according to claim 5.
    The relative position between the pixel circuit and the pixel electrode is different between adjacent pixel circuits in the unit with a plurality of pixels as a unit.
  7. The electro-optical device according to claim 6.
    A common wiring electrically connected to the pixel circuit in the unit;
    An electro-optical device, wherein a sum of a width of the pixel circuit and a width of the common wiring in the unit is equal to a sum of widths of the pixel electrodes corresponding to the pixel circuit.
  8. An electronic apparatus comprising the electro-optical device according to claim 1.

JP2005281405A 2005-09-28 2005-09-28 Electrooptic device and electronic equipment Withdrawn JP2007093851A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005281405A JP2007093851A (en) 2005-09-28 2005-09-28 Electrooptic device and electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005281405A JP2007093851A (en) 2005-09-28 2005-09-28 Electrooptic device and electronic equipment

Publications (1)

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JP2007093851A true JP2007093851A (en) 2007-04-12

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7795936B2 (en) * 2007-11-09 2010-09-14 Hynix Semiconductor Inc. Data center tracking circuit and semiconductor integrated circuit including the same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61170778A (en) * 1985-01-25 1986-08-01 Nec Corp Active matrix color liquid crystal display panel
JPS61173290A (en) * 1985-01-29 1986-08-04 Nec Corp Color liquid crystal matrix panel
JPS63186216A (en) * 1987-01-28 1988-08-01 Nec Corp Active matrix liquid crystal display device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61170778A (en) * 1985-01-25 1986-08-01 Nec Corp Active matrix color liquid crystal display panel
JPS61173290A (en) * 1985-01-29 1986-08-04 Nec Corp Color liquid crystal matrix panel
JPS63186216A (en) * 1987-01-28 1988-08-01 Nec Corp Active matrix liquid crystal display device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7795936B2 (en) * 2007-11-09 2010-09-14 Hynix Semiconductor Inc. Data center tracking circuit and semiconductor integrated circuit including the same

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