JP2007073545A - Method for improving crystallinity of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for improving crystallinity of a semiconductor device in which a defect of silicon crystallinity occurring in junction region or surface region or disturbance of crystal such as contamination by heavy metal is recovered when a semiconductor device is fabricated. <P>SOLUTION: The method for improving crystallinity of a semiconductor device comprises steps of: implanting cyan ions, under vacuum pressure reduction state, into the junction region of the semiconductor device, the junction region of the semiconductor device and the vicinity thereof, the surface region of the semiconductor device, or the surface region of the semiconductor device and the vicinity thereof; and heat treating the semiconductor device subjected to ion implantation under high temperature. Defect of crystallinity and contamination is recovered by the inventive method. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a method for improving crystallinity of a semiconductor device capable of recovering crystal disturbance such as silicon crystal defects generated in a junction region or a surface region at the time of manufacturing a semiconductor device or contamination due to heavy metal or the like.

  Although silicon (silicon) crystals are mainly used for semiconductor devices, they must have an ultra-pure single crystal structure for use as semiconductor devices, and various methods for improving crystalline defects or contamination have been devised. Yes.

As described in Patent Document 1, a process of forming oxygen precipitation nuclei inside a semiconductor wafer by heat treatment, a process of implanting hydrogen ions into the surface layer of the semiconductor wafer, and an inert gas atmosphere in the semiconductor wafer A method for reducing defects in a semiconductor wafer comprising a step of growing a minute defect inside the semiconductor wafer by performing a heat treatment and changing the surface of the semiconductor wafer into a defect-free layer by utilizing the reduction action of the implanted hydrogen. Is also open to the public.
JP 2004-282093 A

  However, among semiconductor devices, in particular, image-taking electronic devices such as CMOS image sensors that are sensitive to crystallinity, and solar cell devices such as MIS type solar cells, crystalline defects or contamination can be obtained only by applying heat or light energy. Insufficient to improve.

  Therefore, the present invention provides a method for improving the crystallinity of a semiconductor device, which can recover crystal disturbance such as silicon crystal defects or contamination caused by heavy metals, etc. occurring in a junction region or a surface region during the manufacture of a semiconductor device. It is for the purpose.

  In order to solve the above-described problem, the present invention provides a junction region 7d of the semiconductor device 7, or a junction region 7d of the semiconductor device 7 and the vicinity of the junction region 7d, or a surface region 7c of the semiconductor device 7, or a semiconductor. From the step of implanting cyan ions 8c into the surface region 7c of the device 7 and the vicinity of the surface region 7c under vacuum decompression 3, and the step of heat-treating the semiconductor device 7 implanted with ions 4 at a high temperature. Thus, the configuration of the crystal quality improvement method 1 of the semiconductor device is characterized in that the defect 9c or the contamination 9d of the crystal quality 9 can be recovered.

  Since this invention is the above structure, the following effects are acquired. First, it is possible to recover crystal disturbance such as silicon crystalline defects or contamination caused by heavy metals or the like generated in a junction region or a surface region during the manufacture of a semiconductor device.

  Secondly, the dark current value and the dark current electron value can be greatly reduced as compared with the conventional method by recovering the crystal disorder such as silicon crystal defects and contamination generated in the semiconductor device of the CMOS image sensor. it can.

  Thirdly, by recovering the crystal disorder such as silicon crystal defects and contamination generated in the semiconductor device of MIS type solar cell, the photovoltaic power value and the photocurrent density value of the solar cell are greatly increased compared with the conventional method. Can be improved.

  An object of the present invention is to recover crystal disturbance such as silicon crystalline defects or contamination caused by heavy metals generated in a junction region or a surface region at the time of manufacturing a semiconductor device. A step of ion-implanting cyan ions under vacuum under reduced pressure with respect to a junction region and the vicinity of the junction region, or a surface region of a semiconductor device, or a surface region of a semiconductor device and the vicinity of the surface region; The semiconductor device has a step of heat-treating the semiconductor device at a high temperature, and is realized by adopting a structure of a method for improving the crystallinity of a semiconductor device characterized in that crystal defects or contamination can be recovered.

  Below, based on an accompanying drawing, the crystal quality improvement method of the semiconductor device which is this invention is demonstrated in detail.

  The crystal quality improving method 1 of the semiconductor device includes the junction region 7d of the semiconductor device 7 or the junction region 7d of the semiconductor device 7 and the vicinity of the junction region 7d, or the surface region 7c of the semiconductor device 7 or the semiconductor device 7 The process comprises a step of ion-implanting 4 with cyan ions 8c under vacuum and reduced pressure 3 in the surface region 7c and the vicinity of the surface region 7c, and a step of heat-treating the semiconductor device 7 implanted with ions 4 at a high temperature. It is characterized in that the defect 9c of the quality 9 or the contamination 9d can be recovered.

  FIG. 1 is a flowchart showing a flow of a semiconductor device crystal quality improving method according to the present invention. The semiconductor device crystallinity improvement method 1 includes the steps of semiconductor device manufacture 2, vacuum decompression 3, ion implantation 4, heat treatment 5, and crystallinity improvement 6.

  The semiconductor device manufacturing 2 is a process of manufacturing the semiconductor device 7 using a semiconductor such as silicon. The semiconductor device 7 includes a transistor, a diode, and the like, and joins a P-type semiconductor 7a and an N-type semiconductor 7b (hereinafter referred to as a PN junction).

  The P-type semiconductor 7a is obtained by adding a small amount of a Group 3 element such as boron (boron) to silicon so as to have a positive charge called a hole. The N-type semiconductor 7b is obtained by adding 5% such as phosphorus or arsenic to silicon. A small amount of a group element is added to generate free electrons that can freely move around in silicon.

  When the PN junction is used, it is possible to provide a rectifying action that allows current to flow only in one direction. In order to improve the accuracy of the semiconductor device 7, it is particularly required that the junction region 7d between the P-type semiconductor 7a and the N-type semiconductor 7b has no defect.

  Also, a portion where defects are likely to occur, such as a surface region 7c where electrodes of the P-type semiconductor 7a and the N-type semiconductor 7b are provided, and an interface region in the case of a heterojunction in which different semiconductors are joined by an interface exhibiting a steep composition change, Alternatively, a portion that is sensitive to the occurrence of a defect is a repair target.

  The vacuum depressurization 3 is a step of making a vacuum state in advance when accelerating charged particles such as ions and electrons in the ion implantation 4. Since there is no resistance in a vacuum state, it can be accelerated efficiently or guided in an arbitrary direction.

  The ion implantation 4 is a process of accelerating the cyan ions 8c with the ion implanter 8 and doping the semiconductor device 7 with the cyan ions 8c 8a and 8b. The ion implantation 4 will be described in detail with reference to FIGS.

  The heat treatment 5 is a step of applying thermal energy to the semiconductor device 7 by thermal annealing or light energy by laser annealing in an inert gas such as nitrogen or argon.

  Thermal annealing is a method of heating by an RTA (rapid thermal annealing) apparatus using an infrared lamp, and laser annealing is a method of heating by applying a laser, and heat treatment is performed in a shorter time than when a diffusion furnace is used. It can be performed.

  The crystal quality improvement 6 is a process in which a semiconductor device 7 having improved functions can be obtained by recovering from defects of silicon crystals or contamination by heavy metals or the like through the ion implantation 4 and the heat treatment 5.

  FIG. 2 is a diagram showing a state of ion implantation in the crystal quality improving method for a semiconductor device according to the present invention. In the ion implantation 4, the semiconductor device 7 is doped with ions 8 a and 8 b using an ion implanter 8.

  The semiconductor device 7 in FIG. 2 is a P-N junction of a P-type semiconductor 7a and an N-type semiconductor 7b, and the surface region 7c of the semiconductor device 7 is doped 8a or the junction region 7d is doped 8b. The same applies to the heterojunction.

  The P-type semiconductor 7a and the N-type semiconductor 7b are both crystalline 9 of silicon, but have different properties depending on the kind of impurities added in a trace amount, and the electronic states of the junction region 7d and the surface region 7c maintain performance. It is important to do.

  The doping 8a and the doping 8b are to accelerate ions by the ion implanter 8 and to inject them into the semiconductor device 7, and cyan in the vicinity of the surface region 7c and the surface region 7c, or in the vicinity of the junction region 7d and the junction region 7d. Ions 8c are implanted.

  The ion implanter 8 is a device that accelerates charged particles such as ions and irradiates an ion beam. In the ion implantation 4, ions are accelerated by applying energy of several tens of KeV (kiloelectron volts) with an electric field.

  In the ion implantation 4, the depth at which ions reach the inside of the semiconductor device 7 is determined by the magnitude of energy applied to the ions. The depth at which the impurities reach when the ion implantation 4 is performed is shown in detail in FIG.

  FIG. 3 is an enlarged view showing a crystalline state at the time of ion implantation in the semiconductor device crystalline improvement method according to the present invention. The crystalline 9 of the P-type semiconductor 7a or the N-type semiconductor 7b is recovered by the ion implantation 4.

  In the crystalline material 9, each silicon 9b atom forms a covalent bond with four bonds to form a tetrahedral three-dimensional crystal lattice. In FIG. 3, the crystal lattice of the silicon 9b is square. It is shown by the planar expression.

  The crystalline 9 of the silicon (silicon) 9b is required to have an ultra-high purity of 99.99%, but is replaced by a defect 9c in which the silicon 9b atom is missing, a heavy metal such as iron instead of the silicon 9b atom, and the like. Contamination 9d may occur.

  In the ion implantation 4, the cyan ion 8 c is doped 8 a to the portion having the defect 9 c or the contamination 9 d of the crystalline material 9, and the cyan ion 8 c is used by ionizing hydrogen cyanide (HCN).

  Crystalline 9a is in a state recovered by ion implantation 4. The cyan ion 8c enters the portion having the defect 9c, thereby reducing the adverse electrical effect. Specifically, the leakage current value generated due to the defect 9c can be reduced.

  Further, in a place where the contamination 9d is present, cyan ions 8c and heavy metals such as iron are chemically bonded to form a more stable inactive body. Since cyan ions 8c are easily bonded to heavy metals and the like, adverse electrical effects due to contamination 9d can be reduced.

  As an example to support this, when heavy metal or the like is present in the surface region 7c of the semiconductor device 7, when the cyan ion 8c in the liquid is touched, the cyan ion 8c and heavy metal are combined and released into the liquid. The

  FIG. 4 is a graph comparing the depth of impurities after ion implantation when the crystal quality improving method for a semiconductor device according to the present invention is used in a CMOS image sensor, and FIG. 5 is a graph of the semiconductor device according to the present invention. It is the table | surface which compared the value of the dark current at the time of using a crystal quality improvement method for a CMOS image sensor.

  The CMOS image sensor is one of the semiconductor devices 7 for photographing an image having 3.75 μm × 3.75 μm pixels for 1/6 inch VGA used in a digital camera or the like, and is a light receiving portion by one photodiode. And a signal amplifying unit comprising four transistors as one component.

  Note that VGA is one of the standards relating to the resolution and the number of display colors of a display device of a computer, and the resolution of VGA is 640 (horizontal) × 480 (vertical) dots. A pixel is a minimum unit element that constitutes an image.

  The power supply voltage is 2.5 V (volt) for the light receiving portion and 1.5 V (volt) for the signal amplifying portion, and the light receiving portion serving as the sensor is 0.2 μm (micrometers) below the surface layer of the silicon wafer as the substrate. This is a buried PN junction photodiode.

  In the ion implantation 4, cyan ions 8 c which are impurities are doped 8 a and 8 b at the position of the surface region 7 c or the junction region 7 d where the defect 9 c or the contamination 9 d is expected in the crystalline 9 of the light receiving portion.

  Depending on how deep the surface region 7 c or the junction region 7 d is formed in the semiconductor device 7, it is necessary to adjust the magnitude of the energy of the acceleration voltage applied to the cyan ions 8 c by the ion implanter 8.

  As shown in the graph 10 of FIG. 4, when the acceleration voltage is 40 KeV (kiloelectron volts), the impurity concentration is a peak value in each of the comparative example 11, the comparative example 11a, and the comparative example 11b at a depth of about 200 nm (nanometer). It becomes.

In Comparative Examples 11, 11a, and 11b, the dose (ion implantation amount) was measured for displacement. In Comparative Example 11, ion implantation 4 was performed at 1.0 × 10 ¹¹ atoms / cm ² for comparison. In Example 11a, ion implantation 4 was performed at 1.0 × 10 ¹² atoms / cm ² , and in Comparative Example 11b, ion implantation 4 was performed at 1.0 × 10 ¹³ atoms / cm ² .

Impurity concentration in the case of Comparative Example 11 is ^{1.0 × 10 15 ~1.0 × 10 16} atoms per 1 cm ^3, the impurity concentration in the case of Comparative Example 11a is 1 cm ³ per 1.0 × ^{10 16} ~ a 1.0 × ¹⁰ 17 atoms, the impurity concentration in Comparative example 11b is ^{1.0 × 10 17 ~1.0 × 10 18} atoms per 1 cm ^3.

  Further, as shown in Table 10a of FIG. 5, Comparative Example 11, Comparative Example 11a, and Comparative Example 11b, which are ion-implanted 4 at an acceleration voltage of 40 KeV (kiloelectron volts), have dark current values and dark currents higher than those of the conventional method 11c. The electronic value decreases.

  The CMOS image sensor is obtained by performing heat treatment 5 by thermal annealing at a temperature of about 875 ° C. for about 40 seconds using an RTA (rapid thermal annealing) apparatus after ion implantation 4.

  The dark current that is the source of noise in the CMOS image sensor is caused by the disturbance of the crystalline material 9 such as the defect 9c or contamination 9d of the silicon crystal generated when the PN junction is formed in the photodiode main body and the peripheral part as the light receiving part. Occur.

The conventional method 11c that does not perform the ion implantation 4 has a dark current of 0.45 nA (nanoampere) per 1 cm ^{2 at} 25 ° C. and a dark current electron number of 304 per second. The current is 0.20 nA (nanoampere) per cm ^{2 and the} number of dark current electrons is 133 per second, which can be reduced by about 56%.

In addition, the comparative example 11a can reduce the dark current by 0.12 nA (nanoampere) per 1 cm ^{2 and the} number of dark current electrons by 80 per second, about 73%, and the comparative example 11b can reduce the dark current by about 73%. It is possible to reduce about 60% by 0.18 nA (nanoampere) per cm ² and 120 dark current electrons per second.
Although the embodiment has been described by taking a CMOS image sensor as an example, it can be easily applied to a CCD image sensor.

  FIG. 6 is a graph comparing the performance improvement effect when the crystal quality improvement method for a semiconductor device according to the present invention is used for a MIS type solar cell. The solar cell is a device that converts light energy into electrical energy, and utilizes the fact that an electromotive force is generated when light is applied to the PN junction region of the semiconductor device 7.

The MIS type is a semiconductor device 7 in which a metal, an insulator, and a semiconductor are joined, and MIS type solar cells to be used are ITO (oxide of indium and tin), SiO ₂ (silicon dioxide), and polycrystalline poly- Si (polysilicon) is joined.

  The photocurrent density value and the photovoltaic power value of the MIS solar cell may become insufficient due to the disorder of the crystalline material 9 such as the defect 9c or the contamination 9d caused by the polycrystalline polysilicon polycrystal. is there.

  The ion implantation 4 for the MIS type solar cell is performed in a state before the protective film and the light collecting function are added after the MIS type solar cell is manufactured. The graph 10b is obtained by measuring the acceleration voltage at 30 KeV (kiloelectron volts) and displacing the dose (ion implantation amount).

In Comparative Example 12, when ion implantation 4 is performed at 2.0 × 10 ¹¹ atoms / cm ² , Comparative Example 12a is performed when ion implantation 4 is performed at 2.0 × 10 ¹² atoms / cm ² , and Comparative Example 12b is 2 The ion implantation 4 is performed at 0.0 × 10 ¹³ atoms / cm ² , and the conventional method 12 c is a case where the ion implantation 4 is not performed.

  In Comparative Examples 12, 12a, and 12b, after ion implantation 4, heat treatment 5 is performed by thermal annealing at a temperature of about 700 ° C. for about 40 seconds using an RTA (rapid thermal annealing) apparatus.

Comparing the photocurrent density with the photovoltaic cell photovoltaic power fixed at 300 mV (millivolt), the conventional method 12c is approximately 23 mA (milliampere) per cm ² , and the comparative example 12 is approximately 30 mA (milliampere) per cm ^2. example 12a, is approximately per 1 cm ² 36 mA (milliamps), in Comparative example 12b, approximately per 1 cm ² 34 mA (milliamps).

Moreover, when the photoelectric current density is fixed at 20 mA (milliampere) per cm ^{2 and the} photovoltaic cell photovoltaic power is compared, the conventional method 12c is about 350 mV (millivolt), the comparative example 12 is about 440 mV (millivolt), and the comparative example In 12a, it is about 530 mV (millivolt), and in Comparative Example 12b, it is about 500 mV (millivolt).

  As shown in the graph 10b, the solar cell photovoltaic power value and the photocurrent density value of the MIS solar cell are significantly increased by recovering the crystalline material 9 by ion implantation 4 into the MIS solar cell. Can do.

  As described above, the crystal quality improvement method 1 of the semiconductor device according to the present invention includes the defect 9c of the silicon crystal 9 generated in the junction region 7d or the surface region 7c during the semiconductor device manufacturing 2 or the contamination 9d due to heavy metal or the like. Crystal disorder can be recovered.

  For example, by recovering crystal disturbances such as defects 9c and contamination 9d of the silicon crystalline material 9 generated in the semiconductor device 7 of the CMOS image sensor, the dark current value and the dark current electron value are greatly reduced as compared with the conventional method. be able to.

  Further, by recovering the crystal disorder such as defects 9c and contamination 9d of the silicon crystalline 9 generated in the semiconductor device 7 of the MIS type solar cell, the photovoltaic power value and the photocurrent density value of the solar cell are compared with the conventional method. It can be greatly improved.

It is a flowchart which shows the flow of the crystalline improvement method of the semiconductor device which is this invention. It is a figure which shows the condition of the ion implantation of the crystal quality improvement method of the semiconductor device which is this invention. It is an enlarged view which shows the crystalline state at the time of ion implantation of the crystalline improvement method of the semiconductor device which is this invention. It is the graph which compared the depth of the impurity after ion implantation at the time of using the crystal quality improvement method of the semiconductor device which is this invention for a CMOS image sensor. It is the table | surface which compared the value of the dark current at the time of using the crystal quality improvement method of the semiconductor device which is this invention for a CMOS image sensor. It is the graph which compared the performance improvement effect at the time of using the crystalline improvement method of the semiconductor device which is this invention for a MIS type solar cell.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor device crystalline improvement method 2 Semiconductor device manufacture 3 Vacuum decompression 4 Ion implantation 5 Heat treatment 6 Crystal quality improvement 7 Semiconductor device 7a P-type semiconductor 7b N-type semiconductor 7c Surface region 7d Junction region 8 Ion implanter 8a Doping 8b Doping 8c Cyan ion 9 crystalline 9a crystalline 9b silicon 9c defect 9d contamination 10 graph 10a table 10b graph 11 comparative example 11a comparative example 11b comparative example 11c conventional method 12 comparative example 12a comparative example 12b comparative example 12c conventional method

Claims (5)

  The semiconductor device bonding region, or the semiconductor device bonding region and the vicinity of the bonding region, include a step of ion-implanting cyan ions under a vacuum and a step of heat-treating the ion-implanted semiconductor device at a high temperature. A method for improving the crystallinity of a semiconductor device.   A step of ion-implanting cyan ions into a surface region of a semiconductor device, or a surface region of a semiconductor device and the vicinity of the surface region, under a vacuum and a step of heat-treating the ion-implanted semiconductor device at a high temperature; A method for improving the crystallinity of a semiconductor device, wherein crystal defects or contamination can be recovered.   3. The method for improving crystallinity of a semiconductor device according to claim 1, wherein the heat treatment is thermal annealing or laser annealing.   4. The method for improving the crystal quality of a semiconductor device according to claim 1, wherein the semiconductor device is a CMOS or CCD image sensor, and the dark current value and the dark current electron value can be reduced. . 4. The crystalline semiconductor device according to claim 1, wherein the semiconductor device is a MIS type solar cell, and the photovoltaic power value and the photocurrent density value of the solar cell can be increased. How to improve.

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