JP2007059734A - Semiconductor device and method for manufacturing same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the reliability of wiring by generating a conductive surface with the metal oxide layer which generates an oxide by diffusion from a seed layer to the conductive surface, and to solve the problem of RC delay due to miniaturization. <P>SOLUTION: A method of manufacturing semiconductor device includes: a step for forming the seed layer 26 through a barrier layer 25 on the inner surface of a recess 22 formed in an insulating layer (an inter-layer insulating film 21) on a substrate 11; a step for filling the recess 22 with a conductive part (copper) 27 through the seed layer 26; and a step for removing the copper and the seed layer 26 formed on the inter-layer insulating film 21, so as to form the conductive part 27 with the copper as a main material in the recess 22. The seed layer 26 is formed with the copper material containing the metal which generates the oxide by diffusion on the surface of the conductive part 27. After the conductive part 27 with the copper as the main material is formed in the recess 22, thermal processing is performed so as to form the oxide layer 31 containing the metal which generates the oxide on the surface of the conductive part 27. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor device manufacturing method and a semiconductor device in which a barrier layer on a copper wiring used in a semiconductor device can be easily formed.

  As semiconductor devices are miniaturized and highly integrated, the problem of reduced reliability due to copper migration in copper (Cu) wiring becomes serious. Stress migration or SiV (Stress Induced Voiding) in which the metal atoms forming the copper wiring move when excited by the flow of electrons when current is applied, and the copper wiring is disconnected due to electromigration or the movement of metal atoms due to thermal stress. ) Is the main reliability problem.

  One of the main causes is weak adhesion between copper and the adjacent barrier insulating film. Therefore, improving the adhesion improves the resistance to these reliability and is a very important factor.

  When current is applied or when heat stress is applied, copper atoms and vacancies move as a pair with the flow of electrons, but the interface with weak adhesion serves as a movement path for vacancies, resulting in the creation of voids. The wiring is disconnected.

  Several means have already been reported as methods for improving the adhesion between the copper wiring and the barrier insulating film. For example, a technique for selectively forming a metal compound having a barrier property such as cobalt tungsten phosphorus (CoWP) or cobalt tungsten boron (CoWB) on a copper wiring is disclosed (for example, refer to Patent Document 1). However, in the technique of selectively forming a metal film having a barrier property on a copper wiring, establishment of a technique for forming the metal film only on the copper wiring or uniformly on the copper wiring has not been achieved. As a result, there remains a challenge to improve reliability.

  There is also a method of forming a copper alloy having impurities other than copper on the surface of the copper wiring. Copper alloys have the property of suppressing the movement of copper atoms, in other words, the movement of vacancies, when impurities other than copper are dissolved or deposited in the crystal grain boundaries or grains of copper. For example, a technique for forming a copper aluminum (Cu—Al) alloy on a copper surface (for example, see Patent Document 2) and a technique for forming a copper silicon (Cu—Si) alloy (for example, see Patent Document 3). It has been reported. However, these techniques are not a complete solution from the viewpoint of the weakness of the interface between the metal and the insulating film.

  To date, we have shown examples of copper alloy formation on copper wiring to improve the adhesion between the copper wiring and the barrier insulation film between the copper wirings as a measure to improve reliability. There is also a method of forming a film having a barrier property instead of forming an insulating film. Conventional barrier insulating films use silicon nitride (SiN) or silicon nitride carbide (SiCN) containing carbon atoms to lower the dielectric constant. These films have poor adhesion to copper.

  Therefore, a technique for forming an interlayer insulating film of the upper copper wiring directly without forming a barrier insulating film by selectively forming a substance having a barrier property on the surface of the copper wiring is also conceivable. If this technology is used, the capacity reduction of the barrier insulating film can be realized. However, no technology that satisfies this property has been devised.

JP 2002-118111 A JP 2005-50859 A JP 9-321045 A

  A problem to be solved is that a barrier film having a low dielectric constant cannot be formed because adhesion to copper, which is the main material of the electrode, is ensured.

  In the present invention, a seed layer is formed of a copper material containing a metal that diffuses on the surface of a conductive portion to form an oxide, and a heat treatment is performed after forming a conductive portion containing copper as a main material in the recess. An object is to form an oxide layer containing a metal that forms an oxide on the surface, and to form a barrier film having a low dielectric constant while ensuring adhesion with copper, which is the main material of the electrode And

  The present invention proposes a process sequence for forming a Cu wiring which does not necessarily require the formation of a barrier insulating film by selectively forming an insulating film only on the Cu wiring using a Cu alloy. Another object of the present invention is to provide a method of manufacturing a semiconductor device having highly reliable wiring having high Cu migration resistance over the entire wiring.

  The method for manufacturing a semiconductor device of the present invention includes a step of forming a seed layer on the inner surface of a recess formed in an insulating film on a substrate through a barrier layer, and a step of filling the recess with copper through the seed layer. And a step of removing the copper and seed layer formed on the insulating film to form a conductive portion mainly composed of copper in the recess, the method for manufacturing a semiconductor device comprising: The layer is formed of a copper material containing a metal that diffuses to the surface of the conductive part to form an oxide, and after forming a conductive part mainly composed of copper in the recess, heat treatment is performed on the surface of the conductive part. An oxide layer including a metal that forms an oxide is formed.

  In the semiconductor device manufacturing method, a seed layer is formed of a copper material containing a metal that diffuses to the surface of the conductive portion to form an oxide, and a heat treatment is performed after forming a conductive portion mainly composed of copper in the recess. Since an oxide layer containing a metal that forms an oxide is formed on the surface of the conductive part, this oxide layer functions as an adhesion layer and has an oxidation property having a barrier property to prevent diffusion of copper formed on the surface. Adhesion when the film is formed is improved. In addition, an oxide layer containing a metal that forms the oxide can be used as a barrier film, and formation of the barrier film can be omitted.

  The semiconductor device of the present invention includes a seed layer formed on the inner surface of a recess provided in an insulating film on a substrate through a barrier layer, and copper formed in the recess through the seed layer as a main material. The conductive part surface is made of a metal oxide layer that diffuses from the seed layer to the conductive part surface to form an oxide.

  In the semiconductor device described above, the surface of the conductive portion is formed of a metal oxide layer that diffuses from the seed layer to the surface of the conductive portion to form an oxide. Therefore, the oxide layer functions as an adhesion layer and is formed on the surface. The adhesion of the oxide film having the barrier property of preventing the diffusion of copper and preventing the invasion of oxygen is enhanced. In addition, an oxide layer containing a metal that forms the oxide can function as a barrier film, and a normally formed barrier film can be omitted.

  In the method for manufacturing a semiconductor device of the present invention, the adhesion of an oxide film having a barrier property formed, for example, on the surface of the oxide layer containing a metal that forms an oxide formed on the surface of the conductive portion can be improved. it can. This can contribute to the improvement of wiring reliability. In addition, since an oxide layer containing a metal that forms the oxide can be used as a barrier film, formation of the barrier film can be omitted, and an effect of reducing the number of steps can be obtained. At the same time, since the capacitance of the wiring can be reduced by not forming the barrier film, there is an advantage that the problem of RC delay which becomes serious due to miniaturization can be solved.

  In the semiconductor device of the present invention, the surface of the conductive portion is made of a metal oxide layer that diffuses from the seed layer to the surface of the conductive portion to form an oxide. In addition, the adhesion of the oxide film having a barrier property of preventing oxygen intrusion can be improved. This can contribute to the improvement of wiring reliability. Further, since the oxide layer containing a metal that forms the oxide can be used as a barrier film, a normal barrier film can be omitted. At the same time, since the capacitance of the wiring can be reduced by not forming the barrier film, there is an advantage that the problem of RC delay which becomes serious due to miniaturization can be solved.

  The purpose of improving the reliability of wiring and solving the problem of RC delay due to miniaturization is to diffuse the surface of the conductive part embedded in the recess where the wiring and connection part are formed from the seed layer to the surface of the conductive part This is realized by forming a metal oxide layer that forms an oxide.

  A first example of an embodiment according to a method for manufacturing a semiconductor device of the present invention will be described with reference to a manufacturing process sectional view of FIG.

  As shown in FIG. 1A, a recess 22 is formed in an interlayer insulating film 21 formed on a substrate (for example, a semiconductor substrate) 11. The recess 22 includes, for example, a wiring groove 23 and a connection hole 24 formed at the bottom of the wiring groove 23. The wiring trench 23 is formed so that the minimum line width of the wiring formed therein is, for example, a width between 55 nm and 120 nm. Accordingly, the connection hole 24 is also formed to have a size that matches the wiring groove 23.

  Next, as shown in FIG. 1B, a barrier metal layer 25 is formed on each inner surface of the recess 22. The barrier metal layer 25 is, for example, a tantalum (Ta) single layer film, a laminated film of tantalum (Ta) and tantalum nitride (TaN), a titanium (Ti) single layer film, or titanium (Ti) and titanium nitride (TiN). ) And a laminated film. The barrier metal layer 25 is formed, for example, by sputtering or chemical vapor deposition (CVD), and has a thickness of, for example, 5 nm to 15 nm.

  Next, as shown in FIG. 1 (3), a seed layer 26 is formed on the surface of the barrier metal layer 25. The seed layer 26 is formed of, for example, a copper material containing a metal that diffuses into the surface of a conductive portion (not shown) formed by filling the concave portion 22 to form an oxide. For example, the metal forming the oxide is made of a metal having a diffusion coefficient larger than that of copper in copper (Cu) and having a characteristic of being more easily oxidized than copper. As an example of such a metal, aluminum (Al ), Chromium (Cr), indium (In), tin (Sn), titanium (Ti), manganese (Mn), and vanadium (V). The seed layer 26 is formed of a copper (Cu) alloy having at least one or more of these metals as impurity elements, and the formation method is, for example, a sputtering method, for example, having a thickness of 45 nm to 60 nm. A film is formed.

  It has been found that the metal forming each of the oxides has a lower free energy of formation of an oxide film than copper (Cu) and a higher diffusion rate in Cu than Cu. Therefore, diffusion and oxidation can be efficiently performed by heat treatment (D. B. Butrymowicz: Diffusion Rate Data and Mass Transport Phenomena for Copper, J. F. Elliott, M. Gleiser V. Thermotherm. : 1960).

  An example of the content of the metal forming the oxide will be described below. In order to make the oxide on the copper surface have a thickness of, for example, about 5 nm, the metal forming the oxide needs about half the number of atoms in view of the amount of oxygen atoms. In order to supply the number of atoms by the Cu alloy formed as the seed layer 26, it must contain the same amount. For example, when the seed layer 26 is formed to a thickness of 50 nm, it is estimated that the metal forming the oxide needs to contain at least 0.05 atm%.

  However, as the widths and aspect ratios of the wiring trenches 23 and the connection holes 24 are reduced, it is inevitable that the expected thickness of the seed layer 26 is further reduced from 50 nm. For this reason, it is expected that the content of the metal forming the oxide in the Cu alloy needs to be greater than the above-described 0.05 atm%. On the other hand, if the content of the metal forming the oxide is too large, an oxide film layer with a large thickness is unnecessarily formed on the conductive portion, which may affect the conductivity. Therefore, assuming that an oxide film of about 5 nm is formed, the upper limit is defined as 5.0 atm%, for example.

  Next, as shown in FIG. 1 (4), the concave portion 22 is embedded and, for example, a conductive portion 27 is formed on the interlayer insulating film 21 by plating. The conductive portion 27 is made of, for example, copper (Cu) or a metal mainly composed of copper (Cu), and has a thickness of, for example, 600 nm to 1.20 μm.

  Thereafter, the excessive conductive portion 27, the seed layer 26, and the barrier metal layer 25 on the interlayer insulating film 21 are removed by, for example, a chemical mechanical polishing (CMP) method, and as shown in FIG. 22, a connection plug 28 including a conductive portion 27 and a wiring 29 are formed via a barrier metal layer 25 and a seed layer 26.

  Next, as shown in FIG. 1 (6), the substrate 11 is heat-treated, and the metal that diffuses to the surface of the conductive portion included in the seed layer 26 to form an oxide is formed in the recess 22. The oxide layer 31 is formed by diffusing to the surface of the embedded conductive portion 27. The heat treatment is preferably performed at 250 ° C. to 400 ° C., for example, for 30 minutes to 180 minutes. Further, since the barrier layer 25 is formed on the inner surface of the recess 22, the metal forming the oxide diffusing from the seed layer 26 in the conductive portion 27 does not diffuse in the side wall direction of the recess 22, It is easy to diffuse.

  The heat treatment necessary for forming an oxide film on the surface of the Cu wiring by diffusing the impurity element contained in the Cu alloy by the chemical mechanical polishing method followed by the heat treatment is 250 ° C. to 400 ° C. It is preferable that the temperature range is within the range of 30 minutes to 180 minutes.

  Next, as shown in FIG. 1 (7), a barrier insulating film 32 is formed on the oxide layer 31 and the interlayer insulating film 21. The barrier insulating film 32 can be formed of, for example, a silicon carbide insulating film or a silicon nitride insulating film, and is formed to a thickness of, for example, 30 nm to 50 nm by, for example, a CVD method.

  Next, as shown in FIG. 1 (8), an interlayer insulating film 41 on which an upper wiring layer is formed is formed to a thickness of, for example, 75 nm to 500 nm. Hereinafter, a multilayer wiring structure can be formed by repeatedly performing the wiring forming process described with reference to FIG. 1 or the wiring forming process of the second example described next.

  In the semiconductor device manufacturing method, the seed layer 26 is formed of a copper material containing a metal that diffuses to the surface of the conductive portion 27 to form an oxide, and the conductive portion 27 mainly made of copper is formed in the recess 22. Since heat treatment is performed later to form an oxide layer 31 containing a metal that forms an oxide on the surface of the conductive portion 27, the oxide layer 31 functions as an adhesion layer, and the diffusion of copper formed on the surface is suppressed. Adhesion when the barrier insulating film 32 having the barrier property to be prevented is formed is improved. This can contribute to the improvement of wiring reliability. In addition, since the oxide layer 31 containing a metal that forms the oxide can be used as a barrier film, the formation of the barrier insulating film 32 can be omitted, and the effect of reducing the number of steps can be obtained. At the same time, by not forming the barrier insulating film 32, the capacitance of the wiring can be reduced, so that there is an advantage that the problem of RC delay which becomes serious due to miniaturization can be solved.

  Next, a second example of one embodiment of the method for manufacturing a semiconductor device according to the present invention will be described with reference to the manufacturing process sectional view of FIG.

  As shown in FIG. 2A, a recess 22 is formed in an interlayer insulating film 21 formed on a substrate (for example, a semiconductor substrate) 11. The recess 22 includes, for example, a wiring groove 23 and a connection hole 24 formed at the bottom of the wiring groove 23. The wiring trench 23 is formed so that the minimum line width of the wiring formed therein becomes, for example, a width between 55 nm and 120 nm. Accordingly, the connection hole 24 is also formed to have a size that matches the wiring groove 23.

  Next, as shown in FIG. 2B, a barrier metal layer 25 is formed on each inner surface of the recess 22. This barrier metal layer 25 is, for example, a tantalum (Ta) single layer film, a laminated film of tantalum (Ta) and tantalum nitride (TaN), a titanium (Ti) single layer film, or titanium (Ti) and titanium nitride (TiN). ) And a laminated film. The barrier metal layer 25 is formed, for example, by sputtering or chemical vapor deposition (CVD), and has a thickness of, for example, 5 nm to 15 nm.

  Next, as shown in FIG. 2 (3), a seed layer 26 is formed on the surface of the barrier metal layer 25. The seed layer 26 is formed of, for example, a copper material containing a metal that diffuses into the surface of a conductive portion (not shown) formed by filling the concave portion 22 to form an oxide. For example, the metal forming the oxide is made of a metal having a diffusion coefficient larger than that of copper in copper (Cu) and having a characteristic of being more easily oxidized than copper. As an example of such a metal, aluminum (Al ), Chromium (Cr), indium (In), tin (Sn), titanium (Ti), manganese (Mn), and vanadium (V). The seed layer 26 is formed of a copper (Cu) alloy having at least one or more of these metals as impurity elements, and the formation method is, for example, a sputtering method, for example, having a thickness of 45 nm to 60 nm. A film is formed.

  As described above, it is known that the metal forming each of the oxides has a lower free energy of formation of an oxide film than copper (Cu) and a higher diffusion rate in Cu than Cu. Therefore, diffusion and oxidation can be performed efficiently by heat treatment.

  Next, as shown in FIG. 2 (4), the recess 22 is embedded and, for example, a conductive portion 27 is formed on the interlayer insulating film 21 by plating. The conductive portion 27 is made of, for example, copper (Cu) or a metal mainly composed of copper (Cu), and has a thickness of, for example, 600 nm to 1.20 μm.

  Thereafter, the excessive conductive portion 27, the seed layer 26, and the barrier metal layer 25 on the interlayer insulating film 21 are removed by, for example, a chemical mechanical polishing (CMP) method, and as shown in FIG. 22, a connection plug 28 including a conductive portion 27 and a wiring 29 are formed via a barrier metal layer 25 and a seed layer 26.

Next, as shown in FIG. 2 (6), the substrate 11 is heat-treated, and the metal that diffuses to the surface of the conductive portion included in the seed layer 26 to form an oxide is formed in the recess 22. The oxide layer 31 is formed by diffusing to the surface of the embedded conductive portion 27. The heat treatment is performed, for example, at 300 ° C. to 400 ° C., for example, for 30 minutes to 180 minutes. Further, since the barrier layer 25 is formed on the inner surface of the recess 22, the metal forming the oxide diffusing from the seed layer 26 in the conductive portion 27 does not diffuse in the side wall direction of the recess 22, It is easy to diffuse.

  Next, as shown in FIG. 2 (7), an interlayer insulating film 41 on which an upper wiring layer is formed is formed on the oxide layer 31 and the interlayer insulating film 21. Hereinafter, a multilayer wiring structure can be formed by repeatedly performing the wiring forming process described with reference to FIG. 1 or FIG.

  The second example is a manufacturing method in which the interlayer insulating film 41 is formed without forming the barrier insulating film 32 formed in the first example, and the number of processes can be reduced by the amount that the barrier insulating film 32 is not formed. In addition, the wiring capacity can be reduced. Other functions and effects are the same as those of the first example.

  Next, an embodiment according to the semiconductor device of the present invention will be described with reference to the schematic sectional view of FIG.

  As shown in FIG. 3, an interlayer insulating film 21 is formed on the semiconductor substrate 11, and a recess 22 is formed in the interlayer insulating film 21. The recess 22 includes, for example, a wiring groove 23 and a connection hole 24 formed at the bottom of the wiring groove 23. The wiring groove 23 is formed so that the minimum line width of the wiring formed therein is, for example, a width between 55 nm and 120 nm. Therefore, the connection hole 24 is also formed in a size that matches the wiring groove 23.

  A barrier metal layer 25 is formed on each inner surface of the recess 22. This barrier metal layer 25 is, for example, a tantalum (Ta) single layer film, a laminated film of tantalum (Ta) and tantalum nitride (TaN), a titanium (Ti) single layer film, or titanium (Ti) and titanium nitride (TiN). ), And the film thickness is, for example, 5 nm to 15 nm.

  A seed layer 26 is formed on the surface of the barrier metal layer 25. The seed layer 26 is made of, for example, a copper material containing a metal that diffuses into the surface of a conductive portion (not shown) formed by filling the concave portion 22 to form an oxide. For example, the metal forming the oxide is made of a metal having a diffusion coefficient larger than that of copper in copper (Cu) and having a characteristic of being more easily oxidized than copper. As an example of such a metal, aluminum (Al ), Chromium (Cr), indium (In), tin (Sn), titanium (Ti), manganese (Mn), and vanadium (V). The seed layer 26 is formed of a copper (Cu) alloy having at least one or more of these metals as impurity elements, and the formation method is, for example, a sputtering method, for example, having a thickness of 45 nm to 60 nm. A film is formed.

  As described above, it is known that the metal forming the oxide has a lower free energy of formation of an oxide film than copper (Cu) and a higher diffusion rate in Cu than Cu. Therefore, diffusion and oxidation are efficiently performed by heat treatment.

  An example of the content of the metal forming the oxide will be described below. In order to form an oxide of, for example, about 5 nm on the copper surface, the metal forming the oxide requires about half the number of atoms in view of the amount of oxygen atoms. In order to supply the number of atoms by the Cu alloy formed as the seed layer 26, it must contain the same amount. For example, when the seed layer 26 is formed to a thickness of 50 nm, it is estimated that the metal forming the oxide needs to contain at least 0.05 atm%.

  However, as the widths and aspect ratios of the wiring trenches 23 and the connection holes 24 are reduced, it is inevitable that the expected thickness of the seed layer 26 is further reduced from 50 nm. For this reason, it is necessary for the content rate of the metal which forms the oxide in Cu alloy to contain more than the above-mentioned 0.05 atm%. Conversely, if the content of the metal forming the oxide is too large, an oxide film layer having a large thickness is unnecessarily formed on the conductive portion, and there is a concern that the conductivity may be affected. Therefore, assuming that an oxide film of about 5 nm is formed, the upper limit is defined as 5.0 atm%, for example.

  Inside the recess 22, a connection plug 28 made of a conductive portion and a wiring 29 are formed via the barrier metal layer 25 and the seed layer 26. The surface of the wiring 29 is formed with an oxide layer 31 formed by diffusing the metal forming the oxide in the seed layer 26 to the surface of the conductive portion.

  A barrier insulating film 32 is formed on the oxide layer 31 and the interlayer insulating film 21. The barrier insulating film 32 can be formed of, for example, a silicon carbide insulating film or a silicon nitride insulating film, and has a thickness of, for example, 30 nm to 50 nm.

  Further, an interlayer insulating film 41 on which an upper wiring layer is formed is formed on the barrier insulating film 32 to a thickness of, for example, 75 nm to 500 nm. Hereinafter, a multilayer wiring structure can be formed by stacking and forming the wiring structure having the above configuration.

  In the above configuration, the barrier insulating film 32 is formed, but the barrier insulating film 32 may be omitted. In the configuration in which the barrier insulating film 32 is not formed, the number of processes can be reduced by the amount of the barrier insulating film 32, and the wiring capacity can be reduced.

It is manufacturing process sectional drawing which showed the 1st example of one Embodiment which concerns on the manufacturing method of the semiconductor device of this invention. It is manufacturing process sectional drawing which showed the 2nd example of one Embodiment which concerns on the manufacturing method of the semiconductor device of this invention. 1 is a schematic cross-sectional view showing an embodiment of a semiconductor device according to the present invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 11 ... Board | substrate, 21 ... Interlayer insulation film, 22 ... Recessed part, 25 ... Barrier layer, 26 ... Seed layer, 27 ... Conductive part, 31 ... Oxide layer

Claims (6)

Forming a seed layer on the inner surface of the recess formed in the insulating film on the substrate via a barrier layer;
Filling the recess with copper via the seed layer;
Removing the copper and seed layer formed on the insulating film, and forming a conductive portion mainly composed of copper in the recess, comprising:
The seed layer is formed of a copper material including a metal that diffuses to the surface of the conductive portion to form an oxide,
A method for manufacturing a semiconductor device, comprising: forming a conductive portion made of copper as a main material in the recess and then performing a heat treatment to form an oxide layer including a metal that forms the oxide on the surface of the conductive portion. . The method for manufacturing a semiconductor device according to claim 1, wherein the metal that diffuses on the surface of the conductive portion to form an oxide is made of a metal that has a diffusion rate faster than copper and is more easily oxidized than copper. The metal that forms an oxide by diffusing to the surface of the conductive portion is at least one or more of aluminum, chromium, indium, tin, titanium, manganese, and vanadium. A method for manufacturing a semiconductor device. A seed layer formed on the inner surface of the recess provided in the insulating film on the substrate via a barrier layer;
A semiconductor device comprising a conductive portion mainly made of copper formed in the recess through the seed layer,
The conductive device surface comprises a metal oxide layer that diffuses from the seed layer to the conductive portion surface to form an oxide. The metal oxide layer that diffuses on the surface of the conductive portion to form an oxide is formed of a metal oxide that has a higher diffusion rate than copper and is more easily oxidized than copper. 4. The semiconductor device according to 4. The metal oxide layer that diffuses on the surface of the conductive portion to form an oxide is an oxide composed of at least one of aluminum, chromium, indium, tin, titanium, manganese, and vanadium, or an oxide composed of a plurality of types. The semiconductor device according to claim 4, wherein the semiconductor device is formed of an object.

Images