JP2007049004A - Printed wiring board and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a printed wiring board having components integrated into it, and a manufacturing method of the board wherein no recess is generated on the surface of its outer layer and the generation of warp can be suppressed. <P>SOLUTION: The printed wiring board wherein chip components are integrated into its inner layers is the one wherein at least an insulating layer positioned in the upper portion of each chip component comprises a laminated rigid insulating substrate thereon made of a reinforcing base material and an insulating resin, or comprises a laminated low-flow prepreg thereon. The manufacturing method of the printed board wherein chip components are integrated into its inner layers is the one which includes at least a process for forming an inner-wiring pattern on the side of each inner layer of an insulating substrate, a process for mounting a chip component in the desired position present in the inner-layer wiring pattern, and a process for forming successively via an insulating bonding sheet having an opening formed correspondingly to the chip component, an insulating layer and metal foil on the surface of the inner-layer pattern being formed thereon. As the insulating layer, a rigid insulating substrate made of a reinforcing base material and an insulating resin, or a low-flow prepreg is used. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a component built-in printed wiring board that incorporates chip components, and more particularly to a thin component built-in printed wiring board that suppresses warping and dents in an outer layer.

  In recent years, in order to achieve both the increase in the number of components mounted on a printed wiring board due to higher functionality of the device and the reduction in size of the device, a so-called "component built-in board" that incorporates components in the inner layer of a multilayer printed wiring board The form is becoming mainstream.

  As an example of such a component-embedded substrate, a multilayer printed wiring board having a configuration as shown in FIG. 3 is already known (see Patent Document 1).

  FIG. 3 shows a manufacturing process of a four-layer printed wiring board Pa used as a core substrate of a build-up multilayer printed wiring board. First, as shown in FIG. The inner layer wiring pattern 4 is formed by a technique such as a subtractive method (for example, a method of forming a wiring pattern by etching a metal foil such as a copper foil) or an additive method (a method of forming a wiring pattern by deposition of plating). Thus, the double-sided core substrate 1a is obtained, and then the chip component 6 is mounted on the desired inner wiring pattern 4 by using the solder 7, and then the chemical resistant resin 12 is applied to the chip component 6 (see FIG. (See FIG. 3 (a)).

  Next, as shown in FIG. 3B, the prepreg 8 having the opening 8b corresponding to the chip component 6 and the metal foil 2 (for example, copper foil) on the chip component 6 mounting surface side of the double-sided core substrate 1a. And the prepreg 8 and the metal foil 2 are also arranged on the other surface side, and then laminated and pressed to obtain a four-layer plate in the state of FIG.

  Here, the “prepreg” is an insulating adhesive sheet in a semi-cured state (so-called B-stage state) in which a glass fiber base material generally used in a printed wiring board manufacturing process is impregnated with a resin.

  Next, the formation of the outer layer wiring pattern 9 and the formation of the through hole 11a for connecting the outer layer wiring patterns 9 on the front and back sides, thereby obtaining the four-layer printed wiring board Pa shown in FIG.

  Thus, since the opening 8b corresponding to the chip component 6 is provided in the prepreg 8 laminated on the mounting surface side of the chip component 6, the chip component 6 is damaged by the lamination pressure of the prepreg 8. It is possible to prevent the malfunction of the.

  By the way, the opening 8b formed in the prepreg 8 is formed at a height substantially the same as the height of the chip component 6, but in general, it is formed slightly higher than the chip component 6. It is customary.

  Therefore, when the prepreg 8 that is normally used and has high flexibility and resin flow property is used as the insulating layer 8a located above the chip component 6 as in the above prior art, the mounting density of the chip component 6 is high. There was a problem that a recess 13 (see FIG. 4) corresponding to the opening 8b was generated on the surface of the outer layer located in a high area (this is because the chip component 6 is in an area where the mounting density of the chip components 6 is high). 6 and the prepreg 8 (insulating layer 8a) located on the top of the chip component 6 also have a large gap area, and the insulating layer 8a laminated on the top of the chip component 6 has high flexibility and high resin flow. This is because when the normal prepreg 8 is used, the amount of bending with respect to the gap area increases.

Separately from this, as the wiring pattern forming layer, in reality, three layers are in time, as shown in FIG. 5, one side of the double-sided core substrate 1a on which the chip component 6 is mounted (that is, the chip component 6). When the metal foil 2 is laminated only on the mounting surface side) via a normal prepreg 8, warping occurs due to curing shrinkage of the prepreg 8, so that the front and back sides of the rigid double-sided core substrate 1a for the purpose of suppressing the warpage are generated. In some cases, the metal foil 2 is laminated via a prepreg 8 in a semi-cured state (B stage) to form a four-layer structure (for example, the structure shown in FIG. 3). The thickness increased, which was an undesirable measure for the recent miniaturization of equipment.
JP 2004-311736 A

  The present invention has been made to solve the above problems, and even when a chip component is built in the inner layer, a printed wiring board that does not generate a dent on the outer layer surface, particularly built only on one side of the double-sided core substrate. It is an object of the present invention to provide a component built-in printed wiring board that can suppress the occurrence of warping even in the case of a three-layer structure that increases, and a method for manufacturing the same.

  The present invention according to claim 1 is a printed wiring board in which a chip component is incorporated in an inner layer, and at least an insulating layer positioned above the chip component is a rigid insulating substrate made of a reinforcing base material and an insulating resin, Or the said subject is solved with the printed wiring board characterized by consisting of what laminated | stacked the low flow prepreg.

  That is, by adopting such a configuration, it is possible to eliminate or suppress the dent on the surface of the outer layer even in the case of a printed wiring board configuration in which chip components are incorporated in the inner layer.

  According to a second aspect of the present invention, in the first aspect of the present invention, the printed wiring board has a three-layer structure, and an insulating substrate on which the chip component is mounted and an upper portion of the chip component. The insulating layer is made of the same material and has the same thickness.

  That is, by adopting such a configuration, even when the printed wiring board has a three-layer structure, the insulating layers positioned above and below the wiring pattern forming layer on which the chip component is mounted have a symmetric structure, thereby suppressing warpage. be able to.

  According to a third aspect of the present invention, there is provided a printed wiring board manufacturing method in which chip components are embedded in an inner layer, and at least a step of forming an inner layer wiring pattern on an insulating substrate and a desired position of the inner layer wiring pattern. A step of mounting a chip component, and a step of sequentially laminating an insulating layer and a metal foil on an inner wiring pattern forming surface through an insulating adhesive sheet in which an opening corresponding to the chip component is formed, and the insulating layer As described above, the above-mentioned problems are solved by a method for manufacturing a printed wiring board characterized by using a rigid insulating substrate made of a reinforcing base material and an insulating resin, or a low-flow prepreg.

  That is, by adopting such a configuration, it is possible to easily obtain a chip component built-in printed wiring board having no or suppressed depression on the outer layer surface.

  According to a fourth aspect of the present invention, in the invention according to the third aspect, the printed wiring board has a three-layer structure, and an insulating substrate used in the step of forming an inner layer wiring pattern, and an insulating adhesive sheet The insulating layer used in the step of laminating is made of the same material and has the same thickness.

  That is, with such a configuration, since the insulating layers positioned above and below the wiring pattern forming layer on which the chip component is mounted have a symmetrical structure, a printed wiring board having a three-layer structure in which warpage is suppressed can be easily obtained. it can.

  By adopting the configuration of the printed wiring board according to the present invention, even when a chip component is incorporated in the inner layer, it is possible to obtain a printed wiring board in which there is no warpage or dent on the outer layer surface or is suppressed. According to the manufacturing method of the invention, a printed wiring board having no warpage or dent can be easily obtained.

  The embodiment of the present invention will be described with reference to the schematic cross-sectional manufacturing process diagram of the four-layer printed wiring board shown in FIG. In addition, the same code | symbol was attached | subjected to the site | part same as a prior art.

  First, a double-sided metal foil-clad laminate 3 in which a metal foil 2 such as a copper foil is laminated on the front and back of an insulating substrate 1 as shown in FIG.

  Here, as the insulating substrate 1, for example, a rigid insulating substrate obtained by curing a reinforcing base material such as a glass fiber base material impregnated with an insulating resin such as an epoxy resin is preferably used.

  Next, as shown in FIG. 1B, a desired inner layer wiring pattern 4 is formed on both sides by performing circuit formation (general subtractive method) on the double-sided metal foil-clad laminate 3. Then, a solder resist 5 is formed on the formation surface of the inner layer wiring pattern 4 except for a part of the inner layer wiring pattern 4 that becomes a mounting round of the chip component 6 to be mounted later, and the double-sided core substrate 1a is obtained.

  Next, as shown in FIG. 1C, after the chip component 6 is mounted via the solder 7, as shown in FIG. 1D, an opening 8b corresponding to the chip component 6 is provided. An insulating adhesive sheet (for example, prepreg 8) and a single-sided metal foil-clad laminate 3a in which the metal foil 2 is laminated on one side of the insulating substrate 1 are sequentially arranged, and then laminating press processing is performed, so that FIG. ) Are formed integrally as shown in FIG.

  Here, the chip component 6 can also be mounted using a conductive adhesive, an anisotropic conductive adhesive (ACA, ACF) or the like.

  Further, as the insulating substrate 1 of the single-sided metal foil-clad laminate 3a, the same material as the insulating substrate 1 used for the double-sided core substrate 1a on which the chip component 6 is mounted (for example, a reinforcing substrate such as a glass fiber substrate) The use of a rigid insulating substrate obtained by curing an impregnated insulating resin such as an epoxy resin is preferable in order to eliminate the occurrence of dents on the outer layer surface of the chip component 6 where the mounting density is high.

  Next, the outer layer wiring pattern 9 is formed by a well-known method, and the through hole 11 for connecting the wiring pattern forming layers is formed, whereby the chip component 6 is embedded in the inner layer 4 shown in FIG. A printed wiring board P having a layer structure is obtained.

  The most notable point in the present embodiment is that the insulating layer 8a (see FIG. 1D) laminated on the upper surface of the chip component 6 is made of the same material as the insulating substrate 1 used for the double-sided core substrate 1a. It is the point which laminated the rigid thing.

  Thereby, the dent which generate | occur | produces in the outer layer surface of an area with a high mounting density of the chip components 6 can be eliminated.

  Next, the case where the printed wiring board of the present invention has a three-layer structure will be described with reference to FIG. In addition, the same code | symbol was attached | subjected regarding the site | part similar to FIG.

  First, as shown in FIG. 2A, by forming a circuit (general subtractive method) on the same double-sided metal foil-clad laminate 3 as in FIG. The inner layer wiring pattern 4 is formed, and then a solder resist 5 is formed on the surface on which the inner layer wiring pattern 4 is formed, except for a part of the inner layer wiring pattern 4 that becomes a mounting round of chip components 6 to be mounted later. A double-sided core substrate 1a as shown in (b) is obtained.

  Next, as shown in FIG. 2 (c), after the chip component 6 is mounted via the solder 7, as shown in FIG. 2 (d), an opening 8b corresponding to the chip component 6 is provided. An insulating adhesive sheet (for example, prepreg 8) and a single-sided metal foil-clad laminate 3a in which the metal foil 2 is laminated on one side of the insulating substrate 1 are sequentially arranged, and then a laminated brace process is performed, so that FIG. ) Are formed integrally as shown in FIG.

  Here, as the insulating substrate 1 of the single-sided metal-clad laminate 3a, the same material as the insulating substrate 1 used for the double-sided core substrate 1a on which the chip component 6 is mounted (for example, a reinforcing substrate such as a glass fiber substrate). It is preferable to use a rigid insulating substrate obtained by curing a resin impregnated with an insulating resin such as an epoxy resin in order to eliminate the occurrence of dents on the outer layer surface of the area where the chip component 6 has a high mounting density. In addition, it is preferable to use a substrate having the same thickness as the insulating substrate 1 used for the double-sided core substrate 1a in order to suppress warpage (since the insulating layers stacked on the front and back of the inner wiring pattern 4 have a symmetrical structure). ).

  Further, the insulating substrate 1 used for the double-sided core substrate 1a and the insulating substrate 1 used for the single-sided metal foil-clad laminate 3a should be as thin as possible (for example, 0.1 mm or less) in a post-process ( For example, in the case of building up a three-layer printed wiring board obtained later as a core substrate, etc., it is preferable to make it less susceptible to warping.

  Next, the outer layer wiring pattern 9 is formed by a well-known method, and the blind via hole 10 and the through hole 11 that connect the wiring pattern forming layers are formed, whereby the chip component 6 is embedded in the inner layer as shown in FIG. A printed wiring board P having a three-layer structure shown in FIG.

  In the description of the present invention, the example in which the rigid insulating substrate 1 is stacked as the insulating layer stacked on the chip component 6 has been described. However, the flatness of the outer layer surface is required for the rigid insulating substrate 1. Low flow prepreg with less flexibility and resin flow than B-stage prepreg ("low flow prepreg" means 1% or less resin flow according to JIS standard C6521 test method. Resin flow of normal prepreg (corresponding to prepreg 8 in the prior art or the embodiment of the present invention) is about 20 to 40% in the same test, and suppresses dents and warping to some extent. It is also possible to use a printed wiring board.

  Also, the printed wiring board having a four-layer structure and a three-layer structure has been described as an example, but as described above, the configuration may be changed as necessary, such as a build-up board using the printed wiring board as a core board. Of course it is possible.

The schematic cross-section manufacturing process figure which shows the manufacturing method of the printed wiring board of the 4 layer structure which incorporated the chip component of this invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. The schematic cross-sectional process explanatory drawing which shows the manufacturing method of the printed wiring board of the 4 layer structure which incorporated the conventional chip component. The schematic cross-section explanatory drawing which shows the dent which arises in the printed wiring board which incorporated the conventional chip component. Schematic cross-sectional explanatory drawing which shows the curvature which arises in the printed wiring board of the 3 layer structure incorporating the conventional chip component.

Explanation of symbols

1: Insulating substrate 1a: Double-sided core substrate 2: Metal foil 3: Double-sided metal foil-clad laminate 3a: Single-sided metal foil-clad laminate 4: Inner layer wiring pattern 5: Solder resist 6: Chip component 7: Solder 8: Prepreg 8a: Insulating layer 8b: Opening 9: Outer layer wiring pattern 10: Blind via hole 11, 11a: Through hole 12: Chemical resistant resin 13: Recess P, Pa: Printed wiring board

Claims (4)

  It is a printed wiring board in which chip components are incorporated in the inner layer, and at least the insulating layer located above the chip components is a rigid insulating substrate made of a reinforcing base material and insulating resin, or a laminate of low flow prepregs A printed wiring board characterized by comprising:   The printed wiring board has a three-layer structure, and the insulating substrate on which the chip component is mounted and the insulating layer positioned on the chip component are made of the same material and have the same thickness. Item 4. A printed wiring board according to item 1.   In a method of manufacturing a printed wiring board in which a chip component is incorporated in an inner layer, at least a step of forming an inner layer wiring pattern on an insulating substrate, a step of mounting the chip component at a desired position of the inner layer wiring pattern, and the chip component A step of sequentially laminating an insulating layer and a metal foil on the inner-layer wiring pattern forming surface through an insulating adhesive sheet in which openings corresponding to the above are formed, and a rigid substrate made of a reinforcing base material and an insulating resin as the insulating layer. An insulating substrate or a low flow prepreg is used.   The printed wiring board has a three-layer structure, and the insulating substrate used in the process of forming the inner wiring pattern and the insulating layer used in the process of laminating on the insulating adhesive sheet are made of the same material and have the same thickness. The printed wiring board manufacturing method according to claim 3, wherein the printed wiring board is provided.