JP2007042829A - Module and substrate with built-in electronic parts, and manufacturing method thereof - Google Patents

Module and substrate with built-in electronic parts, and manufacturing method thereof Download PDF

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JP2007042829A
JP2007042829A JP2005224865A JP2005224865A JP2007042829A JP 2007042829 A JP2007042829 A JP 2007042829A JP 2005224865 A JP2005224865 A JP 2005224865A JP 2005224865 A JP2005224865 A JP 2005224865A JP 2007042829 A JP2007042829 A JP 2007042829A
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electronic component
electrode
insulating
adhesive layer
substrate
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JP4487883B2 (en
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Daisuke Sakurai
大輔 櫻井
Norito Tsukahara
法人 塚原
Shigeaki Sakatani
茂昭 酒谷
Kazuhiro Nishikawa
和宏 西川
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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    • H—ELECTRICITY
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
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    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
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    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241—Disposition
    • H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/24137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
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    • H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/24153—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
    • H01L2224/24195—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being a discrete passive component
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83874—Ultraviolet [UV] curing
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    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92244—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape
    • H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
    • H01L2924/18161—Exposing the passive side of the semiconductor or solid-state body of a flip chip
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    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Abstract

<P>PROBLEM TO BE SOLVED: To provide a module with built-in electronic parts which improves wetproof reliability or adhesive strength with an insulating base, by extending the selective range of the material of an insulating layer while raising the embedding accuracy of position of many electronic parts to be mounted. <P>SOLUTION: The module with built-in electronic parts comprises an insulating base 10 equipped with an adhesive layer 20 on at least one surface, two or more electronic parts which have an electrode at least in one surface, and an insulating layer 70 formed so as to cover electronic parts. The module with built-in electronic parts is constituted by exposing at least the surface of an electrode of electronic parts from the insulating layer 70 while another surface of electronic parts is being adhered to a predetermined position of the insulating base 10 via the adhesive layer 20. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、広範な電子機器に用いられ、特に、携帯電話、ＰＤＡなどのモバイル端末、デジタルカメラ、デジタルビデオカメラ、ウエアラブル機器などの小型・薄型が要求される電子機器や非接触ＩＣカード、ＳＤカードなどのメモリカードに用いられる電子部品内蔵モジュールと電子部品内蔵基板およびそれらの製造方法に関する。   INDUSTRIAL APPLICABILITY The present invention is used in a wide range of electronic devices, and in particular, mobile devices such as mobile phones and PDAs, digital cameras, digital video cameras, wearable devices, etc., which are required to be small and thin, non-contact IC cards, SD The present invention relates to an electronic component built-in module and an electronic component built-in substrate used in a memory card such as a card, and a method of manufacturing the same.

近年、携帯電話などの電子機器の小型化・薄型化・高機能化が急速に進んでおり、それにともなって、電子機器内で使用される、例えば半導体などの能動素子、チップコンデンサ、チップ抵抗などの受動素子などの電子部品の小型化も進んでいる。それにともなって、電子部品が搭載される実装基板モジュールには、さらなる高密度化、小型化、薄型化が要求されている。   In recent years, electronic devices such as mobile phones have been rapidly reduced in size, thickness, and functionality, and accordingly, active elements such as semiconductors, chip capacitors, chip resistors, etc. used in electronic devices. Miniaturization of electronic components such as passive elements is also progressing. Accordingly, mounting board modules on which electronic components are mounted are required to have higher density, size reduction, and thickness reduction.

しかし、電子部品を基板上に配置する、いわゆる従来の２次元的な実装方法では、高密度実装の限界に近づきつつある。さらに、２次元的に電子部品を実装した基板上で配線を引き回すには配線距離が長くなるため、電気信号の高速伝送、耐ノイズ性などの要求に応えられなくなってきている。そのような中、さらなる高密度化・小型化・薄型化・高速伝送・耐ノイズ性への要望に応えるため、例えば複数個の半導体素子やチップ部品などの電子部品を基板に埋め込み３次元的に最短距離で配線する電子部品内蔵モジュールが開発されている。そして、これらの電子部品内蔵モジュールに対しても、搭載する部品個数の増加や配線の狭ピッチ化への要望が強くなりつつある。   However, the so-called conventional two-dimensional mounting method in which electronic components are arranged on a substrate is approaching the limit of high-density mounting. Furthermore, since the wiring distance is long in order to route the wiring on a substrate on which electronic components are two-dimensionally mounted, it has become impossible to meet demands such as high-speed transmission of electric signals and noise resistance. Under such circumstances, in order to meet the demands for higher density, smaller size, thinner thickness, high speed transmission, and noise resistance, for example, a plurality of electronic components such as semiconductor elements and chip components are embedded in a substrate in a three-dimensional manner. Electronic component built-in modules that can be wired in the shortest distance have been developed. Further, for these electronic component built-in modules, there are increasing demands for increasing the number of components to be mounted and for reducing the wiring pitch.

図６は、従来の電子部品内蔵モジュールの製造方法を説明する工程図である。   FIG. 6 is a process diagram for explaining a conventional method of manufacturing an electronic component built-in module.

まず、図６（ａ）に示すように、例えばガラスエポキシ樹脂などからなる絶縁性基材２００の上に、形成された銅箔などをフォトリソグラフィー技術を用いて所定の配線層２１０を形成する。   First, as shown in FIG. 6A, a predetermined wiring layer 210 is formed on the insulating base material 200 made of, for example, a glass epoxy resin by using the formed copper foil or the like using a photolithography technique.

つぎに、図６（ｂ）に示すように、絶縁性基材２００の上に、電子部品の固定と耐湿信頼性を確保するために、封止樹脂層２２０を所定の膜厚でコーティングする。   Next, as shown in FIG. 6B, a sealing resin layer 220 is coated on the insulating substrate 200 with a predetermined film thickness in order to secure the electronic components and ensure moisture resistance reliability.

つぎに、図６（ｃ）に示すように、例えばＩＣチップ２３０や超小型の電子部品２４０などを封止樹脂層２２０上に配置し、その内部に押圧して埋設する。   Next, as shown in FIG. 6C, for example, an IC chip 230, an ultra-small electronic component 240, and the like are arranged on the sealing resin layer 220, and are pressed and embedded therein.

つぎに、図６（ｄ）に示すように、配線層２１０と、ＩＣチップ２３０の電極端子であるアルミニウム電極（図示せず）上に形成したバンプと呼ばれる電極２５０や電子部品２４０の電極端子２６０とを接続させる。そして、封止樹脂層２２０を熱硬化させ絶縁層２７０としていた。   Next, as shown in FIG. 6D, electrodes 250 called bumps formed on the wiring layer 210 and aluminum electrodes (not shown) that are electrode terminals of the IC chip 230, and electrode terminals 260 of the electronic component 240. And connect. Then, the sealing resin layer 220 was thermally cured to form the insulating layer 270.

しかし、上記電子部品を埋設する際に、封止樹脂層が流動し、図６（ｅ）に示すように、搭載した電子部品の配置位置がずれる。また、さらなる高密度実装・配線パターンの狭ピッチ化が進むにつれ、内蔵される電子部品の個数が増え、それらの隣接間距離が狭くなるため、電子部品の電極端子と配線パターンとの位置合わせが困難となり、特に量産において、大きな課題であった。   However, when embedding the electronic component, the sealing resin layer flows, and the arrangement position of the mounted electronic component is shifted as shown in FIG. In addition, as the number of built-in electronic parts increases and the distance between adjacent parts becomes narrower as the density of higher-density mounting and wiring patterns becomes narrower, the alignment between the electrode terminals of the electronic parts and the wiring pattern is reduced. It became difficult, especially in mass production.

そこで、上記課題を改善するために、電極を形成したＩＣチップを予め個別に絶縁性基材の所定の位置に接着剤を用いて接着したものを、封止樹脂層に埋設する方法が開示されている（例えば、特許文献１参照）。その方法により、封止樹脂層においてＩＣチップ間の位置精度を良好に保てることが示されている。
特開昭６２−２３００２７号公報 Therefore, in order to improve the above problem, a method is disclosed in which an IC chip on which an electrode is formed is previously individually bonded to a predetermined position of an insulating base material using an adhesive and embedded in a sealing resin layer. (For example, refer to Patent Document 1). It has been shown that the method can maintain good positional accuracy between IC chips in the sealing resin layer.
Japanese Patent Laid-Open No. 62-230027

しかしながら、特許文献１における電子部品内蔵モジュールでは、ＩＣチップを絶縁性基材の所定の位置に接着剤を用いて接着した後、封止樹脂層内に埋設している。この場合、接着剤はほぼＩＣチップと同等の面積でＩＣチップと絶縁性基材との間にのみ形成され、電子部品が搭載されていない場所では、封止樹脂層と絶縁性基材が直接接触する状態である。   However, in the electronic component built-in module in Patent Document 1, the IC chip is bonded to a predetermined position of the insulating base material using an adhesive and then embedded in the sealing resin layer. In this case, the adhesive is formed only between the IC chip and the insulating base material with an area substantially the same as that of the IC chip, and the sealing resin layer and the insulating base material are directly formed in a place where the electronic component is not mounted. It is in contact.

ここで、この封止樹脂層には、ＩＣチップを埋設する工程において、液体または粘性流体として挙動するためにＩＣチップを埋設するだけの流動性が必要である。また、硬化後は、後工程のリフロー工程や使用環境・信頼性（例えば、高温放置、熱衝撃、吸湿）評価などで、剥離・破裂（例えば、ポップコーン現象）を発生させないような封止樹脂層と絶縁性基材間およびＩＣチップと絶縁性基材間の高い接着強度が必要である。   Here, the sealing resin layer needs to be fluid enough to embed the IC chip in order to behave as a liquid or a viscous fluid in the process of burying the IC chip. In addition, after curing, a sealing resin layer that does not cause peeling or bursting (for example, popcorn phenomenon) due to evaluation of post-reflow process, usage environment / reliability (for example, high temperature storage, thermal shock, moisture absorption), etc. And high adhesive strength between the insulating substrate and between the IC chip and the insulating substrate are required.

その結果、例えば流動性やＩＣチップと封止樹脂層間の接着強度のみを重視して材料選択すると、封止樹脂層と絶縁性基材間の接着強度が確保できず、耐湿性などの信頼性が低下するという課題があった。そのため、このような要求性能を両立させる封止樹脂層の材料を設計または選定するには、多くの時間を要するとともに、安価な封止樹脂層材料の使用が制限されるという課題もあった。   As a result, for example, if the material is selected with emphasis on only the fluidity and the adhesive strength between the IC chip and the sealing resin layer, the adhesive strength between the sealing resin layer and the insulating base material cannot be secured, and reliability such as moisture resistance is ensured. There has been a problem of lowering. Therefore, it takes a lot of time to design or select a material for the sealing resin layer that satisfies both of the required performances, and there is a problem that the use of an inexpensive sealing resin layer material is restricted.

さらに、製造においては、接着剤を所定の位置にディスペンサーなどを用いて、電子部品毎、または電子部品の面積が大きい場合には電子部品当たり数点の塗布が必要となるため、生産性の向上に課題もあった。   In addition, in manufacturing, using a dispenser or the like at a predetermined position, it is necessary to apply several points for each electronic component or when the area of the electronic component is large, improving productivity. There was also a problem.

本発明は上記課題を解決するためになされたもので、搭載する多数の電子部品の埋め込み位置精度を向上させるとともに、絶縁層（従来例では封止樹脂層に相当）の材料の選択範囲を広げ、さらに耐湿信頼性や絶縁性基材との接着強度を向上させることを目的とする。   The present invention has been made to solve the above-described problems, and improves the accuracy of the embedded position of a large number of electronic components to be mounted, and expands the selection range of the material for the insulating layer (corresponding to a sealing resin layer in the conventional example). Furthermore, it aims at improving moisture resistance reliability and adhesive strength with an insulating base material.

上述したような課題を解決するために、本発明の電子部品内蔵モジュールは、少なくとも一方の面全面に接着層を備えた絶縁性基材と、一方の面に少なくとも電極を有する複数の電子部品と、電子部品を覆うように形成された絶縁層とを備え、電子部品の他方の面が接着層を介して絶縁性基材の所定の位置に固着されるとともに、少なくとも電子部品の電極の表面を絶縁層から露出させた構成を有する。   In order to solve the above-described problems, an electronic component built-in module according to the present invention includes an insulating substrate having an adhesive layer on at least one surface, and a plurality of electronic components having at least electrodes on one surface. An insulating layer formed to cover the electronic component, and the other surface of the electronic component is fixed to a predetermined position of the insulating substrate via the adhesive layer, and at least the surface of the electrode of the electronic component is The structure is exposed from the insulating layer.

さらに、接着層は、少なくとも紫外線硬化性樹脂、熱硬化性樹脂および熱可塑性樹脂の１種以上を含んでいてもよい。   Further, the adhesive layer may contain at least one of an ultraviolet curable resin, a thermosetting resin, and a thermoplastic resin.

このような構成によれば、搭載する多数の電子部品の実装位置精度を向上させるとともに、絶縁層材料の選択範囲を広げ、耐湿信頼性や絶縁性基材との接着強度を向上させる電子部品内蔵モジュールを実現できる。さらに、配線層が形成された別の実装基板に、露出させた電極を介して接続できるので、汎用性の高い電子部品内蔵モジュールが得られる。   According to such a configuration, the mounting position accuracy of a large number of electronic components to be mounted is improved, the selection range of the insulating layer material is expanded, and the moisture resistance reliability and the adhesive strength with the insulating base material are improved. A module can be realized. Furthermore, since it can be connected to another mounting substrate on which the wiring layer is formed via the exposed electrode, a highly versatile electronic component built-in module can be obtained.

また、本発明の電子部品内蔵基板は、上記電子部品内蔵モジュールの表面に露出した電極と電気的に接続する配線パターンを設けた構成を有する。   Moreover, the electronic component built-in substrate of the present invention has a configuration in which a wiring pattern that is electrically connected to the electrode exposed on the surface of the electronic component built-in module is provided.

このような構成によれば、耐湿信頼性や絶縁性基材との接着強度が向上するとともに、微細な配線パターンを備えた電子部品内蔵基板を実現できる。   According to such a configuration, the moisture resistance reliability and the adhesive strength with the insulating base material can be improved, and an electronic component built-in substrate having a fine wiring pattern can be realized.

また、本発明の電子部品内蔵モジュールの製造方法は、絶縁性基材の少なくとも一方の面全面に接着層を形成する工程と、一方の面に少なくとも電極を有する複数の電子部品の他方の面を接着層を介して絶縁性基材の所定の位置に固着する工程と、少なくとも電極の表面は露出させて電子部品を埋設する絶縁層を形成する工程とを含む。   In addition, the method of manufacturing an electronic component built-in module according to the present invention includes the step of forming an adhesive layer on the entire surface of at least one surface of the insulating base, and the other surface of the plurality of electronic components having at least an electrode on one surface. It includes a step of fixing at a predetermined position of the insulating substrate through an adhesive layer, and a step of forming an insulating layer in which at least the surface of the electrode is exposed and an electronic component is embedded.

このような製造方法によれば、複数の電子部品の実装位置精度に優れ、耐湿信頼性や接着強度を向上させた電子部品内蔵モジュールを、安価に製造することが実現できる。   According to such a manufacturing method, it is possible to manufacture an electronic component built-in module excellent in mounting position accuracy of a plurality of electronic components and improved in moisture resistance reliability and adhesive strength at low cost.

さらに、絶縁層を形成する工程は、電極に当接させた注入用治具と絶縁性基材とで形成される空間に封止樹脂を注入する工程を含んでいてもよい。   Further, the step of forming the insulating layer may include a step of injecting a sealing resin into a space formed by the injection jig brought into contact with the electrode and the insulating base material.

このような製造方法によれば、電子部品を固定した後、所定の空間に封止樹脂を注入し硬化させるので、簡易な方法により所定の形状で一括に安価に製造することができる。   According to such a manufacturing method, after fixing the electronic component, the sealing resin is injected into the predetermined space and cured, so that it can be manufactured at a low cost in a predetermined shape by a simple method.

さらに、電子部品の電極の表面をクリーニングする工程を含んでいてもよい。   Furthermore, the process of cleaning the surface of the electrode of an electronic component may be included.

このような製造方法によれば、電子部品の電極の表面がクリーニングされるので、別の回路基板や実装基板などの配線との接続不良を低減することができる。   According to such a manufacturing method, since the surface of the electrode of the electronic component is cleaned, it is possible to reduce poor connection with wiring such as another circuit board or a mounting board.

また、本発明の電子部品内蔵基板の製造方法は、絶縁性基材の少なくとも一方の面全面に接着層を形成する工程と、一方の面に少なくとも電極を有する複数の電子部品の他方の面を接着層を介して絶縁性基材の所定の位置に固着する工程と、少なくとも電極の表面は露出させて電子部品を埋設する絶縁層を形成する工程と、絶縁層の表面上に電極と接続する配線パターンを形成する工程とを含む。   Further, the method of manufacturing an electronic component-embedded substrate of the present invention includes a step of forming an adhesive layer on the entire surface of at least one surface of the insulating base material, and the other surface of the plurality of electronic components having at least an electrode on one surface. A step of fixing at a predetermined position of the insulating substrate through the adhesive layer, a step of forming an insulating layer in which at least the surface of the electrode is exposed and embedding the electronic component, and a connection to the electrode on the surface of the insulating layer Forming a wiring pattern.

このような製造方法によれば、複数の電子部品の実装位置精度、耐湿信頼性や接着強度を向上させるとともに、微細な配線パターンを有する電子部品内蔵基板を安価に製造することができる。   According to such a manufacturing method, the mounting position accuracy, moisture resistance reliability, and adhesive strength of a plurality of electronic components can be improved, and an electronic component built-in substrate having a fine wiring pattern can be manufactured at low cost.

さらに、絶縁層を形成する工程が、電極に当接させた注入用治具と絶縁性基材とで形成される空間に封止樹脂を注入する工程を含んでいてもよい。   Further, the step of forming the insulating layer may include a step of injecting the sealing resin into a space formed by the injection jig brought into contact with the electrode and the insulating base material.

このような製造方法によれば、電子部品を固定した後、所定の空間に封止樹脂を注入し硬化させるので、簡易な方法により所定の絶縁層の形状で一括に安定して安価に製造することができる。   According to such a manufacturing method, after the electronic component is fixed, the sealing resin is injected into the predetermined space and cured, so that it is manufactured in a stable and inexpensive manner in a predetermined insulating layer shape by a simple method. be able to.

さらに、電子部品の電極の表面をクリーニングする工程を含んでいてもよい。   Furthermore, the process of cleaning the surface of the electrode of an electronic component may be included.

このような製造方法によれば、電子部品の電極の表面がクリーニングされ、配線パターンが形成されるので、電極と配線パターンとの接続不良を低減することができる。   According to such a manufacturing method, the surface of the electrode of the electronic component is cleaned and the wiring pattern is formed, so that connection failure between the electrode and the wiring pattern can be reduced.

なお、以上に述べた各構成は、本発明の趣旨を逸脱しない限り、互いに組み合わせることが可能である。   Note that the configurations described above can be combined with each other without departing from the spirit of the present invention.

本発明の電子部品内蔵モジュールと電子部品内蔵基板およびそれらの製造方法によれば、電子部品の実装位置精度を向上させるとともに、絶縁層の材料の選択範囲を広げ、さらに耐湿信頼性や絶縁性基材との接着強度を向上させることができる。   According to the electronic component built-in module, the electronic component built-in substrate, and the manufacturing method thereof according to the present invention, the mounting position accuracy of the electronic component is improved, the selection range of the material of the insulating layer is expanded, and the moisture resistance reliability and the insulating base are further increased. The adhesive strength with the material can be improved.

以下、本発明の実施の形態について、図面を参照しながら説明する。   Hereinafter, embodiments of the present invention will be described with reference to the drawings.

（第１の実施の形態）
図１は、本発明の第１の実施の形態における電子部品内蔵モジュールの構成を示す概略断面図である。 (First embodiment)
FIG. 1 is a schematic cross-sectional view showing the configuration of the electronic component built-in module according to the first embodiment of the present invention.

図１に示すように、電子部品内蔵モジュールは、例えば樹脂基板などからなる絶縁性基材１０の少なくとも一方の面の面全体に、例えば熱硬化性や紫外線硬化性などの接着剤で形成される接着層２０を有する。そして、一方の面にアルミニウムなどの電極端子（図示せず）上に形成した突起電極５０（一般に、バンプと称され、金やアルミニウムなどからなるものである）を有するＩＣチップなどの能動素子３０や電極端子（例えば、錫メッキなどからなる）６０を有するチップ部品（例えば０．６ｍｍ×０．３ｍｍなどの大きさを有する）や薄型あるいはシート状の受動素子４０などの電子部品が接着層２０の上に接着され固定されている。   As shown in FIG. 1, the electronic component built-in module is formed on the entire surface of at least one surface of the insulating base material 10 made of, for example, a resin substrate with an adhesive such as thermosetting or ultraviolet curable. An adhesive layer 20 is provided. Then, an active element 30 such as an IC chip having a protruding electrode 50 (generally called a bump and made of gold, aluminum, or the like) formed on an electrode terminal (not shown) such as aluminum on one surface. And an electronic component such as a chip component (for example, having a size of 0.6 mm × 0.3 mm) or a thin or sheet-like passive element 40 having an electrode terminal (for example, made of tin plating) 60. It is glued and fixed on top.

このとき、電子部品は、絶縁性基材１０の所定の位置に、狭ピッチの間隔で配置されるとともに、能動素子３０はフェースアップ方向で、受動素子４０の他方の面が接着層２０の上に接着固定される。   At this time, the electronic components are arranged at predetermined positions on the insulating substrate 10 at a narrow pitch, the active element 30 is in the face-up direction, and the other surface of the passive element 40 is on the adhesive layer 20. Adhered and fixed to.

なお、以降では能動素子と受動素子を総称するときには電子部品と記載し、突起電極５０および電極端子６０を総称するときには電極と記載する。   Hereinafter, the active element and the passive element are collectively referred to as an electronic component, and the protruding electrode 50 and the electrode terminal 60 are collectively referred to as an electrode.

さらに、少なくとも能動素子３０の突起電極５０や受動素子４０の電極端子６０の表面は露出させて、絶縁性基材１０の電子部品の周囲の接着層２０の上を封止樹脂で全体をモールドし、例えば７０μｍ〜２００μｍ程度の厚みの絶縁層７０が設けられる。なお、絶縁層７０の厚みは、上記値に限られず、能動素子３０とその突起電極５０の厚みの合計または受動素子４０とその電極端子６０の厚みの合計などにより決まるものである。   Further, at least the surface of the protruding electrode 50 of the active element 30 and the surface of the electrode terminal 60 of the passive element 40 are exposed, and the whole of the adhesive layer 20 around the electronic component of the insulating substrate 10 is molded with a sealing resin. For example, the insulating layer 70 having a thickness of about 70 μm to 200 μm is provided. The thickness of the insulating layer 70 is not limited to the above value, but is determined by the total thickness of the active element 30 and its protruding electrode 50 or the total thickness of the passive element 40 and its electrode terminal 60.

ここで、絶縁層７０は、電子部品を気密封止することにより、水分や蒸気などに対する耐湿信頼性を向上させる。さらに、絶縁層７０は、少なくとも絶縁性基材１０の上の接着層２０に電子部品を固着固定し、かつ接着層２０を介して絶縁性基材１０と接着することにより接着強度を向上させる役割を有する。また、絶縁層７０は、絶縁性基材１０の面全体に接着層２０を介して形成されるので、絶縁層７０の材料として、絶縁性基材１０との接着強度に優れる材料だけでなく、接着層２０との接着強度に優れる材料などから任意に選択することができる。つまり、接着層２０によって、絶縁層７０と絶縁性基材１０との接着強度を確保できるため、絶縁層７０には、電子部品の気密封止性に優れた材料を選択することができるものである。   Here, the insulating layer 70 improves the moisture resistance reliability against moisture, steam and the like by hermetically sealing the electronic component. Furthermore, the insulating layer 70 has a role of improving the adhesive strength by fixing and fixing the electronic component to at least the adhesive layer 20 on the insulating base material 10 and adhering to the insulating base material 10 through the adhesive layer 20. Have In addition, since the insulating layer 70 is formed on the entire surface of the insulating base material 10 via the adhesive layer 20, the material of the insulating layer 70 is not only a material having excellent adhesive strength with the insulating base material 10, The material can be arbitrarily selected from materials having excellent adhesive strength with the adhesive layer 20. That is, since the adhesive layer 20 can ensure the adhesive strength between the insulating layer 70 and the insulating base material 10, a material having excellent hermetic sealing performance for electronic components can be selected for the insulating layer 70. is there.

その結果、従来のように絶縁性基材を直接モールドし、電子部品を封止する場合の封止樹脂層の材料よりも、その選択範囲が広がるとともに、接着強度や耐湿信頼性などの性能に優れ、かつ安価な材料を用いることが可能となる。   As a result, the selection range is wider than the material of the sealing resin layer when the insulating base material is directly molded and the electronic parts are sealed as in the past, and the performance such as adhesive strength and moisture resistance reliability is improved. It is possible to use an excellent and inexpensive material.

なお、絶縁性基材としては、例えば、ＰＥＴ（ポリエチレンテレフタレート）、ＰＰＥ（ポリフェニレンエーテル）、ＰＥＮ（ポリエチレンナフタレート）、ＢＴレジン（ビスマレイミドトリアジン）、エポキシ樹脂、ポリイミド樹脂、フッ素樹脂、フェノール樹脂などの樹脂材料が用いられる。さらに、樹脂材料に無機質材料を複合化させた絶縁性基材を用いることもできる。その場合、樹脂材料と複合化される無機質材料としては、ガラス繊維の織布や不織布などのほか、ＳｉＯ２、Ａｌ２Ｏ３、ＡｌＮ、ホウ酸アルミニウムなどのフィラーを添加した複合材料を用いることができる。 Examples of the insulating base material include PET (polyethylene terephthalate), PPE (polyphenylene ether), PEN (polyethylene naphthalate), BT resin (bismaleimide triazine), epoxy resin, polyimide resin, fluorine resin, phenol resin, and the like. These resin materials are used. Furthermore, an insulating base material in which an inorganic material is combined with a resin material can also be used. In that case, as the inorganic material to be compounded with the resin material, a composite material to which fillers such as SiO 2 , Al 2 O 3 , AlN, aluminum borate are added in addition to glass fiber woven fabric or nonwoven fabric is used. Can do.

また、接着層としては、例えばエポキシ樹脂系、ポリウレタン系、反応性アクリル系、紫外線硬化型やシリコーン系などを、絶縁性基材および絶縁層との接着強度に優れる材料を組み合わせて用いることができる。   In addition, as the adhesive layer, for example, an epoxy resin type, a polyurethane type, a reactive acrylic type, an ultraviolet curable type, a silicone type, or the like can be used in combination with a material excellent in adhesive strength with the insulating base material and the insulating layer. .

また、絶縁層としては、例えばエポキシ樹脂系やシリコーン系などに、フェノール樹脂、有機酸無水物、アミンや硬化促進剤などの硬化剤を混合して用いられる。さらに、熱硬化型や紫外線硬化型のものを用途に応じて用いることもできる。   In addition, as the insulating layer, for example, an epoxy resin type or a silicone type is mixed with a curing agent such as a phenol resin, an organic acid anhydride, an amine or a curing accelerator. Furthermore, a thermosetting type or an ultraviolet curable type can also be used depending on the application.

そして、接着層は絶縁性基材との必要な接着強度に応じて、また絶縁層は接着層および電子部品とに必要な接着強度や気密性に応じて、上記材料群などから最適なものを任意に選択して組み合わせて用いることができる。   Depending on the adhesive strength required for the insulating substrate and the insulating layer, the insulating layer should be optimally selected from the above material group depending on the adhesive strength and airtightness required for the adhesive layer and the electronic component. Any combination can be selected and used.

本発明の第１の実施の形態によれば、電子部品を絶縁性基材の所定の位置の接着層上に、個別または一括で固着配置するため、絶縁層を形成するときにおいて、電子部品の配置位置がずれることがない。さらに、絶縁性基材に、同じ程度の厚みを有する、複数個のＩＣチップや異種形状の超小型・薄型あるいはシート状のデバイスなどの電子部品を、狭ピッチ間隔で混載しても、接着層により安定して固定配置することができる。   According to the first embodiment of the present invention, the electronic component is fixedly arranged individually or collectively on the adhesive layer at a predetermined position of the insulating base material. Arrangement position does not shift. Furthermore, even when a plurality of IC chips having different thicknesses and different electronic parts such as ultra-small / thin or sheet-like devices are mounted on an insulating base material at a narrow pitch, an adhesive layer is provided. Therefore, it can be stably fixed.

また、接着層を介して、絶縁性基材と絶縁層を接着できるため、絶縁層の材料の選択範囲が広がるとともに、必要な耐湿信頼性や接着強度に応じた絶縁層の材料を選択することができる。その結果、実装する電子部品などの位置ずれがなく、信頼性に優れた電子部品内蔵モジュールを実現できる。   In addition, since the insulating substrate and the insulating layer can be bonded via the adhesive layer, the selection range of the insulating layer material can be expanded, and the insulating layer material can be selected according to the required moisture resistance reliability and adhesive strength. Can do. As a result, it is possible to realize an electronic component built-in module that is excellent in reliability with no misalignment of electronic components to be mounted.

以下に、本発明の第１の実施の形態における電子部品内蔵モジュールの製造方法について、図２を用いて説明する。   Below, the manufacturing method of the electronic component built-in module in the 1st Embodiment of this invention is demonstrated using FIG.

図２は、本発明の第１の実施の形態における電子部品内蔵モジュールの製造方法の一例を説明する工程図である。図２において、図１と同じ構成要素については同じ符号を用い説明を省略する。   FIG. 2 is a process diagram illustrating an example of a method for manufacturing the electronic component built-in module according to the first embodiment of the present invention. In FIG. 2, the same components as those in FIG.

まず、図２（ａ）に示ように、例えばＰＥＴなどからなる絶縁性基材１０を準備する。   First, as shown in FIG. 2A, an insulating base material 10 made of, for example, PET is prepared.

つぎに、図２（ｂ）に示すように、絶縁性基材１０の少なくとも一方の面に、例えばエポキシ樹脂などの熱硬化性樹脂や紫外線硬化樹脂を主成分とする接着剤を一定の膜厚で塗布あるいは転写により、例えば５μｍ〜２０μｍ程度の厚みを有する接着層２０を形成する。   Next, as shown in FIG. 2 (b), an adhesive mainly composed of a thermosetting resin such as an epoxy resin or an ultraviolet curable resin, for example, has a certain film thickness on at least one surface of the insulating substrate 10. The adhesive layer 20 having a thickness of, for example, about 5 μm to 20 μm is formed by coating or transferring.

つぎに、図２（ｃ）に示すように、一方の面に突起電極５０を有するＩＣチップなどの能動素子３０や電極端子６０を有する超小型のシート状またはチップ状の受動素子４０などの電子部品の他方の面をフェースアップ方向で、接着層２０を介して絶縁性基材１０の所定の位置に、個別に望ましくは一括に配置し実装する。そして、接着層２０を、その材料の特性に応じた硬化温度での加熱あるいは紫外線の照射などにより硬化させるとともに、電子部品を接着層２０に固着する。このとき、電子部品の実装位置がずれないように、接着剤塗布後、熱や紫外線でタック性を持たせた後、電子部品を接着層に仮固着し、以降で述べる絶縁層の硬化工程と同時に接着層を加熱硬化または紫外線により硬化させてもよい。   Next, as shown in FIG. 2C, an active element 30 such as an IC chip having a protruding electrode 50 on one surface or an electronic element such as an ultra-small sheet-like or chip-like passive element 40 having an electrode terminal 60. The other surface of the component is arranged and mounted individually and desirably in a predetermined position on the insulating substrate 10 via the adhesive layer 20 in the face-up direction. Then, the adhesive layer 20 is cured by heating at a curing temperature corresponding to the characteristics of the material or irradiation of ultraviolet rays, and the electronic component is fixed to the adhesive layer 20. At this time, in order to prevent the mounting position of the electronic component from being shifted, after applying the adhesive, after giving tack property with heat or ultraviolet rays, temporarily fixing the electronic component to the adhesive layer, At the same time, the adhesive layer may be cured by heat curing or ultraviolet rays.

なお、上記では、接着層として接着剤を塗布する例で説明したが、シート状の接着剤を用いて、絶縁性基材の一方の面に貼り付けて接着層としてもよい。これにより、接着層の形成時間の短縮や厚みの均一な接着層により凹凸のない状態で電子部品を実装することができる。   In the above description, the example in which the adhesive is applied as the adhesive layer has been described. However, the adhesive layer may be attached to one surface of the insulating substrate using a sheet-like adhesive. As a result, the electronic component can be mounted without any unevenness by shortening the formation time of the adhesive layer or by using the adhesive layer having a uniform thickness.

つぎに、図２（ｄ）に示すように、絶縁性基材１０に形成した接着層２０の上に、少なくとも能動素子３０の突起電極５０や受動素子４０の電極端子６０の表面は露出させて、例えばエポキシ樹脂などからなる封止樹脂で全体をモールドする。そして、封止樹脂を硬化させて能動素子３０の突起電極５０や受動素子４０などの電子部品を埋設する絶縁層７０を形成する。   Next, as shown in FIG. 2 (d), at least the surface of the protruding electrode 50 of the active element 30 and the electrode terminal 60 of the passive element 40 are exposed on the adhesive layer 20 formed on the insulating substrate 10. For example, the whole is molded with a sealing resin made of an epoxy resin or the like. Then, the sealing resin is cured to form an insulating layer 70 in which electronic components such as the protruding electrodes 50 of the active elements 30 and the passive elements 40 are embedded.

なお、接着層や絶縁層が、例えばアクリレート系の紫外線硬化樹脂を主成分とする場合、高圧水銀ランプで積算光量４００ｍＪ／ｃｍ２〜６００ｍＪ／ｃｍ２程度の条件で行われる。 The adhesive layer and the insulating layer is, for example, when the main component acrylate ultraviolet curable resin is carried out in the integrated light intensity 400mJ / cm 2 ~600mJ / cm 2 about conditions in a high-pressure mercury lamp.

ここで、封止樹脂のモールドの方法としては、シート状の封止樹脂を電子部品の電極が露出するように圧入して埋設することにより行うことができる。ここで、シート状の封止樹脂の材料としては、ＰＥＥＫ（ポリエーテルエーテルケトン）、ＰＥＴＧ（ポリエステルテレフタレートグリコールモディファイド）、熱可塑ポリイミドなどの熱可塑性フィルムやエポキシ樹脂、アクリル樹脂などを用いることができる。   Here, as a method of molding the sealing resin, it can be performed by press-fitting and embedding the sheet-shaped sealing resin so that the electrodes of the electronic component are exposed. Here, as a material for the sheet-like sealing resin, a thermoplastic film such as PEEK (polyether ether ketone), PETG (polyester terephthalate glycol modified), thermoplastic polyimide, an epoxy resin, an acrylic resin, or the like can be used. .

また、封止樹脂を電子部品を覆うように全面に塗布し硬化させた後、電子部品の電極を露出させるために、封止樹脂の表面を研磨して絶縁層を形成してもよい。また、電極の表面の、例えば封止樹脂などの残渣を、例えばエッチング、プラズマなどのクリーニング処理やレーザなどにより除去してもよい。これにより、さらに接続信頼性に優れた電子部品内蔵モジュールが得られる。   Alternatively, the sealing resin may be applied to the entire surface so as to cover the electronic component and cured, and then the surface of the sealing resin may be polished to form an insulating layer in order to expose the electrode of the electronic component. Further, residues such as a sealing resin on the surface of the electrode may be removed by a cleaning process such as etching or plasma or a laser. Thereby, an electronic component built-in module having further excellent connection reliability can be obtained.

本発明の第１の実施の形態の製造方法によれば、電子部品を絶縁性基材の所定の位置の接着層上に実装し固着させるため、絶縁層などの形成工程において封止樹脂の流動による電子部品の実装位置ずれが発生しない。そのため、電子部品を、狭ピッチ間隔で混載し、実装密度が向上した電子部品内蔵モジュールを作製することができる。   According to the manufacturing method of the first embodiment of the present invention, in order to mount and fix the electronic component on the adhesive layer at a predetermined position of the insulating base material, the flow of the sealing resin in the forming process of the insulating layer or the like The electronic component mounting position shift due to Therefore, it is possible to manufacture an electronic component built-in module in which electronic components are mixedly mounted at a narrow pitch interval and the mounting density is improved.

以下に、上記製造方法で作製した電子部品内蔵モジュールの具体例について簡単に説明する。   Below, the specific example of the electronic component built-in module produced with the said manufacturing method is demonstrated easily.

まず、絶縁性基材として、全面に２０μｍ厚の接着層を形成したＰＥＮフィルム（１００ｍｍ×８０ｍｍ、１００μｍ厚）を用いた。つぎに、接着層上に、８０μｍの厚みを有する、２ｍｍ□、６ｍｍ□、１０ｍｍ□のＩＣチップと、チップコンデンサ（０．４ｍｍ×０．２ｍｍ）やチップ抵抗（０．４ｍｍ×０．２ｍｍ）などの電子部品をそれぞれ、４個、８個、１０個実装した試料を作製した。そして、各試料を、エポキシ樹脂で封止し絶縁層を形成することにより電子部品を内蔵した電子部品内蔵モジュールを作製した。   First, a PEN film (100 mm × 80 mm, 100 μm thickness) having an adhesive layer having a thickness of 20 μm formed on the entire surface was used as an insulating substrate. Next, on the adhesive layer, a 2 mm □, 6 mm □, 10 mm □ IC chip having a thickness of 80 μm, a chip capacitor (0.4 mm × 0.2 mm) and a chip resistor (0.4 mm × 0.2 mm). Samples on which four, eight, and ten electronic components were mounted were prepared. Then, each sample was sealed with an epoxy resin to form an insulating layer, thereby producing an electronic component built-in module incorporating the electronic component.

このとき、電子部品間の位置ずれ量は、＋／−３０μｍ以内で、位置ずれの小さい電子部品実装モジュールが得られた。   At this time, the amount of misalignment between the electronic components was within +/− 30 μm, and an electronic component mounting module with small misalignment was obtained.

また、上記電子部品内蔵モジュールに対して、吸湿リフロー試験や環境信頼性評価を行った。吸湿リフロー試験として、８５℃・８５％ＲＨの環境下に１６８時間放置後、ピーク温度２４０℃のリフローを実施したが、破裂、剥離などは観察されなかった。また、熱衝撃試験として、−４０℃・３０分、８５℃・３０分の５００回の繰り返し後においても、剥離などは見られなかった。さらに、高温高湿試験として、６０℃・９０％ＲＨ、５００時間後においても、同様に剥離などは見られなかった。   Moreover, the moisture absorption reflow test and environmental reliability evaluation were performed with respect to the said electronic component built-in module. As a moisture absorption reflow test, after standing for 168 hours in an environment of 85 ° C. and 85% RH, reflow was performed at a peak temperature of 240 ° C., but no rupture or peeling was observed. Further, as a thermal shock test, no peeling or the like was observed after 500 times of −40 ° C. · 30 minutes and 85 ° C. · 30 minutes. Furthermore, as a high-temperature and high-humidity test, no peeling or the like was observed even after 500 hours at 60 ° C. and 90% RH.

上記結果から、本発明の第１の実施の形態における電子部品内蔵モジュールは、高い接着強度と実装位置ずれの少ないものであることが確認された。   From the above results, it was confirmed that the electronic component built-in module according to the first embodiment of the present invention has high adhesive strength and little mounting position deviation.

（第２の実施の形態）
図３は、本発明の第２の実施の形態における電子部品内蔵基板の構成を示す概略断面図である。図３において、図１と同じ構成要素については同じ符号を用い説明を省略する。 (Second Embodiment)
FIG. 3 is a schematic cross-sectional view showing the configuration of the electronic component built-in substrate according to the second embodiment of the present invention. In FIG. 3, the same components as those in FIG.

つまり、図１に示す電子部品内蔵モジュールから露出させた電極と接続する配線パターンを、絶縁層の表面に形成して電子部品内蔵基板とするものである。   That is, the wiring pattern connected to the electrode exposed from the electronic component built-in module shown in FIG. 1 is formed on the surface of the insulating layer to form the electronic component built-in substrate.

図３において、電子部品内蔵基板は、図１の電子部品内蔵モジュールの絶縁層７０に埋設された能動素子３０の突起電極５０および受動素子４０の電極端子６０の露出面と接続する配線パターン８０を有している。そして、配線パターン８０は、例えば銅などの金属箔や金属膜、スパッタリング、金属メッキ膜などによる金属電極層のエッチングによるパターン形成や、導電性ペーストを用いたインクジェット、ディスペンス描画、スクリーン印刷、グラビア印刷あるいは転写などにより形成される。   In FIG. 3, the electronic component built-in substrate has a wiring pattern 80 connected to the protruding surface 50 of the active element 30 and the exposed surface of the electrode terminal 60 of the passive element 40 embedded in the insulating layer 70 of the electronic component built-in module of FIG. 1. Have. The wiring pattern 80 is formed by etching a metal electrode layer using a metal foil such as copper, a metal film, sputtering, a metal plating film, etc., an inkjet using a conductive paste, dispensing drawing, screen printing, gravure printing, etc. Alternatively, it is formed by transfer or the like.

本発明の第２の実施の形態によれば、絶縁層の表面に電子部品内蔵モジュールから露出させた電子部品の電極と接続する配線パターンを設けることにより、薄型の電子部品内蔵基板を実現できる。   According to the second embodiment of the present invention, a thin electronic component built-in substrate can be realized by providing the wiring pattern connected to the electrode of the electronic component exposed from the electronic component built-in module on the surface of the insulating layer.

以下に、本発明の第２の実施の形態における電子部品内蔵基板の製造方法について、図４を用いて説明する。   Below, the manufacturing method of the electronic component built-in board | substrate in the 2nd Embodiment of this invention is demonstrated using FIG.

図４は、本発明の第２の実施の形態における電子部品内蔵基板の製造方法の一例を説明する工程図である。図４において、図３と同じ構成要素については同じ符号を用い説明を省略する。   FIG. 4 is a process diagram illustrating an example of a method for manufacturing an electronic component built-in substrate according to the second embodiment of the present invention. In FIG. 4, the same components as those in FIG.

本発明の第２の実施の形態は、絶縁層の表面上に電極と接続する配線パターンを形成する工程を有する点で第１の実施の形態とは異なるものである。   The second embodiment of the present invention is different from the first embodiment in that it includes a step of forming a wiring pattern connected to an electrode on the surface of an insulating layer.

まず、図４（ａ）に示ように、例えばＰＥＴなどからなる絶縁性基材１０を準備する。   First, as shown in FIG. 4A, an insulating substrate 10 made of, for example, PET is prepared.

つぎに、図４（ｂ）に示すように、絶縁性基材１０の少なくとも一方の面に、例えばエポキシ樹脂などの熱硬化性樹脂や紫外線硬化樹脂を主成分とする接着剤を一定の膜厚で塗布あるいは転写することにより接着層２０を形成する。   Next, as shown in FIG. 4B, an adhesive mainly composed of a thermosetting resin such as an epoxy resin or an ultraviolet curable resin is formed on at least one surface of the insulating base 10 with a certain film thickness. The adhesive layer 20 is formed by applying or transferring the film.

つぎに、図４（ｃ）に示すように、一方の面に突起電極５０を有するＩＣチップなどの能動素子３０や電極端子６０を有する超小型のシート状またはチップ状の受動素子４０などの電子部品の他方の面をフェースアップ方向で、接着層２０を介して絶縁性基材１０の所定の位置に、個別に望ましくは一括に配置し実装する。そして、接着層２０を、その材料の特性に応じた硬化温度での加熱あるいは紫外線の照射などにより硬化させるとともに、電子部品を接着層２０に固着する。このとき、電子部品の実装位置がずれない場合には、まず電子部品を接着層に仮固着し、以降で述べる絶縁層の硬化工程と同時に接着層を加熱硬化または紫外線硬化させてもよい。   Next, as shown in FIG. 4C, an active element 30 such as an IC chip having a protruding electrode 50 on one surface or an electronic element such as an ultra-small sheet-like or chip-like passive element 40 having an electrode terminal 60. The other surface of the component is arranged and mounted individually and desirably in a predetermined position on the insulating substrate 10 via the adhesive layer 20 in the face-up direction. Then, the adhesive layer 20 is cured by heating at a curing temperature corresponding to the characteristics of the material or irradiation of ultraviolet rays, and the electronic component is fixed to the adhesive layer 20. At this time, if the mounting position of the electronic component does not shift, the electronic component may be temporarily fixed to the adhesive layer first, and the adhesive layer may be heat-cured or ultraviolet-cured simultaneously with the insulating layer curing step described below.

なお、上記では、接着層として接着剤を塗布する例で説明したが、シート状の接着剤を用いて、絶縁性基材の一方の面に貼り付けて接着層としてもよい。これにより、接着層の形成時間の短縮化や厚みの均一な接着層により凹凸のない状態で電子部品を実装することができる。   In the above description, the example in which the adhesive is applied as the adhesive layer has been described. However, the adhesive layer may be attached to one surface of the insulating substrate using a sheet-like adhesive. As a result, the electronic component can be mounted without any unevenness by shortening the formation time of the adhesive layer and by using the adhesive layer having a uniform thickness.

つぎに、図４（ｄ）に示すように、絶縁性基材１０に形成した接着層２０の上に、少なくとも能動素子３０の突起電極５０や受動素子４０の電極端子６０の表面は露出させて、例えばエポキシ樹脂などからなる封止樹脂で全体をモールドする。そして、封止樹脂を硬化させて電子部品を埋設する絶縁層７０を形成する。   Next, as shown in FIG. 4D, on the adhesive layer 20 formed on the insulating substrate 10, at least the surfaces of the protruding electrodes 50 of the active elements 30 and the electrode terminals 60 of the passive elements 40 are exposed. For example, the whole is molded with a sealing resin made of an epoxy resin or the like. Then, the insulating resin 70 for embedding the electronic component is formed by curing the sealing resin.

なお、接着層や絶縁層が、例えばエポキシ樹脂を主成分とする場合では、加熱温度１３０℃、加熱時間１分程度の条件で行われる。また、封止樹脂のモールドの方法としては、第１の実施の形態で述べた方法と同様な方法で行うことができる。   In the case where the adhesive layer or the insulating layer contains, for example, an epoxy resin as a main component, the heating is performed under conditions of a heating temperature of 130 ° C. and a heating time of about 1 minute. Moreover, as a method of molding the sealing resin, it can be performed by a method similar to the method described in the first embodiment.

つぎに、図４（ｅ）に示すように、能動素子３０の突起電極５０および受動素子４０の電極端子６０と接続する配線パターン８０を形成する。そして、配線パターン８０の形成方法としては、例えば銅などの金属箔や金属膜、金属メッキ膜などによる金属電極層のエッチングによるパターン形成や、スクリーン印刷あるいは転写などにより行うことができる。   Next, as shown in FIG. 4E, a wiring pattern 80 connected to the protruding electrode 50 of the active element 30 and the electrode terminal 60 of the passive element 40 is formed. The wiring pattern 80 can be formed by, for example, pattern formation by etching a metal electrode layer using a metal foil such as copper, a metal film, or a metal plating film, screen printing, or transfer.

本発明の第２の実施の形態の製造方法によれば、絶縁層の表面に電子部品内蔵モジュールから露出させた電子部品の電極と接続する配線パターンを形成することにより、薄型の電子部品内蔵基板を容易に作製できる。   According to the manufacturing method of the second embodiment of the present invention, the wiring pattern connected to the electrode of the electronic component exposed from the electronic component built-in module is formed on the surface of the insulating layer, so that the thin electronic component built-in substrate is formed. Can be easily produced.

（第３の実施の形態）
以下に、本発明の第３の実施の形態における電子部品内蔵モジュールおよび電子部品内蔵基板の製造方法について、図５を用いて説明する。 (Third embodiment)
Hereinafter, a method of manufacturing the electronic component built-in module and the electronic component built-in substrate according to the third embodiment of the present invention will be described with reference to FIG.

図５は、本発明の第３の実施の形態における電子部品内蔵モジュールおよび電子部品内蔵基板とその製造方法の一例を説明する工程図である。図５において、図２および図４と同じ構成要素については同じ符号を用い説明を省略する。   FIG. 5 is a process diagram illustrating an example of an electronic component built-in module, an electronic component built-in substrate, and a manufacturing method thereof according to the third embodiment of the present invention. In FIG. 5, the same components as those in FIGS. 2 and 4 are denoted by the same reference numerals and description thereof is omitted.

本発明の第３の実施の形態は、絶縁層を形成する工程が、電極に当接させた注入用治具と絶縁性基材とで形成される空間に封止樹脂を注入する工程を有する点で第１の実施の形態および第２の実施の形態とは異なるものである。   In the third embodiment of the present invention, the step of forming the insulating layer includes the step of injecting the sealing resin into the space formed by the injection jig brought into contact with the electrode and the insulating base material. This is different from the first embodiment and the second embodiment.

まず、図５（ａ）に示すように、例えばＰＥＴなどからなる絶縁性基材１０を準備する。   First, as shown in FIG. 5A, an insulating substrate 10 made of, for example, PET is prepared.

つぎに、図５（ｂ）に示すように、絶縁性基材１０の少なくとも一方の面に、例えばエポキシ樹脂などの熱硬化性樹脂や紫外線硬化樹脂を主成分とする接着剤を一定の膜厚で塗布あるいは転写することにより接着層２０を形成する。   Next, as shown in FIG. 5 (b), an adhesive mainly composed of a thermosetting resin such as an epoxy resin or an ultraviolet curable resin is formed on at least one surface of the insulating base 10 with a certain film thickness. The adhesive layer 20 is formed by applying or transferring the film.

つぎに、図５（ｃ）に示すように、一方の面に突起電極５０を有する能動素子３０や電極端子６０を有するチップ状の受動素子４０などの電子部品の他方の面をフェースアップ方向で、接着層２０を介して絶縁性基材１０の所定の位置に、個別に望ましくは一括に配置し実装する。そして、接着層２０を、その材料の特性に応じた硬化温度での加熱あるいは紫外線の照射などにより硬化させるとともに、電子部品を接着層２０に固着する。   Next, as shown in FIG. 5C, the other surface of the electronic component such as the active element 30 having the protruding electrode 50 on one surface and the chip-shaped passive element 40 having the electrode terminal 60 is face-up in the face-up direction. Then, it is preferably arranged and mounted individually at a predetermined position of the insulating substrate 10 via the adhesive layer 20. Then, the adhesive layer 20 is cured by heating at a curing temperature corresponding to the characteristics of the material or irradiation of ultraviolet rays, and the electronic component is fixed to the adhesive layer 20.

つぎに、図５（ｄ）に示すように、能動素子３０の突起電極５０および受動素子４０の電極端子６０の先端に注入用治具１００を当接させる。そして、注入装置１２０を用いて、封止樹脂１１０を、注入用治具１００と絶縁性基材１０とで形成される空間内に、その側面から注入する。このとき、封止樹脂は、毛細管現象や注入側以外で吸引（図示せず）することにより、空間内に注入される。なお、吸引は、気泡のない絶縁層を効率よく形成することができるため好ましいものである。さらに、この状態で封止樹脂を硬化することにより、絶縁層７０が形成される。   Next, as shown in FIG. 5 (d), the injection jig 100 is brought into contact with the tips of the protruding electrodes 50 of the active element 30 and the electrode terminals 60 of the passive element 40. Then, using the injection device 120, the sealing resin 110 is injected from the side surface into the space formed by the injection jig 100 and the insulating base material 10. At this time, sealing resin is inject | poured in space by attracting | sucking (not shown) except capillarity or an injection | pouring side. Note that suction is preferable because an insulating layer without bubbles can be efficiently formed. Furthermore, the insulating layer 70 is formed by curing the sealing resin in this state.

なお、この場合には、注入用治具１００の表面に離型剤などを塗布することが好ましく、これによって、封止樹脂の硬化後の注入治具の剥離が容易にできる。   In this case, it is preferable to apply a release agent or the like to the surface of the injecting jig 100, whereby the injecting jig can be easily peeled after the sealing resin is cured.

また、個別の電子部品内蔵モジュールを形成する場合には、図示しないが、注入用治具１００とともに、絶縁性基材１０を型枠内に設置した状態で封止樹脂を注入し、注入用治具１００を外して封止樹脂を硬化させて絶縁層を形成することもできる。なお、大規模の絶縁性基材に複数の電子部品内蔵モジュールを作製する場合には、型枠を用いずに注入用治具で絶縁層を形成した後、個別にダイシングソーなどにより分離してもよい。   In the case of forming an individual electronic component built-in module, although not shown, the sealing resin is injected together with the injecting jig 100 with the insulating base material 10 placed in the mold, and the injecting jig is used. The insulating layer can also be formed by removing the tool 100 and curing the sealing resin. In addition, when producing a plurality of modules with built-in electronic components on a large-scale insulating substrate, an insulating layer is formed with an injection jig without using a mold, and then separated individually by a dicing saw or the like. Also good.

つぎに、図５（ｅ）に示すように、注入用治具１００を外すことにより、電子部品内蔵モジュールが得られる。   Next, as shown in FIG. 5E, the electronic component built-in module is obtained by removing the injection jig 100.

さらに、図５（ｆ）に示すように、能動素子３０の突起電極５０や受動素子４０の電極端子６０と接続する配線パターン８０を、例えば金属箔のエッチングや導電性ペーストなどのスクリーン印刷により形成する。これにより、絶縁層７０の表面に配線パターン８０を備えた電子部品内蔵基板が得られる。   Further, as shown in FIG. 5F, a wiring pattern 80 connected to the protruding electrode 50 of the active element 30 and the electrode terminal 60 of the passive element 40 is formed by, for example, etching metal foil or screen printing such as conductive paste. To do. Thereby, an electronic component built-in substrate having the wiring pattern 80 on the surface of the insulating layer 70 is obtained.

本発明の第３の実施の形態によれば、上述の実施の形態と同様の効果が得られるとともに、電子部品の電極の表面に封止樹脂などの残渣が残りにくいため、簡単な工程で電極を露出させることができる。なぜなら、封止樹脂の注入時には、電極の表面が注入用治具に当接されているからである。   According to the third embodiment of the present invention, the same effects as those of the above-described embodiment can be obtained, and a residue such as sealing resin hardly remains on the surface of the electrode of the electronic component. Can be exposed. This is because the surface of the electrode is in contact with the injection jig when the sealing resin is injected.

また、注入用治具により絶縁層の表面の凹凸を小さくできるため、電子部品内蔵基板の配線パターンを信頼性よく形成することができる。   In addition, since the unevenness on the surface of the insulating layer can be reduced by the injection jig, the wiring pattern of the electronic component built-in substrate can be formed with high reliability.

なお、各実施の形態において、接着層として接着剤を用いて形成する例で説明したが、本発明はこれに限られない。例えば、接着フィルムを絶縁性基材の面に貼り付けてもよい。これにより、安価な方法で接着層を形成することができる。   In addition, in each embodiment, although demonstrated by the example formed using an adhesive agent as an adhesive layer, this invention is not limited to this. For example, you may affix an adhesive film on the surface of an insulating base material. Thereby, an adhesive layer can be formed by an inexpensive method.

また、少なくとも電子部品の電極および電極端子の表面は露出するように、絶縁層を形成する工程を例に説明したが、本発明はこれに限られない。例えば、絶縁層を形成した後、電子部品の電極の表面を、エッチングやプラズマなどにより、クリーニング処理する工程を備えてもよい。これにより、電子部品の電極の表面がクリーニングされるので、配線パターンの形成や別の配線回路または実装基板などの配線との接続不良を低減することができる。   Moreover, although the process of forming the insulating layer so as to expose at least the surfaces of the electrodes and electrode terminals of the electronic component has been described as an example, the present invention is not limited to this. For example, after the insulating layer is formed, a process of cleaning the surface of the electrode of the electronic component by etching or plasma may be provided. As a result, the surface of the electrode of the electronic component is cleaned, so that it is possible to reduce the formation of a wiring pattern and poor connection with wiring such as another wiring circuit or a mounting substrate.

以上で述べたように、本発明によれば、複数の電子部品を、狭ピッチ間隔で実装しても、実装位置がずれない電子部品内蔵モジュールを実現できる。そのため、電子部品の電極と接続される狭ピッチの配線パターンを有する電子部品内蔵基板を実現できる。   As described above, according to the present invention, it is possible to realize an electronic component built-in module in which a mounting position is not shifted even when a plurality of electronic components are mounted at a narrow pitch interval. Therefore, an electronic component built-in substrate having a narrow-pitch wiring pattern connected to the electrodes of the electronic component can be realized.

本発明における電子部品内蔵モジュールと電子部品内蔵基板およびそれらの製造方法は、薄型で、高い実装密度が要望される電子機器において有用である。   The electronic component built-in module, the electronic component built-in substrate, and the manufacturing method thereof according to the present invention are useful in electronic devices that are thin and require high mounting density.

本発明の第１の実施の形態における電子部品内蔵モジュールの構成を示す概略断面図Schematic sectional view showing the configuration of the electronic component built-in module according to the first embodiment of the present invention 本発明の第１の実施の形態における電子部品内蔵モジュールの製造方法の一例を説明する工程図Process drawing explaining an example of the manufacturing method of the electronic component built-in module in the 1st Embodiment of this invention 本発明の第２の実施の形態における電子部品内蔵基板の構成を示す概略断面図Schematic sectional view showing the configuration of the electronic component built-in substrate in the second embodiment of the present invention 本発明の第２の実施の形態における電子部品内蔵基板の製造方法の一例を説明する工程図Process drawing explaining an example of the manufacturing method of the electronic component built-in board | substrate in the 2nd Embodiment of this invention. 本発明の第３の実施の形態における電子部品内蔵モジュールおよび電子部品内蔵基板とその製造方法の一例を説明する工程図Process drawing explaining an example of the electronic component built-in module, the electronic component built-in substrate, and the manufacturing method thereof in the third embodiment of the present invention 従来の電子部品内蔵モジュールの製造方法を説明する工程図Process drawing explaining the manufacturing method of the conventional electronic component built-in module

符号の説明Explanation of symbols

１０ 絶縁性基材
２０ 接着層
３０ 能動素子
４０ 受動素子
５０ 突起電極
６０ 電極端子
７０ 絶縁層
８０ 配線パターン
１００ 注入用治具
１１０ 封止樹脂
１２０ 注入装置 DESCRIPTION OF SYMBOLS 10 Insulating base material 20 Adhesive layer 30 Active element 40 Passive element 50 Projection electrode 60 Electrode terminal 70 Insulating layer 80 Wiring pattern 100 Injection jig | tool 110 Sealing resin 120 Injection | pouring apparatus

Claims (9)

少なくとも一方の面全面に接着層を備えた絶縁性基材と、
一方の面に少なくとも電極を有する複数の電子部品と、
前記電子部品を覆うように形成された絶縁層とを備え、
前記電子部品の他方の面が前記接着層を介して前記絶縁性基材の所定の位置に固着されるとともに、少なくとも前記電子部品の前記電極の表面を前記絶縁層から露出させたことを特徴とする電子部品内蔵モジュール。 An insulating base material provided with an adhesive layer on the entire surface of at least one surface;
A plurality of electronic components having at least electrodes on one surface;
An insulating layer formed to cover the electronic component,
The other surface of the electronic component is fixed to a predetermined position of the insulating substrate through the adhesive layer, and at least the surface of the electrode of the electronic component is exposed from the insulating layer. Electronic component built-in module. 前記接着層は、少なくとも紫外線硬化性樹脂、熱硬化性樹脂および熱可塑性樹脂の１種以上を含むことを特徴とする請求項１に記載の電子部品内蔵モジュール。 The electronic component built-in module according to claim 1, wherein the adhesive layer includes at least one of an ultraviolet curable resin, a thermosetting resin, and a thermoplastic resin. 請求項１に記載の電子部品内蔵モジュールの表面に露出した前記電極と電気的に接続する配線パターンを設けたことを特徴とする電子部品内蔵基板。 An electronic component built-in substrate, comprising a wiring pattern electrically connected to the electrode exposed on the surface of the electronic component built-in module according to claim 1. 絶縁性基材の少なくとも一方の面全面に接着層を形成する工程と、
一方の面に少なくとも電極を有する複数の電子部品の他方の面を前記接着層を介して前記絶縁性基材の所定の位置に固着する工程と、
少なくとも前記電極の表面は露出させて前記電子部品を埋設する絶縁層を形成する工程と、
を含むことを特徴とする電子部品内蔵モジュールの製造方法。 Forming an adhesive layer on the entire surface of at least one surface of the insulating substrate;
Fixing the other surface of the plurality of electronic components having at least an electrode on one surface to a predetermined position of the insulating substrate via the adhesive layer;
Forming an insulating layer in which at least the surface of the electrode is exposed and the electronic component is embedded;
The manufacturing method of the electronic component built-in module characterized by including. 前記絶縁層を形成する工程は、前記電極に当接させた注入用治具と前記絶縁性基材とで形成される空間に封止樹脂を注入する工程を含むことを特徴とする請求項４に記載の電子部品内蔵モジュールの製造方法。 5. The step of forming the insulating layer includes a step of injecting a sealing resin into a space formed by an injection jig brought into contact with the electrode and the insulating base material. The manufacturing method of the electronic component built-in module of description. 前記電子部品の前記電極の表面をクリーニングする工程を含むことを特徴とする請求項４または請求項５に記載の電子部品内蔵モジュールの製造方法。 6. The method for manufacturing an electronic component built-in module according to claim 4, further comprising a step of cleaning a surface of the electrode of the electronic component. 絶縁性基材の少なくとも一方の面全面に接着層を形成する工程と、
一方の面に少なくとも電極を有する複数の電子部品の他方の面を前記接着層を介して前記絶縁性基材の所定の位置に固着する工程と、
少なくとも前記電極の表面は露出させて前記電子部品を埋設する絶縁層を形成する工程と、
前記絶縁層の表面上に前記電極と接続する配線パターンを形成する工程と、
を含むことを特徴とする電子部品内蔵基板の製造方法。 Forming an adhesive layer on the entire surface of at least one surface of the insulating substrate;
Fixing the other surface of the plurality of electronic components having at least an electrode on one surface to a predetermined position of the insulating substrate via the adhesive layer;
Forming an insulating layer in which at least the surface of the electrode is exposed and the electronic component is embedded;
Forming a wiring pattern connected to the electrode on the surface of the insulating layer;
The manufacturing method of the electronic component built-in board | substrate characterized by the above-mentioned. 前記絶縁層を形成する工程が、前記電極に当接させた注入用治具と前記絶縁性基材とで形成される空間に封止樹脂を注入する工程を含むことを特徴とする請求項７に記載の電子部品内蔵基板の製造方法。 8. The step of forming the insulating layer includes a step of injecting a sealing resin into a space formed by an injection jig brought into contact with the electrode and the insulating base material. The manufacturing method of the electronic component built-in board | substrate of description. 前記電子部品の前記電極の表面をクリーニングする工程を含むことを特徴とする請求項７または請求項８に記載の電子部品内蔵基板の製造方法。 9. The method of manufacturing an electronic component built-in substrate according to claim 7, further comprising a step of cleaning a surface of the electrode of the electronic component.
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US9583409B2 (en) 2011-01-12 2017-02-28 Murata Manufacturing Co., Ltd. Resin sealed module
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