JP2007019630A5 - - Google Patents
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- Publication number
- JP2007019630A5 JP2007019630A5 JP2005196489A JP2005196489A JP2007019630A5 JP 2007019630 A5 JP2007019630 A5 JP 2007019630A5 JP 2005196489 A JP2005196489 A JP 2005196489A JP 2005196489 A JP2005196489 A JP 2005196489A JP 2007019630 A5 JP2007019630 A5 JP 2007019630A5
- Authority
- JP
- Japan
- Prior art keywords
- clock
- control code
- variable delay
- delay
- limit value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000011084 recovery Methods 0.000 claims 18
- 238000001514 detection method Methods 0.000 claims 17
- 230000001360 synchronised effect Effects 0.000 claims 4
- 230000007423 decrease Effects 0.000 claims 1
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005196489A JP4679273B2 (ja) | 2005-07-05 | 2005-07-05 | クロックデータリカバリ回路 |
| US11/477,597 US7822158B2 (en) | 2005-07-05 | 2006-06-30 | Clock data recovery circuit capable of generating clock signal synchronized with data signal |
| US12/883,272 US8175205B2 (en) | 2005-07-05 | 2010-09-16 | Clock data recovery circuit capable of generating clock signal synchronized with data signal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005196489A JP4679273B2 (ja) | 2005-07-05 | 2005-07-05 | クロックデータリカバリ回路 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2007019630A JP2007019630A (ja) | 2007-01-25 |
| JP2007019630A5 true JP2007019630A5 (enExample) | 2008-08-14 |
| JP4679273B2 JP4679273B2 (ja) | 2011-04-27 |
Family
ID=37678491
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005196489A Expired - Fee Related JP4679273B2 (ja) | 2005-07-05 | 2005-07-05 | クロックデータリカバリ回路 |
Country Status (2)
| Country | Link |
|---|---|
| US (2) | US7822158B2 (enExample) |
| JP (1) | JP4679273B2 (enExample) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7240231B2 (en) * | 2002-09-30 | 2007-07-03 | National Instruments Corporation | System and method for synchronizing multiple instrumentation devices |
| US7801258B2 (en) * | 2007-04-02 | 2010-09-21 | National Instruments Corporation | Aligning timebases to share synchronized periodic signals |
| KR101341924B1 (ko) * | 2011-10-21 | 2013-12-19 | 포항공과대학교 산학협력단 | 정전식 터치센서 |
| US8855179B1 (en) | 2012-05-24 | 2014-10-07 | Pmc-Sierra Us, Inc. | Measuring impairments of digitized signals in data and timing recovery circuits |
| US9265458B2 (en) | 2012-12-04 | 2016-02-23 | Sync-Think, Inc. | Application of smooth pursuit cognitive testing paradigms to clinical drug development |
| US9380976B2 (en) | 2013-03-11 | 2016-07-05 | Sync-Think, Inc. | Optical neuroinformatics |
| KR101597235B1 (ko) * | 2014-11-26 | 2016-02-24 | 라이트웍스 주식회사 | 수동형 광 네트워크의 클럭 데이터 회복용 클럭 제공 장치 |
| KR101597233B1 (ko) * | 2014-11-26 | 2016-02-24 | 라이트웍스 주식회사 | 버스트 모드 클럭 데이터 회복 회로 |
| US9379880B1 (en) * | 2015-07-09 | 2016-06-28 | Xilinx, Inc. | Clock recovery circuit |
| CN110798854B (zh) * | 2018-08-03 | 2021-10-26 | 上海华为技术有限公司 | 一种时钟状态检测方法及装置 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4358741A (en) * | 1979-09-17 | 1982-11-09 | Ilc Data Device Corporation | Micro time and phase stepper |
| JP2844921B2 (ja) * | 1990-11-30 | 1999-01-13 | カシオ計算機株式会社 | ビット同期回路 |
| JPH06296184A (ja) * | 1993-04-08 | 1994-10-21 | Fujitsu Ltd | クロック再生回路 |
| JP3159585B2 (ja) * | 1993-12-07 | 2001-04-23 | 三菱電機株式会社 | クロック抽出回路 |
| US6316966B1 (en) * | 1999-07-16 | 2001-11-13 | Conexant Systems, Inc. | Apparatus and method for servo-controlled self-centering phase detector |
| US6807225B1 (en) * | 2000-05-31 | 2004-10-19 | Conexant Systems, Inc. | Circuit and method for self trimming frequency acquisition |
| US6331792B1 (en) * | 2000-06-30 | 2001-12-18 | Conexant Systems, Inc. | Circuit and method for unlimited range frequency acquisition |
| US6377082B1 (en) * | 2000-08-17 | 2002-04-23 | Agere Systems Guardian Corp. | Loss-of-signal detector for clock/data recovery circuits |
| JP3450293B2 (ja) * | 2000-11-29 | 2003-09-22 | Necエレクトロニクス株式会社 | クロック制御回路及びクロック制御方法 |
| US7099424B1 (en) * | 2001-08-28 | 2006-08-29 | Rambus Inc. | Clock data recovery with selectable phase control |
| US7515656B2 (en) * | 2002-04-15 | 2009-04-07 | Fujitsu Limited | Clock recovery circuit and data receiving circuit |
| US7127022B1 (en) * | 2003-03-21 | 2006-10-24 | Xilinx, Inc. | Clock and data recovery circuits utilizing digital delay lines and digitally controlled oscillators |
| KR100541548B1 (ko) * | 2003-09-08 | 2006-01-11 | 삼성전자주식회사 | 대역 확산 클럭 발생회로 및 방법 |
-
2005
- 2005-07-05 JP JP2005196489A patent/JP4679273B2/ja not_active Expired - Fee Related
-
2006
- 2006-06-30 US US11/477,597 patent/US7822158B2/en not_active Expired - Fee Related
-
2010
- 2010-09-16 US US12/883,272 patent/US8175205B2/en not_active Expired - Fee Related
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