JP2007005495A - Printed wiring board and method of mounting semiconductor package - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To manage a soldering failure during a reflow process. <P>SOLUTION: The printed wiring board comprises a board 2 which is provided with a semiconductor package 4, a second sensor land 7, and a second check land 9. The semiconductor package 4 has a package 11 provided with a plurality of projected electrode terminals 12, and is provided with a first sensor land 13 substantially at the center of an adhesive face 11a formed with an electrode terminal 12 of the package 11, and a first check land 14 connected to the first sensor land 13 on a face 11b on the opposite side to the adhesive face 11a. The second sensor land 7 corresponds to the first sensor land 13 substantially at the center of a mounting part 3 on which the semiconductor package 4 is mounted, and the second check land 9 is drawn out of the mounting part 3 from the second sensor land 7 via a drawer pattern 8. The semiconductor package 4 is mounted to the mounting part 3 so as to face the first sensor land 13 on the second sensor land 7. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a printed wiring board on which a surface mount type semiconductor package such as BGA (Ball Grid Array) or CSP (Chip Size Package) is mounted, and a method for mounting such a semiconductor package.

  Conventionally, in order to realize miniaturization, high density, high performance, and low cost of electronic equipment, a surface mounting method in which a semiconductor element is soldered to a pad on the surface of a printed wiring board has been adopted. In the surface mounting method, a semiconductor package in which a plurality of lead terminals such as SOP (small outline package) and QFP (quad flat package) are arranged at a predetermined pitch is used. In addition, with recent demands for miniaturization and high integration of semiconductor packages, semiconductor packages having a size almost the same as that of semiconductor chips such as BGA (Ball Grid Array) and CSP (Chip Size Package) are likely to be used. Became.

  On the other hand, in the process of surface mounting a semiconductor package on the outer layer of a printed wiring board by reflow soldering, tin-lead eutectic solder is being replaced with lead-free solder in order to reduce the environmental burden, and reflow is accompanied by this. The temperature of the hour is rising. In such a semiconductor package mounting process, the semiconductor package and the printed wiring board are required to have solder heat resistance that can withstand the heating temperature during reflow.

JP 10-335520 A

  For example, if the printed wiring board lacks resistance to the temperature during reflow heating, warpage and swelling occur due to differences in the linear expansion coefficient of the constituent material of the printed wiring board. When the printed wiring board is warped or swollen, as shown in FIG. 6 to FIG. 8, soldering defects such as peeling of the electrode terminals of the semiconductor package from the footprint occur, and the quality of the printed wiring board is deteriorated.

  FIG. 6 shows a state where a solder joint failure with a semiconductor package occurs due to warpage of the printed wiring board, and FIG. 7 shows a solder joint failure with the printed wiring board caused by warpage of the semiconductor package. FIG. 8 shows a state in which a solder joint failure has occurred due to warpage of both the printed wiring board and the semiconductor package.

  In order to prevent such poor soldering, it is desirable to capture and manage the phenomenon of the printed wiring board in the reflow furnace in the reflow process. Conventionally, however, the warping of the printed wiring board in the reflow furnace has occurred during the reflow process. It has been difficult to manage the separation between the electrode and footprint of the semiconductor package due to swelling.

  Therefore, the present invention manages the occurrence of soldering defects such as peeling between the electrodes of the semiconductor package and the footprint of the printed wiring board by causing warping or swelling of the printed wiring board during the reflow process. It is an object of the present invention to provide a printed wiring board and a semiconductor package mounting method in which the mounting quality of the wiring board is improved.

  In order to solve the above-described problems, a printed wiring board according to the present invention has a package in which a plurality of electrode terminals protrudes, and the first of the package is provided in the center of the adhesive surface on which the electrode terminals are formed. And a semiconductor package in which a first check land connected to the first sensor land is provided on a surface opposite to the adhesive surface, and the semiconductor package is mounted. A second sensor land corresponding to the first sensor land in the approximate center of the mounting portion, and a second check for the second sensor land drawn out of the mounting portion through a drawing pattern from the second sensor land A board provided with a land, and the semiconductor package faces the first sensor land on the second sensor land and is mounted on the mounting portion. Those which are.

  The semiconductor package mounting method according to the present invention includes a package in which a plurality of electrode terminals protrudes, and a first sensor land is provided at a substantially center of an adhesive surface on which the electrode terminals of the package are formed. And a semiconductor package provided with a first check land connected to the first sensor land on a surface opposite to the adhesive surface and provided at a substantially center of the mounting portion. The mounting of the substrate provided with the second sensor land corresponding to the sensor land and the second check land drawn out of the mounting portion through the drawing pattern from the second sensor land The tester is connected to the first and second check lands via a cable line, and the substrate on which the semiconductor package is mounted is passed through a reflow furnace. And it performs conduction measurement by the tester.

  According to the printed wiring board and the semiconductor package mounting method of the present invention, when warping or swelling occurs on the substrate or the semiconductor package due to heat during reflow, the first sensor land and the second sensor land are formed. The contact is made between the first check land connected to the first sensor land and the second check land connected to the second sensor land. Therefore, by detecting the continuity of the first and second sensor lands, it can be seen that the substrate or the semiconductor package has warped or swollen, so that the electrode terminal and the mounting portion of the semiconductor package are peeled off. The phenomenon in the reflow furnace can be managed, and the mounting quality of the printed wiring board can be improved.

  Hereinafter, a printed wiring board and a semiconductor package mounting method to which the present invention is applied will be described in detail with reference to the drawings. As shown in FIG. 1, a printed wiring board 1 to which the present invention is applied includes an insulating substrate 2 on which a predetermined wiring pattern is formed and a BGA or CSP mounted on a mounting portion 3 formed on the insulating substrate 2. And a small semiconductor package 4.

  The printed wiring board 1 is mounted such that a wiring pattern and a semiconductor package 4 are mounted on the outer layer of a copper-clad laminate formed by laminating a copper foil on a glass epoxy resin base material by a print etching method using a photo tool, for example. Part 3 is formed. As shown in FIG. 2, the mounting portion 3 has substantially the same size as the semiconductor package 4 and is formed in a rectangular shape. In the mounting portion 3, a plurality of electrode pads 6 corresponding to the bumps 12 provided on the mounting surface of the semiconductor package 4 are arranged in a peripheral portion excluding the central portion. From each electrode pad 6, a wiring pattern whose details are omitted is drawn out of the mounting portion 3 and connected to another wiring pattern formed on the outer layer of the printed wiring board 1. A bump 12 provided on the semiconductor package 4 is soldered by printing solder cream on the electrode pad 6.

  Further, the mounting portion 3 has a second sensor land 7 formed in a substantially central portion in accordance with a first sensor land 13 formed in the approximate center on the mounting surface side of the semiconductor package 4 described later. The second sensor land 7 is connected to a lead pattern 8 drawn out of the mounting portion 3 and is connected to a second check land 9 formed at the tip of the lead pattern 8. . The second sensor land 7 comes into contact with the first sensor land 13 when the insulating substrate 2 or the semiconductor package 4 is warped or swollen in the reflow heating process. 7 is detected, and the first check land 14 connected to the first sensor land 13 is detected, thereby detecting the insulating substrate 2 and the semiconductor. The occurrence of warpage or swelling of the package 4 is discriminated.

  Here, since the second check land 9 drawn out of the mounting portion 3 from the drawing pattern 8 can be provided at any location outside the mounting portion 3, the wiring pattern has a high density and the pattern pitch is narrowed. In the printed wiring board 1 that is required, a degree of freedom in pattern design can be ensured.

  The semiconductor package 4 mounted on the mounting unit 3 is a BGA or CSP, and a plurality of bumps 12 are arranged on the lower surface of the package body 11 as shown in FIG. 3 is an adhesive surface 11a to be soldered. Further, as shown in FIG. 4, the package body 11 has a suction surface 11 b that is attracted to the automatic mounting device when mounted on the mounting portion 3 on the side opposite to the adhesion surface 11 a. The package body 11 is formed in a substantially rectangular shape, and a plurality of bumps 12 are arranged on the peripheral surface except for the central portion on the bonding surface 11a.

  A first sensor land 13 is formed on the adhesive surface 11 a of the package body 11 in a substantially central portion corresponding to the second sensor land 7 provided in the mounting portion 3. The first sensor land 13 is connected to the first check land 14 formed on the suction surface 11b through a connection pattern that omits details or through a connection line that penetrates through the package body 11. Has been.

  The first sensor land 13 is formed lower than the bump 12, and is formed in the mounting portion 3 when the semiconductor package 4 is mounted without warping or swelling on the insulating substrate 2 or the package body 11. There is no contact with the formed second sensor land 7. However, when the insulating substrate 2 or the package body 11 is warped or swollen in the reflow process or the like, the first sensor land 13 and the second sensor land 7 come into contact with each other. As a result, the first check land 14 connected to the first sensor land 13 and the second check land 9 connected to the second sensor land 7 are electrically connected. . Therefore, by measuring the continuity between the first and second check lands 14 and 9, it is possible to determine whether the insulating substrate 2 or the package body 11 has warped or swollen.

  Such conduction detection between the first and second check lands 14 and 9 is performed in a process of reflow soldering the semiconductor package 4 to the mounting portion 3 of the insulating substrate 2. Therefore, according to the present invention, it is possible to manage warping and swelling of the insulating substrate 2 and the semiconductor package 4 in the reflow furnace, and it is possible to prevent a reduction in mounting quality. Hereinafter, the mounting process of the semiconductor package 4 will be described in detail.

  First, in the insulating substrate 2, a wiring pattern and a mounting portion 3 are formed on a copper clad laminate formed by laminating a copper foil on a glass epoxy resin by a print etching method using a photo tool. As a result, the second sensor land 7 is formed substantially at the center corresponding to the electrode pad 6 to which the bump 12 of the semiconductor package 4 is connected to the mounting portion 3 and the first sensor land 13, and the second sensor A lead pattern 8 that is drawn out from the mounting land 3 to the outside of the mounting portion 3 and a second check land 9 that is formed at the tip of the lead pattern 8 are formed.

  Next, after the cream solder is printed on the mounting portion 3, the semiconductor package 4 is mounted on the mounting portion 3 by the suction surface 11 b of the package body 11 being sucked by the automatic component mounter. As a result, the bumps 12 formed on the bonding surface 11a of the package body 11 and the electrode pads 6 formed on the mounting portion 3 are brought into contact, and the first sensor land 13 and the second sensor land 7 are brought into contact with each other. They are opposed to each other with a predetermined gap.

  Next, cable lines 15 are connected to the first check land 14 formed on the suction surface 11b of the semiconductor package 4 and the second check land 9 formed on the outer layer of the insulating substrate. A tester 16 is connected to the distal end of the cable line 15 and can be detected when the first and second sensor lands 13 and 7 are brought into contact with each other to establish conduction. Thereafter, the insulating substrate 2 on which the semiconductor package 4 is mounted is passed through a reflow furnace and reflow heated at a predetermined temperature for a predetermined time, whereby the semiconductor package 4 is reflow soldered to the mounting portion 3.

  At this time, if the insulating substrate 2 or the package body 11 is warped or swollen due to heat during reflow, the first sensor land 13 and the second sensor land 7 come into contact with each other as shown in FIG. Therefore, the first check land 14 is connected via the connection pattern connected to the first sensor land 13, and the second check land is set via the lead pattern 8 connected to the second sensor land 7. 9 is conducted. Therefore, the contact of the first and second sensor lands 13 and 7 can be detected by the tester 16 connected to the first and second check lands 14 and 9.

  When the contact of the first and second sensor lands 13 and 7 by the tester 16 is detected, it can be seen that the insulating substrate 2 or the package body 11 of the semiconductor package 4 is warped or swollen. That is, as shown in FIG. 1, when the insulating substrate 2 and the package body 11 are not warped or swollen, the first and second sensor lands 13 and 7 are opposed to each other with a predetermined gap. The tester 16 does not detect continuity. Therefore, when continuity is detected by the tester 16, it can be seen that either the insulating substrate 2 or the package body 11 or both are warped or swollen.

  As described above, in the printed wiring board 1 in which warpage or the like occurs in the insulating substrate 2 or the package body 11, soldering defects such as separation of the bumps 12 of the semiconductor package 4 from the electrode pads 6 of the mounting portion 3 occur. Therefore, the printed wiring board 1 is removed from the production line. On the other hand, the printed wiring board 1 in which the continuity is not detected by the tester 16 is not subjected to soldering failure, and therefore is subjected to the next manufacturing process after the cable wire 15 is removed.

  As described above, according to the mounting method of the printed wiring board 1 and the semiconductor package 4 to which the present invention is applied, the insulating substrate 2 and the semiconductor package 4 lack resistance to temperature at the time of reflow heating, and warp and bulge occur. In addition, a phenomenon in the reflow furnace such as separation of the bumps 12 of the semiconductor package 4 and the electrode pads 6 of the mounting portion 3 can be managed, and the mounting quality of the printed wiring board can be improved.

It is sectional drawing which shows the printed wiring board to which this invention was applied. It is a top view which shows the mounting part in which a semiconductor package is mounted. It is a top view which shows the adhesion surface of a semiconductor package. It is a top view which shows the adsorption surface of a semiconductor package. It is sectional drawing which shows the mounting method of the semiconductor package to which this invention was applied. It is sectional drawing which shows the printed wiring board which the curvature generate | occur | produced in the insulated substrate. It is sectional drawing which shows the printed wiring board which the curvature generate | occur | produced in the semiconductor package. It is sectional drawing which shows the printed wiring board which the curvature generate | occur | produced in the insulated substrate and the semiconductor package.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Printed wiring board, 2 Insulating board, 3 Mounting part, 4 Semiconductor package, 6 Electrode pad, 7 2nd sensor land, 8 Drawing pattern, 9 2nd check land, 11 Package body, 12 Bump, 13th 1 sensor land, 14 first check land, 15 cable lines, 16 tester

Claims (2)

A package having a plurality of electrode terminals protruding therefrom, the first sensor land being provided substantially at the center of the bonding surface of the package on which the electrode terminals are formed, and on the surface opposite to the bonding surface; A semiconductor package provided with a first check land connected to the first sensor land;
A second sensor land corresponding to the first sensor land is provided in the approximate center of the mounting portion on which the semiconductor package is mounted, and the second sensor land is pulled out of the mounting portion through a drawing pattern. And a substrate provided with a second check land,
A printed wiring board in which the semiconductor package is mounted on the mounting portion with the first sensor land facing the second sensor land. A package having a plurality of electrode terminals protruding therefrom, the first sensor land being provided substantially at the center of the bonding surface of the package on which the electrode terminals are formed, and on the surface opposite to the bonding surface; A semiconductor package provided with a first check land connected to the first sensor land is provided with a second sensor land corresponding to the first sensor land provided substantially at the center of the mounting portion. , Mounted on the mounting portion of the substrate provided with a second check land drawn out of the mounting portion through a drawing pattern from the second sensor land,
A tester is connected to the first and second check lands via a cable line,
A method for mounting a semiconductor package, wherein the substrate on which the semiconductor package is mounted is passed through a reflow furnace, and the continuity is measured by the tester.

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