JP2006526893A - サーマルバジェットを低減する接合およびケイ化物の形成 - Google Patents
サーマルバジェットを低減する接合およびケイ化物の形成 Download PDFInfo
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- JP2006526893A JP2006526893A JP2006508444A JP2006508444A JP2006526893A JP 2006526893 A JP2006526893 A JP 2006526893A JP 2006508444 A JP2006508444 A JP 2006508444A JP 2006508444 A JP2006508444 A JP 2006508444A JP 2006526893 A JP2006526893 A JP 2006526893A
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- silicide layer
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- 229910021332 silicide Inorganic materials 0.000 title claims abstract description 72
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 title claims abstract description 68
- 230000015572 biosynthetic process Effects 0.000 title description 11
- 238000000034 method Methods 0.000 claims abstract description 99
- 229910052751 metal Inorganic materials 0.000 claims abstract description 82
- 239000002184 metal Substances 0.000 claims abstract description 82
- 238000002513 implantation Methods 0.000 claims abstract description 38
- 239000002019 doping agent Substances 0.000 claims abstract description 33
- 239000004065 semiconductor Substances 0.000 claims abstract description 30
- 239000012535 impurity Substances 0.000 claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 15
- 238000000137 annealing Methods 0.000 claims abstract description 14
- 238000010884 ion-beam technique Methods 0.000 claims description 9
- 238000004519 manufacturing process Methods 0.000 claims description 9
- 238000005280 amorphization Methods 0.000 claims description 5
- 238000002347 injection Methods 0.000 claims description 4
- 239000007924 injection Substances 0.000 claims description 4
- 239000007790 solid phase Substances 0.000 claims description 4
- 150000002739 metals Chemical class 0.000 claims description 2
- -1 silicide compound Chemical class 0.000 claims 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 230000004913 activation Effects 0.000 description 4
- 238000004377 microelectronic Methods 0.000 description 4
- 125000006850 spacer group Chemical group 0.000 description 4
- 230000002411 adverse Effects 0.000 description 3
- 238000001465 metallisation Methods 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 230000000873 masking effect Effects 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- 230000009849 deactivation Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000002779 inactivation Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 238000004151 rapid thermal annealing Methods 0.000 description 1
- 150000003377 silicon compounds Chemical class 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
- H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
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- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- High Energy & Nuclear Physics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Electrodes Of Semiconductors (AREA)
- Thin Film Transistor (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
Description
7 ポリSi層部分
8 スペーサ
10 ゲート酸化物層
11 接合領域
12a,12b,13,14 金属ケイ化物層
15 絶縁層
Claims (14)
- 半導体基板上に金属ケイ化物層を形成するステップを含む半導体デバイス製造方法であって、
− 前記半導体基板が少なくともドーパント領域を備え;
− 前記ドーパント領域が極浅接合領域を備え;
− 前記方法が第1のステップとして前記ドーパント領域を形成する少なくとも1つの不純物注入処理(IB_dopant)を含み;
− 前記方法が、第2のステップとして前記ドーパント領域上に前記金属ケイ化物層を形成する少なくとも1つの金属注入処理(IB_metal)を含むものであり;
前記方法が、前記第1および前記第2のステップの後に、
− 第3のステップとして、前記ドーパント領域の活性化と前記金属ケイ化物層の形成を同時に行う低温アニール処理を実行するよう構成される、
ことを特徴とする半導体デバイス製造方法。 - 前記方法が、前記第1のステップより先に初期処理として少なくとも前記ドーパント領域および前記伝導領域に対し実行されるイオンビーム(IB_pre)による事前アモルファス化処理を含む、請求項1に記載の方法。
- 前記少なくとも1つの不純物注入処理(IB_dopant)が、第1の不純物を用いて第1の伝導型の接合領域を生成する第1の不純物注入処理を含む、請求項1または2に記載の方法。
- 前記少なくとも1つの不純物注入処理(IB_dopant)が、第2の不純物を用いて第2の伝導型の接合領域を生成する第2の不純物注入処理を含む、請求項3に記載の方法。
- 前記少なくとも1つの不純物注入処理(IB_dopant)が、前記第1の不純物を用いて不純物レベルの異なる前記伝導型の更なる接合領域を生成する第2の不純物注入処理を含む、請求項3に記載の方法。
- 前記金属ケイ化物層を形成する前記少なくとも1つの金属注入処理(IB_metal)が、第1のマスクおよび第1の金属を用いて、前記第1の伝導型の前記接合領域上に第1のケイ化物層を生成する第1の金属注入処理を含む、請求項3、4または5に記載の方法。
- 前記金属ケイ化物層を形成する前記少なくとも1つの金属注入処理(IB_metal)が、第2のマスクと第2の金属を用いて、前記第2の伝導型の前記接合領域上に第2のケイ化物層を生成する第2の金属注入処理を含む、請求項3、4または5に記載の方法。
- 前記金属ケイ化物層を形成する前記少なくとも1つの金属注入処理(IB_metal)が、更なるマスクおよび更なる金属を用いて、前記伝導領域または前記ゲート伝導領域の上に更なるケイ化物層を生成する更なる金属注入処理を含む、請求項3、4または5に記載の方法。
- 前記方法が、前記第2のステップにおいて、伝導層の上に前記金属ケイ化物層を形成する前記少なくとも1つの金属注入処理(IB_metal)を含む、先行する請求項のいずれかに記載の方法。
- 前記方法が、前記第2のステップにおいて、ゲートのゲート伝導領域の上に前記金属ケイ化物層を形成する前記少なくとも1つの金属注入処理(IB_metal)を含む、先行する請求項のいずれかに記載の方法。
- 前記低アニール処理が固相エピタキシャル再成長処理である、先行する請求項のいずれかに記載の方法。
- 前記第1、第2または更なる金属の各々が、前記低温アニール処理中に金属シリサイド化合物を形成可能な、先行する請求項のいずれかに記載の方法。
- 前記接合領域内に配置された別の構造要素に近接する金属ケイ化物層、または前記別の構造要素から離れた前記接合領域内の遠隔金属ケイ化物層、および前記接合領域外の前記伝導領域内の単一金属ケイ化物層の内少なくとも1つとして前記金属ケイ化物層を形成する、先行する請求項のいずれかに記載の方法。
- 少なくともドーパント領域を備える半導体基板上の半導体デバイスであって、前記ドーパント領域は極浅接合領域を備え、先行する請求項のいずれかによる金属ケイ化物層形成方法により前記半導体デバイスを製造する、半導体デバイス。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP03101599 | 2003-06-03 | ||
PCT/IB2004/050753 WO2004107421A1 (en) | 2003-06-03 | 2004-05-19 | Formation of junctions and silicides with reduced thermal budget |
Publications (1)
Publication Number | Publication Date |
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JP2006526893A true JP2006526893A (ja) | 2006-11-24 |
Family
ID=33484012
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006508444A Pending JP2006526893A (ja) | 2003-06-03 | 2004-05-19 | サーマルバジェットを低減する接合およびケイ化物の形成 |
Country Status (7)
Country | Link |
---|---|
US (1) | US20060141728A1 (ja) |
EP (1) | EP1634325A1 (ja) |
JP (1) | JP2006526893A (ja) |
KR (1) | KR20060017525A (ja) |
CN (1) | CN1799125B (ja) |
TW (1) | TW200507117A (ja) |
WO (1) | WO2004107421A1 (ja) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8860174B2 (en) | 2006-05-11 | 2014-10-14 | Micron Technology, Inc. | Recessed antifuse structures and methods of making the same |
US20070262395A1 (en) | 2006-05-11 | 2007-11-15 | Gibbons Jasper S | Memory cell access devices and methods of making the same |
US8008144B2 (en) | 2006-05-11 | 2011-08-30 | Micron Technology, Inc. | Dual work function recessed access device and methods of forming |
JP2009277994A (ja) * | 2008-05-16 | 2009-11-26 | Tohoku Univ | コンタクト形成方法、半導体装置の製造方法および半導体装置 |
US7824986B2 (en) | 2008-11-05 | 2010-11-02 | Micron Technology, Inc. | Methods of forming a plurality of transistor gates, and methods of forming a plurality of transistor gates having at least two different work functions |
KR101206500B1 (ko) * | 2010-02-26 | 2012-11-29 | 에스케이하이닉스 주식회사 | 반도체 장치의 트랜지스터 제조 방법 |
US9076730B2 (en) * | 2012-12-12 | 2015-07-07 | Fudan University | Metal silicide thin film, ultra-shallow junctions, semiconductor device and method of making |
CN103021865B (zh) * | 2012-12-12 | 2016-08-03 | 复旦大学 | 金属硅化物薄膜和超浅结的制作方法 |
US9202693B2 (en) * | 2013-01-28 | 2015-12-01 | Taiwan Semiconductor Manufacturing Co., Ltd. | Fabrication of ultra-shallow junctions |
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JPH02170528A (ja) * | 1988-12-23 | 1990-07-02 | Toshiba Corp | 半導体装置の製造方法 |
JPH04357828A (ja) * | 1991-06-04 | 1992-12-10 | Sharp Corp | 半導体装置の製造方法 |
JPH0817761A (ja) * | 1994-06-30 | 1996-01-19 | Fujitsu Ltd | 半導体装置及びその製造方法 |
JPH08125182A (ja) * | 1994-10-28 | 1996-05-17 | Nec Corp | 半導体装置の製造方法 |
JPH09121055A (ja) * | 1995-07-26 | 1997-05-06 | Lg Semicon Co Ltd | 半導体素子の製造方法 |
JP2001237422A (ja) * | 1999-12-14 | 2001-08-31 | Sanyo Electric Co Ltd | 半導体装置およびその製造方法 |
JP2002141504A (ja) * | 2000-07-12 | 2002-05-17 | Internatl Business Mach Corp <Ibm> | 極浅い接合の形成方法 |
US6534402B1 (en) * | 2001-11-01 | 2003-03-18 | Winbond Electronics Corp. | Method of fabricating self-aligned silicide |
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JP3833903B2 (ja) * | 2000-07-11 | 2006-10-18 | 株式会社東芝 | 半導体装置の製造方法 |
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JP2005101196A (ja) * | 2003-09-24 | 2005-04-14 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
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-
2004
- 2004-05-19 CN CN2004800153694A patent/CN1799125B/zh not_active Expired - Lifetime
- 2004-05-19 US US10/559,069 patent/US20060141728A1/en not_active Abandoned
- 2004-05-19 JP JP2006508444A patent/JP2006526893A/ja active Pending
- 2004-05-19 WO PCT/IB2004/050753 patent/WO2004107421A1/en active Application Filing
- 2004-05-19 KR KR1020057023012A patent/KR20060017525A/ko not_active Application Discontinuation
- 2004-05-19 EP EP04733884A patent/EP1634325A1/en not_active Withdrawn
- 2004-05-31 TW TW093115533A patent/TW200507117A/zh unknown
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH02170528A (ja) * | 1988-12-23 | 1990-07-02 | Toshiba Corp | 半導体装置の製造方法 |
JPH04357828A (ja) * | 1991-06-04 | 1992-12-10 | Sharp Corp | 半導体装置の製造方法 |
JPH0817761A (ja) * | 1994-06-30 | 1996-01-19 | Fujitsu Ltd | 半導体装置及びその製造方法 |
JPH08125182A (ja) * | 1994-10-28 | 1996-05-17 | Nec Corp | 半導体装置の製造方法 |
JPH09121055A (ja) * | 1995-07-26 | 1997-05-06 | Lg Semicon Co Ltd | 半導体素子の製造方法 |
JP2001237422A (ja) * | 1999-12-14 | 2001-08-31 | Sanyo Electric Co Ltd | 半導体装置およびその製造方法 |
JP2002141504A (ja) * | 2000-07-12 | 2002-05-17 | Internatl Business Mach Corp <Ibm> | 極浅い接合の形成方法 |
US6534402B1 (en) * | 2001-11-01 | 2003-03-18 | Winbond Electronics Corp. | Method of fabricating self-aligned silicide |
Also Published As
Publication number | Publication date |
---|---|
CN1799125B (zh) | 2011-04-06 |
WO2004107421A1 (en) | 2004-12-09 |
CN1799125A (zh) | 2006-07-05 |
TW200507117A (en) | 2005-02-16 |
US20060141728A1 (en) | 2006-06-29 |
KR20060017525A (ko) | 2006-02-23 |
EP1634325A1 (en) | 2006-03-15 |
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