JP2006510998A - データ処理システム内の処理アクティビティのマスキング - Google Patents
データ処理システム内の処理アクティビティのマスキング Download PDFInfo
- Publication number
- JP2006510998A JP2006510998A JP2005502329A JP2005502329A JP2006510998A JP 2006510998 A JP2006510998 A JP 2006510998A JP 2005502329 A JP2005502329 A JP 2005502329A JP 2005502329 A JP2005502329 A JP 2005502329A JP 2006510998 A JP2006510998 A JP 2006510998A
- Authority
- JP
- Japan
- Prior art keywords
- execution mechanism
- data processing
- execution
- instruction
- processing instructions
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
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Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
- G06F21/755—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation with measures against power attack
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
- G06F9/30058—Conditional branch instructions
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
- G06F9/30189—Instruction operation extension or modification according to execution mode, e.g. mode flag
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3842—Speculative instruction execution
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
- G06F9/3875—Pipelining a single stage, e.g. superpipelining
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09C—CIPHERING OR DECIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHER PURPOSES INVOLVING THE NEED FOR SECRECY
- G09C1/00—Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
- G06F2207/7219—Countermeasures against side channel or fault attacks
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2221/00—Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/21—Indexing scheme relating to G06F21/00 and subgroups addressing additional information or applications relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/2123—Dummy operation
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Mathematical Physics (AREA)
- Computer Security & Cryptography (AREA)
- Executing Machine-Instructions (AREA)
- Storage Device Security (AREA)
- Advance Control (AREA)
- Complex Calculations (AREA)
- Retry When Errors Occur (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GBGB0229068.2A GB0229068D0 (en) | 2002-12-12 | 2002-12-12 | Instruction timing control within a data processing system |
| GBGB0302650.7A GB0302650D0 (en) | 2002-12-12 | 2003-02-05 | Processing activity masking in a data processing system |
| GBGB0302646.5A GB0302646D0 (en) | 2002-12-12 | 2003-02-05 | Processing activity masking in a data processing system |
| GB0307823A GB2396229B (en) | 2002-12-12 | 2003-04-04 | Processing activity masking in a data processing system |
| PCT/GB2003/004313 WO2004053684A2 (en) | 2002-12-12 | 2003-10-06 | Processing activity masking in a data processing system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2006510998A true JP2006510998A (ja) | 2006-03-30 |
Family
ID=32512449
Family Applications (4)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005502329A Pending JP2006510998A (ja) | 2002-12-12 | 2003-10-06 | データ処理システム内の処理アクティビティのマスキング |
| JP2005502327A Expired - Lifetime JP4619288B2 (ja) | 2002-12-12 | 2003-10-06 | データ処理システムにおける処理動作マスキング |
| JP2005502326A Expired - Fee Related JP4511461B2 (ja) | 2002-12-12 | 2003-10-06 | データ処理システムでの処理動作マスキング |
| JP2005502328A Expired - Lifetime JP3848965B2 (ja) | 2002-12-12 | 2003-10-06 | データ処理装置内の命令タイミング制御 |
Family Applications After (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005502327A Expired - Lifetime JP4619288B2 (ja) | 2002-12-12 | 2003-10-06 | データ処理システムにおける処理動作マスキング |
| JP2005502326A Expired - Fee Related JP4511461B2 (ja) | 2002-12-12 | 2003-10-06 | データ処理システムでの処理動作マスキング |
| JP2005502328A Expired - Lifetime JP3848965B2 (ja) | 2002-12-12 | 2003-10-06 | データ処理装置内の命令タイミング制御 |
Country Status (4)
| Country | Link |
|---|---|
| US (4) | US7134003B2 (enExample) |
| JP (4) | JP2006510998A (enExample) |
| GB (3) | GB2403572B (enExample) |
| WO (4) | WO2004053683A2 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008146384A (ja) * | 2006-12-11 | 2008-06-26 | Nec Electronics Corp | 情報処理装置及び命令フェッチ制御方法 |
Families Citing this family (52)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006510998A (ja) * | 2002-12-12 | 2006-03-30 | エイアールエム リミテッド | データ処理システム内の処理アクティビティのマスキング |
| US8296577B2 (en) * | 2004-06-08 | 2012-10-23 | Hrl Laboratories, Llc | Cryptographic bus architecture for the prevention of differential power analysis |
| US8391410B2 (en) * | 2004-07-29 | 2013-03-05 | Qualcomm Incorporated | Methods and apparatus for configuring a pilot symbol in a wireless communication system |
| US9246728B2 (en) | 2004-07-29 | 2016-01-26 | Qualcomm Incorporated | System and method for frequency diversity |
| US20070081484A1 (en) * | 2004-07-29 | 2007-04-12 | Wang Michael M | Methods and apparatus for transmitting a frame structure in a wireless communication system |
| KR100925911B1 (ko) * | 2004-07-29 | 2009-11-09 | 콸콤 인코포레이티드 | 다이버시티 인터리빙을 위한 시스템 및 방법 |
| US20080317142A1 (en) * | 2005-07-29 | 2008-12-25 | Qualcomm Incorporated | System and method for frequency diversity |
| FR2875657B1 (fr) * | 2004-09-22 | 2006-12-15 | Trusted Logic Sa | Procede de securisation de traitements cryptographiques par le biais de leurres. |
| JP4702004B2 (ja) * | 2004-12-21 | 2011-06-15 | 株式会社デンソー | マイクロコンピュータ |
| US7725694B2 (en) * | 2004-12-21 | 2010-05-25 | Denso Corporation | Processor, microcomputer and method for controlling program of microcomputer |
| JP4889235B2 (ja) * | 2005-04-27 | 2012-03-07 | 株式会社デンソー | プログラム制御プロセッサ |
| WO2006115219A1 (ja) * | 2005-04-21 | 2006-11-02 | Matsushita Electric Industrial Co., Ltd. | プログラム難読化装置及び難読化方法 |
| US7769983B2 (en) * | 2005-05-18 | 2010-08-03 | Qualcomm Incorporated | Caching instructions for a multiple-state processor |
| US9391751B2 (en) * | 2005-07-29 | 2016-07-12 | Qualcomm Incorporated | System and method for frequency diversity |
| US9042212B2 (en) | 2005-07-29 | 2015-05-26 | Qualcomm Incorporated | Method and apparatus for communicating network identifiers in a communication system |
| EP1920376A2 (en) * | 2005-08-24 | 2008-05-14 | Nxp B.V. | Processor hardware and software |
| US8074059B2 (en) * | 2005-09-02 | 2011-12-06 | Binl ATE, LLC | System and method for performing deterministic processing |
| JP4783104B2 (ja) * | 2005-09-29 | 2011-09-28 | 株式会社東芝 | 暗号化/復号装置 |
| EP1783648A1 (fr) * | 2005-10-10 | 2007-05-09 | Nagracard S.A. | Microprocesseur sécurisé avec vérification des instructions |
| JP4882625B2 (ja) * | 2005-12-26 | 2012-02-22 | 株式会社デンソー | マイクロコンピュータ |
| US7774616B2 (en) * | 2006-06-09 | 2010-08-10 | International Business Machines Corporation | Masking a boot sequence by providing a dummy processor |
| US20070288738A1 (en) * | 2006-06-09 | 2007-12-13 | Dale Jason N | System and method for selecting a random processor to boot on a multiprocessor system |
| US20070288761A1 (en) * | 2006-06-09 | 2007-12-13 | Dale Jason N | System and method for booting a multiprocessor device based on selection of encryption keys to be provided to processors |
| US7594104B2 (en) * | 2006-06-09 | 2009-09-22 | International Business Machines Corporation | System and method for masking a hardware boot sequence |
| US20070288740A1 (en) * | 2006-06-09 | 2007-12-13 | Dale Jason N | System and method for secure boot across a plurality of processors |
| US20070288739A1 (en) * | 2006-06-09 | 2007-12-13 | Dale Jason N | System and method for masking a boot sequence by running different code on each processor |
| US7711927B2 (en) * | 2007-03-14 | 2010-05-04 | Qualcomm Incorporated | System, method and software to preload instructions from an instruction set other than one currently executing |
| JP5146156B2 (ja) * | 2008-06-30 | 2013-02-20 | 富士通株式会社 | 演算処理装置 |
| WO2010116474A1 (ja) | 2009-03-30 | 2010-10-14 | 富士通株式会社 | 光伝送システム及び光伝送方法 |
| EP2367102B1 (en) * | 2010-02-11 | 2013-04-10 | Nxp B.V. | Computer processor and method with increased security properties |
| GB2480296A (en) * | 2010-05-12 | 2011-11-16 | Nds Ltd | Processor with differential power analysis attack protection |
| US8525545B1 (en) | 2011-08-26 | 2013-09-03 | Lockheed Martin Corporation | Power isolation during sensitive operations |
| US8624624B1 (en) | 2011-08-26 | 2014-01-07 | Lockheed Martin Corporation | Power isolation during sensitive operations |
| US8694862B2 (en) | 2012-04-20 | 2014-04-08 | Arm Limited | Data processing apparatus using implicit data storage data storage and method of implicit data storage |
| JP5926655B2 (ja) * | 2012-08-30 | 2016-05-25 | ルネサスエレクトロニクス株式会社 | 中央処理装置および演算装置 |
| US20150161401A1 (en) * | 2013-12-10 | 2015-06-11 | Samsung Electronics Co., Ltd. | Processor having a variable pipeline, and system-on-chip |
| US9569616B2 (en) | 2013-12-12 | 2017-02-14 | Cryptography Research, Inc. | Gate-level masking |
| US10120681B2 (en) | 2014-03-14 | 2018-11-06 | International Business Machines Corporation | Compare and delay instructions |
| US9454370B2 (en) | 2014-03-14 | 2016-09-27 | International Business Machines Corporation | Conditional transaction end instruction |
| US9558032B2 (en) | 2014-03-14 | 2017-01-31 | International Business Machines Corporation | Conditional instruction end operation |
| US9305167B2 (en) * | 2014-05-21 | 2016-04-05 | Bitdefender IPR Management Ltd. | Hardware-enabled prevention of code reuse attacks |
| US10049211B1 (en) * | 2014-07-16 | 2018-08-14 | Bitdefender IPR Management Ltd. | Hardware-accelerated prevention of code reuse attacks |
| KR102335203B1 (ko) * | 2015-08-10 | 2021-12-07 | 삼성전자주식회사 | 부채널 공격에 대응하는 전자 장치 |
| US10210350B2 (en) * | 2015-08-10 | 2019-02-19 | Samsung Electronics Co., Ltd. | Electronic device against side channel attacks |
| US10459477B2 (en) | 2017-04-19 | 2019-10-29 | Seagate Technology Llc | Computing system with power variation attack countermeasures |
| US10200192B2 (en) | 2017-04-19 | 2019-02-05 | Seagate Technology Llc | Secure execution environment clock frequency hopping |
| US10270586B2 (en) | 2017-04-25 | 2019-04-23 | Seagate Technology Llc | Random time generated interrupts in a cryptographic hardware pipeline circuit |
| US10771236B2 (en) | 2017-05-03 | 2020-09-08 | Seagate Technology Llc | Defending against a side-channel information attack in a data storage device |
| US10511433B2 (en) | 2017-05-03 | 2019-12-17 | Seagate Technology Llc | Timing attack protection in a cryptographic processing system |
| FR3071121B1 (fr) * | 2017-09-14 | 2020-09-18 | Commissariat Energie Atomique | Procede d'execution d'un code binaire d'une fonction securisee par un microprocesseur |
| US11308239B2 (en) | 2018-03-30 | 2022-04-19 | Seagate Technology Llc | Jitter attack protection circuit |
| JP7568130B2 (ja) * | 2021-10-18 | 2024-10-16 | 日本電信電話株式会社 | 解析機能付与方法、解析機能付与装置及び解析機能付与プログラム |
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| US4064558A (en) * | 1976-10-22 | 1977-12-20 | General Electric Company | Method and apparatus for randomizing memory site usage |
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| JPS59739A (ja) | 1982-06-28 | 1984-01-05 | Fujitsu Ltd | マイクロプログラム処理装置における時間保障方式 |
| JPS595354A (ja) | 1982-06-30 | 1984-01-12 | Fujitsu Ltd | デ−タ処理装置 |
| JP2562838B2 (ja) * | 1989-02-10 | 1996-12-11 | 富士通株式会社 | プロセッサ及びストアバッファ制御方法 |
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| GB2282245B (en) * | 1993-09-23 | 1998-04-15 | Advanced Risc Mach Ltd | Execution of data processing instructions |
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| DE10101956A1 (de) * | 2001-01-17 | 2002-07-25 | Infineon Technologies Ag | Verfahren zur Erhöhung der Sicherheit einer CPU |
| JP2006510998A (ja) * | 2002-12-12 | 2006-03-30 | エイアールエム リミテッド | データ処理システム内の処理アクティビティのマスキング |
-
2003
- 2003-10-06 JP JP2005502329A patent/JP2006510998A/ja active Pending
- 2003-10-06 WO PCT/GB2003/004256 patent/WO2004053683A2/en not_active Ceased
- 2003-10-06 WO PCT/GB2003/004313 patent/WO2004053684A2/en not_active Ceased
- 2003-10-06 US US10/512,093 patent/US7134003B2/en not_active Expired - Lifetime
- 2003-10-06 GB GB0423310A patent/GB2403572B/en not_active Expired - Lifetime
- 2003-10-06 JP JP2005502327A patent/JP4619288B2/ja not_active Expired - Lifetime
- 2003-10-06 US US10/527,812 patent/US20060117167A1/en not_active Abandoned
- 2003-10-06 WO PCT/GB2003/004304 patent/WO2004053685A1/en not_active Ceased
- 2003-10-06 GB GB0502061A patent/GB2406943B/en not_active Expired - Fee Related
- 2003-10-06 JP JP2005502326A patent/JP4511461B2/ja not_active Expired - Fee Related
- 2003-10-06 WO PCT/GB2003/004261 patent/WO2004053662A2/en not_active Ceased
- 2003-10-06 US US10/527,575 patent/US7313677B2/en not_active Expired - Lifetime
- 2003-10-06 JP JP2005502328A patent/JP3848965B2/ja not_active Expired - Lifetime
- 2003-10-06 GB GB0501017A patent/GB2406684B/en not_active Expired - Lifetime
- 2003-10-06 US US10/527,960 patent/US7426629B2/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008146384A (ja) * | 2006-12-11 | 2008-06-26 | Nec Electronics Corp | 情報処理装置及び命令フェッチ制御方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| GB0423310D0 (en) | 2004-11-24 |
| WO2004053685A1 (en) | 2004-06-24 |
| GB2403572A (en) | 2005-01-05 |
| GB2406943B (en) | 2005-10-05 |
| GB2406943A (en) | 2005-04-13 |
| JP2006522375A (ja) | 2006-09-28 |
| WO2004053662A2 (en) | 2004-06-24 |
| US7134003B2 (en) | 2006-11-07 |
| US20060155962A1 (en) | 2006-07-13 |
| GB0501017D0 (en) | 2005-02-23 |
| WO2004053683A3 (en) | 2004-08-05 |
| GB2403572B (en) | 2005-11-09 |
| JP3848965B2 (ja) | 2006-11-22 |
| JP2006510126A (ja) | 2006-03-23 |
| US20050289331A1 (en) | 2005-12-29 |
| US20060036833A1 (en) | 2006-02-16 |
| WO2004053684A3 (en) | 2004-08-12 |
| JP4511461B2 (ja) | 2010-07-28 |
| GB2406684A (en) | 2005-04-06 |
| US20060117167A1 (en) | 2006-06-01 |
| US7313677B2 (en) | 2007-12-25 |
| JP4619288B2 (ja) | 2011-01-26 |
| GB0502061D0 (en) | 2005-03-09 |
| WO2004053684A2 (en) | 2004-06-24 |
| GB2406684B (en) | 2005-08-24 |
| WO2004053683A2 (en) | 2004-06-24 |
| JP2006510127A (ja) | 2006-03-23 |
| US7426629B2 (en) | 2008-09-16 |
| WO2004053662A3 (en) | 2004-08-12 |
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