JP2006503472A - データコンバータ - Google Patents
データコンバータ Download PDFInfo
- Publication number
- JP2006503472A JP2006503472A JP2004544545A JP2004544545A JP2006503472A JP 2006503472 A JP2006503472 A JP 2006503472A JP 2004544545 A JP2004544545 A JP 2004544545A JP 2004544545 A JP2004544545 A JP 2004544545A JP 2006503472 A JP2006503472 A JP 2006503472A
- Authority
- JP
- Japan
- Prior art keywords
- pass filter
- frequency
- discrete
- data converter
- low
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
- H03M7/3002—Conversion to or from differential modulation
- H03M7/3004—Digital delta-sigma modulation
- H03M7/3015—Structural details of digital delta-sigma modulators
- H03M7/3031—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path
- H03M7/3033—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs
- H03M7/3035—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs with provisions for rendering the modulator inherently stable, e.g. by restricting the swing within the loop, by removing part of the zeroes using local feedback loops, by positioning zeroes outside the unit circle causing the modulator to operate in a chaotic regime
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
- H03M7/3002—Conversion to or from differential modulation
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Holo Graphy (AREA)
- Optical Communication System (AREA)
- Surgical Instruments (AREA)
- Amplifiers (AREA)
Abstract
Description
Claims (4)
- 特定のサンプリング周波数で動作するシグマデルタ変調器を有するデータコンバータであって、前記シグマデルタ変調器は、フィードバックループ内に、コンパレータと、離散時間ローパスフィルタと、量子化器とを、この順に有し、前記コンパレータは前記量子化器の出力を、変換されるべき入力信号と比較する、データコンバータにおいて、前記シグマデルタ変調器のアイドル発振周波数を低下させるように、前記離散時間ローパスフィルタが、前記サンプリング周波数の少なくとも4分の1未満である周波数において、正の群遅延を有する180°位相遅延を持つことを特徴とする、データコンバータ。
- 前記離散時間ローパスフィルタの伝達関数が、自身の複素z平面において、該平面の単位円の点(1;0)に又はこの近傍における複数の極と、前記シグマデルタ変調器のアイドル発振周波数を低下させる、該平面の正の実軸上の0.20と0.92との間の値における付加的な極とを有することを特徴とする、請求項1に記載のデータコンバータ。
- 前記離散時間ローパスフィルタの前記伝達関数が、前記離散時間ローパスフィルタの零点の数を少なくとも2つ上回る複数の極を有する、請求項2に記載のデータコンバータ。
- 前記離散時間ローパスフィルタは、縦続の積分器と、係数器を介して前記積分器の出力を総和して前記離散時間ローパスフィルタの出力とする総和手段と、前記複素z平面の実軸上の前記付加的な極を生じる、前記縦続の積分器の一番目のものと直列に位置決めされている1次のローパスフィルタ部とを有することを特徴とする、請求項3に記載のデータコンバータ。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP02079337 | 2002-10-18 | ||
PCT/IB2003/004220 WO2004036758A1 (en) | 2002-10-18 | 2003-09-22 | Data converter |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2006503472A true JP2006503472A (ja) | 2006-01-26 |
Family
ID=32103961
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004544545A Ceased JP2006503472A (ja) | 2002-10-18 | 2003-09-22 | データコンバータ |
Country Status (10)
Country | Link |
---|---|
US (1) | US7034726B2 (ja) |
EP (1) | EP1556953B1 (ja) |
JP (1) | JP2006503472A (ja) |
KR (1) | KR20050065602A (ja) |
CN (1) | CN100477530C (ja) |
AT (1) | ATE362229T1 (ja) |
AU (1) | AU2003263505A1 (ja) |
DE (1) | DE60313790D1 (ja) |
TW (1) | TW200503434A (ja) |
WO (1) | WO2004036758A1 (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8339215B2 (en) * | 2010-04-11 | 2012-12-25 | Industrial Technology Research Institute | Charge domain filter with controllable transfer functions and transfer function control methods thereof |
CN102843108B (zh) * | 2012-09-21 | 2016-07-06 | 中国科学院上海微系统与信息技术研究所 | 一种高效线性化射频功率放大装置及方法 |
US10353910B2 (en) * | 2016-07-15 | 2019-07-16 | Ebay Inc. | Preemptive connection pool adjustments |
CN106357174A (zh) * | 2016-11-03 | 2017-01-25 | 广州中国科学院先进技术研究所 | 一种电-机械转换器的电流环控制系统 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07312555A (ja) * | 1993-08-05 | 1995-11-28 | Martin Marietta Corp | 制御されたポール−ゼロ場所を有するろ過を持つシグマ−デルタ・アナログ・デジタル変換器とその装置 |
JP2004120239A (ja) * | 2002-09-25 | 2004-04-15 | Sanyo Electric Co Ltd | Δς変調器 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA2157690A1 (en) * | 1995-09-07 | 1997-03-08 | Bosco Leung | Lower power passive sigma-delta converter |
US5834987A (en) * | 1997-07-30 | 1998-11-10 | Ercisson Inc. | Frequency synthesizer systems and methods for three-point modulation with a DC response |
US6448915B1 (en) * | 2000-08-31 | 2002-09-10 | Xilinx, Inc. | Modulo-M delta sigma circuit |
US6411244B1 (en) * | 2001-03-05 | 2002-06-25 | Tektronix, Inc. | Phase startable clock device for a digitizing instrument having deterministic phase error correction |
EP1324497B1 (en) * | 2001-12-27 | 2004-09-29 | STMicroelectronics S.r.l. | Method for self-calibrating a frequency of a modulator circuit, and circuit using said method |
-
2003
- 2003-09-22 EP EP03808803A patent/EP1556953B1/en not_active Expired - Lifetime
- 2003-09-22 KR KR1020057006559A patent/KR20050065602A/ko not_active Application Discontinuation
- 2003-09-22 WO PCT/IB2003/004220 patent/WO2004036758A1/en active IP Right Grant
- 2003-09-22 DE DE60313790T patent/DE60313790D1/de not_active Expired - Lifetime
- 2003-09-22 AU AU2003263505A patent/AU2003263505A1/en not_active Abandoned
- 2003-09-22 JP JP2004544545A patent/JP2006503472A/ja not_active Ceased
- 2003-09-22 CN CNB038242494A patent/CN100477530C/zh not_active Expired - Fee Related
- 2003-09-22 AT AT03808803T patent/ATE362229T1/de not_active IP Right Cessation
- 2003-09-22 US US10/531,401 patent/US7034726B2/en not_active Expired - Fee Related
- 2003-10-15 TW TW092128563A patent/TW200503434A/zh unknown
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07312555A (ja) * | 1993-08-05 | 1995-11-28 | Martin Marietta Corp | 制御されたポール−ゼロ場所を有するろ過を持つシグマ−デルタ・アナログ・デジタル変換器とその装置 |
JP2004120239A (ja) * | 2002-09-25 | 2004-04-15 | Sanyo Electric Co Ltd | Δς変調器 |
Non-Patent Citations (2)
Title |
---|
JPN6009001513, Albert K. Lu et al., "A High−Quality Analog Oscillator Using Oversampling D/A Conversion Techniques", IEEE Transactions on Circuits and Systems − II: Analog and Digital Signal Processing, 199407, Vol.41, No.7, pp.437−444, IEEE * |
JPN6009001514, Benoit R. Veillette et al., "High Frequency Sinusoidal Generation Using Delta−Sigma Modulation Techniques", Proceedings of the IEEE International Symposium on Circuits and Systems, 1995 (ISCAS ’95), 199504, Vol.1, pp.637−640, IEEE * |
Also Published As
Publication number | Publication date |
---|---|
US20060001561A1 (en) | 2006-01-05 |
WO2004036758A1 (en) | 2004-04-29 |
AU2003263505A1 (en) | 2004-05-04 |
DE60313790D1 (de) | 2007-06-21 |
KR20050065602A (ko) | 2005-06-29 |
ATE362229T1 (de) | 2007-06-15 |
CN1689236A (zh) | 2005-10-26 |
US7034726B2 (en) | 2006-04-25 |
EP1556953A1 (en) | 2005-07-27 |
CN100477530C (zh) | 2009-04-08 |
TW200503434A (en) | 2005-01-16 |
EP1556953B1 (en) | 2007-05-09 |
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