JP2006245189A - Flip-chip mounting method and mounting structure of semiconductor device - Google Patents

Flip-chip mounting method and mounting structure of semiconductor device Download PDF

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Publication number
JP2006245189A
JP2006245189A JP2005057233A JP2005057233A JP2006245189A JP 2006245189 A JP2006245189 A JP 2006245189A JP 2005057233 A JP2005057233 A JP 2005057233A JP 2005057233 A JP2005057233 A JP 2005057233A JP 2006245189 A JP2006245189 A JP 2006245189A
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Prior art keywords
electrode
semiconductor element
wiring board
connection electrode
solder
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Toshiyuki Kojima
俊之 小島
Takashi Kitae
孝史 北江
Seiichi Nakatani
誠一 中谷
Yasuharu Karashima
靖治 辛島
Shingo Komatsu
慎五 小松
Yoshihisa Yamashita
嘉久 山下
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Priority to JP2005057233A priority Critical patent/JP2006245189A/en
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a flip-chip mounting method and a mounting structure enabling prevention of noise with a shielded structure and assuring higher productivity and reliability. <P>SOLUTION: The flip-chip mounting method comprises the steps of preparing for a resin composition 30 including a semiconductor device 10 arranged with a shield electrode 16 and an electrode terminal 14, a wiring substrate 20 arranging an external circumference side connecting electrode 26 and an internal side connecting electrode 24, solder powder 32, and resin 34 including a radiation additive agent and fluidity under the fusing temperature of solder powder; coating the resin composition 30 on the surface of the wiring substrate 20; placing in contact the semiconductor device 10 on the front surface of the resin composition 30 through positioning between the semiconductor device 10 and wiring substrate 20; fusing the solder powder 32 by heating at least the resin composition 30 and allowing the solder powder 32 to grow through self-concentration using the radiation additive agent; and providing under-fill resin between the semiconductor device 10 and wiring substrate 20 by curing the resin 34. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、半導体素子を配線基板に搭載するための実装方法に関し、特に、周辺にシールド電極を設けた半導体素子のフリップチップ実装方法及びその実装構造体に関する。   The present invention relates to a mounting method for mounting a semiconductor element on a wiring board, and more particularly to a flip-chip mounting method of a semiconductor element having a shield electrode around it and a mounting structure thereof.

近年、電子機器の小型化、高機能化に伴い、信号処理のデジタル化、高周波化が進展している。これらの電子機器において、中核部品となる半導体素子についても、回路規模の増大に伴い、接続端子の多ピン、狭ピッチ化が要求されている。さらに、半導体素子と配線基板間での配線遅延やノイズ防止も重要な課題となっている。このために、半導体素子と配線基板との接続方式は、従来のワイヤボンディングを主体とした実装方式にかわりフリップチップ実装方式が広く採用されてきている。   In recent years, with the miniaturization and higher functionality of electronic devices, digitalization of signal processing and higher frequency have been advanced. In these electronic devices, semiconductor elements as core components are also required to have a multi-pin connection terminal and a narrow pitch as the circuit scale increases. Furthermore, wiring delay and noise prevention between the semiconductor element and the wiring board are also important issues. For this reason, a flip chip mounting method has been widely adopted as a connection method between a semiconductor element and a wiring board instead of a conventional mounting method mainly using wire bonding.

そして、このフリップチップ実装方式においては、半導体素子の電極端子上にはんだバンプを形成し、このはんだバンプを介して配線基板上に形成された接続端子に一括して接合するはんだバンプ接続法が広く使用されている。このはんだバンプを用いたフリップチップ実装方式では、バンプを半導体素子または配線基板に形成後、配線基板と半導体素子とをこのはんだバンプを介して接続し、その後さらに半導体素子を配線基板に固定するためにアンダーフィルとよばれる樹脂を半導体チップと配線基板との間に注入することが行われている。   In this flip-chip mounting method, a solder bump connection method is widely used in which solder bumps are formed on the electrode terminals of the semiconductor element, and the solder bumps are collectively bonded to the connection terminals formed on the wiring board via the solder bumps. in use. In this flip chip mounting method using solder bumps, a bump is formed on a semiconductor element or a wiring board, the wiring board and the semiconductor element are connected via the solder bump, and then the semiconductor element is further fixed to the wiring board. A resin called underfill is injected between a semiconductor chip and a wiring board.

これは、半導体素子と配線基板との熱膨張係数の差が大きいために、熱ストレスを受けたときに接続不良が発生することを防止するためである。はんだバンプ接続方式では、上記のようにはんだバンプによる接続後にアンダーフィル樹脂を充填するため、はんだバンプの外周領域にシールド電極を設けることが困難である。   This is to prevent a connection failure from occurring when subjected to thermal stress because the difference in thermal expansion coefficient between the semiconductor element and the wiring board is large. In the solder bump connection method, since the underfill resin is filled after the connection by the solder bump as described above, it is difficult to provide a shield electrode in the outer peripheral region of the solder bump.

一方、はんだバンプの外周領域に電極端子を設ける実装構造も検討されている。例えば、CCB法により配線基板に接合する電子装置の組み立て方法において、半導体素子と配線基板との間の接続部が外部に露出して劣化したりしないように外部から密閉して接合する方式が示されている(例えば、特許文献1参照)。   On the other hand, a mounting structure in which an electrode terminal is provided in the outer peripheral region of the solder bump has been studied. For example, in a method for assembling an electronic device to be bonded to a wiring board by the CCB method, a method of sealing and bonding from the outside is shown so that the connection portion between the semiconductor element and the wiring board is not exposed to the outside and deteriorated. (For example, refer to Patent Document 1).

図8は、この接合方法を示す断面図である。図8(a)に示すように、配線基板106上には接続端子108とはんだ接合部110とが設けられ、半導体素子100にははんだバンプ102とはんだバンプ102の周囲を一周させて設けたはんだ枠104とが形成されている。図8(b)に示すように、この半導体素子100を配線基板106に位置合せした後、はんだバンプ102と接続端子108とを接合すると同時にはんだ枠104とはんだ接合部110とを接合して、半導体素子100と配線基板106との接続部を密閉している。しかし、この方法では、はんだ枠104が周囲にあるために、接合する際に半導体素子100と配線基板106との間に存在する空気が膨張するが、その逃げ場がないためにはんだ枠104が一部変形したりずれたりするという課題がある。このために、はんだ枠104で囲まれる領域内の配線基板106に貫通孔を設ける構成も、上記例において示されている。   FIG. 8 is a cross-sectional view showing this joining method. As shown in FIG. 8A, the connection terminals 108 and the solder joints 110 are provided on the wiring substrate 106, and the solder bumps 102 and the solder bumps 102 are provided around the semiconductor element 100 around the periphery. A frame 104 is formed. As shown in FIG. 8B, after aligning the semiconductor element 100 with the wiring board 106, the solder bumps 102 and the connection terminals 108 are joined, and at the same time, the solder frame 104 and the solder joint 110 are joined. A connection portion between the semiconductor element 100 and the wiring substrate 106 is sealed. However, in this method, since the solder frame 104 is in the periphery, air existing between the semiconductor element 100 and the wiring board 106 is expanded at the time of bonding. There is a problem of partial deformation and displacement. For this reason, a configuration in which a through hole is provided in the wiring board 106 in a region surrounded by the solder frame 104 is also shown in the above example.

また、配線基板にはんだバンプを介在させて接続された半導体素子と、この半導体素子の周辺に、このはんだバンプを取り囲むように環状の補強はんだ接合部を設けることで、半導体素子と配線基板との間のアンダーフィル樹脂を用いないようにした構成も示されている(例えば、特許文献2参照)。このような構成とすることにより、通電のON/OFFにより、アンダーフィル樹脂と半導体素子およびアンダーフィル樹脂と配線基板との界面が剥離してアンダーフィル樹脂の補強効果がなくなり、信頼性が低下することを防止している。   In addition, by providing a semiconductor element connected to the wiring board with a solder bump interposed therebetween, and providing an annular reinforcing solder joint around the semiconductor element so as to surround the solder bump, the semiconductor element and the wiring board A configuration in which no underfill resin is used is also shown (for example, see Patent Document 2). By adopting such a configuration, the interface between the underfill resin and the semiconductor element and the underfill resin and the wiring board is peeled off by ON / OFF of the energization, the reinforcing effect of the underfill resin is lost, and the reliability is lowered. To prevent that.

また、温度サイクル等を受けたときに、半導体素子と配線基板との間の熱膨張係数差に起因して発生する応力により、接合部でクラックや剥離等の不良が発生することを防止するために、半導体素子と、この半導体素子上の周辺部を除く領域にマトリクス状に形成された複数の柱状電極と、半導体素子上の周辺部の少なくとも四角に形成された補強用ダミー電極と、半導体素子上の柱状電極および補強用ダミー電極を除く領域に形成された封止膜とを具備する構成も示されている(例えば、特許文献3参照)。この例では、補強用ダミー電極をグランド電位とすることで、ノイズシールド構造が可能であることも示されている。   Also, to prevent defects such as cracks and delamination from occurring due to stress generated due to the difference in thermal expansion coefficient between the semiconductor element and the wiring board when subjected to a temperature cycle, etc. A plurality of columnar electrodes formed in a matrix in a region excluding the peripheral portion on the semiconductor element, a reinforcing dummy electrode formed in at least a square of the peripheral portion on the semiconductor element, and the semiconductor element A configuration including a sealing film formed in a region excluding the upper columnar electrode and the reinforcing dummy electrode is also shown (see, for example, Patent Document 3). This example also shows that a noise shield structure is possible by setting the reinforcing dummy electrode to the ground potential.

このようなはんだバンプ実装方法において、はんだバンプの形成法としては、従来、メッキ法やスクリ−ン印刷法等で行われていた。しかし、最近では半導体素子や配線基板の電極上にはんだバンプを選択的に形成する技術が開発されている。例えば、有機酸鉛塩と金属錫(Sn)を主要成分とするペースト状組成物(化学反応析出型はんだ)を、電極が形成された配線基板上にベタ塗りした後、配線基板を加熱することによって、鉛(Pb)と錫(Sn)との置換反応を起こさせ、Pb/Snの合金を配線基板の電極上に選択的に析出させる方法がある(例えば、特許文献4参照)。
特開平3−16159号公報 特開2002−343826号公報 特開2002−231749号公報 特開平1−157796号公報
In such a solder bump mounting method, conventionally, a solder bump forming method has been performed by a plating method, a screen printing method, or the like. However, recently, a technique for selectively forming solder bumps on electrodes of a semiconductor element or a wiring board has been developed. For example, a paste-like composition (chemical reaction precipitation type solder) mainly composed of an organic acid lead salt and metallic tin (Sn) is solid-coated on a wiring board on which electrodes are formed, and then the wiring board is heated There is a method of causing a substitution reaction between lead (Pb) and tin (Sn) and selectively depositing an alloy of Pb / Sn on the electrode of the wiring board (see, for example, Patent Document 4).
Japanese Patent Laid-Open No. 3-16159 JP 2002-343826 A JP 2002-231749 A Japanese Patent Laid-Open No. 1-157796

上記第1の例では、はんだバンプが形成された領域を囲むようにはんだ枠を設けているが、はんだ接合時に加熱された空気の逃げ場がなく接続不良が生じることがあり、このために配線基板に貫通孔を開けている。貫通孔を設けることで、空気の逃げ道は確保されるが、はんだ枠が外周領域を取り囲んでいるためにアンダーフィル樹脂を注入することが困難となる。このために、半導体素子と熱膨張係数の差の大きな樹脂基板等を用いる場合に接続信頼性を確保し難い。   In the first example, the solder frame is provided so as to surround the area where the solder bumps are formed. However, there is no escape of heated air at the time of soldering, and connection failure may occur. A through hole is made in By providing the through hole, an air escape path is secured, but it is difficult to inject the underfill resin because the solder frame surrounds the outer peripheral region. For this reason, it is difficult to ensure connection reliability when using a resin substrate having a large difference in thermal expansion coefficient from that of the semiconductor element.

また、上記第2の例では、はんだバンプを取り囲むように環状の補強はんだ接合部を設けることで、半導体素子と配線基板との間のアンダーフィル樹脂を用いない構成としているが、はんだはアンダーフィル樹脂に比べると弾性的な変形を生じ難い。また、アンダーフィル樹脂は半導体素子のバンプ形成面のほぼ全面に形成することができるのに対して、補強はんだは外周領域のみに限定される。このため、半導体素子と熱膨張係数の差が大きな樹脂基板等を用いる場合には接続信頼性を充分確保でき難い。   In the second example, an annular reinforcing solder joint is provided so as to surround the solder bump, so that the underfill resin between the semiconductor element and the wiring board is not used. Less elastic deformation than resin. The underfill resin can be formed on almost the entire bump forming surface of the semiconductor element, whereas the reinforcing solder is limited to the outer peripheral region. For this reason, when using a resin substrate or the like having a large difference in thermal expansion coefficient from that of the semiconductor element, it is difficult to ensure sufficient connection reliability.

さらに、上記第3の例では、半導体素子上の周辺部を除く領域にマトリクス状に形成された複数の柱状電極のうち、特に四角に形成された柱状電極の接続部分にクラックが発生しないようにすることを目的としているが、この場合にも半導体素子と配線基板との間にアンダーフィル樹脂を形成することが困難である。   Furthermore, in the third example, among the plurality of columnar electrodes formed in a matrix shape in the region excluding the peripheral portion on the semiconductor element, a crack is not generated particularly in the connection portion of the columnar electrodes formed in a square shape. In this case, it is difficult to form an underfill resin between the semiconductor element and the wiring board.

また、上記第4の例では、はんだバンプの作製法は化学反応析出型であるので、それに用いられるはんだの材料は特殊な化学反応を利用できるものであることが要求されるため、はんだ組成の選択の自由度が低く、鉛(Pb)フリー化への対応が困難である。   In the fourth example, since the method for producing solder bumps is a chemical reaction precipitation type, the solder material used for the solder bumps is required to be able to use a special chemical reaction. The degree of freedom of selection is low, and it is difficult to cope with lead (Pb) free.

さらに、上記第4の例だけでなく、はんだバンプによるフリップチップ実装法においては、あらかじめはんだバンプを形成した後に半導体素子と配線基板とを対向させてはんだバンプにより接続している。このような接続方式では、外周領域にシールド電極を有する構成の場合にアンダーフィル樹脂を接続後に注入することができない。また、はんだバンプによる接続後に、アンダーフィル樹脂を注入するため、アンダーフィル樹脂を確実に全面に注入するための製造条件が複雑となるという課題がある。   Furthermore, in the flip chip mounting method using the solder bumps as well as the fourth example, the solder bumps are formed in advance, and then the semiconductor element and the wiring board are opposed to each other and connected by the solder bumps. In such a connection system, underfill resin cannot be injected after connection in the case of a configuration having a shield electrode in the outer peripheral region. In addition, since underfill resin is injected after connection by solder bumps, there is a problem that manufacturing conditions for reliably injecting the underfill resin over the entire surface are complicated.

上記課題を解決するために本発明は、樹脂中に分散されたはんだ粒子の自己集合を利用して電極端子および接続端子上にはんだを成長させてこれらを接続すると同時にアンダーフィル樹脂も形成することで、シールド構造を有しノイズ防止が可能で、かつ生産性及び信頼性の高いフリップチップ実装方法及びその実装構造体を提供することを目的とする。   In order to solve the above-mentioned problems, the present invention uses the self-assembly of solder particles dispersed in a resin to grow solder on the electrode terminals and connection terminals, and at the same time forms an underfill resin. An object of the present invention is to provide a flip chip mounting method and a mounting structure thereof that have a shield structure, can prevent noise, and have high productivity and reliability.

上記課題を解決するために、本発明の半導体素子の実装方法は、外周部にシールド電極が配設され、このシールド電極の内側に電極端子が配設された半導体素子と、シールド電極に対向する位置に外周側接続電極および電極端子に対向する位置に内部側接続電極が配設された配線基板と、はんだ粉、対流添加剤およびはんだ粉の熔融温度で流動性を有する樹脂を含む樹脂組成物とを準備する工程と、配線基板の半導体素子と対向する面上に樹脂組成物を塗布する工程と、シールド電極と外周側接続電極および電極端子と内部側接続電極をそれぞれ位置合せして、樹脂組成物表面に半導体素子を当接する工程と、少なくとも樹脂組成物を加熱してはんだ粉を熔融するとともに対流添加剤によりはんだ粉をシールド電極と外周側接続電極との間および電極端子と内部側接続電極との間に自己集合させながら成長させて、これらをはんだ接続する工程と、樹脂組成物中の樹脂を硬化させて半導体素子と配線基板との間にアンダーフィル樹脂を設ける工程とを含む方法からなる。   In order to solve the above-described problems, a semiconductor element mounting method according to the present invention is directed to a semiconductor element in which a shield electrode is disposed on the outer periphery and an electrode terminal is disposed on the inner side of the shield electrode, and the shield electrode is opposed to the semiconductor element. A resin composition comprising: a wiring board having an inner side connection electrode disposed at a position opposed to an outer peripheral side connection electrode and an electrode terminal; a solder powder, a convection additive, and a resin having fluidity at a melting temperature of the solder powder And a step of applying a resin composition on the surface of the wiring board facing the semiconductor element, and aligning the shield electrode, the outer peripheral side connection electrode, the electrode terminal, and the inner side connection electrode, respectively, A step of abutting the semiconductor element on the surface of the composition, and at least the resin composition is heated to melt the solder powder, and the solder powder is interposed between the shield electrode and the outer peripheral connection electrode by a convective additive. And a process of soldering and connecting them between the electrode terminal and the internal connection electrode, and curing the resin in the resin composition to underfill resin between the semiconductor element and the wiring board And a step including providing a step.

このような方法により、半導体素子と配線基板とにははんだバンプ等の形成が不要となり、半導体素子と配線基板とを樹脂組成物を介して対向させて加熱するだけで、はんだによる接続と、シールド構造を有しながら半導体素子の全面にアンダーフィル樹脂を設けた構成を容易に作製することができる。この結果、半導体素子の実装工程を簡略化できるだけでなく、樹脂配線基板等においても信頼性が高く、かつ電磁シールド機能を有する半導体素子を容易に実現することができる。   By such a method, it is not necessary to form solder bumps between the semiconductor element and the wiring board, and by simply heating the semiconductor element and the wiring board facing each other through the resin composition, the connection by soldering and shielding A structure in which the underfill resin is provided on the entire surface of the semiconductor element can be easily manufactured while having the structure. As a result, not only the mounting process of the semiconductor element can be simplified, but also a semiconductor element having high reliability and an electromagnetic shielding function can be easily realized in a resin wiring board or the like.

また、本発明の半導体素子の実装方法は、外周部にシールド電極が配設され、このシールド電極の内側に電極端子が配設された半導体素子と、電極端子に対向する位置に内部側接続電極が配設された配線基板と、はんだ粉、対流添加剤およびはんだ粉の熔融温度で流動性を有する樹脂を含む樹脂組成物とを準備する工程と、配線基板の半導体素子と対向する面上に樹脂組成物を塗布する工程と、電極端子と内部側接続電極をそれぞれ位置合せして樹脂組成物表面に半導体素子を当接する工程と、少なくとも樹脂組成物を加熱してはんだ粉を熔融するとともに対流添加剤によりはんだ粉を電極端子と内部側接続電極との間に自己集合させながら成長させて、これらをはんだ接続するとともに、シールド電極の表面にはんだ粉を自己集合させてはんだを成長させる工程と、樹脂組成物中の樹脂を硬化させて半導体素子と配線基板との間にアンダーフィル樹脂を設ける工程とを含む方法からなる。   The semiconductor element mounting method of the present invention includes a semiconductor element in which a shield electrode is disposed on the outer periphery and an electrode terminal is disposed on the inner side of the shield electrode, and an internal connection electrode at a position facing the electrode terminal. On the surface of the wiring board facing the semiconductor element, and a step of preparing a wiring board provided with a resin composition including a resin having fluidity at the melting temperature of the solder powder, the convection additive and the solder powder A step of applying the resin composition, a step of aligning the electrode terminal and the internal connection electrode, and abutting the semiconductor element on the surface of the resin composition, and at least heating the resin composition to melt the solder powder and convection Make the solder powder grow while self-assembling between the electrode terminal and the internal connection electrode with the additive, solder them together, and make the solder powder self-assemble on the surface of the shield electrode Growing a I, to cure the resin in the resin composition comprises a method comprising the step of providing an underfill resin between the semiconductor element and the wiring board.

このような方法により、半導体素子と配線基板とにははんだバンプ等の形成が不要となり、半導体素子と配線基板とを樹脂組成物を介して対向させて加熱するだけで、はんだによる接続と、シールド構造を有しながら半導体素子の全面にアンダーフィル樹脂を設けた構成を容易に作製することができる。この結果、半導体素子の実装工程を簡略化できるだけでなく、樹脂配線基板等においても信頼性が高く、かつ電磁シールド機能を有する半導体素子を容易に実現することができる。さらに、この方法では、半導体素子の表面に形成したシールド電極に対向する位置の配線基板上には外周側接続電極を設けていないので、その分位置合せを容易にできる。   By such a method, it is not necessary to form solder bumps between the semiconductor element and the wiring board, and by simply heating the semiconductor element and the wiring board facing each other through the resin composition, the connection by soldering and shielding A structure in which the underfill resin is provided on the entire surface of the semiconductor element can be easily manufactured while having the structure. As a result, not only the mounting process of the semiconductor element can be simplified, but also a semiconductor element having high reliability and an electromagnetic shielding function can be easily realized in a resin wiring board or the like. Furthermore, in this method, since the outer peripheral side connection electrode is not provided on the wiring substrate at a position facing the shield electrode formed on the surface of the semiconductor element, the alignment can be facilitated accordingly.

また、本発明の半導体素子の実装方法は、表面に電極端子が配設された半導体素子と、この電極端子に対向する位置に内部側接続電極が配設され、内部側接続電極の外周領域に設けた外周側接続電極とを有する配線基板と、はんだ粉、対流添加剤およびはんだ粉の熔融温度で流動性を有する樹脂を含む樹脂組成物とを準備する工程と、配線基板の半導体素子と対向する面上に樹脂組成物を塗布する工程と、電極端子と内部側接続電極をそれぞれ位置合せして樹脂組成物表面に半導体素子を当接する工程と、少なくとも樹脂組成物を加熱してはんだ粉を熔融するとともに対流添加剤によりはんだ粉を電極端子と内部側接続電極との間に自己集合させながら成長させて、これらをはんだ接続するとともに、外周側接続電極の表面にはんだ粉を自己集合させてはんだを成長させる工程と、樹脂組成物中の樹脂を硬化させて半導体素子と配線基板との間にアンダーフィル樹脂を設ける工程とを含む方法からなる。   The semiconductor element mounting method of the present invention includes a semiconductor element having an electrode terminal on the surface, an internal connection electrode disposed at a position facing the electrode terminal, and an outer peripheral region of the internal connection electrode. A step of preparing a wiring board having a provided outer peripheral side connection electrode and a resin composition containing a resin having fluidity at the melting temperature of solder powder, convection additive and solder powder, and facing the semiconductor element of the wiring board A step of applying a resin composition on the surface to be coated, a step of aligning the electrode terminal and the internal connection electrode, and abutting the semiconductor element on the surface of the resin composition, and heating the resin composition at least by heating the resin composition While melting, solder powder grows while self-assembling between the electrode terminal and the internal connection electrode by the convection additive, solders them and solders the solder powder onto the surface of the outer peripheral connection electrode. Growing a solder is engaged, to cure the resin in the resin composition comprises a method comprising the step of providing an underfill resin between the semiconductor element and the wiring board.

このような方法により、半導体素子と配線基板とにははんだバンプ等の形成が不要となり、半導体素子と配線基板とを樹脂組成物を介して対向させて加熱するだけで、はんだによる接続と、シールド構造を有しながら半導体素子の全面にアンダーフィル樹脂を設けた構成を容易に作製することができる。この結果、半導体素子の実装工程を簡略化できるだけでなく、樹脂配線基板等においても信頼性が高く、かつ電磁シールド機能を有する半導体素子を容易に実現することができる。さらに、この方法では、半導体素子の表面にはシールド電極を設けずに配線基板側に設けた外周側接続電極によりシールド構造を実現している。このため、半導体素子を配線基板に位置合せする位置合せ工程を容易に行える。   By such a method, it is not necessary to form solder bumps between the semiconductor element and the wiring board, and by simply heating the semiconductor element and the wiring board facing each other through the resin composition, the connection by soldering and shielding A structure in which the underfill resin is provided on the entire surface of the semiconductor element can be easily manufactured while having the structure. As a result, not only the mounting process of the semiconductor element can be simplified, but also a semiconductor element having high reliability and an electromagnetic shielding function can be easily realized in a resin wiring board or the like. Further, in this method, the shield structure is realized by the outer peripheral side connection electrode provided on the wiring board side without providing the shield electrode on the surface of the semiconductor element. For this reason, the alignment process which aligns a semiconductor element with a wiring board can be performed easily.

また、本発明の半導体素子の実装方法は、外周部にシールド電極が配設され、このシールド電極の内側に電極端子が配設された半導体素子と、半導体素子を対向させたときにシールド電極の近傍で、かつシールド電極と対向しない位置に設けた外周側接続電極および電極端子に対向する位置に設けた内部側接続電極を有する配線基板と、はんだ粉、対流添加剤およびはんだ粉の熔融温度で流動性を有する樹脂を含む樹脂組成物とを準備する工程と、配線基板の半導体素子と対向する面上に樹脂組成物を塗布する工程と、電極端子と内部側接続電極をそれぞれ位置合せして樹脂組成物表面に半導体素子を当接する工程と、少なくとも樹脂組成物を加熱してはんだ粉を熔融するとともに対流添加剤によりはんだ粉を電極端子と内部側接続電極との間に自己集合させながら成長させて、これらをはんだ接続するとともに、シールド電極および外周側接続電極の表面にはんだ粉を自己集合させてはんだをそれぞれ成長させる工程と、樹脂組成物中の樹脂を硬化させて半導体素子と配線基板との間にアンダーフィル樹脂を設ける工程とを含む方法からなる。   Also, the semiconductor element mounting method of the present invention has a shield electrode disposed on the outer periphery, and a semiconductor element in which an electrode terminal is disposed on the inner side of the shield electrode and the shield element when the semiconductor element is opposed to the semiconductor element. A wiring board having an outer peripheral side connection electrode provided in the vicinity and not facing the shield electrode and an inner side connection electrode provided at a position facing the electrode terminal, and a melting temperature of the solder powder, the convection additive and the solder powder. A step of preparing a resin composition containing a resin having fluidity, a step of applying a resin composition on a surface of the wiring board facing the semiconductor element, and aligning the electrode terminal and the internal connection electrode, respectively A step of contacting the semiconductor element to the surface of the resin composition, and at least the resin composition is heated to melt the solder powder, and at the same time, the solder powder is transferred between the electrode terminal and the internal connection electrode by a convective additive. A process of self-assembling and soldering them together, and a process of self-assembling solder powder on the surface of the shield electrode and outer peripheral connection electrode to grow the solder, and curing the resin in the resin composition And providing an underfill resin between the semiconductor element and the wiring board.

このような方法により、半導体素子と配線基板とにははんだバンプ等の形成が不要となり、半導体素子と配線基板とを樹脂組成物を介して対向させて加熱するだけで、はんだによる接続と、シールド構造を有しながら半導体素子の全面にアンダーフィル樹脂を設けた構成を容易に作製することができる。   By such a method, it is not necessary to form solder bumps between the semiconductor element and the wiring board, and by simply heating the semiconductor element and the wiring board facing each other through the resin composition, the connection by soldering and shielding A structure in which the underfill resin is provided on the entire surface of the semiconductor element can be easily manufactured while having the structure.

この結果、半導体素子の実装工程を簡略化できるだけでなく、樹脂配線基板等においても信頼性が高く、かつ電磁シールド機能を有する半導体素子を容易に実現することができる。また、この方法では、半導体素子と配線基板には、それぞれシールド電極と外周側接続電極とを設けているが、これらは対向する位置には配置されていない。このため、半導体素子を配線基板に位置合せする工程を容易に行うことができる。   As a result, not only the mounting process of the semiconductor element can be simplified, but also a semiconductor element having high reliability and an electromagnetic shielding function can be easily realized in a resin wiring board or the like. In this method, the semiconductor element and the wiring substrate are each provided with a shield electrode and an outer peripheral side connection electrode, but these are not arranged at opposing positions. For this reason, the process of aligning the semiconductor element with the wiring board can be easily performed.

また、上記方法において、対流添加剤による自己集合は、対流添加剤がはんだ粉の熔融する温度でガスを発生する特性を有し、発生したガスの対流によりはんだ粉を電極端子と内部側接続電極との表面、およびシールド電極と外周側接続電極の少なくとも一方の表面上に自己集合させる方法としてもよい。   Further, in the above method, the self-assembly by the convection additive has a property of generating gas at a temperature at which the convection additive melts the solder powder, and the solder powder is separated from the electrode terminal and the internal connection electrode by the convection of the generated gas. And a method of self-assembly on at least one surface of the shield electrode and the outer peripheral connection electrode.

このようにガスを発生させることにより、対流を促進させてはんだの自己集合をより確実に、かつ短時間に生じさせることができる。   By generating gas in this way, convection can be promoted and solder self-assembly can be generated more reliably and in a short time.

なお、ガスを発生させる方法としては、対流添加剤が少なくともはんだの溶融する温度で沸騰または分解する性質を有する材料を用いればよい。   As a method for generating the gas, a material having a property that the convective additive boils or decomposes at least at a temperature at which the solder melts may be used.

なお、この方法においては、半導体素子の外周部に設けたシールド電極や配線基板に設けた外周側接続電極に対してもはんだが自己集合して成長していく。このため、対流添加剤によるガス放出量が減少するときには、シールド電極や外周側接続電極にはんだが成長しているので、配線基板あるいは半導体素子あるいはそれぞれの電極との隙間が狭くなり、ガスが外部に逃げにくくなる。   In this method, the solder grows by self-assembly on the shield electrode provided on the outer periphery of the semiconductor element and the outer connection electrode provided on the wiring board. For this reason, when the amount of gas released by the convective additive decreases, the solder grows on the shield electrode and the outer peripheral connection electrode, so that the gap between the wiring board or the semiconductor element or each electrode is narrowed, and the gas is It becomes difficult to escape.

また、同様にはんだ粉も外部に抜けることを防ぐことができる。この結果、シールド電極の内側領域では、対流を長く継続させることができるので、はんだの自己集合をより確実に生じさせることができる。したがって、樹脂組成物中に、最終的にはんだ粉として残存する割合を大幅に減少させることができる。この結果、電極端子のピッチを小さくしてもショート不良等の発生を抑制することができる。   Similarly, the solder powder can be prevented from falling outside. As a result, in the inner region of the shield electrode, convection can be continued for a long time, so that solder self-assembly can be more reliably generated. Therefore, the ratio finally remaining as solder powder in the resin composition can be greatly reduced. As a result, even if the pitch of the electrode terminals is reduced, it is possible to suppress the occurrence of short-circuit defects.

また、上記方法において、シールド電極は電磁ノイズを遮蔽可能な隙間を設けて半導体素子の外周部に形成されていてもよい。この場合に、その隙間は半導体素子の中心に対して対称の位置に複数個設けられていることが望ましい。または、シールド電極は半導体素子の外周部を取り囲むように連続して形成されていてもよい。これらの場合に、シールド電極は電極端子の外径サイズよりもその外径または幅が小さく形成されていてもよい。   In the above method, the shield electrode may be formed on the outer peripheral portion of the semiconductor element with a gap capable of shielding electromagnetic noise. In this case, it is desirable that a plurality of the gaps be provided at symmetrical positions with respect to the center of the semiconductor element. Alternatively, the shield electrode may be continuously formed so as to surround the outer periphery of the semiconductor element. In these cases, the shield electrode may be formed so that its outer diameter or width is smaller than the outer diameter size of the electrode terminal.

このような方法とすることで、シールド電極または外周側接続電極あるいはこれらの組み合わせにより電磁ノイズを防止し、誤作動を防ぐことができる。また、隙間を半導体素子の中心に対して対称の位置に設けることで、対流添加剤により発生したガスが外部に抜けるときに、対称の位置に設けた隙間からガスが抜けるため、シールド電極または外周側接続電極の内側領域での対流を均一に行わせることができる。この結果、電極端子と内部側接続電極、およびシールド電極と外周側接続電極の少なくとも一方に対して、均一にはんだを自己集合させて成長させることができ、接続不良の発生を防ぐことができる。   By setting it as such a method, electromagnetic noise can be prevented by a shield electrode, an outer peripheral side connection electrode, or these combinations, and malfunction can be prevented. In addition, by providing the gap at a symmetric position with respect to the center of the semiconductor element, when the gas generated by the convective additive escapes to the outside, the gas escapes from the gap provided at the symmetric position. Convection in the inner region of the side connection electrode can be performed uniformly. As a result, it is possible to grow the solder by uniformly self-assembling the solder to at least one of the electrode terminal and the internal connection electrode, and the shield electrode and the outer peripheral connection electrode, thereby preventing the occurrence of connection failure.

なお、この方法は、はんだが自己集合して成長することで接続する方法であることから、シールド電極の外径または幅を電極端子の外径よりも小さくすることができる。このために、電極端子を設ける領域を広げることができ、接続の信頼性をさらに向上できる。あるいは、シールド電極を設けるために半導体素子の外径寸法を大きくする必要がなくなる。   Since this method is a method in which the solder is connected by self-assembly and growing, the outer diameter or width of the shield electrode can be made smaller than the outer diameter of the electrode terminal. For this reason, the area | region which provides an electrode terminal can be expanded, and the reliability of a connection can further be improved. Alternatively, there is no need to increase the outer diameter of the semiconductor element in order to provide the shield electrode.

また、上記方法において、配線基板の内部側接続電極は、はんだが自己集合して成長する領域の形状が電極端子と同じ形状であることが望ましい。   In the above method, it is desirable that the inner side connection electrode of the wiring board has the same shape as the electrode terminal in the region where the solder self-assembles and grows.

さらに、上記方法において配線基板の外周側接続電極および内部側接続電極のはんだ粉が自己集合して成長する領域を除く領域には、はんだ粉の自己集合を阻害する表面保護膜を設けていてもよい。   Further, in the above method, a surface protective film that inhibits the self-assembly of the solder powder may be provided in a region other than the region where the solder powder of the outer peripheral side connection electrode and the inner side connection electrode of the wiring substrate self-assembles and grows. Good.

このような方法とすることにより、半導体素子の電極端子と配線基板の内部側接続電極のはんだが自己集合する領域の形状が同じであるので、対向した位置にある電極端子と内部側接続電極のそれぞれにおいて、同じようにはんだの自己集合と成長が生じる。したがって、ファインピッチのはんだ接続を容易に行うことができる。   By adopting such a method, the shape of the region where the solder of the electrode terminal of the semiconductor element and the internal connection electrode of the wiring board self-assembles is the same. In each, solder self-assembly and growth occur in the same way. Accordingly, fine pitch solder connection can be easily performed.

なお、シールド電極と外周側接続電極とが対向して接続される構成の場合には、シールド電極と外周側接続電極との形状も同じとすることが望ましい。   When the shield electrode and the outer peripheral connection electrode are connected to face each other, it is desirable that the shape of the shield electrode and the outer peripheral connection electrode be the same.

また、上記方法において、樹脂は熱硬化性樹脂を用いてもよい。この場合において、樹脂を硬化させてアンダーフィル樹脂を設ける工程は、配線基板と半導体素子の接続工程での樹脂組成物の加熱温度より高い温度で行う方法としてもよい。   In the above method, a thermosetting resin may be used as the resin. In this case, the step of curing the resin and providing the underfill resin may be performed at a temperature higher than the heating temperature of the resin composition in the step of connecting the wiring board and the semiconductor element.

このような方法とすることにより、対流を生じさせてはんだを自己集合させ成長させるときには、樹脂の流動性を大きくしておき、接続が完了した後に、さらに加熱することで、樹脂を硬化させてアンダーフィル樹脂とすることが容易にできる。   By adopting such a method, when convection is generated and solder is self-assembled and grown, the fluidity of the resin is increased, and after the connection is completed, the resin is cured by further heating. An underfill resin can be easily obtained.

また、本発明の半導体素子の実装構造体は、外周領域に外周部を取り囲む連続した形状からなるシールド電極が配設され、このシールド電極の内側に電極端子が配設された半導体素子と、シールド電極に対向する位置に外周側接続電極および電極端子に対向する位置に内部側接続電極がそれぞれ配設された配線基板と、シールド電極と外周側接続電極および電極端子と内部側接続電極とが、それぞれはんだにより接続され、かつ半導体素子と配線基板との間にアンダーフィル樹脂が設けられている構成からなる。   In the semiconductor element mounting structure of the present invention, a shield electrode having a continuous shape surrounding the outer peripheral portion is provided in the outer peripheral region, and a semiconductor element in which an electrode terminal is provided inside the shield electrode, and a shield A wiring board in which inner side connection electrodes are disposed at positions facing the outer peripheral side connection electrodes and electrode terminals at positions facing the electrodes, a shield electrode, outer side connection electrodes, electrode terminals, and inner side connection electrodes, Each of them is connected by solder and has an underfill resin provided between the semiconductor element and the wiring board.

このような構成とすることにより、半導体素子の電極端子と配線基板の内部側接続電極とを取り囲むようにシールド電極を有し、かつ半導体素子と配線基板とをアンダーフィル樹脂で接着した構成の実装構造体が得られる。この半導体素子の実装構造体は、電磁ノイズによる影響を受けにくく、かつ半導体素子との熱膨張係数の大きな樹脂基板を配線基板として用いても、信頼性を高くすることができる。また、従来のようにはんだバンプを形成する必要もないことから、半導体素子の実装構造体を安価にすることもできる。   By adopting such a configuration, a mounting having a shield electrode so as to surround the electrode terminal of the semiconductor element and the internal connection electrode of the wiring board, and the semiconductor element and the wiring board are bonded with an underfill resin. A structure is obtained. This semiconductor element mounting structure can be highly reliable even when a resin substrate having a large thermal expansion coefficient with respect to the semiconductor element is used as a wiring board and is not easily affected by electromagnetic noise. Further, since it is not necessary to form solder bumps as in the prior art, the semiconductor element mounting structure can be made inexpensive.

さらに、本発明の半導体素子の実装構造体は、外周領域に外周部を取り囲む連続した形状からなるシールド電極が配設され、このシールド電極の内側に電極端子が配設された半導体素子と、この電極端子に対向する位置に内部側接続電極が配設された配線基板とを有し、電極端子と内部側接続電極とがはんだにより接続され、かつシールド電極の表面にははんだが形成されており、さらに半導体素子と配線基板との間にアンダーフィル樹脂が設けられている構成としてもよい。   Furthermore, the semiconductor element mounting structure of the present invention includes a semiconductor element in which a shield electrode having a continuous shape surrounding the outer peripheral portion is disposed in the outer peripheral region, and an electrode terminal is disposed inside the shield electrode, A wiring board having an internal connection electrode disposed at a position facing the electrode terminal, the electrode terminal and the internal connection electrode are connected by solder, and solder is formed on the surface of the shield electrode Furthermore, an underfill resin may be provided between the semiconductor element and the wiring board.

さらに、本発明の半導体素子の実装構造体は、表面に電極端子が配設された半導体素子と、この電極端子に対向する位置に内部側接続電極が配設され、この内部側接続電極の外周領域に設けた外周側接続電極を含む配線基板とを有し、電極端子と内部側接続電極とがはんだにより接続され、かつ外周側接続電極の表面にはんだが形成されており、さらに半導体素子と配線基板との間にアンダーフィル樹脂が設けられている構成としてもよい。   Further, the semiconductor element mounting structure of the present invention includes a semiconductor element having an electrode terminal disposed on the surface thereof, and an internal connection electrode disposed at a position facing the electrode terminal, and an outer periphery of the internal connection electrode. A wiring board including an outer peripheral side connection electrode provided in the region, the electrode terminal and the inner side connection electrode are connected by solder, and solder is formed on the surface of the outer peripheral side connection electrode. It is good also as a structure by which underfill resin is provided between the wiring boards.

さらに、本発明の半導体素子の実装構造体は、外周部にシールド電極が配設され、このシールド電極の内側に電極端子が配設された半導体素子と、半導体素子を対向させたときに上記シールド電極の近傍で、かつシールド電極と対向しない位置に設けた外周側接続電極および電極端子に対向する位置に設けた内部側接続電極を有する配線基板とを含み、電極端子と内部側接続電極とがはんだにより接続され、かつシールド電極および外周側接続電極の表面にはんだが形成されており、さらに半導体素子と配線基板との間にアンダーフィル樹脂が設けられている構成であってもよい。   Furthermore, the semiconductor element mounting structure of the present invention has a shield electrode disposed on the outer periphery, and the shield when the semiconductor element is opposed to a semiconductor element having an electrode terminal disposed inside the shield electrode. A wiring board having an outer peripheral side connection electrode provided in the vicinity of the electrode and not facing the shield electrode and an inner side connection electrode provided in a position facing the electrode terminal, the electrode terminal and the inner side connection electrode being A configuration in which solder is formed and solder is formed on the surfaces of the shield electrode and the outer peripheral connection electrode, and an underfill resin is provided between the semiconductor element and the wiring board may be employed.

このような構成とすることにより、半導体素子の電極端子と配線基板の内部側接続電極とを取り囲むようにシールド電極を有し、かつ半導体素子と配線基板とをアンダーフィル樹脂で接着した構成の実装構造体が得られる。この半導体素子の実装構造体は、電磁ノイズによる影響を受けにくく、かつ半導体素子との熱膨張係数の大きな樹脂基板を配線基板として用いても、信頼性を高くすることができる。また、従来のようにはんだバンプを形成する必要もないことから、半導体素子の実装構造体を安価にすることもできる。さらに、配線基板側には内部側接続電極のみしか形成されていないので、位置合せが容易に行える。   By adopting such a configuration, a mounting having a shield electrode so as to surround the electrode terminal of the semiconductor element and the internal connection electrode of the wiring board, and the semiconductor element and the wiring board are bonded with an underfill resin. A structure is obtained. This semiconductor element mounting structure can be highly reliable even when a resin substrate having a large thermal expansion coefficient with respect to the semiconductor element is used as a wiring board and is not easily affected by electromagnetic noise. Further, since it is not necessary to form solder bumps as in the prior art, the semiconductor element mounting structure can be made inexpensive. Furthermore, since only the internal connection electrodes are formed on the wiring board side, alignment can be performed easily.

さらに、上記構成において、シールド電極は電極端子の外径サイズよりもその外径または幅を小さくしてもよい。また、配線基板の内部側接続電極は、はんだが自己集合して成長する領域の形状が電極端子と同じ形状であってもよい。さらに、配線基板の内部側接続電極、または外周側接続電極と内部側接続電極のはんだ粉が自己集合して成長する領域を除く領域には、はんだ粉の自己集合を阻害する表面保護膜を設けてもよい。   Further, in the above configuration, the shield electrode may have an outer diameter or a width smaller than the outer diameter size of the electrode terminal. Further, the internal connection electrode of the wiring board may have the same shape as the electrode terminal in the region where the solder grows by self-assembly. Furthermore, a surface protective film that inhibits the self-assembly of solder powder is provided in areas other than the areas where the solder powder of the internal connection electrode of the wiring board or the peripheral connection electrode and the internal connection electrode self-assembles and grows. May be.

このような構成とすることにより、はんだによる接続方式でありながら、シールド電極または外周側接続電極の幅を小さくしても高く成長させることができる。したがって、はんだのアスペクト比、すなわち幅に対する高さの比を大きくしても接続できる。この結果、半導体素子の電極端子を設ける領域を広げることができる。あるいは、シールド電極を形成するために、半導体素子の形状を大きくする必要がなくなり、半導体素子の低コスト化もできる。   By adopting such a configuration, it is possible to grow high even if the width of the shield electrode or the outer peripheral side connection electrode is reduced, although it is a connection method using solder. Therefore, the connection can be made even if the aspect ratio of the solder, that is, the ratio of the height to the width is increased. As a result, the region where the electrode terminals of the semiconductor element are provided can be expanded. Alternatively, it is not necessary to increase the shape of the semiconductor element in order to form the shield electrode, and the cost of the semiconductor element can be reduced.

本発明にかかる半導体素子の実装方法は、樹脂中に含有する対流添加剤が加熱により沸騰または分解してガスを発生し、これにより対流を生じてはんだが自己集合する現象を利用して、半導体素子の電極端子と配線基板の内部側接続電極とを接続するだけでなく、外周部に形成したシールド電極と外周側接続電極とを同時に接続し、さらに樹脂を硬化させてこれをアンダーフィル樹脂として用いる方法である。   The semiconductor element mounting method according to the present invention uses a phenomenon in which a convection additive contained in a resin boils or decomposes by heating to generate a gas, thereby generating convection and causing solder to self-assemble. Not only is the electrode terminal of the element connected to the internal connection electrode of the wiring board, but also the shield electrode formed on the outer periphery and the external connection electrode are connected simultaneously, and the resin is further cured to serve as an underfill resin. This method is used.

したがって、外周部にシールド電極を設けた構成で、アンダーフィル樹脂を半導体素子の全面に均一に設けることが可能となる。この結果、電磁シールド効果を有し、かつ半導体素子との熱膨張係数の差が大きな樹脂からなる配線基板等においても信頼性の高い実装構造体を実現することができるという大きな効果を奏する。   Therefore, the underfill resin can be uniformly provided on the entire surface of the semiconductor element with the configuration in which the shield electrode is provided on the outer peripheral portion. As a result, there is a great effect that a highly reliable mounting structure can be realized even in a wiring board made of a resin having an electromagnetic shielding effect and having a large difference in thermal expansion coefficient from the semiconductor element.

図1は、本発明の実施の形態にかかる半導体素子の実装方法の主要工程を説明するための断面図である。また、図2は、本実施の形態に用いる半導体素子のシールド電極および電極端子側から見た平面図である。   FIG. 1 is a cross-sectional view for explaining main processes of a semiconductor device mounting method according to an embodiment of the present invention. FIG. 2 is a plan view seen from the shield electrode and electrode terminal side of the semiconductor element used in the present embodiment.

本実施の形態では、図2に示すように、半導体素子10には、半導体基板12の回路形成面側の外周部に連続した形状のシールド電極16が設けられ、このシールド電極16の内側に電極端子14が設けられている。この電極端子14は、半導体基板12の回路(図示せず)と図示しない配線で接続されている。本実施の形態では、はんだが自己集合して成長する領域は円形状である。この円形部に選択的にはんだが自己集合して成長していき、配線基板20の内部側接続電極24上に成長したはんだと結合して一体化し、接続が行われる。   In the present embodiment, as shown in FIG. 2, the semiconductor element 10 is provided with a shield electrode 16 having a continuous shape on the outer peripheral portion on the circuit forming surface side of the semiconductor substrate 12, and an electrode is formed inside the shield electrode 16. A terminal 14 is provided. The electrode terminal 14 is connected to a circuit (not shown) of the semiconductor substrate 12 by a wiring (not shown). In the present embodiment, the region where the solder self-assembles and grows is circular. Solder selectively grows by self-assembly in this circular portion, and is combined with the solder grown on the internal connection electrode 24 of the wiring board 20 to be connected and connected.

このために、この円形部の電極端子14の少なくとも表面は、はんだに対して濡れ性のよい金属材料で形成されている。同様に、シールド電極16の少なくとも表面には、はんだに対して濡れ性のよい金属材料が形成されている。   For this reason, at least the surface of this circular electrode terminal 14 is formed of a metal material having good wettability with respect to solder. Similarly, a metal material having good wettability with respect to solder is formed on at least the surface of the shield electrode 16.

これらの金属材料としては、例えば金(Au)、銀(Ag)、銅(Cu)、ニッケル(Ni)、パラジウム(Pd)、ロジウム(Rh)、白金(Pt)、イリジウム(Ir)等の材料だけでなく、はんだを構成する錫(Sn)やインジウム(In)等を用いることができる。   Examples of these metal materials include gold (Au), silver (Ag), copper (Cu), nickel (Ni), palladium (Pd), rhodium (Rh), platinum (Pt), iridium (Ir), and the like. In addition, tin (Sn), indium (In), or the like constituting the solder can be used.

なお、シールド電極16や電極端子14と回路とを接続するために配線が形成されているが、これらの配線を含めてはんだが自己集合して成長させたくない領域には、例えば酸化膜や窒化膜、酸化窒化膜等の無機材料からなる表面保護膜あるいはポリイミド等の樹脂からなる表面保護膜を形成している。   Wirings are formed to connect the shield electrode 16 and the electrode terminals 14 to the circuit. In these regions, for example, an oxide film or a nitridation is not desired in a region where the solder does not self-assemble and grow. A surface protective film made of an inorganic material such as a film or an oxynitride film or a surface protective film made of a resin such as polyimide is formed.

また、配線基板20は、例えば樹脂基板22を用いて、その表面には半導体素子10のシールド電極16と対向する位置に外周側接続電極26および電極端子14と対向する位置に内部側接続電極24とが設けられている。また、外周側接続電極26の幅と形状は、シールド電極16とほぼ同じ形状である。   In addition, the wiring substrate 20 uses, for example, a resin substrate 22, and on the surface thereof, the inner side connection electrode 24 is located at a position facing the outer peripheral side connection electrode 26 and the electrode terminal 14 at a position facing the shield electrode 16 of the semiconductor element 10. And are provided. Further, the width and shape of the outer peripheral side connection electrode 26 are substantially the same as those of the shield electrode 16.

さらに、内部側接続電極24の形状も、電極端子14の形状とほぼ同じにしてある。配線基板20の表面には、外周側接続電極26と内部側接続電極24だけでなく、これらに接続された配線(図示せず)も形成されている。これらの配線上にはんだが自己集合して成長しないように、半導体素子10の場合と同様に、例えば無機酸化膜やポリイミド等の樹脂からなる表面保護膜を形成している。   Furthermore, the shape of the internal connection electrode 24 is also substantially the same as the shape of the electrode terminal 14. On the surface of the wiring board 20, not only the outer peripheral side connection electrode 26 and the inner side connection electrode 24 but also wiring (not shown) connected thereto are formed. In order to prevent the solder from self-assembling and growing on these wirings, a surface protective film made of a resin such as an inorganic oxide film or polyimide is formed as in the semiconductor element 10.

なお、配線基板20としては、その表面に半導体素子10を実装するための内部側接続電極24および外周側接続電極26が形成されているだけでなく、内部や裏面に配線パターンが形成された多層構造であってもよい。さらに、配線基板20の内部あるいは半導体素子10を実装する領域以外の面上に別の半導体素子や受動部品等が実装されていてもよい。   The wiring board 20 is not only formed with an internal connection electrode 24 and an outer peripheral connection electrode 26 for mounting the semiconductor element 10 on the surface thereof, but also a multilayer in which a wiring pattern is formed on the inside and the back surface. It may be a structure. Furthermore, another semiconductor element, a passive component, or the like may be mounted inside the wiring substrate 20 or on a surface other than the region where the semiconductor element 10 is mounted.

以下、本実施の形態の半導体素子の実装方法について、図1をもとにして詳細に説明する。   Hereinafter, a method for mounting a semiconductor element according to the present embodiment will be described in detail with reference to FIG.

最初に、図1(a)に示すように、樹脂組成物30を配線基板20上の所定位置に所望量塗布する。具体的には、半導体素子10を搭載後に樹脂組成物30が塗れ広がり配線基板20の外周側接続電極26と内部側接続電極24とを含む領域を覆う形状になるように塗布する。このときの樹脂組成物30は、ペースト状で、比較的粘度が大きいものを使用する。この樹脂組成物30は、はんだ粉32、対流添加剤(図示せず)およびはんだ粉32の熔融温度で流動性を有する樹脂34を主成分として含み構成されている。   First, as shown in FIG. 1A, a desired amount of the resin composition 30 is applied to a predetermined position on the wiring board 20. Specifically, after mounting the semiconductor element 10, the resin composition 30 is spread and applied so as to cover the region including the outer peripheral side connection electrode 26 and the inner side connection electrode 24 of the wiring substrate 20. The resin composition 30 at this time is a paste and has a relatively high viscosity. The resin composition 30 includes a solder powder 32, a convection additive (not shown), and a resin 34 having fluidity at the melting temperature of the solder powder 32 as main components.

なお、樹脂組成物30を塗布する前に、配線基板20の表面、特に内部側接続電極24および外周側接続電極26の表面は、例えばアセトンやアルコール等の有機溶剤あるいは洗浄液で清浄化処理を行っておくことが望ましい。   Before applying the resin composition 30, the surface of the wiring substrate 20, particularly the surfaces of the inner side connection electrode 24 and the outer side connection electrode 26, are cleaned with an organic solvent such as acetone or alcohol or a cleaning solution. It is desirable to keep it.

次に、図1(b)に示すように、半導体素子10のシールド電極16と配線基板20の外周側接続電極26とが対向し、電極端子14と内部側接続電極24とが対向するように、半導体素子10を位置あわせして樹脂組成物30上に当接させる。この当接により、樹脂組成物30は半導体素子10と配線基板20との間に均一に広がり、かつ所定の厚みを保持する。このとき、半導体素子10と配線基板20との一定の隙間を保持するために、半導体素子10を機械的に固定しておくことが望ましい。   Next, as shown in FIG. 1B, the shield electrode 16 of the semiconductor element 10 and the outer peripheral side connection electrode 26 of the wiring board 20 face each other, and the electrode terminal 14 and the inner side connection electrode 24 face each other. The semiconductor element 10 is aligned and brought into contact with the resin composition 30. By this contact, the resin composition 30 spreads uniformly between the semiconductor element 10 and the wiring board 20 and maintains a predetermined thickness. At this time, it is desirable to mechanically fix the semiconductor element 10 in order to maintain a certain gap between the semiconductor element 10 and the wiring board 20.

さらに、この場合に、半導体素子10と配線基板20との間の平行度を保持することが望ましい。さらに、半導体素子10の表面、とくに電極端子14およびシールド電極16の表面は、例えばアセトンやアルコール等の有機溶剤あるいは洗浄液で清浄化処理を行っておくことが望ましい。   Furthermore, in this case, it is desirable to maintain the parallelism between the semiconductor element 10 and the wiring board 20. Further, it is desirable that the surface of the semiconductor element 10, particularly the surface of the electrode terminal 14 and the shield electrode 16, be cleaned with an organic solvent such as acetone or alcohol or a cleaning liquid.

なお、半導体素子の電極端子14および配線基板20の内部側接続電極24の配列ピッチについては、特に制約なく接続できるが、少なくともはんだ粉32の外径よりも大きくしておけば、隣接する電極端子14および内部側接続電極24間でショートすることはない。   Note that the arrangement pitch of the electrode terminals 14 of the semiconductor element and the internal connection electrodes 24 of the wiring board 20 can be connected without any particular limitation. However, as long as at least the outer diameter of the solder powder 32 is set, the adjacent electrode terminals 14 and the internal connection electrode 24 are not short-circuited.

なお、本発明で用いるはんだ粉32の平均的な形状は10μm〜25μmである。したがって、配列ピッチとしては、25μm以上とすればショートすることはない。   In addition, the average shape of the solder powder 32 used by this invention is 10 micrometers-25 micrometers. Therefore, if the arrangement pitch is 25 μm or more, there is no short circuit.

次に、図1(c)に示すように、少なくとも樹脂組成物30をはんだ粉32が熔融する温度まで加熱する。   Next, as shown in FIG. 1C, at least the resin composition 30 is heated to a temperature at which the solder powder 32 melts.

なお、樹脂組成物30の加熱は、配線基板20側からヒータで加熱してもよいし、半導体素子10側からヒータで加熱してもよい。あるいは、全体を加熱炉中に入れて全面から加熱する方法でもよい。あるいは、マイクロ波を照射して樹脂組成物30と、その近傍のみを加熱してもよい。   The resin composition 30 may be heated from the wiring board 20 side with a heater, or may be heated from the semiconductor element 10 side with a heater. Or the method of putting the whole in a heating furnace and heating from the whole surface may be used. Or you may irradiate a microwave and may heat only the resin composition 30 and its vicinity.

この加熱温度では、樹脂34の粘度が小さくなり流動性が増加する。同時に、この温度で対流添加剤が沸騰あるいは分解してガスを放出する。このとき、放出されたガスを含む樹脂組成物30は、半導体素子10と配線基板20とで閉じられた空間に充填されているので、ガスはシールド電極16および外周側接続電極24で形成される隙間から矢印Aに示すように外部空間に放出されることになる。   At this heating temperature, the viscosity of the resin 34 decreases and the fluidity increases. At the same time, the convective additive boils or decomposes at this temperature and releases gas. At this time, since the resin composition 30 containing the released gas is filled in a space closed by the semiconductor element 10 and the wiring substrate 20, the gas is formed by the shield electrode 16 and the outer peripheral connection electrode 24. As shown by an arrow A from the gap, it is discharged to the external space.

なお、対流添加剤の沸騰あるいは分解は、必ずしもはんだの溶融温度に達してからでなくてもよい。はんだが溶融する温度より低い温度で沸騰あるいは分解してガスを発生してもよい。   The boiling or decomposition of the convective additive does not necessarily have to be after the melting temperature of the solder has been reached. Gas may be generated by boiling or decomposition at a temperature lower than the temperature at which the solder melts.

したがって、シールド電極14の内側領域で発生したガスは、樹脂組成物30中を対流しながら、外周部に到達し矢印Aに示すように抜け出ていく。このガスによる対流のエネルギーを受けて、はんだ粉32も樹脂組成物30中を激しく動き回る。はんだ粉32がこのように運動しているときに、電極端子14、シールド電極16、内部側接続電極24および外周側接続電極26の表面に接触すると、これらの表面ははんだに対して濡れ性が良好であるため捕捉され、熔融状態のはんだとなり成長していく。   Therefore, the gas generated in the inner region of the shield electrode 14 reaches the outer peripheral portion while convection through the resin composition 30 and escapes as shown by the arrow A. In response to the energy of the convection due to the gas, the solder powder 32 also moves violently in the resin composition 30. When the solder powder 32 moves in this way, if the surfaces of the electrode terminal 14, the shield electrode 16, the inner side connection electrode 24, and the outer side connection electrode 26 come into contact with each other, these surfaces have wettability to the solder. Since it is good, it is captured and grows into a molten solder.

図1(c)では、電極端子14、内部側接続電極24、シールド電極16および外周側接続電極26の表面に、それぞれ熔融した状態で成長する途中のはんだ36、38、40、42を模式的に示している。   In FIG. 1 (c), solders 36, 38, 40, and 42 in the middle of growing in a melted state on the surfaces of the electrode terminal 14, the internal connection electrode 24, the shield electrode 16 and the outer peripheral connection electrode 26 are schematically shown. It shows.

上記したように、加熱により対流添加剤はガスを放出するが、シールド電極16の内側領域で発生したガスは、シールド電極16および外周側接続電極26の隙間を抜けて、矢印44に示すように外部へ放出される。本実施の形態の場合には、加熱初期においてもシールド電極16と外周側接続電極26とが電極端子14と内部側接続電極24とが形成されている領域を取り囲んでいるため、発生したガスはすぐに外部へ放出され難くなる。   As described above, the convective additive releases the gas by heating, but the gas generated in the inner region of the shield electrode 16 passes through the gap between the shield electrode 16 and the outer peripheral connection electrode 26, as indicated by an arrow 44. Released to the outside. In the case of the present embodiment, since the shield electrode 16 and the outer peripheral side connection electrode 26 surround the region where the electrode terminal 14 and the inner side connection electrode 24 are formed even in the initial stage of heating, the generated gas is It becomes difficult to be released to the outside immediately.

さらに、時間が経過すると、対流添加剤からのガス放出量が減少する。一方、シールド電極16と外周側接続電極26との表面にはさらにはんだが成長するため隙間はより小さくなり、外部へのガスの放出がさらに抑制される。したがって、本実施の形態のように、外周部に連続してシールド電極16と外周側接続電極26とを設けることで、対流添加剤から放出されたガスの対流を比較的長く維持することができる。この結果、電極端子14、内部側接続電極24、シールド電極16および外周側接続電極26の表面に対して、はんだ粉32が接触する割合が増加する。   Furthermore, as time elapses, the amount of gas released from the convective additive decreases. On the other hand, since solder further grows on the surfaces of the shield electrode 16 and the outer peripheral connection electrode 26, the gap becomes smaller, and the release of gas to the outside is further suppressed. Therefore, the convection of the gas released from the convection additive can be maintained relatively long by providing the shield electrode 16 and the outer peripheral connection electrode 26 continuously in the outer peripheral portion as in the present embodiment. . As a result, the rate at which the solder powder 32 contacts the surfaces of the electrode terminal 14, the internal connection electrode 24, the shield electrode 16, and the outer peripheral connection electrode 26 increases.

このように接触する割合が増加するため、樹脂組成物30中のはんだ粉32はほとんど確実に電極端子14、内部側接続電極24、シールド電極16および外周側接続電極26の表面に付着して成長を生じる。この結果、対流添加剤からのガス放出がなくなった最終状態において、樹脂34に残存するはんだ粉32をほぼ確実になくすことができる。   Since the contact ratio increases in this way, the solder powder 32 in the resin composition 30 almost certainly adheres to the surfaces of the electrode terminal 14, the internal connection electrode 24, the shield electrode 16 and the outer peripheral connection electrode 26 and grows. Produce. As a result, it is possible to almost certainly eliminate the solder powder 32 remaining on the resin 34 in the final state where the gas release from the convective additive is eliminated.

また、矢印Aに示すようなガス放出とともに、はんだ粉32がシールド電極16および外周側接続電極26よりも外部へ流される割合も減少するので、はんだ粉32を有効に接続のために使用することができる。   Moreover, since the rate at which the solder powder 32 flows to the outside of the shield electrode 16 and the outer peripheral connection electrode 26 is reduced with the gas discharge as shown by the arrow A, the solder powder 32 should be used for effective connection. Can do.

このようにして、はんだを成長させていき、対流添加剤によるガス放出がなくなった時点では、電極端子14と内部側接続電極24との間、およびシールド電極16と外周側接続電極26との間が、それぞれはんだ44、46により接続される。   In this way, when the solder is grown and gas is not released by the convection additive, it is between the electrode terminal 14 and the internal connection electrode 24 and between the shield electrode 16 and the outer peripheral connection electrode 26. Are connected by solders 44 and 46, respectively.

つぎに、図1(d)に示すように、はんだ44、46により接続され、対流添加剤によるガス放出がなくなった後で、樹脂34を硬化させる。樹脂組成物30中の樹脂34として、熱硬化性樹脂を用いた場合には、はんだ粉32を熔融させる温度よりさらに高い温度に加熱することで硬化させることができる。この硬化により、半導体素子10と配線基板20との間は接着され、アンダーフィル樹脂が形成できる。   Next, as shown in FIG. 1 (d), the resin 34 is cured after being connected by the solders 44 and 46 and after the gas is not released by the convection additive. When a thermosetting resin is used as the resin 34 in the resin composition 30, it can be cured by heating to a temperature higher than the temperature at which the solder powder 32 is melted. By this curing, the semiconductor element 10 and the wiring board 20 are bonded to each other, and an underfill resin can be formed.

これにより、本実施の形態の半導体素子の実装方法により作製した半導体の実装構造体を得ることができる。本実施の形態の半導体素子の実装構造体は、シールド電極14と外周側接続電極24とを接続するはんだ46、および電極端子16と内部側接続電極26とを接続するはんだ44を、自己集合させながら同時に成長させて接続している。したがって、シールド電極14、外周側接続電極24およびこれらを接続するはんだ46により密閉した構造を実現しながら、アンダーフィル樹脂を設けることができる。このため、例えば樹脂基板等のように半導体素子10と熱膨張係数差の大きな配線基板20を用いた場合であっても、高信頼性の実装構造体を実現できる。   Thus, a semiconductor mounting structure manufactured by the semiconductor element mounting method of the present embodiment can be obtained. The semiconductor element mounting structure according to the present embodiment self-assembles the solder 46 that connects the shield electrode 14 and the outer peripheral side connection electrode 24 and the solder 44 that connects the electrode terminal 16 and the inner side connection electrode 26. While growing and connecting at the same time. Therefore, the underfill resin can be provided while realizing a structure sealed by the shield electrode 14, the outer peripheral side connection electrode 24, and the solder 46 connecting them. For this reason, even if it is a case where the wiring board 20 with a large thermal expansion coefficient difference like the semiconductor element 10 is used, for example, a highly reliable mounting structure is realizable.

なお、はんだ粉32として、例えば錫−銀−銅(Sn−Ag−Cu)合金はんだを用い、対流添加剤として有機酸を活性成分とする樹脂系フラックスを用いた場合には、はんだ粉32を熔融するための配線基板20の加熱温度としては、150℃〜220℃の範囲に設定することが好ましい。   In addition, as the solder powder 32, for example, a tin-silver-copper (Sn-Ag-Cu) alloy solder is used, and when a resin flux containing an organic acid as an active component is used as a convection additive, the solder powder 32 is used. The heating temperature of the wiring board 20 for melting is preferably set in the range of 150 ° C to 220 ° C.

また、接続が完了した後に、樹脂34を熱硬化させて半導体素子10と配線基板20とを接着固定させる場合、例えば熱硬化性樹脂としてエポキシ樹脂を用いる場合には、235℃〜260℃の範囲に加熱することが好ましい。   In addition, after the connection is completed, when the resin 34 is thermoset and the semiconductor element 10 and the wiring board 20 are bonded and fixed, for example, when an epoxy resin is used as the thermosetting resin, a range of 235 ° C. to 260 ° C. It is preferable to heat it.

なお、はんだ粉32としては、上記のSn−Ag−Cu合金に限定されることはなく、100℃〜300℃の範囲に融点をもつ低融点金属であればよい。例えば、錫−亜鉛(Sn−Zn)系合金はんだ、錫−ビスマス(Sn−Bi)系合金はんだや銅−銀(Cu−Ag)系合金はんだ等を用いてもよい。   The solder powder 32 is not limited to the above Sn—Ag—Cu alloy, and may be any low melting point metal having a melting point in the range of 100 ° C. to 300 ° C. For example, a tin-zinc (Sn—Zn) alloy solder, a tin-bismuth (Sn—Bi) alloy solder, a copper-silver (Cu—Ag) alloy solder, or the like may be used.

また、対流添加剤としては、有機酸を活性成分とする樹脂系フラックスに限定されることはなく、配線基板20を加熱してはんだ粉32を熔融させる温度において沸騰あるいは分解してガスを放出する材料であればよく、例えば、グリセリンやワックス等を用いることができる。   Further, the convection additive is not limited to a resin-based flux containing an organic acid as an active component, and releases gas by boiling or decomposition at a temperature at which the wiring substrate 20 is heated to melt the solder powder 32. Any material can be used. For example, glycerin, wax, or the like can be used.

なお、対流添加剤としてフラックスを用いた場合、はんだ粉32の表面や、電極端子14、シールド電極16、内部側接続電極24及び外周側接続電極26の面上に形成された酸化膜を除去できる点で好ましい材料である。   When flux is used as the convection additive, the oxide film formed on the surface of the solder powder 32 and on the surfaces of the electrode terminal 14, the shield electrode 16, the internal connection electrode 24, and the outer peripheral connection electrode 26 can be removed. This is a preferable material.

なお、上記電極の表面が金(Au)である場合には、酸化膜除去効果は特に不要である。   When the surface of the electrode is gold (Au), the oxide film removal effect is not particularly necessary.

また、配線基板20が、ガラスのような透明基板の場合には、樹脂組成物30の樹脂34として、光重合性オリゴマー等の光硬化性樹脂を用いて、光照射して硬化させてもよい。   Further, when the wiring substrate 20 is a transparent substrate such as glass, a photocurable resin such as a photopolymerizable oligomer may be used as the resin 34 of the resin composition 30 to be cured by light irradiation. .

図3は、本実施の形態の半導体素子の実装方法に用いる変形例の半導体素子50の平面図である。この変形例の半導体素子50は、半導体基板12の回路形成面側の外周部に4本の棒状電極54、56が設けられてシールド電極52が構成されている。このシールド電極52の内側領域に電極端子14が設けられていることについては、図2に示す半導体素子10と同じである。この電極端子14およびシールド電極52の表面は、選択的にはんだが自己集合して成長していくように、はんだに対して濡れ性の良好な金属が形成されている。   FIG. 3 is a plan view of a modified semiconductor element 50 used in the semiconductor element mounting method of the present embodiment. In the semiconductor element 50 of this modified example, four rod-shaped electrodes 54 and 56 are provided on the outer peripheral portion of the semiconductor substrate 12 on the circuit forming surface side to constitute a shield electrode 52. The electrode terminal 14 is provided in the inner region of the shield electrode 52, which is the same as the semiconductor element 10 shown in FIG. On the surfaces of the electrode terminal 14 and the shield electrode 52, a metal having good wettability with respect to the solder is formed so that the solder selectively grows by self-assembly.

これらの金属材料としては、例えば金(Au)、銀(Ag)、銅(Cu)、ニッケル(Ni)、パラジウム(Pd)、ロジウム(Rh)、白金(Pt)、イリジウム(Ir)等の材料だけでなく、はんだを構成する錫(Sn)やインジウム(In)等を用いることができる。   Examples of these metal materials include gold (Au), silver (Ag), copper (Cu), nickel (Ni), palladium (Pd), rhodium (Rh), platinum (Pt), iridium (Ir), and the like. In addition, tin (Sn), indium (In), or the like constituting the solder can be used.

なお、シールド電極52や電極端子14と回路とを接続するために配線が形成されているが、これらの配線を含めてはんだが自己集合して成長させたくない領域には、例えば無機酸化膜やポリイミド等の樹脂等からなる表面保護膜を形成している。   Note that wiring is formed to connect the shield electrode 52 and the electrode terminal 14 to the circuit. In the region where the solder is not desired to be self-assembled and grown including the wiring, for example, an inorganic oxide film or A surface protective film made of a resin such as polyimide is formed.

配線基板は図示していないが、図1に示した配線基板と同様な構成である。すなわち、例えば樹脂基板を用いて、その表面には半導体素子50のシールド電極52と対向する位置に外周側接続電極、電極端子14と対向する位置に内部側接続電極とが設けられている。また、外周側接続電極の幅と形状は、シールド電極52とほぼ同じ形状である。   Although the wiring board is not shown, it has the same configuration as the wiring board shown in FIG. That is, for example, using a resin substrate, an outer peripheral side connection electrode is provided on the surface thereof at a position facing the shield electrode 52 of the semiconductor element 50, and an inner side connection electrode is provided at a position facing the electrode terminal 14. Further, the width and shape of the outer peripheral connection electrode are substantially the same as those of the shield electrode 52.

さらに、内部側接続電極の形状も、電極端子14の形状とほぼ同じにしてある。配線基板の表面には、外周側接続電極と内部側接続電極だけでなく、これらに接続された配線(図示せず)も形成されている。これらの配線上にはんだが自己集合して成長しないように、半導体素子10の場合と同様に、例えば無機酸化膜やポリイミド等の樹脂からなる表面保護膜を形成している。   Further, the shape of the internal connection electrode is also substantially the same as the shape of the electrode terminal 14. On the surface of the wiring board, not only the outer peripheral side connection electrode and the inner side connection electrode but also wiring (not shown) connected to these are formed. In order to prevent the solder from self-assembling and growing on these wirings, a surface protective film made of a resin such as an inorganic oxide film or polyimide is formed as in the semiconductor element 10.

なお、配線基板としては、その表面に半導体素子50を実装するための内部側接続電極および外周側接続電極が形成されているだけでなく、内部や裏面に配線パターンが形成された多層構造であってもよい。さらに、配線基板の内部あるいは半導体素子50を実装する領域以外の面上に別の半導体素子や受動部品等が実装されていてもよい。   The wiring board has a multilayer structure in which not only internal connection electrodes and outer peripheral connection electrodes for mounting the semiconductor element 50 are formed on the front surface, but also wiring patterns are formed on the inside and back surfaces. May be. Furthermore, another semiconductor element, a passive component, or the like may be mounted inside the wiring board or on a surface other than the region where the semiconductor element 50 is mounted.

このような半導体素子50と配線基板を用いて実装する方法は、図1の工程と同じである。ただし、この変形例の半導体素子50の場合、シールド電極52は半導体素子50の4角には形成されていない。このために、この領域から対流添加剤から発生したガスが抜け出ていくが、電極端子14、シールド電極52、内部側接続電極および外周側接続電極へのはんだの成長と接続は特に問題なく行うことができる。また、4角の開口領域の大きさが半導体素子50の駆動周波数から決まる波長の1/4以下であれば、充分電磁シールド効果を得ることができる。   A method of mounting using such a semiconductor element 50 and a wiring board is the same as the process of FIG. However, in the case of the semiconductor element 50 of this modification, the shield electrodes 52 are not formed at the four corners of the semiconductor element 50. For this reason, the gas generated from the convection additive escapes from this region, but solder growth and connection to the electrode terminal 14, the shield electrode 52, the internal connection electrode and the external connection electrode should be performed without any particular problem. Can do. In addition, if the size of the square opening region is ¼ or less of the wavelength determined by the driving frequency of the semiconductor element 50, a sufficient electromagnetic shielding effect can be obtained.

図4は、本実施の形態の半導体素子の実装方法に用いるためのさらに別の変形例の半導体素子60の平面図である。この変形例の半導体素子60は、半導体基板12の回路形成面側の外周部に4本のL型形状電極64、66が設けられてシールド電極62が構成されている。このシールド電極62の内側領域に電極端子14が設けられていることについては、図2に示す半導体素子10と同じである。   FIG. 4 is a plan view of yet another modified semiconductor element 60 for use in the semiconductor element mounting method of the present embodiment. In the semiconductor element 60 of this modified example, four L-shaped electrodes 64 and 66 are provided on the outer peripheral portion of the semiconductor substrate 12 on the circuit forming surface side to constitute a shield electrode 62. The electrode terminal 14 is provided in the inner region of the shield electrode 62 as in the semiconductor element 10 shown in FIG.

この電極端子14およびシールド電極62の表面は、選択的にはんだが自己集合して成長していくように、はんだに対して濡れ性の良好な金属が形成されている。また、配線基板は図示しないが、半導体素子60のシールド電極62と電極端子14に対向する位置に、それぞれ外周側接続電極と内部側接続電極を設けている。これらの構成については、図1で説明した配線基板20と同じであるので説明を省略する。また、このような半導体素子60と配線基板を用いて実装する方法は、図1の工程と同じであるので、同様に説明を省略する。   On the surfaces of the electrode terminal 14 and the shield electrode 62, a metal having good wettability with respect to the solder is formed so that the solder selectively grows by self-assembly. Further, although not shown in the drawing, an outer peripheral side connection electrode and an inner side connection electrode are provided at positions facing the shield electrode 62 and the electrode terminal 14 of the semiconductor element 60, respectively. Since these configurations are the same as those of the wiring board 20 described with reference to FIG. Moreover, since the mounting method using such a semiconductor element 60 and a wiring board is the same as the process of FIG. 1, description is abbreviate | omitted similarly.

ただし、この変形例の半導体素子60の場合、シールド電極62は図からわかるように4箇所で切断されている。このために、この領域から対流添加剤から発生したガスが抜け出ていくが、電極端子14、シールド電極62、内部側接続電極および外周側接続電極へのはんだの成長と接続は特に問題なく行うことができる。また、この切断した領域の大きさが半導体素子60の駆動周波数から決まる波長の1/4以下であれば、充分電磁シールド効果を得ることができる。   However, in the case of the semiconductor element 60 of this modification, the shield electrode 62 is cut at four places as can be seen from the drawing. For this reason, the gas generated from the convective additive escapes from this region, but the solder growth and connection to the electrode terminal 14, the shield electrode 62, the internal connection electrode and the external connection electrode should be performed without any particular problem. Can do. Further, if the size of the cut region is ¼ or less of the wavelength determined from the driving frequency of the semiconductor element 60, the electromagnetic shielding effect can be sufficiently obtained.

図5は、本実施の形態の半導体素子の実装方法に用いるためのさらに別の変形例の半導体素子70の平面図である。この変形例の半導体素子70は、半導体基板12の回路形成面側の外周部に、電極端子14よりも外径サイズが小さな円形状電極72が複数設けられてシールド電極を構成している。このシールド電極を構成する円形状電極72の内側領域に電極端子14が設けられていることについては、図2に示す半導体素子10と同じである。   FIG. 5 is a plan view of yet another modified semiconductor element 70 for use in the semiconductor element mounting method of the present embodiment. In the semiconductor element 70 of this modified example, a plurality of circular electrodes 72 having an outer diameter size smaller than that of the electrode terminals 14 are provided on the outer peripheral portion of the semiconductor substrate 12 on the circuit forming surface side to constitute a shield electrode. The electrode terminal 14 is provided in the inner region of the circular electrode 72 constituting the shield electrode, which is the same as the semiconductor element 10 shown in FIG.

この電極端子14および円形状電極72の表面は、選択的にはんだが自己集合して成長していくように、はんだに対して濡れ性の良好な金属が形成されている。また、配線基板は図示しないが、半導体素子70の円形状電極72と電極端子14に対向する位置に、それぞれ外周側接続電極と内部側接続電極を設けている。これらの構成については、図1で説明した配線基板20と同じであるので説明を省略する。また、このような半導体素子60と配線基板を用いて実装する方法は、図1の工程と同じであるので、同様に説明を省略する。   On the surfaces of the electrode terminal 14 and the circular electrode 72, a metal having good wettability with respect to the solder is formed so that the solder selectively grows by self-assembly. Further, although not shown, the outer peripheral side connection electrode and the inner side connection electrode are provided at positions facing the circular electrode 72 and the electrode terminal 14 of the semiconductor element 70, respectively. Since these configurations are the same as those of the wiring board 20 described with reference to FIG. Moreover, since the mounting method using such a semiconductor element 60 and a wiring board is the same as the process of FIG. 1, description is abbreviate | omitted similarly.

ただし、この変形例の半導体素子70の場合、シールド電極は複数の円形状電極72により構成されている。したがって、隣接する円形状電極72間には隙間があり、この隙間から対流添加剤から発生したガスが抜け出ていく。しかし、電極端子14、シールド電極62、内部側接続電極および外周側接続電極へのはんだの成長と接続は特に問題なく行うことができる。また、隙間の大きさが半導体素子70の駆動周波数から決まる波長の1/4以下であれば、充分電磁シールド効果を得ることができる。   However, in the case of the semiconductor element 70 of this modification, the shield electrode is composed of a plurality of circular electrodes 72. Therefore, there is a gap between the adjacent circular electrodes 72, and the gas generated from the convection additive escapes from this gap. However, the growth and connection of the solder to the electrode terminal 14, the shield electrode 62, the inner side connection electrode, and the outer peripheral side connection electrode can be performed without any particular problem. Further, if the size of the gap is ¼ or less of the wavelength determined from the driving frequency of the semiconductor element 70, the electromagnetic shielding effect can be sufficiently obtained.

なお、この変形例の半導体素子70の実装方法の場合、半導体素子70については、円形状電極72によりシールド電極を構成したが、配線基板は必ずしも円形状電極72と同じ形状にする必要はない。例えば、図1で説明したような外周部に連続した形状を有する外周側接続電極としてもよい。   In the case of the mounting method of the semiconductor element 70 of this modified example, the shield electrode is configured by the circular electrode 72 for the semiconductor element 70, but the wiring board is not necessarily required to have the same shape as the circular electrode 72. For example, it is good also as an outer peripheral side connection electrode which has a shape which continued to the outer peripheral part as demonstrated in FIG.

図6は、本実施の形態の半導体素子の実装方法に用いるためのさらに別の変形例の半導体素子80の平面図である。この変形例の半導体素子80は、半導体基板12の回路形成面側の外周部に4本のL型形状電極84と、このL型形状電極84間の隙間をカバーするカバー電極86が設けられており、これらによりシールド電極82が構成されている。このシールド電極82の内側領域に電極端子88が設けられているが、この半導体素子80の場合には、はんだが成長する領域を四角形状としていることが、図2に示す半導体素子10とは異なる。   FIG. 6 is a plan view of yet another modified semiconductor element 80 for use in the semiconductor element mounting method of the present embodiment. In the semiconductor element 80 of this modification, four L-shaped electrodes 84 and a cover electrode 86 that covers the gap between the L-shaped electrodes 84 are provided on the outer periphery of the semiconductor substrate 12 on the circuit forming surface side. These constitute the shield electrode 82. The electrode terminal 88 is provided in the inner region of the shield electrode 82. In the case of the semiconductor element 80, the area where the solder grows is a square shape, which is different from the semiconductor element 10 shown in FIG. .

この電極端子88およびシールド電極82の表面は、選択的にはんだが自己集合して成長していくように、はんだに対して濡れ性の良好な金属が形成されている。また、配線基板は図示しないが、半導体素子80のシールド電極82と電極端子88に対向する位置に、それぞれ外周側接続電極と内部側接続電極を設けている。これらの構成については、図1で説明した配線基板20と同じであるので説明を省略する。また、このような半導体素子80と配線基板を用いて実装する方法は、図1の工程と同じであるので、同様に説明を省略する。   On the surfaces of the electrode terminal 88 and the shield electrode 82, a metal having good wettability with respect to the solder is formed so that the solder selectively grows by self-assembly. Although the wiring board is not shown, an outer peripheral side connection electrode and an inner side connection electrode are provided at positions facing the shield electrode 82 and the electrode terminal 88 of the semiconductor element 80, respectively. Since these configurations are the same as those of the wiring board 20 described with reference to FIG. Moreover, since the mounting method using such a semiconductor element 80 and a wiring board is the same as the process of FIG. 1, description is abbreviate | omitted similarly.

この変形例の半導体素子80の場合、シールド電極82は図からわかるように4箇所でガスの抜け道がある。このために、この領域から対流添加剤から発生したガスが抜け出ていくが、電極端子14、シールド電極62、内部側接続電極および外周側接続電極へのはんだの成長と接続は特に問題なく行うことができる。また、この抜け道の大きさが半導体素子80の駆動周波数から決まる波長の1/4以下であれば、充分電磁シールド効果を得ることができる。   In the semiconductor element 80 of this modification, the shield electrode 82 has gas escape paths at four locations as can be seen from the figure. For this reason, the gas generated from the convective additive escapes from this region, but the solder growth and connection to the electrode terminal 14, the shield electrode 62, the internal connection electrode and the external connection electrode should be performed without any particular problem. Can do. Further, if the size of the loop-off path is ¼ or less of the wavelength determined from the driving frequency of the semiconductor element 80, a sufficient electromagnetic shielding effect can be obtained.

なお、この変形例の半導体素子80の実装の場合、半導体素子80については、L型形状電極84の隙間をカバーするカバー電極86を設けたが、配線基板は必ずしもこのようなシールド電極82と同じ形状にする必要はない。例えば、カバー電極86の近傍領域においては、L型形状電極84とカバー電極86とを含む幅に形成してもよい。このようにすれば、はんだが成長していく間にL型形状電極84とカバー電極86との間もはんだで接続されて、全体を密閉する構造とすることもできる。   In the case of mounting the semiconductor element 80 of this modification, the semiconductor element 80 is provided with a cover electrode 86 that covers the gap between the L-shaped electrodes 84, but the wiring board is not necessarily the same as the shield electrode 82. It does not need to be shaped. For example, in the vicinity of the cover electrode 86, a width including the L-shaped electrode 84 and the cover electrode 86 may be formed. In this way, the L-shaped electrode 84 and the cover electrode 86 are also connected by solder while the solder grows, and the whole structure can be sealed.

図7は、本実施の形態にかかる半導体素子の実装構造体の変形例を示す図である。   FIG. 7 is a view showing a modification of the semiconductor element mounting structure according to the present embodiment.

図7(a)は、配線基板20については、図1に示したものと同じであるが、半導体素子90にはシールド電極を設けていないことが特徴である。このようにシールド電極を設けなくても、配線基板20の外周側接続電極26上には、はんだ46が成長するので電磁シールドの効果を得ることができる。   FIG. 7A is the same as that shown in FIG. 1 for the wiring board 20, but is characterized in that no shield electrode is provided in the semiconductor element 90. Thus, even if the shield electrode is not provided, the solder 46 grows on the outer peripheral connection electrode 26 of the wiring board 20, so that the effect of electromagnetic shielding can be obtained.

図7(b)は、半導体素子10については、図1に示したものと同じであるが、配線基板92には外周側接続電極を設けていないことが特徴である。このように外周側接続電極を設けなくても、半導体素子10のシールド電極16上には、はんだ46が成長するので電磁シールドの効果を得ることができる。   FIG. 7B is the same as that shown in FIG. 1 for the semiconductor element 10, but is characterized in that no outer peripheral side connection electrode is provided on the wiring substrate 92. Thus, even if the outer peripheral side connection electrode is not provided, since the solder 46 grows on the shield electrode 16 of the semiconductor element 10, the effect of electromagnetic shielding can be obtained.

図7(c)は、半導体素子94および配線基板98のそれぞれについて、図1に示した半導体素子10および配線基板20とは少し異なる形状を有している。すなわち、半導体素子94のシールド電極96と配線基板98の外周側接続電極99とが対向する位置に形成されていないことである。この結果、図示するように、シールド電極96と外周側接続電極99のそれぞれの表面上にはんだ461、462が成長する。これにより、電磁シールド効果を得ることができる。   7C, the semiconductor element 94 and the wiring board 98 have shapes slightly different from those of the semiconductor element 10 and the wiring board 20 shown in FIG. That is, the shield electrode 96 of the semiconductor element 94 and the outer peripheral side connection electrode 99 of the wiring board 98 are not formed at positions facing each other. As a result, as shown in the drawing, solders 461 and 462 grow on the surfaces of the shield electrode 96 and the outer peripheral connection electrode 99, respectively. Thereby, an electromagnetic shielding effect can be obtained.

なお、シールド電極96と外周側接続電極99との表面に成長したはんだ461、462は、成長したときに互いに接合してもよい。   The solders 461 and 462 grown on the surfaces of the shield electrode 96 and the outer peripheral connection electrode 99 may be joined to each other when grown.

以上説明したように、本発明においては、はんだ粉がそれぞれの電極表面上で自己集合してはんだとして成長するので、従来のように相手側に必ずしも電極を設けなくても充分な電磁シールド効果を得ることができる。   As described above, in the present invention, since the solder powder self-assembles on each electrode surface and grows as a solder, a sufficient electromagnetic shielding effect can be obtained without necessarily providing an electrode on the other side as in the prior art. Obtainable.

なお、上記実施の形態では半導体素子を例として説明したが、この半導体素子としてはシリコン単結晶基板を用いた集積回路素子、ガリウム砒素単結晶基板等の化合物反動体基板を用いた素子、さらにはガラス基板等の表面に形成された多結晶シリコン半導体からなる素子、あるいはSOI素子(Silicon on Insulatorの略で、単結晶シリコンに酸化膜がはさまれた構造をもった素子)等、半導体素子であり、はんだ接続のための加熱温度に耐える素子であれば、特に制約なく実装することができる。   In the above embodiment, the semiconductor element is described as an example. However, as the semiconductor element, an integrated circuit element using a silicon single crystal substrate, an element using a compound reaction substrate such as a gallium arsenide single crystal substrate, A semiconductor element such as an element made of a polycrystalline silicon semiconductor formed on the surface of a glass substrate or the like or an SOI element (an abbreviation for Silicon on Insulator, an element having a structure in which an oxide film is sandwiched between single crystal silicons). If it is an element that can withstand the heating temperature for solder connection, it can be mounted without any particular limitation.

なお、本実施の形態では樹脂組成物に半導体素子を当接し、押圧力を加えた状態で配線基板を加熱したが、必ずしも押圧力を加える必要はない。対流添加剤からのガスにより半導体素子が動かない程度の形状と重量を有しておれば、特に押圧力を加えなくてもよい。   In the present embodiment, the semiconductor element is brought into contact with the resin composition and the wiring board is heated in a state where a pressing force is applied. However, the pressing force is not necessarily applied. If the shape and weight are such that the semiconductor element does not move due to the gas from the convection additive, no pressing force is particularly required.

また、本実施の形態では、対流添加剤としては、はんだが熔融する温度で沸騰してガスを発生させる材料だけでなく、この温度で分解してガスを発生させる材料を用いてもよい。   In the present embodiment, as the convective additive, not only a material that generates a gas by boiling at a temperature at which the solder melts, but also a material that decomposes at this temperature to generate a gas may be used.

本発明の半導体素子の実装方法および半導体素子の実装構造体は、樹脂中に含有する対流添加剤が加熱により沸騰または分解してガスを発生し、これにより対流を生じてはんだが自己集合する現象を利用して、半導体素子の電極端子と配線基板の内部側接続電極とを接続するだけでなく、外周部に形成したシールド電極と外周側接続電極とを同時に接続し、さらに樹脂を硬化させてこれをアンダーフィル樹脂として用いる方法であり、高機能の電子回路基板を実現することができ、種々の電子機器に対して有用である。   In the semiconductor element mounting method and semiconductor element mounting structure of the present invention, the convective additive contained in the resin boils or decomposes by heating to generate gas, thereby generating convection and self-assembling of the solder. In addition to connecting the electrode terminal of the semiconductor element and the internal connection electrode of the wiring board, the shield electrode formed on the outer peripheral portion and the outer peripheral connection electrode are simultaneously connected, and the resin is further cured. This is a method of using this as an underfill resin, which can realize a highly functional electronic circuit board and is useful for various electronic devices.

本発明の第1の実施の形態にかかる半導体素子の実装方法の主要工程を説明するための断面図Sectional drawing for demonstrating the main processes of the mounting method of the semiconductor element concerning the 1st Embodiment of this invention. 本発明の第1の実施の形態に用いる半導体素子のシールド電極および電極端子側から見た平面図The top view seen from the shield electrode and electrode terminal side of the semiconductor element used for the 1st Embodiment of this invention 本発明の第1の実施の形態の半導体素子の実装方法に用いる変形例の半導体素子の平面図The top view of the semiconductor element of the modification used for the mounting method of the semiconductor element of the 1st Embodiment of this invention 本発明の第1の実施の形態の半導体素子の実装方法に用いるためのさらに別の変形例の半導体素子の平面図The top view of the semiconductor element of another modification for using for the mounting method of the semiconductor element of the 1st Embodiment of this invention 本発明の第1の実施の形態の半導体素子の実装方法に用いるためのさらに別の変形例の半導体素子の平面図The top view of the semiconductor element of another modification for using for the mounting method of the semiconductor element of the 1st Embodiment of this invention 本発明の第1の実施の形態の半導体素子の実装方法に用いるためのさらに別の変形例の半導体素子の平面図The top view of the semiconductor element of another modification for using for the mounting method of the semiconductor element of the 1st Embodiment of this invention 本発明の第1の実施の形態にかかる半導体素子の実装構造体の変形例を示すための断面図Sectional drawing for showing the modification of the mounting structure of the semiconductor element concerning the 1st Embodiment of this invention 従来の半導体素子の接合方法を示す断面図Sectional drawing which shows the joining method of the conventional semiconductor element

符号の説明Explanation of symbols

10,50,60,70,80,90,94,100 半導体素子
12 半導体基板
14,88 電極端子
16,52,62,82,96 シールド電極
20,92,98,106 配線基板
22 樹脂基板
24 内部側接続電極
26,99 外周側接続電極
30 樹脂組成物
32 はんだ粉
34 樹脂
36,38,40,42,44,46,461,462 はんだ
54,56 棒状電極
64,66,84 L型形状電極
86 カバー電極
72 円形状電極
102 はんだバンプ
104 はんだ枠
108 接続端子
110 はんだ接合部
10, 50, 60, 70, 80, 90, 94, 100 Semiconductor element 12 Semiconductor substrate 14, 88 Electrode terminal 16, 52, 62, 82, 96 Shield electrode 20, 92, 98, 106 Wiring substrate 22 Resin substrate 24 Inside Side connection electrode 26, 99 Outer peripheral side connection electrode 30 Resin composition 32 Solder powder 34 Resin 36, 38, 40, 42, 44, 46, 461, 462 Solder 54, 56 Rod electrode 64, 66, 84 L-shaped electrode 86 Cover electrode 72 Circular electrode 102 Solder bump 104 Solder frame 108 Connection terminal 110 Solder joint

Claims (20)

外周部にシールド電極が配設され、前記シールド電極の内側に電極端子が配設された半導体素子と、
前記シールド電極に対向する位置に外周側接続電極および前記電極端子に対向する位置に内部側接続電極が配設された配線基板と、はんだ粉、対流添加剤および前記はんだ粉の熔融温度で流動性を有する樹脂を含む樹脂組成物とを準備する工程と、
前記配線基板の前記半導体素子と対向する面上に前記樹脂組成物を塗布する工程と、
前記シールド電極と前記外周側接続電極および前記電極端子と前記内部側接続電極をそれぞれ位置合せして、前記樹脂組成物表面に前記半導体素子を当接する工程と、
少なくとも前記樹脂組成物を加熱して、前記はんだ粉を熔融するとともに前記対流添加剤により前記はんだ粉を前記シールド電極と前記外周側接続電極との間および前記電極端子と前記内部側接続電極との間に自己集合させながら成長させて、これらをはんだ接続する工程と、
前記樹脂組成物中の前記樹脂を硬化させて前記半導体素子と前記配線基板との間にアンダーフィル樹脂を設ける工程と、
を含むことを特徴とする半導体素子の実装方法。
A semiconductor element in which a shield electrode is disposed on the outer periphery, and an electrode terminal is disposed on the inner side of the shield electrode;
A wiring board having an outer peripheral side connection electrode at a position facing the shield electrode and an inner side connection electrode at a position facing the electrode terminal, and fluidity at the melting temperature of the solder powder, the convection additive and the solder powder Preparing a resin composition containing a resin having:
Applying the resin composition on a surface of the wiring board facing the semiconductor element;
Aligning the shield electrode and the outer peripheral side connection electrode and the electrode terminal and the inner side connection electrode, respectively, and abutting the semiconductor element on the surface of the resin composition;
At least the resin composition is heated to melt the solder powder and the convection additive causes the solder powder to pass between the shield electrode and the outer peripheral connection electrode and between the electrode terminal and the inner connection electrode. A process of growing them while self-assembling them and soldering them together,
Curing the resin in the resin composition to provide an underfill resin between the semiconductor element and the wiring board;
A method for mounting a semiconductor element, comprising:
外周部にシールド電極が配設され、前記シールド電極の内側に電極端子が配設された半導体素子と、
前記電極端子に対向する位置に内部側接続電極が配設された配線基板と、はんだ粉、対流添加剤および前記はんだ粉の熔融温度で流動性を有する樹脂を含む樹脂組成物とを準備する工程と、
前記配線基板の前記半導体素子と対向する面上に前記樹脂組成物を塗布する工程と、
前記電極端子と前記内部側接続電極をそれぞれ位置合せして、前記樹脂組成物表面に前記半導体素子を当接する工程と、
少なくとも前記樹脂組成物を加熱して、前記はんだ粉を熔融するとともに前記対流添加剤により前記はんだ粉を前記電極端子と前記内部側接続電極との間に自己集合させながら成長させて、これらをはんだ接続するとともに、前記シールド電極の表面に前記はんだ粉を自己集合させてはんだを成長させる工程と、
前記樹脂組成物中の前記樹脂を硬化させて前記半導体素子と前記配線基板との間にアンダーフィル樹脂を設ける工程と、
を含むことを特徴とする半導体素子の実装方法。
A semiconductor element in which a shield electrode is disposed on the outer periphery, and an electrode terminal is disposed on the inner side of the shield electrode;
A step of preparing a wiring board having an internal connection electrode disposed at a position facing the electrode terminal, and a resin composition containing solder powder, a convection additive, and a resin having fluidity at the melting temperature of the solder powder. When,
Applying the resin composition on a surface of the wiring board facing the semiconductor element;
Aligning the electrode terminal and the internal connection electrode, respectively, and contacting the semiconductor element to the resin composition surface;
At least the resin composition is heated to melt the solder powder, and the solder powder is grown while being self-assembled between the electrode terminal and the internal connection electrode by the convection additive, and these are soldered. Connecting and growing the solder by self-assembling the solder powder on the surface of the shield electrode; and
Curing the resin in the resin composition to provide an underfill resin between the semiconductor element and the wiring board;
A method for mounting a semiconductor element, comprising:
表面に電極端子が配設された半導体素子と、
前記電極端子に対向する位置に内部側接続電極が配設され、前記内部側接続電極の外周領域に設けた外周側接続電極とを有する配線基板と、はんだ粉、対流添加剤および前記はんだ粉の熔融温度で流動性を有する樹脂を含む樹脂組成物とを準備する工程と、
前記配線基板の前記半導体素子と対向する面上に前記樹脂組成物を塗布する工程と、
前記電極端子と前記内部側接続電極をそれぞれ位置合せして、前記樹脂組成物表面に前記半導体素子を当接する工程と、
少なくとも前記樹脂組成物を加熱して、前記はんだ粉を熔融するとともに前記対流添加剤により前記はんだ粉を前記電極端子と前記内部側接続電極との間に自己集合させながら成長させて、これらをはんだ接続するとともに、前記外周側接続電極の表面に前記はんだ粉を自己集合させてはんだを成長させる工程と、
前記樹脂組成物中の前記樹脂を硬化させて前記半導体素子と前記配線基板との間にアンダーフィル樹脂を設ける工程と、
を含むことを特徴とする半導体素子の実装方法。
A semiconductor element having electrode terminals disposed on the surface;
An internal connection electrode is disposed at a position facing the electrode terminal, and a wiring board having an outer peripheral connection electrode provided in an outer peripheral region of the internal connection electrode, a solder powder, a convection additive, and the solder powder Preparing a resin composition containing a resin having fluidity at a melting temperature;
Applying the resin composition on a surface of the wiring board facing the semiconductor element;
Aligning the electrode terminal and the internal connection electrode, respectively, and contacting the semiconductor element to the resin composition surface;
At least the resin composition is heated to melt the solder powder, and the solder powder is grown while being self-assembled between the electrode terminal and the internal connection electrode by the convection additive, and these are soldered. Connecting and growing the solder by self-assembling the solder powder on the surface of the outer peripheral connection electrode;
Curing the resin in the resin composition to provide an underfill resin between the semiconductor element and the wiring board;
A method for mounting a semiconductor element, comprising:
外周部にシールド電極が配設され、前記シールド電極の内側に電極端子が配設された半導体素子と、
前記半導体素子を対向させたときに前記シールド電極の近傍で、かつ前記シールド電極と対向しない位置に設けた外周側接続電極および前記電極端子に対向する位置に設けた内部側接続電極を有する配線基板と、はんだ粉、対流添加剤および前記はんだ粉の熔融温度で流動性を有する樹脂を含む樹脂組成物とを準備する工程と、
前記配線基板の前記半導体素子と対向する面上に前記樹脂組成物を塗布する工程と、
前記電極端子と前記内部側接続電極をそれぞれ位置合せして、前記樹脂組成物表面に前記半導体素子を当接する工程と、
少なくとも前記樹脂組成物を加熱して、前記はんだ粉を熔融するとともに前記対流添加剤により前記はんだ粉を前記電極端子と前記内部側接続電極との間に自己集合させながら成長させて、これらをはんだ接続するとともに、前記シールド電極および前記外周側接続電極の表面にはんだ粉を自己集合させてはんだをそれぞれ成長させる工程と、
前記樹脂組成物中の前記樹脂を硬化させて前記半導体素子と前記配線基板との間にアンダーフィル樹脂を設ける工程と、
を含むことを特徴とする半導体素子の実装方法。
A semiconductor element in which a shield electrode is disposed on the outer periphery, and an electrode terminal is disposed on the inner side of the shield electrode;
A wiring board having an outer peripheral side connection electrode provided in the vicinity of the shield electrode when facing the semiconductor element and not facing the shield electrode, and an inner side connection electrode provided at a position facing the electrode terminal And preparing a resin composition containing solder powder, a convection additive and a resin having fluidity at the melting temperature of the solder powder;
Applying the resin composition on a surface of the wiring board facing the semiconductor element;
Aligning the electrode terminal and the internal connection electrode, respectively, and contacting the semiconductor element to the resin composition surface;
At least the resin composition is heated to melt the solder powder, and the solder powder is grown while being self-assembled between the electrode terminal and the internal connection electrode by the convection additive, and these are soldered. Connecting and growing solder by self-assembling solder powder on the surfaces of the shield electrode and the outer peripheral connection electrode; and
Curing the resin in the resin composition to provide an underfill resin between the semiconductor element and the wiring board;
A method for mounting a semiconductor element, comprising:
前記対流添加剤による自己集合は、前記対流添加剤が前記はんだ粉の熔融する温度でガスを発生する特性を有し、発生した前記ガスの対流により前記はんだ粉を前記電極端子と前記内部側接続電極との表面、および前記シールド電極と前記外周側接続電極の少なくとも一方の表面上に自己集合させることを特徴とする請求項1から請求項4までのいずれかに記載の半導体素子の実装方法。 The self-assembly by the convection additive has a property that the convection additive generates gas at a temperature at which the solder powder melts, and the solder powder is connected to the electrode terminal and the internal side by the convection of the generated gas. 5. The method of mounting a semiconductor element according to claim 1, wherein the semiconductor element is self-assembled on a surface with the electrode and on at least one surface of the shield electrode and the outer peripheral connection electrode. 6. 前記シールド電極は、電磁ノイズを遮蔽可能な隙間を設けて前記半導体素子の外周部に形成されていることを特徴とする請求項1、請求項2または請求項4に記載の半導体素子の実装方法。 5. The semiconductor element mounting method according to claim 1, wherein the shield electrode is formed on an outer peripheral portion of the semiconductor element with a gap capable of shielding electromagnetic noise. . 前記隙間は、前記半導体素子の中心に対して対称の位置に複数個設けられていることを特徴とする請求項6に記載の半導体素子の実装方法。 The semiconductor element mounting method according to claim 6, wherein a plurality of the gaps are provided at positions symmetrical with respect to the center of the semiconductor element. 前記シールド電極は、前記半導体素子の外周部を取り囲むように連続して形成されていることを特徴とする請求項1、請求項2または請求項4に記載の半導体素子の実装方法。 5. The semiconductor element mounting method according to claim 1, wherein the shield electrode is continuously formed so as to surround an outer peripheral portion of the semiconductor element. 前記シールド電極は、前記電極端子の外径サイズよりもその外径または幅が小さく形成されていることを特徴とする請求項6から請求項8までのいずれかに記載の半導体素子の実装方法。 The method for mounting a semiconductor element according to claim 6, wherein the shield electrode is formed with an outer diameter or a width smaller than an outer diameter size of the electrode terminal. 前記配線基板の前記内部側接続電極は、前記はんだ粉が自己集合して成長する領域の形状が前記電極端子と同じ形状であることを特徴とする請求項1から請求項4までのいずれかに記載の半導体素子の実装方法。 5. The internal connection electrode of the wiring board according to claim 1, wherein a shape of a region where the solder powder self-assembles and grows is the same shape as the electrode terminal. A method for mounting the semiconductor element as described. 前記配線基板の前記外周側接続電極および前記内部側接続電極の前記はんだ粉が自己集合して成長する領域を除く領域には、前記はんだ粉の自己集合を阻害する表面保護膜を設けていることを特徴とする請求項1、請求項3または請求項4に記載の半導体素子の実装方法。 A surface protective film that inhibits the self-assembly of the solder powder is provided in a region of the wiring board other than a region where the solder powder of the outer-side connection electrode and the inner connection electrode grows by self-assembly. The semiconductor element mounting method according to claim 1, claim 3, or claim 4. 前記樹脂は、熱硬化性樹脂を用いることを特徴とする請求項1から請求項4までのいずれかに記載の半導体素子の実装方法。 5. The semiconductor element mounting method according to claim 1, wherein the resin is a thermosetting resin. 前記樹脂を硬化させて前記アンダーフィル樹脂を設ける工程は、前記配線基板と前記半導体素子の接続工程での前記樹脂組成物の加熱温度より高い温度で行うことを特徴とする請求項12に記載の半導体素子の実装方法。 The step of curing the resin and providing the underfill resin is performed at a temperature higher than the heating temperature of the resin composition in the step of connecting the wiring board and the semiconductor element. A method for mounting a semiconductor element. 外周領域に外周部を取り囲む連続した形状からなるシールド電極が配設され、前記シールド電極の内側に電極端子が配設された半導体素子と、
前記シールド電極に対向する位置に外周側接続電極および前記電極端子に対向する位置に内部側接続電極がそれぞれ配設された配線基板とを有し、
前記シールド電極と前記外周側接続電極および前記電極端子と前記内部側接続電極とが、それぞれはんだにより接続され、かつ前記半導体素子と前記配線基板との間にアンダーフィル樹脂が設けられていることを特徴とする半導体素子の実装構造体。
A semiconductor element in which a shield electrode having a continuous shape surrounding the outer peripheral portion is disposed in the outer peripheral region, and an electrode terminal is disposed inside the shield electrode; and
A wiring board having an outer peripheral side connection electrode at a position facing the shield electrode and an inner side connection electrode at a position facing the electrode terminal;
The shield electrode, the outer peripheral side connection electrode, the electrode terminal, and the inner side connection electrode are each connected by solder, and an underfill resin is provided between the semiconductor element and the wiring board. A semiconductor device mounting structure.
外周領域に外周部を取り囲む連続した形状からなるシールド電極が配設され、前記シールド電極の内側に電極端子が配設された半導体素子と、
前記電極端子に対向する位置に内部側接続電極が配設された配線基板とを有し、
前記電極端子と前記内部側接続電極とがはんだにより接続され、かつ前記シールド電極の表面にははんだが形成されており、さらに前記半導体素子と前記配線基板との間にアンダーフィル樹脂が設けられていることを特徴とする半導体素子の実装構造体。
A semiconductor element in which a shield electrode having a continuous shape surrounding the outer peripheral portion is disposed in the outer peripheral region, and an electrode terminal is disposed inside the shield electrode; and
A wiring board having an internal connection electrode disposed at a position facing the electrode terminal;
The electrode terminal and the internal connection electrode are connected by solder, solder is formed on the surface of the shield electrode, and an underfill resin is provided between the semiconductor element and the wiring board. A mounting structure for a semiconductor device, characterized by comprising:
表面に電極端子が配設された半導体素子と、
前記電極端子に対向する位置に内部側接続電極が配設され、前記内部側接続電極の外周領域に設けた外周側接続電極を含む配線基板とを有し、
前記電極端子と前記内部側接続電極とがはんだにより接続され、かつ前記外周側接続電極の表面にはんだが形成されており、さらに前記半導体素子と前記配線基板との間にアンダーフィル樹脂が設けられていることを特徴とする半導体素子の実装構造体。
A semiconductor element having electrode terminals disposed on the surface;
An internal connection electrode is disposed at a position facing the electrode terminal, and a wiring board including an external connection electrode provided in an outer peripheral region of the internal connection electrode;
The electrode terminal and the internal connection electrode are connected by solder, and solder is formed on the surface of the outer peripheral connection electrode, and an underfill resin is provided between the semiconductor element and the wiring board. A structure for mounting a semiconductor element, characterized by comprising:
外周部にシールド電極が配設され、前記シールド電極の内側に電極端子が配設された半導体素子と、
前記半導体素子を対向させたときに前記シールド電極の近傍で、かつ前記シールド電極と対向しない位置に設けた外周側接続電極および前記電極端子に対向する位置に設けた内部側接続電極を有する配線基板とを含み、
前記電極端子と前記内部側接続電極とがはんだにより接続され、かつ前記シールド電極および前記外周側接続電極の表面にはんだが形成されており、
さらに前記半導体素子と前記配線基板との間にアンダーフィル樹脂が設けられていることを特徴とする半導体素子の実装構造体。
A semiconductor element in which a shield electrode is disposed on the outer periphery, and an electrode terminal is disposed on the inner side of the shield electrode;
A wiring board having an outer peripheral side connection electrode provided in the vicinity of the shield electrode when facing the semiconductor element and not facing the shield electrode, and an inner side connection electrode provided at a position facing the electrode terminal Including
The electrode terminal and the internal connection electrode are connected by solder, and solder is formed on the surfaces of the shield electrode and the outer peripheral connection electrode,
Further, an underfill resin is provided between the semiconductor element and the wiring board.
前記シールド電極は、前記電極端子の外径サイズよりもその外径または幅が小さいことを特徴とする請求項14、請求項15または請求項17に記載の半導体素子の実装構造体。 18. The semiconductor element mounting structure according to claim 14, 15 or 17, wherein the shield electrode has an outer diameter or a width smaller than an outer diameter size of the electrode terminal. 前記配線基板の前記内部側接続電極は、前記はんだが自己集合して成長する領域の形状が前記電極端子と同じ形状であることを特徴とする請求項14から請求項17までのいずれかに記載の半導体素子の実装構造体。 The internal connection electrode of the wiring board has a shape of a region where the solder self-assembles and grows in the same shape as the electrode terminal. Mounting structure of semiconductor element. 前記配線基板の前記内部側接続電極または前記外周側接続電極と前記内部側接続電極の前記はんだ粉が自己集合して成長する領域を除く領域には、前記はんだ粉の自己集合を阻害する表面保護膜を設けていることを特徴とする請求項14から請求項17までのいずれかに記載の半導体素子の実装構造体。 Surface protection that inhibits self-assembly of the solder powder in a region other than the region where the solder powder self-assembles and grows on the internal connection electrode or the outer peripheral connection electrode and the internal connection electrode of the wiring board 18. The semiconductor element mounting structure according to claim 14, further comprising a film.
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