JP2002231749A - Semiconductor device and its bonding structure - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain the bonding structure of a semiconductor device called CSP in which cracking is prevented especially at the joint of columnar electrodes at four corners among columnar electrodes formed in matrix on a silicon substrate. SOLUTION: In the region on a silicon substrate 22 except the peripheral part thereof, solder balls 33 formed on columnar electrodes are arranged in matrix. On the peripheral part of the silicon substrate 22, a solder layer 34 formed on dummy electrodes for reinforcement is arranged linearly along each side of the silicon substrate 22. When the semiconductor device 21 is bonded onto a circuit board, the columnar electrodes are connected with connection terminals on the circuit board through solder balls 33, and the dummy electrodes for reinforcement are connected with dummy terminals on the circuit board through the solder layer 34. According to the arrangement, cracking is prevented especially at the joint of columnar electrodes at four corners among the columnar electrodes formed in matrix on a silicon substrate 22.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device having a columnar electrode and a bonding structure thereof.

[0002]

2. Description of the Related Art For example, there is a semiconductor device called a CSP (Chip Size Package) as shown in FIGS. In this case, FIG. 13 shows a plan view of the semiconductor device, and FIG. 14 shows a cross-sectional view thereof along line XX. In this semiconductor device 1, a plurality of connection pads 3 are formed in a peripheral portion of an upper surface of a rectangular silicon substrate 2, and an insulating film 4 is formed in a portion of the upper surface except for a central portion of the connection pad 3,
A plurality of rewirings 6 are formed from the upper surface of the connection pad 3 exposed through the opening 5 formed in the insulating film 4 to a predetermined portion of the upper surface of the insulating film 4. A columnar electrode 7 is formed, a sealing film 8 is formed on the entire upper surface excluding the columnar electrode 7, and a surface treatment layer 9 for preventing oxidation is formed on the upper surface of the columnar electrode 7 by electrolytic plating or electroless plating. It has a structure in which solder balls 10 are formed on the surface of the processing layer 9. In this case, the plurality of solder balls 10 are formed in a matrix on a region of the silicon substrate 2 excluding a peripheral portion. Therefore, the plurality of columnar electrodes 7 are also formed in a matrix on the silicon substrate 2 except for the peripheral portion.

FIG. 15 shows a semiconductor device 1 shown in FIG.
FIG. 2 is a cross-sectional view showing a state where is bonded on a circuit board 11. The solder balls 10 of the semiconductor device 1
1 is connected to a connection terminal 12 formed at a predetermined position on the upper surface of the first terminal 1.

[0004]

By the way, in the junction structure of the conventional semiconductor device 1 shown in FIG. 15, when a temperature cycle test or the like is performed, due to a difference in thermal expansion coefficient between the silicon substrate 2 and the circuit substrate 11, In some cases, cracks may occur at the interface between the surface treatment layer 9 and the solder balls 10 due to the stress generated by the stress. Particularly, as shown in FIG. There is a problem that cracks are likely to occur at the joints of the columnar electrodes 7 corresponding to the solder balls indicated by reference numeral 10a. SUMMARY OF THE INVENTION It is an object of the present invention to prevent cracks from being generated at joints between square pillar electrodes among pillar electrodes formed in a matrix on a semiconductor substrate such as a silicon substrate.

[0005]

According to a first aspect of the present invention, there is provided a semiconductor device, comprising: a semiconductor substrate; a plurality of columnar electrodes formed in a matrix on a region excluding a peripheral portion on the semiconductor substrate; A semiconductor device comprising: a reinforcing dummy electrode formed on at least four corners of a peripheral portion on a semiconductor substrate; and a sealing film formed on a region excluding the columnar electrode and the reinforcing dummy electrode on the semiconductor substrate. It is a feature. A semiconductor device according to a second aspect of the present invention is the semiconductor device according to the first aspect, wherein a surface treatment layer for preventing oxidation is formed on upper surfaces of the columnar electrode and the reinforcing dummy electrode. Is what you do. According to a third aspect of the present invention, in the semiconductor device according to the second aspect, a low-melting metal ball is formed on a surface of the surface treatment layer on the columnar electrode, and the low melting point metal ball is formed on the reinforcing dummy electrode. A low melting point metal layer is formed on the surface of the surface treatment layer. A semiconductor device according to a fourth aspect of the present invention is the semiconductor device according to any one of the first to third aspects, wherein the reinforcing dummy electrode is at a ground potential. The semiconductor device according to a fifth aspect of the present invention is the semiconductor device according to any one of the first to fourth aspects, wherein the reinforcing dummy electrode is a linear four reinforcing dummy electrode along each side of the semiconductor substrate. It is characterized by consisting of. According to a sixth aspect of the present invention, in the semiconductor device according to any one of the first to fourth aspects, the reinforcing dummy electrode has four substantially L-shaped reinforcing electrodes along each corner of the semiconductor substrate. It is characterized by comprising a dummy electrode. 8. The bonding structure of a semiconductor device according to claim 7, wherein the semiconductor device has a plurality of columnar electrodes formed in a matrix in a region excluding the peripheral portion on the semiconductor substrate; and a peripheral portion on the semiconductor substrate. Bonding a semiconductor device comprising a reinforcing dummy electrode formed at least at four corners of the semiconductor device and a sealing film formed in a region other than the columnar electrode and the reinforcing dummy electrode on the semiconductor substrate, on a circuit substrate A bonding structure of a semiconductor device according to the present invention, wherein the columnar electrode and the reinforcing dummy electrode of the semiconductor device are bonded to the connection terminal and the dummy terminal on the circuit board via a low melting point metal. In the bonding structure of a semiconductor device according to an eighth aspect of the present invention, in the invention according to the seventh aspect, a surface treatment layer for preventing oxidation is formed on upper surfaces of the columnar electrode and the reinforcing dummy electrode. It is characterized by the following. According to a ninth aspect of the present invention, in the bonding structure of a semiconductor device according to the eighth aspect, the low-melting-point metal interposed between the columnar electrode and the connection terminal is provided on the columnar electrode. The low-melting-point metal, which is formed of a low-melting-point metal ball formed in advance on the surface of the surface-treating layer and is interposed between the reinforcing dummy electrode and the dummy terminal, is formed of the surface-treating layer on the reinforcing dummy electrode It is characterized by comprising a low melting point metal layer formed on the surface in advance. According to a tenth aspect of the present invention, in the semiconductor device bonding structure according to the seventh aspect, the low-melting-point metal is a low-melting-point metal layer formed in advance on the connection terminal and the dummy terminal. It is characterized by the following. An eleventh aspect of the present invention provides a bonding structure for a semiconductor device according to any one of the seventh to tenth aspects, wherein the reinforcing dummy electrode has a ground potential. . According to a twelfth aspect of the present invention, in the bonding structure of a semiconductor device according to any one of the seventh to eleventh aspects, the reinforcing dummy electrode includes four linear reinforcing members extending along each side of the semiconductor substrate. , And the dummy terminal has a shape corresponding to the four reinforcing dummy electrodes. According to a thirteenth aspect of the present invention, in the bonding structure of a semiconductor device according to any one of the seventh to eleventh aspects, the reinforcing dummy electrode is substantially L-shaped along each corner of the semiconductor substrate. It is characterized by comprising four reinforcing dummy electrodes, wherein the dummy terminal has a shape corresponding to the four reinforcing dummy electrodes. According to the present invention, since the reinforcing dummy electrodes are formed at least at the four corners of the peripheral portion on the semiconductor substrate, of the columnar electrodes formed in a matrix in a region excluding the peripheral portion on the semiconductor substrate. Cracks can be made less likely to occur at the joints between the square columnar electrodes.

[0006]

FIG. 1 is a plan view of a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view taken along the line XX. In the semiconductor device 21, a plurality of connection pads 23 are formed on a peripheral portion of an upper surface of a rectangular silicon substrate (semiconductor substrate) 22, and an insulating film 24 is formed on a portion of the upper surface except for a central portion of the connection pad 23. A plurality of rewirings 26 are formed from the upper surface of the connection pad 23 exposed through the opening 25 formed in the insulating film 24 to a predetermined portion of the upper surface of the insulating film 24, and a pad portion at the tip of the rewiring 26 is formed. A columnar electrode 27 is formed on the upper surface,
A dummy rewiring 28 is formed at a predetermined location on the upper surface of the insulating film 24 outside the region where the connection pad 23 is formed, and a reinforcing dummy electrode 29 is formed on the upper surface of the dummy rewiring 28.
A sealing film 30 is formed on the entire upper surface except the columnar electrode 27 and the reinforcing dummy electrode 29, and a surface treatment layer 31 for preventing oxidation is formed on the upper surfaces of the columnar electrode 27 and the reinforcing dummy electrode 29 by electrolytic plating or electroless plating. 32 are formed,
The structure is such that solder balls (low melting point metal balls) 33 and solder layers (low melting point metal layers) 34 are formed on the surfaces of the surface treatment layers 31 and 32.

In this case, the plurality of solder balls 33 are formed in a matrix on the silicon substrate 22 except for the peripheral portion. Therefore, the plurality of columnar electrodes 27 are also formed in a matrix on the silicon substrate 22 except for the peripheral portion. On the other hand, the solder layer 34 is composed of four solder layers formed linearly on the peripheral portion of the silicon substrate 22 along each side thereof. Therefore, the reinforcing dummy electrode 2
Reference numeral 9 also includes four reinforcing dummy electrodes formed linearly on the periphery of the silicon substrate 22 along each side thereof.

Next, an example of a method of manufacturing the semiconductor device 21 will be described with reference to FIGS. First, as shown in FIG. 3, a connection pad 23 is formed on the upper surface of a wafer 41 for obtaining a plurality of silicon substrates 22 shown in FIG. 2, and an insulating film 24 is formed on a portion of the upper surface except for the center of the connection pad 23. Is formed, and a rewiring forming layer 42 made of copper or the like is formed on the entire upper surface of the insulating film 24 including the upper surface of the connection pad 23 exposed through the opening 25 formed in the insulating film 24. prepare.

Next, as shown in FIG. 4, a plating resist layer 43 is formed. In this case, openings 44 and 45 are formed in portions of the plating resist layer 43 corresponding to the region where the columnar electrodes 27 are formed and the region where the reinforcing dummy electrodes 29 are formed. Next, copper electroplating is performed using the rewiring forming layer 42 as a plating current path, so that the plating resist layer 4 is formed.
The columnar electrode 27 and the reinforcing dummy electrode 29 are formed on the upper surface of the rewiring forming layer 42 in the openings 44 and 45 of No.3. Next, the plating resist layer 43 is peeled off.

[0010] Next, as shown in FIG. 5, a rewiring forming resist layer 46 is formed at a predetermined position on the upper surface of the rewiring forming layer 42.
To form Next, unnecessary portions of the rewiring forming layer 42 are removed by etching using the rewiring forming resist layer 46, the columnar electrode 27, and the reinforcing dummy electrode 29 as a mask, and as shown in FIG. Resist layer 46
In addition, a redistribution line 26 is formed below the columnar electrode 27, and a dummy redistribution line 28 is formed below the reinforcing dummy electrode 29. That is, in this state, the rewiring 26 is formed from the upper surface of the connection pad 23 exposed through the opening 25 formed in the insulating film 24 to a predetermined location on the upper surface of the insulating film 24, and the leading end of the rewiring 26 is formed. A columnar electrode 27 is formed on the upper surface of the pad portion. A dummy rewiring 2 is provided at a predetermined location on the upper surface of the insulating film 24 outside the connection pad 23.
8 are formed, and a reinforcing dummy electrode 29 is formed on the upper surface of the dummy rewiring 28. Next, the rewiring forming resist layer 46 is peeled off.

Next, as shown in FIG.
Insulating film 2 including rewiring 26 and reinforcing dummy electrode 29
A sealing film 30 made of an epoxy resin is formed on the entire upper surface of 4 by a dispenser method, a screen printing method, a transfer molding method, or the like so that the thickness is slightly larger than the height of the columnar electrode 27 and the reinforcing dummy electrode 29. . Therefore, in this state, the upper surfaces of the columnar electrodes 27 and the reinforcing dummy electrodes 29 are covered with the sealing film 30.
Next, by appropriately polishing the upper surface side of the sealing film 30, the upper surfaces of the columnar electrode 27 and the reinforcing dummy electrode 29 are exposed as shown in FIG.

Next, as shown in FIG. 9, surface treatment layers 31 and 32 for preventing oxidation are formed on the upper surfaces of the columnar electrodes 27 and the reinforcing dummy electrodes 29 by electrolytic plating or electroless plating. Next, solder balls 33 and solder layers 34 are formed on the surfaces of the surface treatment layers 31 and 32. Solder ball 33
The solder layer 34 is formed by printing a solder paste and performing a reflow process. Next, through a dicing process, a semiconductor device 21 composed of individual chips is obtained as shown in FIGS.

In the case of the above manufacturing method, the dummy rewiring 2
8. The formation of the reinforcing dummy electrode 29, the surface treatment layer 32, and the solder layer 34 can be performed simultaneously with the formation of the rewiring 26, the columnar electrode 27, the surface treatment layer 31, and the solder ball 33. The number can be kept from increasing.

Next, FIG. 10 shows the semiconductor device 21 shown in FIG.
Is a cross-sectional view of a state in which is bonded on a circuit board 51. FIG. The solder balls 33 of the semiconductor device 21 are joined to connection terminals 52 formed at predetermined locations on the upper surface of the circuit board 51. Further, the solder layer 34 of the semiconductor device 21
It is joined to a dummy terminal 53 formed at a predetermined location on the upper surface of the circuit board 51. In this case, the dummy terminal 53 has a shape corresponding to the reinforcing dummy electrode 29. In addition, since the dummy terminal 53 having a shape corresponding to the reinforcing dummy electrode 29 is formed in a substantially rectangular frame shape as a whole,
The connection terminal 52 is connected to a wiring (not shown) formed on the lower surface of the circuit board 51 via a through-hole conducting portion (not shown).

In the bonding structure of the semiconductor device 21 obtained as described above, the reinforcing dummy electrodes 29 are formed in a substantially rectangular frame shape in the peripheral portion on the silicon substrate 22 as a whole. As a result, in particular, as shown in FIG. 1, four corners 33a of the solder balls 33 formed in a matrix shape in a region other than the peripheral portion on the silicon substrate 22 as shown in FIG. It is possible to make it difficult for cracks to occur at the joint portions of the columnar electrodes 27 corresponding to the solder balls indicated by. In this case, since the reinforcing dummy electrode 29 is divided along each side of the silicon substrate 22, the stress generated due to the difference in thermal expansion coefficient between the silicon substrate 22 and the circuit substrate 51 is sufficiently reduced. Can withstand.

Further, in addition to the self-alignment function by the surface tension of the solder ball 33, the self-alignment function by the surface tension of the solder layer 34 can be exhibited, so that the self-alignment property can be improved. Further, the dummy rewiring 28 is connected to the ground wiring in the semiconductor device 21 or the dummy terminal 53 is connected to the circuit board 51.
When the reinforcing dummy electrode 29 is set to the ground potential, the noise shielding structure can be obtained.

In the above embodiment, as shown in FIG. 1, the solder layer 34 (that is, the reinforcing dummy electrode 29) is formed on the peripheral portion of the silicon substrate 22 in a straight line along each side thereof. As described above, the case where the shape is substantially a rectangular frame is described, but the present invention is not limited to this. For example, as shown in FIG. 11, a solder layer 34 (that is, a reinforcing dummy electrode 29) is formed in a substantially L-shape along each corner of the peripheral portion on the silicon substrate 22 to form a substantially square frame as a whole. You may make it become. Further, as shown in FIG. 12, the solder layer 34 (that is, the reinforcing dummy electrode 29) may be formed relatively small and substantially L-shaped only at each corner on the silicon substrate 22. In the case shown in FIG. 12, although not shown, the shape of the dummy terminal on the circuit board also has a relatively small shape corresponding to the solder layer 34 (that is, the reinforcing dummy electrode 29). It is also possible to have a structure.

In the above-described embodiment, the dummy rewiring 28 on which the reinforcing dummy electrode 29 is formed is connected to the silicon substrate 2.
In the above description, a connection pad for grounding is formed on the silicon substrate 22 and the insulating film 24 is not formed.
The dummy rewiring 28 formed above may be connected to the grounding connection pad via the reinforcing dummy electrode 29 by connecting to the grounding connection pad.
In the above embodiment, the columnar electrode 2 of the semiconductor device 21 is used.
7 and surface treatment layers 31 and 3 on the reinforcing dummy electrode 29
2, the case where the solder balls 33 and the solder layers 34 are formed in advance has been described.
A solder layer may be formed in advance on the connection terminals 52 and the dummy terminals 53 by printing or the like. Further, the surface treatment layers 31 and 32 may be omitted.

[0019]

As described above, according to the present invention, since the reinforcing dummy electrodes are formed at least at the four corners of the peripheral portion on the semiconductor substrate, the matrix is formed in the region excluding the peripheral portion on the semiconductor substrate. 4 of the columnar electrodes
Cracks can be made less likely to occur at the joint portions of the square columnar electrodes.

[Brief description of the drawings]

FIG. 1 is a plan view of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a sectional view taken along line XX in FIG. 1;

FIG. 3 is a cross-sectional view of a device initially prepared for manufacturing the semiconductor device shown in FIGS. 1 and 2;

FIG. 4 is a sectional view of the manufacturing process following FIG. 3;

FIG. 5 is a sectional view of the manufacturing process following FIG. 4;

FIG. 6 is a sectional view of the manufacturing process following FIG. 5;

FIG. 7 is a sectional view of the manufacturing process following FIG. 6;

FIG. 8 is a sectional view of the manufacturing process following FIG. 7;

FIG. 9 is a sectional view of the manufacturing process following FIG. 8;

10 is a cross-sectional view illustrating a state where the semiconductor device illustrated in FIG. 2 is bonded to a circuit board.

FIG. 11 is a plan view of a semiconductor device according to another embodiment of the present invention.

FIG. 12 is a plan view of a semiconductor device according to still another embodiment of the present invention.

FIG. 13 is a plan view of an example of a conventional semiconductor device.

FIG. 14 is a sectional view taken along the line XX of FIG. 13;

15 is a cross-sectional view illustrating a state where the semiconductor device illustrated in FIG. 14 is bonded to a circuit board.

[Explanation of symbols]

 Reference Signs List 21 semiconductor device 22 silicon substrate 23 connection pad 24 insulating film 26 rewiring 27 pillar electrode 28 dummy rewiring 29 reinforcing dummy electrode 30 sealing film 31, 32 surface treatment layer 33 solder ball 34 solder layer 51 circuit board 52 connection terminal 53 Dummy terminal

Claims (13)

[Claims] 1. A semiconductor substrate, a plurality of columnar electrodes formed in a matrix in a region other than the peripheral portion on the semiconductor substrate, and a reinforcing dummy formed at least at four corners of the peripheral portion on the semiconductor substrate. A semiconductor device comprising: an electrode; and a sealing film formed in a region on the semiconductor substrate other than the columnar electrode and the reinforcing dummy electrode. 2. The semiconductor device according to claim 1, wherein a surface treatment layer for preventing oxidation is formed on upper surfaces of the columnar electrodes and the reinforcing dummy electrodes. 3. The invention according to claim 2, wherein a low melting point metal ball is formed on the surface of the surface treatment layer on the columnar electrode, and a low melting point metal surface is formed on the surface of the surface treatment layer on the reinforcing dummy electrode. A semiconductor device having a metal layer formed thereon. 4. The semiconductor device according to claim 1, wherein the reinforcing dummy electrode is at a ground potential. 5. The semiconductor device according to claim 1, wherein said reinforcing dummy electrode comprises four linear reinforcing dummy electrodes along each side of said semiconductor substrate. apparatus. 6. The invention according to claim 1, wherein the reinforcing dummy electrode comprises four substantially L-shaped reinforcing dummy electrodes along each corner of the semiconductor substrate. Semiconductor device. 7. A semiconductor substrate, a plurality of columnar electrodes formed in a matrix in a region other than the peripheral portion on the semiconductor substrate, and a reinforcing dummy formed at least at four corners of the peripheral portion on the semiconductor substrate. An electrode, a semiconductor device having a sealing film formed in a region excluding the pillar-shaped electrode and the reinforcing dummy electrode on the semiconductor substrate, a semiconductor device bonded to a circuit board, the semiconductor device bonding structure, A bonding structure for a semiconductor device, wherein a columnar electrode and a reinforcing dummy electrode of the semiconductor device are bonded to a connection terminal and a dummy terminal on the circuit board via a low melting point metal. 8. The bonding structure of a semiconductor device according to claim 7, wherein a surface treatment layer for preventing oxidation is formed on upper surfaces of the columnar electrodes and the reinforcing dummy electrodes. 9. The invention according to claim 8, wherein the low melting point metal interposed between the columnar electrode and the connection terminal is a low melting point metal previously formed on the surface of the surface treatment layer on the columnar electrode. The low-melting-point metal formed of a melting-point metal ball and interposed between the reinforcing dummy electrode and the dummy terminal is formed of a low-melting-point metal layer formed in advance on the surface of the surface treatment layer on the reinforcing dummy electrode. A junction structure for a semiconductor device. 10. The bonding structure of a semiconductor device according to claim 6, wherein the low melting point metal is formed of a low melting point metal layer formed on the connection terminal and the dummy terminal in advance. 11. The bonding structure of a semiconductor device according to claim 7, wherein the reinforcing dummy electrode has a ground potential. 12. The reinforcing dummy electrode according to claim 7, wherein the reinforcing dummy electrode comprises four linear reinforcing dummy electrodes along each side of the semiconductor substrate.
The semiconductor device according to claim 1, wherein the dummy terminal has a shape corresponding to the four reinforcing dummy electrodes. 13. The invention according to claim 7, wherein said reinforcing dummy electrode comprises four substantially L-shaped reinforcing dummy electrodes along each corner of said semiconductor substrate, and said dummy terminal. Is a shape corresponding to the four reinforcing dummy electrodes.