JP2006216985A - Solid state imaging device and imaging system using the same - Google Patents

Solid state imaging device and imaging system using the same Download PDF

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JP2006216985A
JP2006216985A JP2006119660A JP2006119660A JP2006216985A JP 2006216985 A JP2006216985 A JP 2006216985A JP 2006119660 A JP2006119660 A JP 2006119660A JP 2006119660 A JP2006119660 A JP 2006119660A JP 2006216985 A JP2006216985 A JP 2006216985A
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dark current
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JP2006216985A5 (en
JP4542063B2 (en
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英明 ▲高▼田
Hideaki Takada
Akira Okita
彰 沖田
Takumi Hiyama
拓己 樋山
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Canon Inc
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid state imaging device capable of suppressing also the generation of OB steps caused by the increase of a dark current in an OB pixel part without increasing imaging time. <P>SOLUTION: The solid state imaging device comprises a photoelectric conversion element equipped with a PN junction area 20 in each of an image formation area pixel 14 and an optical black area pixel 13. The ratio of the size of a PN junction area of a photoelectric conversion element formed in the image formation area pixel 14 to the size of a semiconductor junction area of a photoelectric conversion element formed in the optical black area pixel 13 is set so that the dark current value of the photoelectric conversion element formed in the image formation area pixel 14 and the dark current value of the photoelectric element formed in the optical black area pixel 13 are the same or a difference between both the dark current values is small. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は固体撮像装置およびそれを用いた撮像システムに係わり、特に半導体接合領域を備えた光電変換素子を、画像形成領域及びオプティカルブラック領域にそれぞれ有する固体撮像装置およびそれを用いた撮像システムに関する。   The present invention relates to a solid-state imaging device and an imaging system using the same, and more particularly to a solid-state imaging device having a photoelectric conversion element having a semiconductor junction region in an image forming region and an optical black region, respectively, and an imaging system using the same.

通常、固体撮像装置には画像形成を行うための画像形成領域と、信号レベルの基準となる信号(黒基準信号)を得るための、遮光されたオプティカルブラック(光学的黒)領域(以下OB領域という)とを備えており、画像形成領域からの信号はOB領域で得たレベルを基準として演算処理される。   In general, a solid-state imaging device has an image forming area for image formation and a light-shielded optical black (optical black) area (hereinafter referred to as an OB area) for obtaining a signal level reference signal (black reference signal). The signal from the image forming area is processed based on the level obtained in the OB area.

このような固体撮像装置において、画像形成領域とOB領域とで暗電流の発生量が異なる場合がある。これはOB段差と呼ばれており、かかるOB段差を補正するための技術としては、例えば、特許文献1に、適正露光時間及びそれとは異なる露光時間で露光した、少なくとも2フレーム以上の輝度信号レベルからOB段差を算出し、信号処理回路の入力段で補正する映像信号処理方法が開示されている。   In such a solid-state imaging device, the amount of dark current generated may differ between the image forming area and the OB area. This is called an OB step, and as a technique for correcting such an OB step, for example, Patent Document 1 discloses a luminance signal level of at least two frames exposed at an appropriate exposure time and an exposure time different therefrom. A video signal processing method is disclosed in which an OB step is calculated from the signal and corrected at the input stage of the signal processing circuit.

なお、本発明に関連する技術としては、特許文献2に、白キズ等による異常な読み出し信号の増加を防ぐために、OB領域のPN接合領域の大きさを小さくすることが開示されている。ただし、暗電流値との関連においてPN接合領域の大きさを設定することの開示はない。   As a technique related to the present invention, Patent Document 2 discloses that the size of the PN junction region in the OB region is reduced in order to prevent an abnormal increase in read signal due to white scratches or the like. However, there is no disclosure of setting the size of the PN junction region in relation to the dark current value.

また特許文献3には、CCD型固体撮像装置において、OB領域に大光量の光が入射した場合には、充分に遮光しきれずに、一部の光が垂直転送電極の下の垂直転送レジスタに透過し、そこで光電変換を生ずることにより、黒レベルにずれが生じて画質が乱れる問題に対して、OB領域の垂直転送電極の幅が、有効画素部の垂直転送電極の幅より広く形成されて成る固体撮像素子が開示されている。ただし、有効画素及びOB領域の画素に増幅素子を有する固体撮像装置に関しての開示はなく、OB領域において暗電流が増加する場合のみが構成として開示されている。
特開2002−354348号公報 特開2003−134400号公報 特開平10−209424号公報
Further, in Patent Document 3, in a CCD solid-state imaging device, when a large amount of light is incident on an OB region, the light cannot be sufficiently shielded, and a part of the light enters the vertical transfer register below the vertical transfer electrode. The width of the vertical transfer electrode in the OB region is formed wider than the width of the vertical transfer electrode in the effective pixel portion, with respect to the problem that the image quality is disturbed due to a black level shift caused by transmission and photoelectric conversion there. A solid-state imaging device is disclosed. However, there is no disclosure regarding a solid-state imaging device having an amplification element in an effective pixel and a pixel in the OB region, and only a case where dark current increases in the OB region is disclosed as a configuration.
JP 2002-354348 A JP 2003-134400 A JP-A-10-209424

しかしながら、特許文献1の構成では、OB段差による悪影響を除去するために入射光を遮光した画像からの信号を一回取り込むという手順が必要で、撮像時間が長くなる課題がある。また、OB段差が生じる場合には、一般に特許文献3にも開示されているように、OB領域の暗電流が増加するために、正確な有効画素領域での暗示出力と一致しない場合である。   However, the configuration of Patent Document 1 requires a procedure of fetching a signal from an image in which incident light is shielded once in order to remove an adverse effect due to an OB step, and there is a problem that an imaging time becomes long. Further, when the OB step is generated, as disclosed in Patent Document 3, generally, the dark current in the OB region increases, so that it does not coincide with the accurate implicit output in the effective pixel region.

しかしながら本発明者らの検討によれば、固体撮像装置の構成によっては、OB画素部の方が暗電流が小さくなる構成が存在することを見出した。   However, according to studies by the present inventors, it has been found that depending on the configuration of the solid-state imaging device, there is a configuration in which the dark current is smaller in the OB pixel portion.

本発明は以上のような問題を解決するためになされたもので、撮像時間の増加をすることなく、OB画素部での暗電流増加に起因するOB段差の発生をも抑制する固体撮像装置を提供することを目的とする。   The present invention has been made in order to solve the above-described problems. A solid-state imaging device that suppresses occurrence of an OB step due to an increase in dark current in an OB pixel unit without increasing an imaging time. The purpose is to provide.

上記課題を解決するために、本発明は、電荷を蓄積するための第1導電型の第1の半導体領域と、該第1の半導体領域とPN接合を構成する第2導電型の第2の半導体領域とを備えた光電変換素子と、前記第1の半導体領域に蓄積された電荷を元に信号を読み出すための複数のトランジスタを画素内に有する画像形成領域と、電荷を蓄積するための第1導電型の第3の半導体領域と、該第3の半導体領域とPN接合を構成する第2導電型の第4の半導体領域とを含み、前記第3の半導体領域に蓄積された電荷を元に基準信号を読み出すための複数のトランジスタとを備えたオプティカルブラック領域と、を有する固体撮像装置において、前記画像形成領域及びオプティカルブラック領域はそれぞれ、前記トランジスタの配線の一部をその上に有する素子分離領域により区分される素子領域内に前記第1の半導体領域及び第3の半導体領域を有し、前記オプティカルブラック領域の暗電流が前記画像形成領域の暗電流よりも大きい場合に、前記第1の半導体領域と素子分離領域との間の第1の距離よりも、前記第3の半導体領域と素子分離領域との間の第2の距離の方を大きくすることを特徴とする。   In order to solve the above problems, the present invention provides a first conductivity type first semiconductor region for accumulating charges, and a second conductivity type second semiconductor that forms a PN junction with the first semiconductor region. A photoelectric conversion element having a semiconductor region; an image forming region having a plurality of transistors in a pixel for reading a signal based on the charge accumulated in the first semiconductor region; and a first one for accumulating the charge. A third semiconductor region of one conductivity type, and a fourth semiconductor region of a second conductivity type that forms a PN junction with the third semiconductor region, and the charge accumulated in the third semiconductor region A solid-state imaging device having a plurality of transistors for reading a reference signal, and the image forming region and the optical black region each include a part of the wiring of the transistor on the solid-state imaging device. When the first semiconductor region and the third semiconductor region are provided in an element region divided by an element isolation region, and the dark current of the optical black region is larger than the dark current of the image forming region, The second distance between the third semiconductor region and the element isolation region is made larger than the first distance between the first semiconductor region and the element isolation region.

なお、本願において、半導体接合領域は半導体接合部が形成された領域であり、例えばPウエルとPウエル内に形成されたN型半導体領域と表面層となるP層とで光電変換素子が形成された場合、PウエルとN型半導体領域とのPN接合部が形成された領域をいう。   In the present application, the semiconductor junction region is a region where a semiconductor junction is formed. For example, a photoelectric conversion element is formed by a P well, an N-type semiconductor region formed in the P well, and a P layer serving as a surface layer. In this case, it means a region where a PN junction between the P well and the N-type semiconductor region is formed.

以下本発明について更に説明する。   The present invention will be further described below.

本発明者らの検討により、新たにOB領域画素において暗電流が減少する場合が見出された。これには、下記モデルが考えられる。   As a result of the study by the present inventors, a case where the dark current is newly reduced in the OB region pixel has been found. The following models can be considered for this.

OB領域画素上の遮光層は一定バイアスで固定される場合が多く、その場合に界面が空乏化し、OB領域画素の暗電流が増減すること等が挙げられる。例えば、ウエルがp型で、キャリアが電子(n型)の構成においては、OB領域画素の暗電流は減少する。   In many cases, the light shielding layer on the OB area pixel is fixed with a constant bias. In this case, the interface is depleted and the dark current of the OB area pixel increases or decreases. For example, in a configuration in which the well is p-type and the carrier is electron (n-type), the dark current of the OB region pixel decreases.

もしくは何らかの理由により、OB領域の画素部表面のSi/SiO界面欠陥が、OB領域画素に比べて、画像形成領域画素のほうが多い等の理由により、従来とは逆に、OB領域画素の方が暗電流が小さくなるのである。 Or, for some reason, the number of Si / SiO 2 interface defects on the surface of the pixel portion in the OB area is larger in the image forming area pixel than in the OB area pixel. However, the dark current becomes smaller.

まず、本発明の第1の固体撮像装置について説明する。   First, the first solid-state imaging device of the present invention will be described.

本発明者等は、導電層をその上に設けた素子分離領域に半導体接合領域となるPN接合領域を近づけると暗電流が増加するため、図8(b)に示すように素子分離領域からOB領域画素13のPN接合領域21を一定距離(t0)以上離し、そして素子分離領域から遠ざかる方向に、序々にOB領域画素13のPN接合領域21の面積を減少させて(PN接合領域と素子分離領域との距離tを大きくする)、その暗電流値を測定したところ、暗電流値はほぼ半導体接合領域の大きさ(面積)に対応して減少していくことが分かった。その様子を図8(a)に示す。ここで図8(a)の横軸はS=Sa−Sb(SはPN接合領域21の面積、Saはt0でのPN接合領域21の面積、Sbは減少分の面積)、縦軸は画像形成領域の画素に対するOB領域の画素との暗電流比である。横軸のS〜Sはt0から一定距離ΔtづつPN接合領域を離したときの面積を示し、面積SのときにOB領域画素と画像形成領域画素との面積が等しくなっている。 Since the dark current increases when the PN junction region serving as the semiconductor junction region is brought close to the element isolation region provided with the conductive layer thereon, the present inventors increase the OB from the element isolation region as shown in FIG. The area of the PN junction region 21 of the OB region pixel 13 is gradually decreased in a direction away from the element isolation region by separating the PN junction region 21 of the region pixel 13 by a certain distance (t0) or more (the PN junction region and the element isolation). When the dark current value was measured), the dark current value was found to decrease substantially corresponding to the size (area) of the semiconductor junction region. This is shown in FIG. Here, the horizontal axis of FIG. 8A is S = Sa-Sb (S is the area of the PN junction region 21, Sa is the area of the PN junction region 21 at t0, Sb is the area of the decrease), and the vertical axis is the image. It is a dark current ratio between a pixel in the formation region and a pixel in the OB region. S 1 to S of the horizontal shaft 5 represents the area when you release a certain distance Δt by one PN junction region from t0, the area of the OB region pixels and the image forming region pixels when an area S 2 are equal.

図8(a)の特性図からOB領域画素の大きさの減少に伴って暗電流比が直線的に減少することが分かる。よって、OB領域の画素の半導体接合領域の面積と画像形成領域の画素の面積との比率を適宜設計(増減)することで、画像形成領域に形成された光電変換素子の暗電流値とOB領域に形成された光電変換素子の暗電流値とが同じ又は両暗電流値の差を小さくできる。   It can be seen from the characteristic diagram of FIG. 8A that the dark current ratio linearly decreases as the size of the OB region pixel decreases. Therefore, by appropriately designing (increasing or decreasing) the ratio of the area of the semiconductor junction region of the pixel in the OB region and the area of the pixel in the image forming region, the dark current value of the photoelectric conversion element formed in the image forming region and the OB region The dark current value of the photoelectric conversion element formed in the same or the difference between both dark current values can be reduced.

次に、本発明の第2の固体撮像装置について説明する。   Next, the second solid-state imaging device of the present invention will be described.

光電変換素子を一次元または二次元状に配置する場合、隣接する素子間に選択酸化膜等の素子分離領域が設けられ、その素子分離領域で区分される素子領域に光電変換素子が形成される。そして、その素子分離領域上に光電変換素子を駆動したり、画素を選択する電界効果トランジスタのゲート配線や当該電界効果トランジスタのゲート電極等が設けられる。ここで、配線等を構成する導電層をその上に設けた素子分離領域に画素の半導体接合領域を近づけると、導電層の電位によって暗電流は増加する。そこで、例えば同一構造の設計ではOB領域画素の暗電流が画像形成領域の暗電流に対して少ない場合、そのOB領域画素の画素の暗電流を増加させるためには当該OB領域画素の半導体接合領域と素子分離領域との距離を短くすればよい。この場合、OB領域画素の半導体接合領域と素子分離領域との距離を短くすると同時に半導体接合領域の面積を増大させるようにすれば、素子分離領域に近づくことによる暗電流の増大と、面積を増大させることによる暗電流の増大とが行われ、より暗電流を増大させることができる。なお、逆に同一構造の設計ではOB領域画素の暗電流が画像形成領域の暗電流に対して大きい場合には画像形成領域画素の半導体接合領域と素子分離領域との距離を短くすればよい。   When the photoelectric conversion elements are arranged one-dimensionally or two-dimensionally, an element isolation region such as a selective oxide film is provided between adjacent elements, and a photoelectric conversion element is formed in an element region divided by the element isolation region. . A gate wiring of a field effect transistor for driving a photoelectric conversion element or selecting a pixel, a gate electrode of the field effect transistor, or the like is provided on the element isolation region. Here, when the semiconductor junction region of the pixel is brought close to the element isolation region provided with the conductive layer constituting the wiring or the like, the dark current increases due to the potential of the conductive layer. Therefore, for example, when the dark current of the OB region pixel is smaller than the dark current of the image forming region in the same structure design, the semiconductor junction region of the OB region pixel is increased in order to increase the dark current of the pixel of the OB region pixel. And the element isolation region may be shortened. In this case, if the distance between the semiconductor junction region and the element isolation region of the OB region pixel is shortened and at the same time the area of the semiconductor junction region is increased, the dark current increases due to the approach to the element isolation region and the area increases. The dark current is increased by this, and the dark current can be further increased. On the contrary, in the design of the same structure, when the dark current of the OB region pixel is larger than the dark current of the image forming region, the distance between the semiconductor junction region and the element isolation region of the image forming region pixel may be shortened.

次に、本発明の第3及び4の固体撮像装置について説明する。   Next, the third and fourth solid-state imaging devices of the present invention will be described.

光電変換素子の半導体接合領域に流入する電流(電荷)を抑制するために、その半導体接合領域の周囲にガードリング層とよばれる半導体領域が形成される。そして、この半導体領域の一部又は全部を除去すれば、暗電流を増加させることができる。   In order to suppress a current (charge) flowing into the semiconductor junction region of the photoelectric conversion element, a semiconductor region called a guard ring layer is formed around the semiconductor junction region. If a part or all of the semiconductor region is removed, the dark current can be increased.

そこで、例えば同一構造の設計ではOB領域画素の暗電流が画像形成領域の暗電流に対して少ない場合、画像形成領域画素の半導体接合領域の周囲の全部又は一部にガードリング層となる半導体領域を設け、OB領域画素の半導体接合領域の周囲の半導体領域は設けないか、又は画像形成領域画素の半導体接合領域の周囲を囲う半導体領域の長さよりも、OB領域画素の半導体接合領域の周囲を囲う半導体領域の長さを短くすればよい。なお、逆に同一構造の設計ではOB領域画素の暗電流が画像形成領域の暗電流に対して大きい場合には画像形成領域画素の半導体接合領域の周囲を囲う半導体領域の長さよりも、OB領域画素の半導体接合領域の周囲を囲う半導体領域の長さを長くすればよい。   Therefore, for example, when the dark current of the OB region pixel is smaller than the dark current of the image forming region in the design of the same structure, the semiconductor region that becomes a guard ring layer around all or part of the semiconductor junction region of the image forming region pixel The semiconductor region around the semiconductor junction region of the OB region pixel is not provided, or the periphery of the semiconductor junction region of the OB region pixel is larger than the length of the semiconductor region surrounding the semiconductor junction region of the image formation region pixel. The length of the surrounding semiconductor region may be shortened. On the contrary, in the same structure design, when the dark current of the OB region pixel is larger than the dark current of the image forming region, the OB region is longer than the length of the semiconductor region surrounding the semiconductor junction region of the image forming region pixel. The length of the semiconductor region surrounding the semiconductor junction region of the pixel may be increased.

本発明によれば、OB領域からの暗時基準出力と画像形成領域からの暗時出力との暗時のオフセット(OB段差)を抑制することができ、当該オフセットがより顕著に現れる長時間露光時、高温時、高ISO時に好適に用いることができる。   According to the present invention, the dark offset (OB step) between the dark reference output from the OB area and the dark output from the image forming area can be suppressed, and the long exposure in which the offset appears more noticeably. It can be suitably used at times, at high temperatures, and at high ISO.

以下、本発明の実施の形態について図面を用いて詳細に説明する。   Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(実施形態1)
図1(a)は本発明の第1実施形態に係わる固体撮像装置のOB領域の一画素を示す図、図1(b)は本発明の第1実施形態に係わる固体撮像装置の画像形成領域の一画素を示す図である。
(Embodiment 1)
FIG. 1A is a diagram showing one pixel of the OB region of the solid-state imaging device according to the first embodiment of the present invention, and FIG. 1B is an image forming region of the solid-state imaging device according to the first embodiment of the present invention. It is a figure which shows one pixel.

図1において、13はオプティカルブラック(OB)領域画素、14は画像形成領域画素を示し、OB領域画素13及び画像形成領域画素14には、光電変換素子形成領域20内に半導体接合領域となるPN接合領域21が設けられる。PN接合領域21に蓄積された電荷は電荷転送スイッチ22を介して電荷電圧変換部23(浮遊拡散領域)に転送され、この電荷電圧変換部23はアンプ用MOSトランジスタ24のゲート(入力部)と接続され、増幅して出力される。なお図1では図3に示すリセットスイッチ103、画素を選択する行選択スイッチ105は省略されている。また、PN接合領域から直接電荷を電荷電圧変換部23に転送するような構成としてもよい。   In FIG. 1, reference numeral 13 denotes an optical black (OB) area pixel, and reference numeral 14 denotes an image forming area pixel. The OB area pixel 13 and the image forming area pixel 14 have a PN that is a semiconductor junction area in the photoelectric conversion element forming area 20. A junction region 21 is provided. The charge accumulated in the PN junction region 21 is transferred to the charge / voltage conversion unit 23 (floating diffusion region) via the charge transfer switch 22, and the charge / voltage conversion unit 23 is connected to the gate (input unit) of the amplifier MOS transistor 24. Connected, amplified and output. In FIG. 1, the reset switch 103 and the row selection switch 105 for selecting pixels shown in FIG. 3 are omitted. Further, a configuration may be adopted in which charges are directly transferred from the PN junction region to the charge-voltage converter 23.

本実施形態では、OB領域画素と画像形成領域画素を同一構造としたときに、画像形成領域画素の暗電流よりもOB領域画素の暗電流が小さい場合に、図8(a)に示した特性に基づき、OB領域画素の暗電流を大きくするために、OB領域画素のPN接合領域を画像形成領域画素のPN接合領域より面積を大きくしている。なお、OB領域画素と画像形成領域画素を同一構造とした場合に、画像形成領域画素の暗電流よりもOB領域画素の暗電流が大きい場合には、暗電流差が無くなるように、OB領域の画素のPN接合領域を小さくすればよい。   In the present embodiment, when the OB area pixel and the image forming area pixel have the same structure, and the dark current of the OB area pixel is smaller than the dark current of the image forming area pixel, the characteristics shown in FIG. Therefore, in order to increase the dark current of the OB region pixel, the area of the PN junction region of the OB region pixel is made larger than that of the PN junction region of the image forming region pixel. In the case where the OB area pixel and the image forming area pixel have the same structure, if the dark current of the OB area pixel is larger than the dark current of the image forming area pixel, the OB area pixel has a dark current difference so that the dark current difference is eliminated. The PN junction region of the pixel may be reduced.

OB領域画素のPN接合領域を画像形成領域画素のPN接合領域よりどの程度面積を増減してよいかは、例えばPN接合領域の面積の異なる試作品により図8のような特性図を求めてもよいし、OB領域画素のPN接合領域と画像形成領域画素のPN接合領域との面積が同一に設計された固体撮像装置において、OB領域画素のPN接合領域の面積のバラツキと、画像形成領域画素に対するOB領域画素の暗電流比のバラツキとを測定して求めてもよい。   The extent to which the area of the PN junction region of the OB region pixel can be increased or decreased from the PN junction region of the image forming region pixel can be determined by, for example, obtaining a characteristic diagram as shown in FIG. In the solid-state imaging device in which the areas of the PN junction region of the OB region pixel and the PN junction region of the image formation region pixel are designed to be the same, the variation in the area of the PN junction region of the OB region pixel and the image formation region pixel It may be obtained by measuring the variation in the dark current ratio of the OB region pixel with respect to.

図2は固体撮像装置の受光部の構成を示す図である。図2において、10は受光部を示し、その受光部10内に画像形成領域11とその周辺にOB領域が設けられる。画像形成領域11には画像形成領域画素14、OB領域12にはOB領域画素13がそれぞれ2次元状に配列されている。   FIG. 2 is a diagram illustrating a configuration of the light receiving unit of the solid-state imaging device. In FIG. 2, reference numeral 10 denotes a light receiving unit, and an image forming region 11 and an OB region around the image forming region 11 are provided in the light receiving unit 10. Image forming area pixels 14 are arranged in the image forming area 11, and OB area pixels 13 are arranged in the OB area 12 in a two-dimensional manner.

図3は本発明の第1実施形態に係わる固体撮像装置の全体構成を示すブロック図である。図3では画素は2行分示されているが、これ以上の数の画素行であってもよい。また固体撮像装置は画素が2次元状に配列されたエリアセンサとして示されているが、画素が1次元状に配列されたラインセンサであってもよい。   FIG. 3 is a block diagram showing the overall configuration of the solid-state imaging device according to the first embodiment of the present invention. Although two pixels are shown in FIG. 3, a larger number of pixel rows may be used. The solid-state imaging device is shown as an area sensor in which pixels are arranged in a two-dimensional manner, but may be a line sensor in which pixels are arranged in a one-dimensional manner.

図3において、画素は、フォトダイオード101、フォトダイオード101に蓄積された電荷を浮遊拡散領域(図1の電荷電圧変換部23に対応する)に転送する画素転送スイッチ102(図1の電荷転送スイッチ22に対応する)、浮遊拡散領域に入力部が接続され、増幅手段となる増幅MOSトランジスタ104(図1のアンプ用MOSトランジスタ24に対応する)、浮遊拡散領域に接続されるリセットスイッチ103、画素を選択する行選択スイッチ105から構成される。   3, the pixel includes a photodiode 101 and a pixel transfer switch 102 (charge transfer switch of FIG. 1) that transfers charges accumulated in the photodiode 101 to a floating diffusion region (corresponding to the charge-voltage converter 23 of FIG. 1). 22), an input MOS transistor 104 (corresponding to the amplifier MOS transistor 24 in FIG. 1) serving as an amplifying means, an input unit is connected to the floating diffusion region, a reset switch 103 connected to the floating diffusion region, a pixel It is comprised from the row selection switch 105 which selects.

画素転送スイッチ102、リセットスイッチ103、選択スイッチ105は垂直走査回路123からの制御信号PTX、PRES、PSELにより制御され、選択スイッチ105により選択された行の各画素からの信号は、図中上下方向に交互に設けられた、信号出力線となる垂直出力線106に出力される。垂直出力線106は画素と増幅回路となる演算増幅器120の一方の端子(+)とをクランプ容量108を介して接続する。107は負荷MOSトランジスタ、109はクランプスイッチである。   The pixel transfer switch 102, the reset switch 103, and the selection switch 105 are controlled by control signals PTX, PRES, and PSEL from the vertical scanning circuit 123, and the signals from the pixels in the row selected by the selection switch 105 are in the vertical direction in the figure. Are output alternately to the vertical output line 106 which is a signal output line. The vertical output line 106 connects the pixel and one terminal (+) of the operational amplifier 120 serving as an amplifier circuit via a clamp capacitor 108. Reference numeral 107 denotes a load MOS transistor, and 109 denotes a clamp switch.

演算増幅器120で増幅された信号は転送ゲート110を介して蓄積容量112に蓄積され、水平走査回路119により制御される水平転送スイッチ114を介して、順次水平出力線116に出力され出力アンプ118を介して出力される。132は演算増幅器120の共通GND配線である。   The signal amplified by the operational amplifier 120 is accumulated in the storage capacitor 112 via the transfer gate 110, and is sequentially output to the horizontal output line 116 via the horizontal transfer switch 114 controlled by the horizontal scanning circuit 119. Is output via. Reference numeral 132 denotes a common GND wiring of the operational amplifier 120.

図4はクランプ回路の一構成例を示す図である。図4に示すように出力アンプ118から出力されたセンサ出力はクランプ容量の一方の端子に入力される。クランプ制御信号φCLPにより制御されるクランプスイッチにより、クランプ容量の他方の端子が、OB領域から得られる、画素の信号レベルの基準となる信号(黒基準信号)に基づく参照電圧に設定された状態で、クランプ容量の一方の端子にセンサ信号が入力されるとクランプされた信号が出力される。
(実施形態2)
図5(a)は本発明の第2実施形態に係わる固体撮像装置のOB領域の一画素を示す図、図5(b)はそのB−B’断面図である。図1と同一構成部材については同一符号を付する。本実施形態の固体撮像装置の全体構成は図3に示した構成、固体撮像装置の受光部の構成は図2に示した構成と同じである。
FIG. 4 is a diagram illustrating a configuration example of the clamp circuit. As shown in FIG. 4, the sensor output output from the output amplifier 118 is input to one terminal of the clamp capacitor. With the clamp switch controlled by the clamp control signal φCLP, the other terminal of the clamp capacitor is set to a reference voltage based on a signal (black reference signal) that is obtained from the OB region and serves as a reference of the pixel signal level. When a sensor signal is input to one terminal of the clamp capacitor, a clamped signal is output.
(Embodiment 2)
FIG. 5A is a diagram showing one pixel in the OB region of the solid-state imaging device according to the second embodiment of the present invention, and FIG. 5B is a cross-sectional view along the line BB ′. The same components as those in FIG. 1 are denoted by the same reference numerals. The overall configuration of the solid-state imaging device of the present embodiment is the same as the configuration shown in FIG. 3, and the configuration of the light receiving unit of the solid-state imaging device is the same as the configuration shown in FIG.

図5(a)において、25はポリシリコン等からなる配線やゲート電極(以下配線という)であり、選択酸化膜(LOCOS)上に設けられる。配線25の電位によって選択酸化膜下に電荷が生じ、その電荷がPN接合領域に流れこんで、OB領域13の暗電流が増加する。   In FIG. 5A, reference numeral 25 denotes a wiring or gate electrode (hereinafter referred to as wiring) made of polysilicon or the like, which is provided on a selective oxide film (LOCOS). Electric charges are generated under the selective oxide film due to the potential of the wiring 25, and the electric charges flow into the PN junction region, increasing the dark current in the OB region 13.

配線25は例えば図3に示すリセットスイッチ103、増幅MOSトランジスタ104、選択スイッチ105のゲート配線やゲート電極である。   For example, the wiring 25 is a gate wiring or a gate electrode of the reset switch 103, the amplification MOS transistor 104, and the selection switch 105 shown in FIG.

本実施形態は、OB領域の画素と画像形成領域の画素を同一構造としたときに、画像形成領域の画素の暗電流よりもOB領域の画素の暗電流が小さい場合に、OB領域の画素の暗電流を大きくするために、OB領域画素のPN接合領域を選択酸化膜上に近づけて(距離を短くして)、選択酸化膜側から流れ込む電流を増加させて、OB領域画素の暗電流を画像形成領域画素の暗電流と同じにしている。   In the present embodiment, when the pixels in the OB region and the pixels in the image forming region have the same structure, the dark current of the pixels in the OB region is smaller than the dark current of the pixels in the image forming region. In order to increase the dark current, the PN junction region of the OB region pixel is brought close to the selective oxide film (distance is shortened), the current flowing from the selective oxide film side is increased, and the dark current of the OB region pixel is reduced. It is the same as the dark current of the image forming area pixels.

なお、OB領域の画素と画像形成領域の画素を同一構造とした場合に、画像形成領域の画素の暗電流よりもOB領域の画素の暗電流が大きい場合には、暗電流差が無くなるように、画像形成領域画素のPN接合領域を選択酸化膜側に近づけて暗電流を増やしても良い。画像形成領域の画素の暗電流を増やしたくない場合には、OB領域の画素のPN接合領域を小さくすることでOB領域の画素の暗電流を減少させることができる。   If the pixels in the OB region and the image forming region have the same structure, and the dark current of the pixels in the OB region is larger than the dark current of the pixels in the image forming region, the dark current difference is eliminated. The dark current may be increased by bringing the PN junction region of the image forming region pixel closer to the selective oxide film side. When it is not desired to increase the dark current of the pixels in the image forming area, the dark current of the pixels in the OB area can be reduced by reducing the PN junction area of the pixels in the OB area.

(実施形態3)
図6(a)、(c)は本発明の第3実施形態に係わる固体撮像装置のOB領域の一画素を示す図、図6(b)はそのB−B’断面図である。図1と同一構成部材については同一符号を付する。本実施形態の固体撮像装置の全体構成は図3に示した構成、固体撮像装置の受光部の構成は図2に示した構成と同じである。
(Embodiment 3)
6A and 6C are views showing one pixel of the OB region of the solid-state imaging device according to the third embodiment of the present invention, and FIG. 6B is a cross-sectional view taken along the line BB ′. The same components as those in FIG. 1 are denoted by the same reference numerals. The overall configuration of the solid-state imaging device of the present embodiment is the same as the configuration shown in FIG. 3, and the configuration of the light receiving unit of the solid-state imaging device is the same as the configuration shown in FIG.

PN接合領域の周囲からの電荷がPN接合領域に流れこんで、OB領域画素の暗電流が増加することを防止するために、選択酸化膜(LOCOS)とPN接合領域との間にPN接合領域とは異なる導電型の半導体領域(ガードリング層)をPN接合領域の周囲に設けることが行われている。   In order to prevent the charge from the periphery of the PN junction region from flowing into the PN junction region and increasing the dark current of the OB region pixel, the PN junction region is interposed between the selective oxide film (LOCOS) and the PN junction region. A semiconductor region (guard ring layer) having a conductivity type different from that of the PN junction region is provided.

本実施形態では、OB領域の画素と画像形成領域の画素を同一構造としたときに、画像形成領域の画素の暗電流よりもOB領域の画素の暗電流が小さい場合に、OB領域の画素の暗電流を大きくするために、図6(a)のようにOB領域画素のPN接合領域の周囲に設けられる半導体領域(ガードリング層)26の一部を、図6(c)に示すように除去する(画像形成領域画素のPN接合領域の周囲を囲う半導体領域の長さよりも、OB領域画素のPN接合領域の周囲を囲う半導体領域の長さを短くする)ことで、OB領域画素の暗電流を増加させ、OB領域画素の暗電流を画像形成領域画素の暗電流と同じにしている。例えば、図6(a)で示した構成を画像形成領域画素、(b)で示した構成をOB領域画素とすることができる。ここで、半導体領域26の長さとはPN接合領域26の周囲を覆うように形成される半導体領域26の長さであって、図6(c)のように、孤立して複数の半導体領域が形成される場合には二つの半導体領域の長さを合計して、半導体領域の長さとする。   In the present embodiment, when the pixels in the OB area have the same structure as the pixels in the OB area, and the dark current in the pixels in the OB area is smaller than the dark current in the pixels in the image formation area, In order to increase the dark current, as shown in FIG. 6C, a part of the semiconductor region (guard ring layer) 26 provided around the PN junction region of the OB region pixel as shown in FIG. By removing (making the length of the semiconductor region surrounding the PN junction region of the OB region pixel shorter than the length of the semiconductor region surrounding the PN junction region of the image forming region pixel) The current is increased to make the dark current of the OB area pixel the same as the dark current of the image forming area pixel. For example, the configuration shown in FIG. 6A can be an image forming region pixel, and the configuration shown in FIG. 6B can be an OB region pixel. Here, the length of the semiconductor region 26 is the length of the semiconductor region 26 formed so as to cover the periphery of the PN junction region 26. As shown in FIG. In the case of being formed, the lengths of the two semiconductor regions are totaled to obtain the length of the semiconductor region.

なお、OB領域の画素と画像形成領域の画素を同一構造とした場合に、画像形成領域の画素の暗電流よりもOB領域の画素の暗電流が大きい場合には、暗電流差が無くなるように、画像形成領域画素のPN接合領域の周囲に設けられる半導体領域の一部を形成しないようにして暗電流を増やしてもよい。画像形成領域画素の暗電流を増やしたくない場合には、OB領域画素のPN接合領域を小さくすることでOB領域画素の暗電流を減少させることができる。   If the pixels in the OB region and the image forming region have the same structure, and the dark current of the pixels in the OB region is larger than the dark current of the pixels in the image forming region, the dark current difference is eliminated. The dark current may be increased so as not to form a part of the semiconductor region provided around the PN junction region of the image forming region pixel. When it is not desired to increase the dark current of the image forming area pixel, the dark current of the OB area pixel can be reduced by reducing the PN junction area of the OB area pixel.

次に上記第1〜第3の実施形態の固体撮像装置を用いた撮像システムについて説明する。かかる固体撮像装置を用いた撮像システムとしては、スチルカメラ、ビデオカメラ、複写機、ファクシミリなどが挙げられる。ここでは図7に基づいて、本発明による固体撮像装置をスチルカメラに適用した場合の一実施例について詳述する。   Next, an imaging system using the solid-state imaging device of the first to third embodiments will be described. Examples of the imaging system using such a solid-state imaging device include a still camera, a video camera, a copying machine, and a facsimile. Here, based on FIG. 7, an embodiment when the solid-state imaging device according to the present invention is applied to a still camera will be described in detail.

図7は本発明による固体撮像素子を“スチルビデオカメラ”に適用した場合を示すブロック図である。   FIG. 7 is a block diagram showing a case where the solid-state imaging device according to the present invention is applied to a “still video camera”.

図7において、201はレンズのプロテクトとメインスイッチを兼ねるバリア、202は被写体の光学像を固体撮像素子4に結像させるレンズ、203はレンズ202を通った光量を可変するための絞り、204はレンズ202で結像された被写体を画像信号として取り込むための固体撮像素子、206は固体撮像素子204より出力される画像信号のアナログ−ディジタル変換を行うA/D変換器、207はA/D変換器206より出力された画像データに各種の補正を行ったりデータを圧縮する信号処理部、208は固体撮像素子204、撮像信号処理回路205、A/D変換器206、信号処理部207に、各種タイミング信号を出力するタイミング発生部、209は各種演算とスチルビデオカメラ全体を制御する全体制御・演算部、210は画像データを一時的に記憶するためのメモリ部、211は記録媒体に記録または読み出しを行うためのインターフェース部、212は画像データの記録または読み出しを行うための半導体メモリ等の着脱可能な記録媒体、213は外部コンピュータ等と通信するためのインターフェース部である。   In FIG. 7, 201 is a barrier that doubles as a lens protect and main switch, 202 is a lens that forms an optical image of a subject on the solid-state imaging device 4, 203 is a diaphragm for changing the amount of light passing through the lens 202, and 204 is A solid-state imaging device for capturing an object imaged by the lens 202 as an image signal, 206 an A / D converter that performs analog-digital conversion of an image signal output from the solid-state imaging device 204, and 207 an A / D conversion A signal processing unit 208 performs various corrections on the image data output from the imager 206 and compresses the data. 208 denotes a solid-state image sensor 204, an image signal processing circuit 205, an A / D converter 206, and a signal processing unit 207. A timing generator for outputting a timing signal, 209 is an overall control / arithmetic unit for controlling various operations and the entire still video camera, 10 is a memory unit for temporarily storing image data, 211 is an interface unit for performing recording or reading on a recording medium, and 212 is a detachable recording such as a semiconductor memory for recording or reading image data. A medium 213 is an interface unit for communicating with an external computer or the like.

次に、前述の構成における撮影時のスチルビデオカメラの動作について、説明する。   Next, the operation of the still video camera at the time of shooting in the above configuration will be described.

バリア201がオープンされるとメイン電源がオンされ、次にコントロール系の電源がオンし、さらに、A/D変換器206などの撮像系回路の電源がオンされる。   When the barrier 201 is opened, the main power supply is turned on, the control system power supply is turned on, and the power supply of the imaging system circuit such as the A / D converter 206 is turned on.

それから、露光量を制御するために、全体制御・演算部209は絞り203を開放にし、固体撮像素子204から出力された信号はA/D変換器206で変換された後、信号処理部207に入力される。そのデータを基に露出の演算を全体制御・演算部209で行う。   Then, in order to control the exposure amount, the overall control / arithmetic unit 209 opens the diaphragm 203, and the signal output from the solid-state imaging device 204 is converted by the A / D converter 206 and then sent to the signal processing unit 207. Entered. Based on the data, the exposure calculation is performed by the overall control / calculation unit 209.

この測光を行った結果により明るさを判断し、その結果に応じて全体制御・演算部209は絞りを制御する。   The brightness is determined based on the result of the photometry, and the overall control / calculation unit 209 controls the aperture according to the result.

次に、固体撮像素子204から出力された信号をもとに、高周波成分を取り出し被写体までの距離の演算を全体制御・演算部209で行う。その後、レンズを駆動して合焦か否かを判断し、合焦していないと判断したときは、再びレンズを駆動し測距を行う。   Next, based on the signal output from the solid-state imaging device 204, the high-frequency component is extracted and the distance to the subject is calculated by the overall control / calculation unit 209. Thereafter, the lens is driven to determine whether or not it is in focus. If it is determined that the lens is not in focus, the lens is driven again to perform distance measurement.

そして、合焦が確認された後に本露光が始まる。露光が終了すると、固体撮像素子204から出力された画像信号はA/D変換器206でA−D変換され、信号処理部207を通り全体制御・演算209によりメモリ部210に書き込まれる。その後、メモリ部210に蓄積されたデータは、全体制御・演算部209の制御により記録媒体制御I/F部211を通り半導体メモリ等の着脱可能な記録媒体212に記録される。又外部I/F部213を通り直接コンピュータ等に入力して画像の加工を行ってもよい。   Then, after the in-focus state is confirmed, the main exposure starts. When the exposure is completed, the image signal output from the solid-state imaging device 204 is A / D converted by the A / D converter 206, passes through the signal processing unit 207, and is written in the memory unit 210 by the overall control / calculation 209. Thereafter, the data stored in the memory unit 210 is recorded on a removable recording medium 212 such as a semiconductor memory through the recording medium control I / F unit 211 under the control of the overall control / arithmetic unit 209. Further, the image may be processed by directly inputting to a computer or the like through the external I / F unit 213.

本発明はオプティカルブラック領域からの暗時基準出力と画像形成領域からの暗時出力との暗時のオフセット(OB段差)を抑制が求められる固体撮像装置、特に長時間露光、高温での使用、高ISOでの使用に適する固体撮像装置に適用でき、スチルカメラ、ビデオカメラ、複写機、ファクシミリ用の固体撮像装置に利用可能である。   The present invention is a solid-state imaging device that is required to suppress dark offset (OB level difference) between a dark reference output from an optical black area and a dark output from an image forming area, particularly long-time exposure, use at a high temperature, The present invention can be applied to a solid-state imaging device suitable for use in high ISO, and can be used for a solid-state imaging device for a still camera, a video camera, a copying machine, and a facsimile.

本発明の第1実施形態に係わる固体撮像装置のOB領域及び画像形成領域の一画素を示す図である。It is a figure which shows one pixel of the OB area | region and image formation area of the solid-state imaging device concerning 1st Embodiment of this invention. 固体撮像装置の受光部の構成を示す図である。It is a figure which shows the structure of the light-receiving part of a solid-state imaging device. 本発明の第1実施形態に係わる固体撮像装置の全体構成を示すブロック図である。1 is a block diagram illustrating an overall configuration of a solid-state imaging apparatus according to a first embodiment of the present invention. クランプ回路の一構成例を示す図である。It is a figure which shows one structural example of a clamp circuit. 本発明の第2実施形態に係わる固体撮像装置のOB領域の一画素を示す図である。It is a figure which shows one pixel of the OB area | region of the solid-state imaging device concerning 2nd Embodiment of this invention. 本発明の第3実施形態に係わる固体撮像装置のOB領域の一画素を示す図である。It is a figure which shows one pixel of the OB area | region of the solid-state imaging device concerning 3rd Embodiment of this invention. 本発明による固体撮像装置をスチルビデオカメラに適用した場合を示すブロック図である。It is a block diagram which shows the case where the solid-state imaging device by this invention is applied to a still video camera. 本発明の原理を説明するための図である。It is a figure for demonstrating the principle of this invention.

符号の説明Explanation of symbols

13 オプティカルブラック(OB)領域画素
14 画像形成領域画素
20 光電変換素子形成領域
21 PN接合領域
22 電荷転送スイッチ
23 電荷電圧変換部(浮遊拡散領域)
24 アンプ用MOSトランジスタ
13 Optical Black (OB) Area Pixel 14 Image Forming Area Pixel 20 Photoelectric Conversion Element Forming Area 21 PN Junction Area 22 Charge Transfer Switch 23 Charge Voltage Converter (Floating Diffusion Area)
24 MOS transistor for amplifier

Claims (3)

電荷を蓄積するための第1導電型の第1の半導体領域と、該第1の半導体領域とPN接合を構成する第2導電型の第2の半導体領域とを備えた光電変換素子と、前記第1の半導体領域に蓄積された電荷を元に信号を読み出すための複数のトランジスタを画素内に有する画像形成領域と、
電荷を蓄積するための第1導電型の第3の半導体領域と、該第3の半導体領域とPN接合を構成する第2導電型の第4の半導体領域とを含み、前記第3の半導体領域に蓄積された電荷を元に基準信号を読み出すための複数のトランジスタとを備えたオプティカルブラック領域と、を有する固体撮像装置において、
前記画像形成領域及びオプティカルブラック領域はそれぞれ、前記トランジスタの配線の一部をその上に有する素子分離領域により区分される素子領域内に前記第1の半導体領域及び第3の半導体領域を有し、前記オプティカルブラック領域の暗電流が前記画像形成領域の暗電流よりも大きい場合に、前記第1の半導体領域と素子分離領域との間の第1の距離よりも、前記第3の半導体領域と素子分離領域との間の第2の距離の方を大きくすることを特徴とする固体撮像装置。
A photoelectric conversion element comprising: a first conductivity type first semiconductor region for accumulating electric charge; and a second conductivity type second semiconductor region constituting a PN junction with the first semiconductor region; An image forming region having a plurality of transistors in a pixel for reading a signal based on charges accumulated in the first semiconductor region;
A third semiconductor region of a first conductivity type for accumulating electric charge; and a fourth semiconductor region of a second conductivity type constituting a PN junction with the third semiconductor region, the third semiconductor region In a solid-state imaging device having an optical black region including a plurality of transistors for reading a reference signal based on the electric charge accumulated in
Each of the image forming region and the optical black region has the first semiconductor region and the third semiconductor region in an element region divided by an element isolation region having a part of the wiring of the transistor thereon, When the dark current in the optical black region is larger than the dark current in the image forming region, the third semiconductor region and the element are more than the first distance between the first semiconductor region and the element isolation region. A solid-state imaging device, wherein a second distance between the separation region and the separation region is increased.
前記画像形成領域と前記オプティカルブラック領域にはそれぞれ、前記光電変換素子と前記光電変換素子で変換された電気信号を読み出す読み出し手段とを備えた画素が一次元又は2次元状に形成されていることを特徴とする請求項1記載の固体撮像装置。 In the image forming area and the optical black area, pixels each including a photoelectric conversion element and a reading unit that reads an electric signal converted by the photoelectric conversion element are formed in a one-dimensional or two-dimensional manner. The solid-state imaging device according to claim 1. 請求項1又は2のいずれかの請求項に記載の固体撮像装置と、該固体撮像装置へ光を結像する光学系と、該固体撮像装置からの出力信号を処理する信号処理回路とを有することを特徴とする撮像システム。 The solid-state imaging device according to claim 1, an optical system that forms an image of light on the solid-state imaging device, and a signal processing circuit that processes an output signal from the solid-state imaging device. An imaging system characterized by that.
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