JP2003134400A - Slid-state imaging apparatus and system thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable necessary offset elimination in order to obtain a superior picture image. SOLUTION: A forming region of a photoelectric transducer for converting an optical signal from a camera subject to an electric signal and a reading means for reading the electric signal converted by the transducer is ensured in a substrate. An image forming region 11 where the photoelectric transducer and the reading means are formed, and an optical black region 13 where the reading means is formed without forming the photoelectric transducer, are disposed in the substrate. A reading signal of the optical region 13 is subtracted from a reading signal of the image forming region 11, thereby eliminating an offset component superposed on the electric signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device and system, and more particularly to a solid-state image pickup device and system such as a digital still camera.

[0002]

2. Description of the Related Art Conventionally, an image forming area in which pixels for actually forming an image are formed, and an optical black for removing a unique offset component superimposed on a read signal from a pixel in the image forming area 11 ( OB) area is provided.

In such a solid-state image pickup device, the offset component is removed by subtracting the read signal of the OB area from the read signal of the image forming area.

FIG. 19 is a schematic plan view of a pixel substrate of a conventional solid-state image pickup device. An image forming area 11 and an OB area 12 'are formed on the pixel substrate, respectively.

In each of the image forming area 11 and the OB area 12 ', a pixel is formed which comprises a photodiode for converting an optical signal from a subject into an electric charge and a reading means for reading out the electric charge converted by the photodiode. There is.

The OB area 12 'is the image forming area 1
Regardless of the size of 1, the size is, for example, 13 rows (13 bits) and 50 columns (50 bits) in terms of pixels.

[0007]

FIG. 20 is a diagram of FIG.
It is a figure which shows the read-out signal in -A '. As shown in FIG. 20, most of the read signals of the OB region 12 'are signals of about 5 mV. However, there are places where this signal is increasing. There are three here. It reaches as high as 500 mV where it is most increasing. Such abnormal read signals are often caused by white scratches on the photodiode.

For an abnormal read signal, the average of the read signals in the OB region 12 'will increase. Here the average is 15
It is about mV, which is three times that in the normal case. Therefore, a row or a column having an abnormal read signal may not be able to remove the required offset.

FIG. 21 is a diagram showing a read signal at BB 'in FIG. As shown in FIG. 21, the OB area 1
The read signal 2'increases in places due to white scratches and the like, and may further increase in the vicinity of the center in the horizontal direction when infrared light from the image forming area 11 side enters the photodiode.

In these cases, the difference is larger than the offset to be originally removed, the output of the pixel in the row or the column is lowered, and the phenomenon that a black line is drawn in the image may occur. However, a good image cannot be obtained.

Therefore, an object of the present invention is to make it possible to perform a required offset removal in order to obtain a good image.

[0012]

In order to solve the above-mentioned problems, the present invention provides a photoelectric conversion element for converting an optical signal from a subject into an electric signal and a reading means for reading the electric signal converted by the photoelectric conversion element. In a solid-state imaging device in which the image forming area and the image forming area are formed, an OB area formed by forming the reading means without forming a photoelectric conversion element is provided, And output means for respectively outputting and.

The present invention also provides a solid-state image pickup device in which a photoelectric conversion element for converting an optical signal from a subject into an electric signal and a reading means for reading the electric signal converted by the photoelectric conversion element are formed in an image forming area. An OB area formed by forming a photoelectric conversion element having a smaller PN junction surface than the PN junction surface of the photoelectric conversion element formed in the image forming area and a reading means, and providing a signal read from the image forming area. It has output means for respectively outputting the signals read from the OB area.

Further, the solid-state image pickup system of the present invention includes the above-mentioned solid-state image pickup device.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is a schematic plan view of a solid-state image pickup device according to Embodiment 1 of the present invention. An image forming region 11, a first OB region 12, and a second OB region 13 are formed on the semiconductor substrate of the solid-state imaging device shown in FIG.

In FIG. 1, the first OB region 12 and the second OB region 13 are regions corresponding to the OB region 12 'in FIG. 17, and these are shielded from light.

FIG. 2A is an enlarged view of the pixel portion of the image forming area 11 and the first OB area 12 of FIG. 1, respectively.
12B is an enlarged view of the pixel portion of the second OB region 13, FIG.
(C) is a third OB described in FIGS. 9 to 15 described later.
6 is an enlarged view of a pixel portion of a region 14. FIG.

2 (a) to 2 (c), a region 20 (FIG. 2 (b) is shown in FIG. 2 (b) for forming a photodiode which is a photoelectric conversion element for converting an optical signal from a subject into an electric signal. (The photodiode is not actually formed), the charge transfer switch (SW) 22 for transferring the charge converted by the photodiode formed in the region 20 from the photodiode, and the charge transferred by the charge transfer switch 22. Shows a charge-voltage converter 23 for converting the voltage into a voltage and an amplifier MOS transistor 24 which is a reading means for reading out the voltage converted by the charge-voltage converter 23.

Although a MOS type sensor is shown in FIG. 2, pixels such as AMI, CMD, and bipolar image sensor may be used.

As shown in FIG. 2A, the image forming area 11
And a PN junction region 21 is formed in the first OB region 12.

As shown in FIG. 2B, the second OB area 13
In, the PN junction region 21 is not formed.

As shown in FIG. 2C, the third OB region 14
2A, a PN junction region 21 having a smaller junction surface than the PN junction region 21 of FIG. 2A is formed.

The second OB area 13 has a size of 20 columns at the left end of the drawing in terms of pixels, for example, regardless of the size of the image forming area 11. First OB area 1
2 is the 13th line at the top of the drawing and the right side 3 of the second OB area 13
The size is 0 columns.

Incidentally, the formation positions of the respective regions 11 to 13 are not limited to those shown in FIG. 1, but the second OB region 13 may be located on the upper side of the drawing as shown in FIG. 3 or as shown in FIG. The second OB area 13 may be adjacent to the image forming area 11, or the second OB area 13 may be formed separately as shown in FIG.

Incidentally, in FIGS. 3 to 5, each of the regions 12 and 13 is shown.
The number of rows or columns (bit) when converted into pixels is attached so that the size of can be understood.

When formed in the manner as shown in FIG. 1, the signal processing becomes easy when removing the offset component of the read signal of the image forming area 11 using the clamp circuit described below.

FIG. 6 shows an example of output means for outputting a read signal. FIG. 6A shows the image forming area 1
3 is a circuit diagram showing a schematic configuration of a clamp circuit that removes an offset component of a read signal from one pixel. FIG. Figure 6
FIG. 6B is a pulse waveform diagram showing input / output signals of the clamp circuit shown in FIG.

In FIG. 6A, 81 is a clamp capacitor, and 82 is a switch transistor. The clamp circuit inputs the read signal from the second OB region 13 with the switch transistor 82 turned off by applying the high-level clamp pulse CLP to the gate of the switch transistor 82.

While the read signal is being input, the clamp pulse CLP applied to the gate of the switch transistor 82 is switched to the low level, the switch transistor 82 is turned on, and the second capacitance OB region 13 is added to the clamp capacitor 81. The read signal from is temporarily stored.

After that, before inputting the read signal of the image forming area 11, a high level clamp pulse CLP is applied to the gate of the switch transistor 82 as a timing signal from the horizontal scanning circuit or the like to turn off the switch transistor 82. .

When a read signal of the image forming area 11 is input, the second O stored in the clamp capacitor 81 is input.
The read signals of the B area 13 are differentiated and output to the outside as a clamp output.

As shown in FIG. 6B, the image forming area 1
When the high level φCLP is applied while the read signal from the pixel No. 1 is input, the normal sensor outputs S1, S2, S superimposed on the read signal of the second OB region 13 are input.
3, S4 (illustrated by diagonal lines) component is output.

Here, the read signal from the second OB area 13 is used for removing the offset component of the image forming area 11.

Next, the read signal of the first OB area 12 is subtracted from the read signal of the image forming area 11 in the same procedure as described above. The difference result increases or decreases the readout signal of the photodiode depending on the ambient temperature around the solid-state imaging device, and is used to compensate for this increase or decrease.

Although a circuit for making a difference between the read signal from the pixel forming area 11 and the read signal in the OB area is shown in the figure, an output means for simply outputting both read signals in parallel may be used. In that case, it is desirable to provide a circuit for making a difference between the two signals by an external circuit.

FIG. 7 is a diagram showing the read signal at AA 'in FIG. As shown in FIG. 7, the second OB area 13
Is a signal of about 0.5 mV.

Most of the read signals of the first OB region 12 are signals of about 25 mV. However, there are places where this signal is increasing. There is one here. At the highest increase, it reaches 400 mV. Such an abnormal read signal is often caused by a white flaw or the like.

However, since the number of photodiodes in the first OB region 12 is smaller than the number of photodiodes in the OB region 12 'shown in FIG. 18, the abnormal read signal is relatively small.

The read signal of the image forming area 11 is 40
The signal is about 0 mV.

FIG. 8 is a diagram showing the read signal at BB 'in FIG. As shown in FIG. 8, the second OB area 13
Is a signal of about 0.5 mV.

The read signal of the first OB area 12 increases in places due to white scratches and the like, and slightly increases near the horizontal center due to the incidence of infrared light from the image forming area 11 side. Since the number of photodiodes in the first OB region 12 is smaller than the number of photodiodes in the OB region 12 ′ shown in FIG. 19, the increase amount of the read signal due to incidence of infrared light is relatively large. Less.

(Second Embodiment) FIG. 9 is a schematic plan view of a solid-state image pickup device according to a second embodiment of the present invention. The semiconductor substrate of the solid-state imaging device shown in FIG. 2 has a third pixel portion having a smaller PN junction region 21 of the photodiode than the image forming region 11, the first OB region 12, and the image forming region 11.
Optical regions 14 are formed respectively.

In FIG. 9, the first OB areas 12, P
The small third OB region 14 of the N-junction region 21 is a region corresponding to the OB region 12 'in FIG. 17, and these are shielded from light.

Further, the third O having a small PN junction region 21 is formed.
As shown in FIG. 2C, the B region 14 has a smaller PN junction region 21 than the photodiodes of the image forming region 11 and the first OB region 12.

As shown in FIG. 9, each area 11, 12, 14
Even if a case where the photodiode in the third OB region 14 of the small PN junction region 21 has a white flaw or the like and an abnormally increased read signal is output,
The abnormal increase in the read signal decreases in proportion to the size of the PN junction region 21. Therefore, it becomes possible to form an image in a state in which the effect of white scratches or the like is mitigated.

The arrangement position of each of the regions 11, 12 and 14 is not limited to the form shown in FIG. 9, and as shown in FIGS. 10 and 11, the third OB region 1 having a small PN junction region 21 is formed.
4 may be made relatively small with respect to the first OB region 12, or the first OB region 12 may be provided separately as shown in FIG.

In addition, in each of the areas 11, 12 and 14, FIG.
The second OB area 13 described in the first embodiment may be added as shown in FIG.

(Third Embodiment) FIG. 16 is a block diagram showing the schematic arrangement of a solid-state imaging system according to the third embodiment of the present invention. In FIG. 16, reference numeral 51 is a barrier which also serves as a lens protector and a main switch, 52 is a lens for forming an optical image of a subject on the solid-state imaging device 54, 53 is a diaphragm for changing the amount of light passing through the lens 52, and 54 is The solid-state imaging device described in the first and second embodiments, 55 is an imaging signal processing circuit that performs various corrections, clamps, and other processing on the image signal output from the solid-state imaging device 54.
4, an A / D converter that performs analog-digital conversion of the image signal output from the digital camera 4, and a signal processing unit 57 that performs various corrections on the image data output from the A / D converter 56 and compresses the data. Is a timing generation unit that outputs various timing signals to the solid-state imaging device 54, the imaging signal processing circuit 55, the A / D converter 56, and the signal processing unit 57, and 59 is an overall control that controls various operations and the entire still video camera.
An arithmetic unit, 60 is a memory unit for temporarily storing image data, 61 is a recording medium control interface unit for recording or reading on a recording medium, and 62 is a semiconductor memory for recording or reading image data. A detachable recording medium such as 63 is an external interface (I / F) unit for communicating with an external computer or the like.

Next, the operation of the solid-state imaging system shown in FIG. 16 will be described. When the barrier 51 is opened, the main power source is turned on, then the control system power source is turned on, and then the image pickup system circuit such as the A / D converter 56 is turned on.

Then, in order to control the exposure amount, the overall control / arithmetic unit 59 opens the diaphragm 53, and the signal output from the solid-state image pickup device 54 is passed through the image pickup signal processing circuit 55 and A / D converted. Is output to the device 56.

The A / D converter 56 A / D converts the signal and outputs it to the signal processing unit 57. Signal processing unit 57
Controls the exposure calculation based on the data.
Perform at 9.

The brightness is judged based on the result of this photometry, and the overall control / arithmetic unit 59 controls the diaphragm according to the result.

Next, based on the signal output from the solid-state image pickup device 54, high-frequency components are extracted and the distance to the object is calculated by the overall control / calculation unit 59. After that, the lens 52 is driven to determine whether or not the lens is in focus. When it is determined that the lens is not in focus, the lens 52 is driven again to measure the distance.

Then, after the focus is confirmed, the main exposure starts. When the exposure is completed, the image signal output from the solid-state image pickup device 54 is corrected in the image pickup signal processing circuit 55, further A / D converted by the A / D converter 56, and passed through the signal processing unit 57 to control the whole. It is stored in the memory unit 60 by the calculation 59.

After that, the data accumulated in the memory unit 60 is recorded medium control I under the control of the overall control / arithmetic unit 59.
Removable recording medium 62 such as a semiconductor memory passing through the / F section
Recorded in. Alternatively, the image may be processed by directly inputting it to a computer or the like through the external I / F unit 63.

(Fourth Embodiment) FIG. 17 is an equivalent circuit diagram of a solid-state imaging device according to the fourth embodiment of the present invention. In FIG. 17, 11 is an image forming area. Although not shown, the OB area is actually provided around the image forming area 11. Further, it may be possible to provide a dummy pixel between the image forming area 11 and the OB area to secure a predetermined margin.

Reference numeral 2 is a vertical scanning circuit block, 3 is a signal reading circuit, and 4 is a horizontal scanning circuit block.

FIG. 18 is a waveform diagram of drive pulses of the solid-state image pickup device of FIG. As shown in FIG. 17, photodiodes D11 to D which are photoelectric conversion elements arranged two-dimensionally
M1 which is a switch for transferring the respective signals of 43 to the amplification MOS transistors M311 to M343 which are the reading means.
11 to M143, switches M211 to M243 for resetting the gates of the amplification MOS transistors, and switches M411 to M443 for selecting a row are connected.

The gate of the transfer MOS transistor M111 is connected to the first row selection lines (vertical scanning lines) PTX1 to PTX3 extending in the horizontal direction, and the gate of the reset MOS transistor M211 selects the second row. Line (vertical scanning line) PRES1 to 3, row output selection switches M411 to
The M443 gate is the third row selection line (vertical scanning line) PSE
It is connected to L1-3.

The outputs of the amplification MOS transistors of each pixel are commonly connected in the column direction and are connected to the vertical output lines V1 to V4. Each vertical output line has load MOS transistors N82 to N85 and capacitors C01 to C0 of amplification MOS transistors.
4 is connected to the capacitors C01 to C04 and the transfer switch N1.
The connection points of 05 to N108 are switches N101 to N104.
Connected to the power source VC0R.

The gates of the horizontal transfer switches N109 to N112 are connected to the column selection lines H1 to H4 and to the horizontal scanning circuit block 4. Further, the gates of the switches N101 to N104 and the transfer switch M10 connected to each column.
The gates of 5 to M108 are commonly connected to the signal input terminal PC0R and the transfer signal input terminal PT, and a signal voltage is supplied to each of them according to the operation timing described later.

Hereinafter, the MOS transistor shown in FIG. 17 is NM.
It will be described as an OS transistor. Photodiode D
Prior to reading out optical signal charges from 11 to D41,
The gate PRES1 of the reset MOS transistors M211 to M241 becomes high level. As a result, the gates of the amplification MOS transistors M311 to M341 are reset to the reset power supply.

Reset MOS transistors M211 to M21
After the gate PRES1 of 241 returns to the low level and at the same time the gates PC0R of the switches N101 to N104 become the high level, the selection MOS transistor M41
The gate PSEL1 of 1 to M441 becomes high level.

As a result, the reset signal (noise signal) on which the reset noise is superimposed becomes vertical signal lines V1 to V4.
Is read out and clamped in the capacitors C01 to C04. At the same time, the gates PT of the transfer switches N105 to N108 are set to the high level, and the signal holding capacitors CT1 to CT4 have the voltage V.
Reset to C0R.

Next, the gate PC0R of the switches N101 to N104 returns to the low level. Next, transfer M
Gate PTX1 of the OS transistors M111 to M141
Becomes high level, and the photodiodes D11 to D41
The optical signal charges of the amplification MOS transistors M311 to M3
At the same time as being transferred to the gate of 341, the optical signal is read out to the vertical signal lines V1 to V4.

Next, the transfer MOS transistor N111
After the gate PTX1 of to N141 returns to the low level, the gates PT of the transfer switches N105 to N108 become the low level. As a result, the change (optical signal) from the reset signal is read out to the signal holding capacitors CT1 to CT4.

By the operation up to this point, the optical signals of the pixel cells connected to the first row are held in the signal holding capacitors CT1 to CT4 connected to the respective columns.

Next, the reset MOS transistor M2
The gate PRES1 of 11 to M241 and the gate PTX1 of the transfer MOS transistors M111 to M141 become high level, and the optical signal charges of the photodiodes D11 to D41 are reset.

After that, the horizontal transfer switch N10 of each column is driven by the signals H1 to H4 from the horizontal scanning circuit block 4.
The gates of 9 to N112 sequentially become high level, the voltage held in the signal holding capacitors CT1 to CT4 is sequentially read out to the inverting input terminal of the amplifier circuit 6, and the signal holding capacitor C
A gain determined by T1 to CT4 and the feedback capacitance Cf of the amplifier circuit is applied and sequentially output to the output terminal OUT.

The reset switch N113 controls the feedback capacitance C of the amplifier circuit between the signal readings of the respective columns.
f and the inverting input terminal are reset voltage Vr of the horizontal output line 5.
reset to es.

Similarly, the signals of the pixel cells connected to the second and subsequent rows are sequentially read by the signal from the vertical scanning circuit block 2, and the reading of all pixel cells is completed.

In this embodiment, the number of output circuits is one, but the present invention can be applied to a solid-state image pickup device in which a pixel region is arbitrarily divided and multi-channel output is provided. In the case of multi-channel output, the variation in offset for each channel causes noise in a fixed pattern in the image data, and thus the image quality is particularly deteriorated. If applied, a particularly large image quality improving effect can be obtained.

[0074]

As described above, according to the present invention,
By offsetting the read signals from the pixels not forming the diode formed in the OB area, the offset of the read signal from the image forming area can be surely removed, and a good image can be obtained.

Further, the influence of white scratches or the like is mitigated by subtracting the read signal from the pixel portion having a photodiode having a smaller PN junction surface of the photodiode than the image forming area formed in the OB area. It is possible to form an image in a closed state.

Further, the read signal from the pixel portion having the photodiode of which the PN junction surface of the photodiode has the same size as that of the image forming area formed in the OB area is differentiated, so that the solid-state image pickup device can be operated. It can be compensated by the temperature.

[Brief description of drawings]

FIG. 1 is a schematic plan view of a solid-state imaging device according to a first embodiment of the present invention.

FIG. 2 is an image forming area 11 and a first OB area 1 of FIG.
2 is an enlarged view of the pixel portion of the second OB region 13 and an enlarged view of the pixel portion of the third OB region 14 of FIGS. 9 to 15.

FIG. 3 is a diagram showing a modification of FIG.

FIG. 4 is a diagram showing a modification of FIG.

FIG. 5 is a diagram showing a modified example of FIG.

FIG. 6 is a pulse waveform diagram showing a schematic configuration of a clamp circuit for removing an offset component of a read signal from a pixel in the image forming area 11 and an input / output signal of the clamp circuit.

FIG. 7 is a diagram showing a read signal at AA ′ in FIG. 1.

8 is a diagram showing a read signal at BB ′ in FIG. 1. FIG.

FIG. 9 is a schematic plan view of a solid-state imaging device according to a second embodiment of the present invention.

FIG. 10 is a diagram showing a modified example of FIG. 9.

FIG. 11 is a diagram showing a modification of FIG. 9.

FIG. 12 is a diagram showing a modified example of FIG.

FIG. 13 is a diagram showing a modified example of FIG. 9.

FIG. 14 is a diagram showing a modified example of FIG. 9.

FIG. 15 is a diagram showing a modification of FIG. 9.

FIG. 16 is a block diagram showing a schematic configuration of a solid-state imaging system according to a third embodiment of the present invention.

FIG. 17 is an equivalent circuit diagram of the present invention.

FIG. 18 is a diagram explaining the drive pulse of FIG. 17;

FIG. 19 is an image forming area 11 and O of a conventional solid-state imaging device.
It is a typical top view which shows B area | region 12 '.

20 is a diagram showing a read signal at AA ′ in FIG.

FIG. 21 is a diagram showing a read signal at BB ′ in FIG.

[Explanation of symbols]

11 Image forming area 12 First optical black (OB) area 13 Second optical black (OB) area 14 Third Optical Black (OB) Area 20 Photoelectric conversion element (photodiode) formation area 21 PN junction area 22 Charge transfer switch (SW) 23 Charge-voltage converter 24 MOS transistor for amplifier

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Dai Fujimura             3-30-2 Shimomaruko, Ota-ku, Tokyo             Non non corporation (72) Inventor Masanori Ogura             3-30-2 Shimomaruko, Ota-ku, Tokyo             Non non corporation (72) Inventor Katsuhito Sakurai             3-30-2 Shimomaruko, Ota-ku, Tokyo             Non non corporation (72) Inventor Tomoko Eguchi             3-30-2 Shimomaruko, Ota-ku, Tokyo             Non non corporation F term (reference) 4M118 AA10 AB01 BA06 BA14 CA03                       CA09 DD10 DD12 FA06 FA33                       GB09                 5C024 AX01 CX31 GX03 GY39 GY42                       GY44 GZ37 GZ39 GZ41 HX17                       HX29 HX40

Claims (17)

[Claims] 1. A solid-state imaging device having a photoelectric conversion element for converting an optical signal from a subject into an electric signal and a reading means for reading the electric signal converted by the photoelectric conversion element in an image forming area, wherein the photoelectric conversion element is a photoelectric conversion element. And an optical black area formed by forming the reading means without forming an image forming means, and an output means for outputting a signal read from the image forming area and a signal read from the optical black area, respectively. Solid-state imaging device. 2. The solid-state imaging device according to claim 1, wherein one pixel is formed by the photoelectric conversion element and the reading means. 3. The solid state according to claim 1, wherein the output means has a difference means for calculating a difference between a signal read from the image forming area and a signal read from the optical black area. Imaging device. 4. The solid-state imaging device according to claim 3, wherein the difference component removes an offset component superimposed on a signal read from the image forming area. 5. The solid-state imaging device according to claim 1, wherein the reading unit is a transistor capable of amplifying the electric signal converted by the photoelectric conversion element. 6. The solid-state imaging device according to claim 1, wherein the photoelectric conversion element and the reading unit are two-dimensionally formed in the image forming area. 7. A solid-state imaging device having a photoelectric conversion element for converting an optical signal from a subject into an electric signal and a reading means for reading out the electric signal converted by the photoelectric conversion element in an image forming region, wherein the image formation is performed. PN of the photoelectric conversion element formed in the region
An optical black region formed by forming a photoelectric conversion element having a PN junction surface smaller than the junction surface and a reading means is provided.
A solid-state imaging device comprising output means for outputting a signal read from the image forming area and a signal read from the optical black area, respectively. 8. The solid-state imaging device according to claim 7, wherein one pixel is formed by the photoelectric conversion element and the reading means. 9. The solid state according to claim 7, wherein the output means has a difference means for calculating a difference between a signal read from the image forming area and a signal read from the optical black area. Imaging device. 10. The solid-state imaging device according to claim 9, wherein the offset means superimposed on the signal read out from the image forming area is removed by the difference means. 11. The solid-state imaging device according to claim 7, wherein the reading unit is a transistor capable of amplifying the electric signal converted by the photoelectric conversion element. 12. The solid-state image pickup device according to claim 7, wherein the image forming area is formed with the photoelectric conversion element and the reading means in a two-dimensional manner. 13. Within the optical black region,
13. The photoelectric conversion element having a PN junction surface of the same size as the PN junction surface of the photoelectric conversion element formed in the image forming region is formed. Solid-state imaging device. 14. Within the optical black region,
PN of the photoelectric conversion element formed in the image forming area
14. The solid-state imaging device according to claim 13, wherein a photoelectric conversion element having a PN junction surface having the same size as the junction surface is formed on the image forming area side. 15. The differential unit reads out, from the signals read from the optical black area, the photoelectric conversion element having a PN junction surface having the same size as the PN junction surface of the photoelectric conversion element in the image forming area. 15. The solid-state imaging device according to claim 13, wherein a signal is differentiated from a signal read from the image forming area. 16. The solid-state imaging device according to claim 15, wherein the difference means compensates the level of the electric signal depending on the ambient temperature of the main body of the solid-state imaging device. 17. A solid-state imaging system comprising the solid-state imaging device according to claim 1. Description: