JP2006210492A - Method of manufacturing printed wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a printed wiring board with which a coarse surface making processing of a conductor circuit can be performed while uniform etching property of etching liquid is kept as it is, wiring width can be maintained and cost can be reduced. <P>SOLUTION: The method of manufacturing the printed wiring board has a step for preparing a substrate material having a feeding layer or layers on one face or both faces of an insulating resin layer, a step for forming a plating resist pattern on the feeding layer, a step for forming a circuit with pattern electroplating, a step for peeling the plating resist pattern, and a step for removing the feeding layer except for a part where the circuit is formed by etching liquid. Etching liquid comprises (A) sulfuric acid, (B) hydrogen peroxide and (C) corrosion inhibitor. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a printed wiring board.

  In recent years, there has been an increasing demand for smaller, lighter, and faster electronic devices, and the density of printed wiring boards has been increasing. In recent years, a method for manufacturing printed wiring boards using a semi-additive method using electroplating has attracted attention. ing. In this semi-additive method, as described in Japanese Patent Application Laid-Open No. 10-4254, after forming a hole that becomes IVH with a laser or the like on the surface of the resin on which a circuit is to be formed, the unevenness of several μm is formed on the resin by chemical roughening or plasma treatment. Formed on top, applied with Pd catalyst, electroless plating of about 1 μm, formed pattern electroplating resist, formed circuit by pattern electroplating, and then formed the power supply layer present in the part other than resist and circuit This is a removal method, and enables finer wiring formation as compared with a subtractive method with large side etching.

  Further, there is a method of forming a circuit on a metal foil with resin by a semi-additive method. In recent years, in order to reduce the thickness of the metal foil, a peelable type metal foil in which a metal foil having a thickness of 5 μm or less is formed on a supporting metal foil as disclosed in Japanese Patent Application Laid-Open No. 2003-158364 is used. It is done. In this method, it is not necessary to perform electroless plating on the surface of the insulating resin layer, and a printed wiring board with higher reliability can be manufactured. In addition, as disclosed in JP-A-7-212444, a copper layer of about 1 μm is formed on one side of a polyimide film using an electron beam evaporation apparatus, and is laminated on an inner layer circuit via an adhesive or a prepreg. There is also a way to do it.

The etching solution for etching the power feeding layer is an etching solution mainly composed of sulfuric acid and hydrogen peroxide as disclosed in JP-A Nos. 2003-324265, 2003-158364, and 2003-86938. It is recommended to use. Since the reaction between the etching and copper has a strong chemical reaction rate-determining property, there is little difference in the etching rate per solution, which is suitable for the semi-additive method. After the circuit is formed, the surface of the conductor circuit needs to be roughened when an insulating layer is further formed on the conductor circuit by a build-up method or when a solder resist is formed on the conductor circuit. When the roughening of the conductor circuit is insufficient, the adhesion between the conductor circuit and the insulating layer becomes insufficient, and the subsequent adhesion may be reduced. Oxidation, reduction treatment and etching treatment are often used for the roughening treatment of the conductor circuit.
Japanese Patent Laid-Open No. 10-4254 JP 2003-158364 A JP-A-7-212444 JP 2003-324265 A JP 2003-86938 A

  Conventionally, the printed wiring board is not so fine, and there is room for performing the roughening treatment after the circuit is formed. In recent years, however, printed wiring boards having fine wiring with wiring lines (L) / spaces (S) of 20 μm / 20 μm or less have been required. There is a problem that it becomes much thinner than that. Further, if etching is performed at the time of circuit formation and further etching for roughening the conductor circuit, it is not good in terms of cost.

  An object of the present invention is to improve the above-described problems and enable a conductor circuit to be roughened simultaneously with etching of a power feeding layer. That is, it is an object of the present invention to provide a method for manufacturing a printed wiring board that enables a conductor circuit to be roughened while maintaining a uniform etching property of an etching solution, and enables maintenance of wiring width and cost reduction.

The present invention is as follows.
(1) A step of preparing a substrate material having a power feeding layer on one side or both sides of an insulating resin layer, a step of forming a plating resist pattern on the power feeding layer, a step of forming a circuit by pattern electroplating, and peeling the plating resist pattern And a step of removing a power feeding layer other than the portion where the circuit is formed with an etching solution, wherein the etching solution is (A) sulfuric acid, (B) hydrogen peroxide, (C ) A method for producing a printed wiring board which is an etching solution containing a corrosion inhibitor.
(2) The method for producing a printed wiring board according to item (1), wherein (C) the corrosion inhibitor is an azole compound.
(3) The term (1) or (1) wherein the roughened shape of the circuit surface after the step of removing the power feeding layer other than the portion where the circuit is formed with an etching solution is Rz (ten-point average surface roughness) ≧ 2.0 μm The manufacturing method of the printed wiring board as described in (2).
(4) The method for manufacturing a printed wiring board according to any one of Items (1) to (3), wherein the power feeding layer is a copper layer and the electroplating is electrolytic copper plating.

  It has become possible to provide a method of manufacturing a printed wiring board that enables the conductor circuit to be roughened while maintaining the uniform etchability of the etching solution, and enables the maintenance of the wiring width and cost reduction.

An embodiment of the method for producing a printed wiring board of the present invention will be described with reference to FIGS. 1 and 2, but the present invention is not limited to this. First, as shown to (a), the board | substrate material 13 which bonded the copper foil (copper layer) 2 which is a power feeding layer of 5 micrometers or less on both surfaces of the insulating resin layer 1 is prepared. In addition to the copper layer, the power feeding layer includes a nickel layer, an aluminum layer, a chromium layer, a palladium layer, a gold layer, a zinc layer, and a tin layer, but a copper layer is preferable from the viewpoint of economical workability. Examples of the insulating resin layer 1 include an epoxy resin or a polyimide resin as a main component. In addition, acrylic resin, polyimide resin, benzocyclobutene resin, fluorine resin, cyanate resin, PPE (polyphenylene ether), etc. Or its inclusions. In view of workability and strength, a reinforcing material such as glass cloth or aramid fiber may be contained. The thickness of the insulating resin layer is arbitrary, but is preferably 0.01 mm to 10 mm. The thickness of the copper foil is preferably 1 to 5 μm, and if it exceeds 5 μm, the circuit formability may be hindered. The copper foil used here is preferably an electrolytic copper foil produced at a current density of 5 A / dm ² or more. If the current density at the time of producing the copper foil is low, there is a possibility that the etching rate is slow in the subsequent etching process, which may hinder circuit formation.

Next, as shown in FIG. 1B, through holes 3 are formed in the substrate material 13 from above the copper foil. As a method of forming the through hole 3, there is a technique such as drilling or laser, but it is preferable to use a laser for processing a fine hole having a diameter of 200 μm or less. Examples of the laser that can be used here include gas lasers such as CO ₂ , CO, and excimer, and solid lasers such as YAG. Since a CO ₂ laser can easily obtain a large output, it is suitable for processing a through hole 3 having a diameter of 50 μm or more. When processing a fine through hole 3 having a diameter of 50 μm or less, a YAG laser having a shorter wavelength and good condensing property is suitable.

  Next, the resin residue inside the through hole is removed using an oxidizing agent such as permanganate, chromate, or chromic acid. Next, catalyst nuclei are applied on the copper foil and inside the through holes. A precious metal ion or a palladium colloid is used for imparting the catalyst nucleus. In particular, it is preferable to use palladium colloid because it is inexpensive.

  Next, as shown in FIG. 1C, a thin electroless copper plating layer 4 is formed on the copper foil provided with the catalyst nucleus and inside the through hole. For this electroless copper plating, commercially available electroless copper plating such as CUST2000 (trade name, manufactured by Hitachi Chemical Co., Ltd.) or CUST201 (trade name, manufactured by Hitachi Chemical Co., Ltd.) can be used. These electroless copper platings are mainly composed of copper sulfate, formalin, complexing agent and sodium hydroxide. The thickness of the thin electroless plating layer 4 may be any thickness that allows the next electroplating to be performed, and is preferably 0.1 to 1 μm. Moreover, the thin electroless copper plating layer 4 formed on the surface of the copper foil (copper layer) 2 that is the power feeding layer can also be regarded as the power feeding layer.

  Next, as shown in FIG. 1D, a plating resist 5 pattern is formed on the surface of the thin electroless plating layer 4 on the copper foil as the power feeding layer. The plating resist 5 pattern may be formed so as to be in contact with the surface of the power feeding layer, or may be formed so as to be in contact with the surface of the thin electroless copper plating layer 4 on the power feeding layer as shown in FIG. Good. The thickness of the plating resist 5 is preferably set to a thickness that is about the same as or thicker than the thickness of the conductor to be electroplated thereafter. Examples of resins that can be used for the plating resist 5 include liquid resists such as PMER P-LA900PM (trade name, manufactured by Tokyo Ohka Co., Ltd.), HW-425 (trade name, manufactured by Hitachi Chemical Co., Ltd.), RY-3025 ( And dry films such as Hitachi Chemical Co., Ltd., trade name). The plating resist 5 is not formed on the through hole and the portion to be a conductor circuit.

Next, as shown in FIG. 1E, a circuit (electroplating layer) 6 is formed by pattern electroplating. The electroplating is preferably copper electroplating, and examples thereof include copper sulfate electroplating and copper pyrophosphate electroplating that are usually used for printed wiring boards. The thickness of electroplating is only required to be used as a circuit conductor, and is preferably in the range of 1 to 100 μm, and more preferably in the range of 5 to 50 μm. The current density at the time of circuit formation is preferably lower than the current density at the time of copper foil preparation, and is preferably 0.5 A / dm ² or more and 5 A / dm ² or less. If the current density at the time of circuit formation is high, it may be easily dissolved in a later etching process.

  Next, as shown in FIG. 1 (f), after removing the plating resist pattern using an alkaline stripping solution, sulfuric acid, or a commercially available resist stripping solution, the power feeding layer (copper foil) on the surface of the insulating resin layer other than the circuit pattern portion And the thin electroless copper plating layer) are removed by using an etching solution to complete the circuit formation. The etching solution contains (A) sulfuric acid and (B) hydrogen peroxide as main components and (C) a corrosion inhibitor. Moreover, it is preferable that the said etching liquid contains 10-300 g / L (A) sulfuric acid and 10-200 g / L (B) hydrogen peroxide. An etchant containing sulfuric acid and hydrogen peroxide as main components has a good diffusion rate-determining property and therefore has good fine wiring formation. It should be noted that if the concentration is lower than the above-mentioned concentration range, the workability is poor because the etching rate is low, and if the concentration exceeds the above-mentioned concentration region, the etching rate may be high, so that it is difficult to control the etching amount. The etching rate is preferably 1 to 15 μm / min. Further, (B) an alcohol solvent may be included as a hydrogen peroxide stabilizer.

  (C) An azole compound is preferred as the corrosion inhibitor. The concentration of the azole compound in the etching solution is preferably 0.5 to 40 g / L, more preferably 0.5 to 30 g / L, and particularly preferably 0.5 to 20 g / L. preferable.

  From the viewpoint of solder heat resistance, the azole compound is preferably 1,2,3-benzotriazole. The azole compound that can be added in addition to 1,2,3-benzotriazole is not particularly limited as long as it forms fine irregularities and (C) acts as a corrosion inhibitor. For example, 5-aminotetrazole, Benzotriazole, tolyltriazole, 1-methyltetrazole, 2-methyltetrazole, 5-methyltriazole, 1-phenyltetrazole, imidazole, 5-phenyltetrazole, thiazole, pyrazole, isoxazole, 1,2,3-triazole, indazole, 1,2,4-triazole and the like can be mentioned, and 5-aminotetrazole is particularly preferable. Moreover, the said azole compound may be contained in the said etching liquid 1 type (s) or 2 or more types.

  When the power feeding layer is etched with the etching solution as described above, unevenness of several microns is generated in the conductor circuit. From the viewpoint of solder heat resistance, Rz (ten-point average surface roughness) of the surface of the conductor circuit is desirably 2.0 μm or more. Furthermore, it is more desirable that it is 2.0 to 5.0 μm.

After that, as shown in FIG. 2 (g), copper foils 8 as power feeding layers of 5 μm or less are laminated on the upper and lower sides of the conductor circuit via insulating resin layers 7. The insulating resin layer 7 includes an epoxy resin or a polyimide resin as a main component, and in addition, an acrylic resin, a polyimide resin, a benzocyclobutene resin, a fluorine resin, a cyanate resin, PPE (polyphenylene ether), The inclusion may be sufficient. In view of workability and strength, a reinforcing material such as glass cloth or aramid fiber may be contained. The thickness of the insulating resin layer 7 is arbitrary, but is preferably 0.01 mm to 10 mm.

Next, an interstitial via hole (IVH) 9 is formed in the insulating resin layer 7 from above the copper foil 8 as shown in FIG. As a method for forming the interstitial via hole (IVH), it is preferable to use a laser. Examples of the laser that can be used here include gas lasers such as CO ₂ , CO, and excimer, and solid lasers such as YAG. Since a CO ₂ laser can easily obtain a large output, it is suitable for processing an interstitial via hole (IVH) of φ50 μm or more. When processing a fine interstitial via hole (IVH) having a diameter of 50 μm or less, a YAG laser having a shorter wavelength and good condensing property is suitable.

  Next, the resin residue inside IVH is removed using an oxidizing agent such as permanganate, chromate, or chromic acid. Next, catalyst nuclei are applied on the copper foil and inside the IVH. A precious metal ion or a palladium colloid is used for imparting the catalyst nucleus. In particular, it is preferable to use palladium colloid because it is inexpensive.

  Next, as shown in FIG. 2 (i), a thin electroless copper plating layer 10 is formed on the copper foil provided with the catalyst nucleus and inside the through hole. For this electroless copper plating, commercially available electroless copper plating such as CUST2000 (trade name, manufactured by Hitachi Chemical Co., Ltd.) or CUST201 (trade name, manufactured by Hitachi Chemical Co., Ltd.) can be used. These electroless copper platings are mainly composed of copper sulfate, formalin, complexing agent and sodium hydroxide. The thickness of the thin electroless copper plating layer 10 may be any thickness that allows the next electroplating to be performed, and is preferably 0.1 to 1 μm.

  Next, as shown in FIG. 2 (j), after performing electroless plating, a plating resist 11 pattern is formed. The thickness of the plating resist 11 is preferably set to a thickness that is about the same as or thicker than the thickness of the conductor to be subsequently plated. Resins that can be used for the plating resist 11 include liquid resists such as PMER P-LA900PM (trade name, manufactured by Tokyo Ohka Co., Ltd.), HW-425 (trade name, manufactured by Hitachi Chemical Co., Ltd.), RY-3025 ( And dry films such as Hitachi Chemical Co., Ltd., trade name). The plating resist 11 is not formed on the via hole and the portion to be a conductor circuit.

Next, as shown in FIG. 2 (k), a circuit (electroplating layer) 12 is formed by electroplating. For electroplating, copper sulfate electroplating and copper pyrophosphate electroplating, which are usually used for printed wiring boards, can be used. The thickness of electroplating is only required to be used as a circuit conductor, and is preferably in the range of 1 to 100 μm, and more preferably in the range of 5 to 50 μm. The current density at the time of circuit formation is preferably lower than the current density at the time of copper foil preparation, and is preferably 0.5 A / dm ² or more and 5 A / dm ² or less. If the current density at the time of circuit formation is high, it may be easily dissolved in a later etching process.

  Next, as shown in FIG. 2 (l), the plating resist 11 pattern is stripped using an alkaline stripping solution, sulfuric acid, or a commercially available resist stripping solution, and the power feeding layer (copper foil and The circuit is formed by removing the thin electroless copper plating layer) using the etching solution.

EXAMPLES Hereinafter, although the suitable Example of this invention is described, this invention is not limited to these Examples.
(Metal foil A)
Metal foil A was produced by the following steps.
A chromium plating layer (peeling layer) having a thickness of 1.0 mg / dm ² is formed by continuously performing chromium plating on the light selective surface of an electrolytic copper foil (carrier copper foil) having a width of 510 mm and a thickness of 35 μm under the following conditions. did. Rz (ten-point average surface roughness) after chromium plating formation was 0.5 μm. The surface roughness was measured based on JIS-B-0601.
Chromium plating conditions / liquid composition: chromium trioxide 250 g / L, sulfuric acid 2.5 g / L
・ Bath temperature: 25 ° C
・ Anode: Lead ・ Current density 20A / dm ²

Next, electrolytic copper plating with a thickness of 2.0 μm was performed under the photoselective plating conditions shown below. The Rz (ten-point average surface roughness) of the metal foil after the electrolytic copper plating was 0.6 μm.
Copper sulfate plating conditions / solution composition: copper sulfate pentahydrate 100 g / L, sulfuric acid 150 g / L, chloride ion 30 ppm
・ Bath temperature: 25 ° C
・ Anode: Lead ・ Current density: 10 A / dm ²

Next, as shown below, zinc rust prevention treatment was performed by electroplating.
Liquid composition: Zinc 20 g / L, sulfuric acid 70 g / L
・ Bath temperature: 40 ℃
・ Anode: Lead ・ Current density: 15 A / dm ²
・ Electrolysis time: 10 seconds

Next, the following chromate treatment was performed.
Liquid composition: chromic acid 5.0 g / L
・ PH 11.5
・ Bath temperature: 55 ℃
・ Anode: Lead ・ Immersion time: 5 seconds

Next, the following silane coupling treatment was performed.
Liquid composition: 3-aminopropyltrimethoxysilane 5.0 g / L
・ Liquid temperature 25 ℃
・ Immersion time 10 seconds After the silane coupling treatment, the metal foil was dried at 120 ° C. to adsorb the coupling agent on the surface of the metal foil. At that time, Rz (ten-point average surface roughness) of the metal foil was 0.6 μm. As described above, metal foil A was produced.

(Resin composition A)
A resin composition A having the following composition was prepared.
-Novolac type epoxy resin having biphenyl structure, NC3000S-H (Nippon Kayaku Co., Ltd., trade name): 80 parts by weight-Carboxylic acid-modified acrylonitrile butadiene rubber particles, XER-91SE-15 (JSR Corporation, commercial product) Name): 5 parts by weight-triazine ring-containing cresol novolac type phenol resin, phenolite EXB-9829 (nitrogen content 18% by weight, hydroxyl group equivalent 151, manufactured by Dainippon Ink & Chemicals, trade name): 9 parts by weight Phenolic hydroxyl group-containing phosphorus compound, HCA-HQ (manufactured by Sanko Co., Ltd.): 26 parts by weight, inorganic filler, spherical silica, Admafine SC-2050 (manufactured by Admatechs Co., Ltd., trade name): 40 parts by weight, imidazole derivative Compound, 1-cyanoethyl-2-phenylimidazolium trimellitate , 2PZ-CNS (manufactured by Shikoku Chemicals Corporation, trade name): 0.24 parts by weight solvent, methyl ethyl ketone

(Metal foil B)
The produced resin composition A was applied to the surface of the produced metal foil A treated with the silane coupling agent. After coating, the metal foil B was produced by drying at 160 ° C. for about 1 minute so that the residual solvent was 1% by weight or less. The thickness of the coated resin composition A was 2.0 μm.

  4 foil prepregs GEA-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.), which is a resin impregnated glass cloth, and metal foil B so that the surface coated with the resin composition A on the top and bottom thereof is in contact with the prepreg. Are laminated under pressure at 170 ° C. and 2.45 MPa for 1 hour, and the carrier foil on the copper foil is peeled off to insulate the insulating resin layer 1 (prepreg, adhesion aid layer) as shown in FIG. And a substrate material 13 (copper-clad laminate) made of copper foil 2 was manufactured.

  As shown in FIG. 1 (b), through-holes 3 having a diameter of 80 μm were drilled from the copper foil 2 with a carbon dioxide impact laser drilling machine L-500 (trade name, manufactured by Sumitomo Heavy Industries, Ltd.), Smear was removed by immersing in a mixed aqueous solution of potassium acid 65 g / liter and sodium hydroxide 40 g / liter at a liquid temperature of 70 ° C. for 20 minutes.

  Then, after giving HS-201B (trade name, manufactured by Hitachi Chemical Co., Ltd.) which is a palladium catalyst, CUST-201 (trade name, manufactured by Hitachi Chemical Co., Ltd.) is used, and the liquid temperature is 25 ° C., 30 minutes. The electroless copper plating was performed under the conditions described above to form an electroless copper plating layer 4 having a thickness of 0.5 μm as shown in FIG.

  As shown in FIG. 1D, a dry film photoresist RY-3325 (trade name, manufactured by Hitachi Chemical Co., Ltd.) is laminated on the surface of the electroless copper plating layer 4 and electrolytic copper plating is performed. A plating resist 5 was formed by exposure with ultraviolet rays through a photomask masked with and developing.

As shown in FIG. 1 (e), using a copper sulfate bath, electrolytic copper plating is carried out for about 20 μm under conditions of a liquid temperature of 25 ° C. and a current density of 1.0 A / dm ² , and the minimum circuit conductor width / circuit conductor interval. Circuit 6 patterns were formed so that (L / S) = 23/17 μm.

  Next, as shown in FIG. 1 (f), after removing the dry film with HTO (trade name, manufactured by Nichigo Morton Co., Ltd.), which is a resist stripping solution, 98% by weight sulfuric acid 100 ml / l, 35% by weight excess. The power supply layer (copper foil and electroless copper plating layer) was removed by etching with an etching solution composed of hydrogen oxide 60 ml / l and (C) 2-aminotetrazole 2 g / l which is a corrosion inhibitor, to produce an inner layer substrate 14. At this time, Rz (ten-point average surface roughness) of the inner layer conductor circuit 6 was 4.0 μm. The surface roughness was measured by SURFTEST SV-400 (trade name, manufactured by MITUTOYO Co., Ltd.) according to JIS B 0601.

  A metal foil B is laminated above and below the inner layer substrate 14 so that the surface coated with one 60 μm thick GEA-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) and the resin composition A is in contact with the prepreg. A substrate as shown in FIG. 2 (g) made of the insulating resin layer 7 (prepreg, adhesion auxiliary agent layer) and the copper foil 8 was produced by press molding under the condition of 2.45 MPa for 1 hour and peeling off the carrier.

  Next, as shown in FIG. 2 (h), IVH9 having a diameter of 80 μm was opened from the copper foil 8 by a carbon dioxide impact laser drilling machine L-500 (trade name, manufactured by Sumitomo Heavy Industries, Ltd.), and permanganic acid Smear was removed by dipping in a mixed aqueous solution of potassium 65 g / liter and sodium hydroxide 40 g / liter at a liquid temperature of 70 ° C. for 20 minutes.

  Then, after giving HS-201B (trade name, manufactured by Hitachi Chemical Co., Ltd.) which is a palladium catalyst, CUST-201 (trade name, manufactured by Hitachi Chemical Co., Ltd.) is used, and the liquid temperature is 25 ° C., 30 minutes. The electroless copper plating was performed under the conditions described above to form an electroless copper plating layer 10 having a thickness of 0.5 μm as shown in FIG.

  As shown in FIG. 1 (j), a location where RY-3325 (trade name, manufactured by Hitachi Chemical Co., Ltd.), which is a dry film photoresist, is laminated on the surface of the electroless copper plating layer 10 and electrolytic copper plating is performed. A plating resist 11 was formed by exposure with ultraviolet light through a photomask masked with and developing.

As shown in FIG. 2 (k), using a copper sulfate bath, electrolytic copper plating is performed for about 20 μm under conditions of a liquid temperature of 25 ° C. and a current density of 1.0 A / dm ^2. Circuit 12 patterns were formed so that (L / S) = 23/17 μm.

  Next, as shown in FIG. 2 (l), after removing the dry film with HTO (trade name, manufactured by Nichigo-Morton Co., Ltd.) which is a resist stripping solution, 98% by weight sulfuric acid 100 ml / l, 35% by weight excess. The power supply layer (copper foil and electroless copper plating layer) of the outermost layer of the printed wiring board was removed by etching with an etching solution composed of 60 ml / l of hydrogen oxide to produce a printed wiring board. Note that the etching solution used for etching removal of the outermost power feeding layer may be a conventional etching solution or the etching solution of the present invention.

(Comparative Example 1)
A printed wiring board was produced in the same manner as in Example 1 except that an etching solution composed of 98% by weight sulfuric acid 100 ml / l and 35% by weight hydrogen peroxide 60 ml / l was used as the etching solution for the power feeding layer of the inner layer substrate 14. Rz (ten-point average surface roughness) of the inner layer conductor circuit was 1.5 μm.

(Comparative Example 2)
The surface of the conductor circuit is subjected to CZ treatment (trade name, manufactured by MEC Co., Ltd.) using an etchant composed of 98% by weight sulfuric acid 100 ml / l and 35% by weight hydrogen peroxide 60 ml / l for the feed layer etchant of the inner substrate 14. A printed wiring board was produced in the same manner as in Example 1 except that a roughened shape was formed. Rz (10-point average surface roughness) of the inner layer conductor circuit was 3.0 μm.

(Reliability evaluation of substrate)
The moisture absorption heating test of the printed wiring board produced in Example 1 and Comparative Examples 1 and 2 was performed. The test conditions were 121 ° C., 2 atm, and 100% humidity for 1 hour, and then a 260 ° C. solder heat resistance test was performed to observe defects such as swelling of the printed wiring board. The results are shown in Table 1.

  As shown in Table 1, no trouble occurred when the printed wiring board was produced according to Example 1, whereas when the printed wiring board was produced according to Comparative Example 1, there was a gap between the inner conductor and the outer insulating layer. A blister occurred. Further, it was found that when the inner layer conductor is roughened after etching of the power feeding layer as in Comparative Example 2, the circuit conductor is excessively etched, such as the minimum circuit conductor width of 23 μm becomes 15 μm. As described above, by using the present invention, the conductor circuit can be roughened while maintaining the uniform etching property of the etching solution, and the wiring width can be maintained and the cost can be reduced.

Sectional drawing which shows embodiment of the manufacturing method of the printed wiring board of this invention. Sectional drawing which shows embodiment of the manufacturing method of the printed wiring board of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Insulation resin layer 2 Copper foil 3 Through hole 4 Electroless copper plating layer 5 Plating resist 6 Circuit (electroplating layer)
7 Insulating resin layer 8 Copper foil 9 Interstitial via hole (IVH)
10 Electroless copper plating layer 11 Plating resist 12 Circuit (electroplating layer)
13 Substrate material 14 Inner layer substrate

Claims (4)

  A step of preparing a substrate material having a power feeding layer on one or both sides of an insulating resin layer, a step of forming a plating resist pattern on the power feeding layer, a step of forming a circuit by pattern electroplating, a step of peeling the plating resist pattern, a circuit A method of manufacturing a printed wiring board having a step of removing a power feeding layer other than a portion where the metal is formed with an etching solution, wherein the etching solution is (A) sulfuric acid, (B) hydrogen peroxide, and (C) corrosion inhibition. The manufacturing method of the printed wiring board which is an etching liquid containing an agent.   (C) The method for producing a printed wiring board according to claim 1, wherein the corrosion inhibitor is an azole compound.   The roughened shape of the circuit surface after the step of removing the power feeding layer other than the portion where the circuit is formed with an etching solution is Rz (ten-point average surface roughness) ≧ 2.0 μm. Manufacturing method of printed wiring board. The method for manufacturing a printed wiring board according to claim 1, wherein the power feeding layer is a copper layer, and the electroplating is electrolytic copper plating.

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